CN101474698A - Ns grade micro-energy impulsing power source based on FPGA - Google Patents
Ns grade micro-energy impulsing power source based on FPGA Download PDFInfo
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- CN101474698A CN101474698A CNA2009100450515A CN200910045051A CN101474698A CN 101474698 A CN101474698 A CN 101474698A CN A2009100450515 A CNA2009100450515 A CN A2009100450515A CN 200910045051 A CN200910045051 A CN 200910045051A CN 101474698 A CN101474698 A CN 101474698A
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Abstract
The invention relates to an FPGA based nanosecond micro-energy pulse power source belonging to the field of non traditional machining. The invention has the technical scheme that pulse signals generated by the FPGA are isolated by an opto-coupler and then are outputted into a power tube driver module, and the power tube driver module generates driving signals used for driving a charge-discharge loop module; the output voltage of the charge-discharge loop module is loaded on the electrodes of an electric spark machine tool and workpieces, the output part of the charge-discharge loop module is weakened to be connected to the FPGA by a comparator and an A/D converter module, discharge condition information gained through FPGA processing is outputted into a host computer, the output end of the FPGA is connected to a display and alarm module to display the current pulse width and the pulse interval, and a pulse width input module is connected to the FPGA to be used as an input part for regulating the pulse width; and a discharge energyregulation module regulates the capacitance value of an open-circuit voltage for pulse machining and the capacitance value of a storage capacitor. The FPGA based nanosecond micro-energy pulse power source has the advantages of high frequency, micro-energy and adjustable pulse width and discharge energy.
Description
Technical field
The present invention relates to the pulse power in a kind of special processing technology field, specifically, what relate to is a kind of ns grade micro-energy impulsing power source based on FPGA (field programmable gate array).
Background technology
Fine electric spark processing has followed the common electrical spark, and to process macroscopical active force little, and characteristics such as noncontact processing become a kind of important precision machining method in little manufacturing field, in Aero-Space, and automobile, industries such as bio-pharmaceuticals are being brought into play important effect.The continuous development of fine electric spark process technology, the pulse power that processing is used to fine electric spark is had higher requirement.Because spark machined utilizes the energy that spark discharge produced that the cycle takes place between electrode to come ablation metal, therefore, the impulse discharge on the microcosmic meaning is just very huge to the influence of the processing result on the macroeconomic significance.Fine electric spark is processed, adopted little and controlled individual pulse discharge energy, the processing effect that easier acquisition is good.At present, generally believe that the individual pulse discharge energy that fine electric spark processing is fit to should be no more than 10
-6J, this just requires fine electric spark processing to possess the special ability that is different from common electrical discharge machining pulse power with the pulse power.
The fine electric spark processing power source presents two great development trend of short pulse duration and low-voltage.The individual pulse discharge energy of spark machined can be expressed as:
In the formula, u is a voltage across poles, and i is a discharge current, and t is the discharge time of individual pulse.For independent pulse generator, can shorten the discharge time of individual pulse by the reduction pulsewidth, keep the discharge energy that reduces individual pulse under the voltage in the spark discharge of 20～30V, thereby improve the precision of microfabrication.For the RC power supply, then can reduce the individual pulse discharge energy by reducing discharge voltage, reduce anode-cathode distance, increase discharge frequency, obtain good processing effect.
The fine electric spark processing power source mainly contains non-freestanding RC power supply and two kinds of forms of free-standing power supply.The stand alone type power supply has pulse and is easy to control, and characteristics that discharge energy is controlled, but be subjected to the structural limitations of switch element are difficultly accomplished very narrow pulsewidth, make its application be subjected to restriction.The RC power supply obtains narrower pulsewidth and less individual pulse discharge energy easily, but exists single pulse energy to be difficult to control, and pulse energy is inhomogeneous, the unsettled shortcoming of technological parameter.
Find through literature search prior art, China Patent No. 98243556., name is called: novel electric spark working pulse power source, this patent has proposed the notion of controlled RC power supply, the little characteristics of common RC power supply individual pulse discharge energy had both been kept, again can be more accurately to his discharge voltage, energy and pulse width are controlled.But, existing fine electric spark processing is subjected to the restriction of components and parts performance with the pulse power, be difficult to the pulsewidth that reaches very little, have the problem of unification, do not take different detection means at scope between different pulsewidths and arteries and veins in context of detection to fine electric spark processing discharge condition.
Summary of the invention
The objective of the invention is at the deficiencies in the prior art, a kind of ns grade micro-energy impulsing power source based on FPGA is provided, integrate the advantage of existing different fine electric sparks, have high frequency, little energy, pulse width and the adjustable characteristics of discharge energy with the pulse power.
The present invention is achieved through the following technical solutions, comprises pulsewidth modulation and test section, and the main discharge circuit part.Wherein, pulsewidth modulation and test section comprise FPGA (field programmable gate array), optocoupler, comparator, A/D modular converter, demonstration and alarm module, pulse width input module; Main discharge circuit partly comprises power tube driver module, charging and discharging circuit module, discharge energy adjustment module.Connected mode between them is: the pulse signal that FPGA produces by light-coupled isolation after, output to the input of power tube driver module, the power tube driver module amplifies the pulse signal of input, produces the driving signal of using for driving charging and discharging circuit module.The output voltage of charging and discharging circuit module is loaded into the electrode and the workpiece of electric spark machine tool, and, the output of charging and discharging circuit module is connected to comparator and A/D modular converter after decay, the output of comparator and A/D modular converter is connected to FPGA, handles the discharge condition information that draws by FPGA.FPGA outputs to host computer by serial cable with these discharge condition information.The output of FPGA is connected to and shows and alarm module, shows current pulse width and pulse spacing, imports when the pulse width input module is connected to FPGA for pulsewidth modulation.The discharge energy adjustment module is connected to the charging and discharging circuit module in the main discharge circuit part, regulates the open-circuit voltage of processing pulse and the appearance value of storage capacitor.
Constituting of described charging and discharging circuit module: an end of resistance R 2 is connected with the negative terminal of Schottky diode D, and the other end is connected with the drain electrode of the first FET M2; The end of storage capacitor C is connected with the negative terminal of Schottky diode D; The grid of the second FET M1 is connected to the positive pulse output end of power tube driver module, and the grid of the first FET M2 is connected to the negative pulse output end of power tube driver module; The anode of Schottky diode D is connected with the drain electrode of the second FET M1 of FET.
Constituting of described discharge energy adjustment module: an end of resistance R 1 is connected with the positive pole of dc source V, and the other end of storage capacitor C is connected with the negative pole of dc source V.Two FET M1 of charging and discharging circuit module and the source electrode of M2 all are connected with the negative pole of dc source V, and the drain electrode of the second FET M1 is connected with the other end of resistance R 1.The discharge energy adjustment module has voltage-regulation and two kinds of functions of capacitance adjustment, and voltage-regulation is used to regulate dc source voltage, and capacitance adjustment is used for regulating appearance value and the number that the charging and discharging circuit module participates in the storage capacitor of charge and discharge process.
Described FPGA (field programmable gate array) is the major control chip, carries out the work of pulsewidth modulation.FPGA inserts the above crystal oscillator of frequency 50MHz, and under the clock frequency of 50MHz, two parametrization counters by programming realizes guarantee that it can produce highest frequency 25MHz, and pulse width and pulse spacing minimum reach 20ns.
Described pulse width input module can be regulated the size of dutycycle arbitrarily, and pulse width and pulse spacing be from 20ns～60 μ s are adjustable, and different pulse regulation step pitch and reset functions is provided.Current pulse width and pulse spacing show at demonstration and alarm module.
Among the present invention, FPGA output forward and reverse two pulse signals after light-coupled isolation, are exported to the power tube driver module, are used for controlling the break-make of charging and discharging circuit module FET.In the charging and discharging circuit module, be provided with two FETs, adopt the low type of drive that becomes,, control the charging and the discharge of storage capacitor respectively from the drain electrode output voltage.By the alternation switch of two FETs, the charge and discharge process of storage capacitor is separated, thereby realize controlling of the each discharge energy of storage capacitor.By the discharge energy adjustment module size of storage capacitor appearance value is set, can easily energy stored in the storage capacitor be reduced to 10
-8J, thus realize little and controlled single pulse discharge energy.In the charging process of storage capacitor, by the size of dc source voltage and charging resistor in the discharge energy adjustment module is set, the charging rate of storage capacitor can be regulated, and the magnitude of voltage that the storage capacitor charging is reached, the operating voltage of regulating interpolar then can be regulated; The also operating voltage that can regulate interpolar by the size of regulating charging voltage.
Described comparator and A/D modular converter are used for the interpolar discharge status detection, wherein:
Comparator adopts the saltus step edge detection method, the detection when being used between the pulsewidth arteries and veins all greater than 200ns.What comparator detected is the trailing edge of voltage across poles, judges that by the time of origin of trailing edge in FPGA this pulse is regular picture pulse or short circuit pulse, or the open circuit pulse.
The A/D modular converter adopts average voltage sample detecting method, the detection of machining state when being used between pulsewidth or arteries and veins less than 200ns.The A/D modular converter is gathered magnitude of voltage with the sampling rate more than the 1Msps, and calculates average voltage level in FPGA, to judge discharge condition.
After described FPGA receives the detection signal of comparator and the input of A/D modular converter, do simple processing by FPGA, draw the feedback information of current discharge condition, realize function that discharge condition is detected thus, and export to host computer by the mode of serial communication, for the control of servo control mechanism provides foundation.
Why the present invention adopts two kinds of different detection methods to carry out the interpolar discharge state-detection, be because of the adjustable extent very big (20ns～20 μ s) between pulsewidth and arteries and veins, and under the different pulse periods, the detection method that is fit to adopt also is different.Through the pulse of pulsewidth modulation output, after through power tube driver module and FET formation interpolar processing pulse, produced certain time-delay, this is delayed time about about 50ns.If less than 200ns, then the phase difference between the pulse of pulsewidth modulation generation and the interpolar processing pulse is just very big between pulsewidth and arteries and veins, difficult method with the saltus step rim detection obtains testing result accurately.Therefore, under the situation between little pulsewidth and scun, adopt the average voltage detection method more effective.And under situation bigger between pulsewidth and arteries and veins, it is very little that time-delay accounts for the ratio of whole pulse period, and time-delay also becomes very little to the influence of saltus step edge detection method.At this moment, employing saltus step edge detection method can obtain the discharge condition of each pulse, and is more accurate more reliable than average voltage detection method.Therefore, under situation bigger between pulsewidth and arteries and veins, just take the method for saltus step rim detection, determine discharge condition.
Pulsewidth modulation and discharge condition that the present invention adopts FPGA to finish the pulse power simultaneously detect task, realize and the communication of host computer having the integrated level height, and be flexible good, the characteristics that cost is low.FPGA forward high density, high-speed, the low-power consumption direction develops, can embedded DSP, MCU, modules such as RAM.The present invention adopts two kinds of different discharge condition detection schemes, has adapted to the requirement that accurately detects under different pulse widths and the pulse spacing condition.Integrated in the present invention two kinds of methods help enlarging the range of application of power supply, can more effectively carry out the fine finishining hour of bigger roughing of pulsewidth and pulsewidth, help improving working (machining) efficiency.
Description of drawings
Fig. 1 is a structured flowchart of the present invention;
Fig. 2 is the charging and discharging circuit module in the main discharge circuit part that adopts in the embodiment of the invention and the schematic diagram of discharge energy adjustment module;
Among the figure: pulsewidth modulation and test section 1, main discharge circuit part 2, FPGA3, optocoupler 4, power tube driver module 5, charging and discharging circuit module 6, discharge energy adjustment module 7, comparator 8, A/D modular converter 9 shows and alarm module 10, pulse width input module 11, serial cable 12, host computer 13, electric spark machine tool 14.
The specific embodiment
Below in conjunction with accompanying drawing embodiments of the invention are elaborated: present embodiment is being to implement under the prerequisite with the technical solution of the present invention, provided detailed embodiment and concrete operating process, but protection scope of the present invention is not limited to following embodiment.
As shown in Figure 1, present embodiment comprises pulsewidth modulation and test section 1 and main discharge circuit part 2.Wherein, pulsewidth modulation and test section 1 comprise FPGA 3, optocoupler 4, and comparator 8, A/D modular converter 9 shows and alarm module 10 pulse width input module 11; Main discharge circuit part 2 comprises power tube driver module 5, charging and discharging circuit module 6, discharge energy adjustment module 7.
After the output pulse of the high level 3.3V that FPGA3 produces is isolated by optocoupler 4, output to the input of power tube driver module 5, power tube driver module 5 is amplified to 12V with the pulse of input, produces for the driving signal that drives charging and discharging circuit module 6 usefulness.The output voltage of charging and discharging circuit module 6 is loaded into the electrode and the workpiece of electric spark machine tool 14, and, the output of charging and discharging circuit module 6 is connected to comparator 8 and A/D modular converter 9 after decay, their output is connected to FPGA 3, handles the discharge condition information that draws by FPGA 3.FPGA 3 outputs to host computer 13 by serial cable 12 with these information.The output of FPGA 3 is connected to and shows and alarm module 10, shows current pulse width and pulse spacing, imports when pulse width input module 11 is connected to FPGA 3 for pulsewidth modulation.Discharge energy adjustment module 7 is connected to the charging and discharging circuit module 6 in the main discharge circuit part 2, regulates the open-circuit voltage of processing pulse and the appearance value of storage capacitor.
In the present embodiment, optocoupler 4 is the logic optocoupler, and its bandwidth is DC～25MHz.
Present embodiment adopts FPGA 3 as the major control chip, carries out the work of pulsewidth modulation.Concrete, present embodiment adopts the ProASIC3 A3P250FPGA of Actel company, has 250,000 gates, and each required task module of the pulse power all can be realized by detail programming in FPGA, has saved resource.Under the clock frequency of 50MHz,, can make the minimum pulse that reaches 20ns between FPGA 3 output pulse widths and arteries and veins by two parametrization counters that programming realizes.
In the present embodiment, describedly can regulate the size of dutycycle arbitrarily by pulse width input module 11, pulse width and pulse spacing be from 20ns～60 μ s are adjustable, and different pulse regulation step pitch and reset functions is provided.Current pulse width and pulse spacing show at demonstration and alarm module 10.
As shown in Figure 2, in the present embodiment, charging and discharging circuit module 6 and discharge energy adjustment module 7 comprise: resistance R 1 and R2, storage capacitor C, two MOSFET (metal oxide semiconductor field effect tube) M1 and M2, Schottky diode D, dc source V.Wherein storage capacitor C is two components and parts that module is public.Connection line is: an end of resistance R 1 is connected with the positive pole of dc source V, and the other end is connected with the drain electrode of FET M1; One end of resistance R 2 is connected with the negative terminal of Schottky diode D, and the other end is connected with the drain electrode of FET M2; The end of storage capacitor C is connected with the negative terminal of Schottky diode D, and the other end is connected with the negative pole of dc source V; The source electrode of FET M1 and M2 all is connected with the negative pole of dc source V, and the grid of FET M1 is connected to the positive pulse output end of power tube driver module, and the grid of FET M2 is connected to the negative pulse output end of power tube driver module; The anode of Schottky diode D is connected with the drain electrode of the M1 of FET.
In the foregoing circuit, dc source V, resistance R 1 and storage capacitor C have constituted discharge energy adjustment module 7, and wherein, dc source V, resistance R 1 belong to the voltage-regulation part, and storage capacitor C belongs to the capacitance adjustment part.By regulating dc source V and resistance R 1, can regulate charging rate and the open-circuit voltage of storage capacitor C, thereby regulate discharge energy; By regulating appearance value and the number of storage capacitor C, can regulate storage capacitor C energy stored value under certain voltage, play the effect of regulating discharge energy.
Resistance R 2, storage capacitor C, FET M1 and M2, Schottky diode D has constituted the structure of charging and discharging circuit module 6, and wherein, FET M1 and M2 are core components.FET M1 and M2 opening and turn-offing, and are to be driven by the opposite two pulse signals of the phase place of 5 outputs of power tube driver module in the main discharge circuit part 2.
The mode that the FET M1 of C charging of control storage capacitor and discharge and M2 all adopt low limit to drive, the drain electrode that is about to FET is as output.FET M1 and M2 replace break-make.When field-effect pipe M1 turn-offed, dc source charged to storage capacitor C, and this moment, FET M2 opens, and the drain terminal voltage of FET M2 is zero, and electromotive force is zero between the electrode, is in the pulse spacing state, does not discharge; When field-effect pipe M1 opens, the drain voltage of FET M1 is zero, dc source stops to the charging to storage capacitor C, at this moment, FET M2 turn-offs, drain terminal voltage moment of FET M2 rises to the magnitude of voltage that storage capacitor C charging back is reached, and forms a pulse between electrode, and storage capacitor C energy stored is released in the spark discharge between the electrode.The charge and discharge process of storage capacitor C separates, and has realized the controlled of individual pulse discharge energy.
M1 is open-minded at FET, and under the situation that FET M2 turn-offs, FET M1 drain terminal voltage is zero, and the high voltage that forms after having this moment charging to finish on the storage capacitor C.Run off in order to stop the electric weight of storing among the storage capacitor C to return, a high performance Schottky diode D is set on path, realize quick shutoff, fully be used for the discharge of interpolar to guarantee the energy among the storage capacitor C to path through FET M1 passage.
In the present embodiment course of work, FPGA3 output forward and reverse two pulse signals, after optocoupler 4 is isolated, export to power tube driver module 5, be used for controlling the break-make of charging and discharging circuit module 6 FET M1 and M2, two FET M1 in the charging and discharging circuit module 6 and M2, adopt the low type of drive that becomes, from the drain electrode output voltage, control charging and the discharge of storage capacitor C respectively, discharge energy adjustment module 7 is provided with the size of storage capacitor C appearance value, and energy stored among the storage capacitor C is reduced to 10
-8J realizes little and controlled single pulse discharge energy; In the charging process of storage capacitor C, by the size of dc source voltage and charging resistor in the discharge energy adjustment module 7 is set, regulate the charging rate of storage capacitor C, the magnitude of voltage that storage capacitor C charging is reached, then regulate the operating voltage of interpolar, also the operating voltage that can regulate interpolar by the size of regulating charging voltage.
Present embodiment adopts comparator 8 and A/D modular converter 9 to finish the detection that two kinds of diverse ways are used for discharge condition respectively.Wherein, comparator 8 is carried out the saltus step edge detection methods, is used for big (〉 200ns between pulsewidth and arteries and veins) situation, A/D modular converter 9 is carried out the average voltage detection methods, is used for (＜200ns) situation less between pulsewidth and arteries and veins.
In the present embodiment, comparator 8 uses the MAX999 comparator of U.S. letter company, detects the trailing edge of each pulse.If before the pulse trailing edge under no-load condition arrived, comparator had promptly detected the pulse trailing edge, then be considered as flashing discharge in this pulse period; If after rising edge of a pulse arrived under no-load condition, it was 0 that comparator still detects voltage across poles, then is considered as this pulse period short circuit; If the trailing edge under no-load condition comes interim, the detected voltage across poles of comparator still is an open-circuit voltage, then is considered as this pulse period open circuit, does not discharge.By each shared ratio of pulse of adding up spark discharge, open circuit and short circuit in a certain period, can obtain the discharge condition information in this period.
In the present embodiment, A/D modular converter 9 adopts the MAX1206 high-speed AD converter of U.S. letter company to sample, and the high sampling rate of MAX1206 reaches 40MHz, can satisfy the requirement of present embodiment.
The above-mentioned comparator 8 and the testing result of A/D modular converter 9 output to FPGA3, after FPGA3 receives the detection signal of comparator 8 and 9 inputs of A/D modular converter, the treated feedback information that draws current discharge condition, realize function that discharge condition is detected thus, and export to host computer 13 by the mode of serial communication, for the control of servo control mechanism provides foundation.
Claims (4)
1, a kind of ns grade micro-energy impulsing power source based on FPGA, it is characterized in that: comprise pulsewidth modulation and test section, and main discharge circuit part, described pulsewidth modulation and test section comprise FPGA, optocoupler, comparator, the A/D modular converter, show and alarm module, the pulse width input module, described main discharge circuit partly comprises the power tube driver module, the charging and discharging circuit module, the discharge energy adjustment module, wherein: the pulse signal that FPGA produces by light-coupled isolation after, output to the input of power tube driver module, the power tube driver module amplifies the pulse signal of input, produces for driving the driving signal that the charging and discharging circuit module is used; The output voltage of charging and discharging circuit module is loaded into the electrode and the workpiece of electric spark machine tool, and, the output of charging and discharging circuit module is connected to comparator and A/D modular converter after decay, the output of comparator and A/D modular converter is connected to FPGA, handles the discharge condition information that draws by FPGA; FPGA outputs to host computer by serial cable with these discharge condition information, and the output of FPGA is connected to and shows and alarm module, shows current pulse width and pulse spacing, imports when the pulse width input module is connected to FPGA for pulsewidth modulation; The discharge energy adjustment module is connected to the charging and discharging circuit module in the main discharge circuit part, regulates the open-circuit voltage of processing pulse and the appearance value of storage capacitor.
2, the ns grade micro-energy impulsing power source based on FPGA according to claim 1, it is characterized in that, constituting of described charging and discharging circuit module: an end of resistance (R2) is connected with the negative terminal of Schottky diode (D), and the other end is connected with the drain electrode of first FET (M2); One end of storage capacitor (C) is connected with the negative terminal of Schottky diode (D), the grid of second FET (M1) is connected to the positive pulse output end of power tube driver module, the grid of first FET (M2) is connected to the negative pulse output end of power tube driver module, and the anode of Schottky diode (D) is connected with the drain electrode of second FET (M1) of FET;
Constituting of described discharge energy adjustment module: an end of resistance (R1) is connected with the positive pole of dc source (V), and the other end of storage capacitor (C) is connected with the negative pole of dc source (V);
Two FETs (M1) of charging and discharging circuit module and the source electrode of (M2) all are connected with the negative pole of dc source (V), and the drain electrode of second FET (M1) is connected with the other end of resistance (R1).
3, the ns grade micro-energy impulsing power source based on FPGA according to claim 1 is characterized in that, described FPGA inserts the above crystal oscillator of frequency 50MHz, produces highest frequency 25MHz, and pulse width and pulse spacing minimum reach 20ns.
4, the ns grade micro-energy impulsing power source based on FPGA according to claim 1 is characterized in that, described pulse width input module, and its pulse width and pulse spacing are from 20ns～60 μ s are adjustable.
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| CN102248235A (en) * | 2011-05-23 | 2011-11-23 | 哈尔滨工业大学 | Device and method for detecting discharge state in electric spark linear cutting work gap |
| CN102658405A (en) * | 2012-05-11 | 2012-09-12 | 中国工程物理研究院机械制造工艺研究所 | Multifunctional micro-electric-spark milling device |
| CN103990871A (en) * | 2014-06-16 | 2014-08-20 | 厦门大学 | Nanosecond-pulse-width pulsed power supply used for electrosparking |
| CN107052481A (en) * | 2017-03-09 | 2017-08-18 | 中国工程物理研究院机械制造工艺研究所 | A kind of high frequency of multi-channel parallel cross-circulation driving is micro- can the electric machining pulse power |
| CN107332459A (en) * | 2017-08-19 | 2017-11-07 | 万江华 | The nanosecond class pulse generator for EDM system and control method of Wire EDM |
| CN108723524A (en) * | 2018-06-08 | 2018-11-02 | 中国工程物理研究院机械制造工艺研究所 | A kind of resonance of very high frequency(VHF) declines can electric machining clock |
| CN110328419A (en) * | 2019-07-22 | 2019-10-15 | 南京理工大学 | No resistive spark pulse power and its processing and clearance discharge condition recognition methods |
| CN112859153A (en) * | 2019-11-12 | 2021-05-28 | 中国石油天然气集团有限公司 | Electric spark seismic source trigger device and control method |
| CN114799376A (en) * | 2022-05-13 | 2022-07-29 | 哈尔滨工业大学 | LC high-frequency pulse power supply for micro electric discharge machining |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102248235A (en) * | 2011-05-23 | 2011-11-23 | 哈尔滨工业大学 | Device and method for detecting discharge state in electric spark linear cutting work gap |
| CN102658405A (en) * | 2012-05-11 | 2012-09-12 | 中国工程物理研究院机械制造工艺研究所 | Multifunctional micro-electric-spark milling device |
| CN102658405B (en) * | 2012-05-11 | 2014-04-02 | 中国工程物理研究院机械制造工艺研究所 | Multifunctional micro-electric-spark milling device |
| CN103990871A (en) * | 2014-06-16 | 2014-08-20 | 厦门大学 | Nanosecond-pulse-width pulsed power supply used for electrosparking |
| CN103990871B (en) * | 2014-06-16 | 2016-03-02 | 厦门大学 | A kind of nanosecond width pulse power supply for spark machined |
| CN107052481B (en) * | 2017-03-09 | 2019-08-09 | 中国工程物理研究院机械制造工艺研究所 | A kind of high frequency of multi-channel parallel cross-circulation driving is micro- can the electric machining pulse power |
| CN107052481A (en) * | 2017-03-09 | 2017-08-18 | 中国工程物理研究院机械制造工艺研究所 | A kind of high frequency of multi-channel parallel cross-circulation driving is micro- can the electric machining pulse power |
| CN107332459A (en) * | 2017-08-19 | 2017-11-07 | 万江华 | The nanosecond class pulse generator for EDM system and control method of Wire EDM |
| CN107332459B (en) * | 2017-08-19 | 2023-05-05 | 万江华 | Nanosecond pulse power supply system for wire-cut electric discharge machining and control method |
| CN108723524A (en) * | 2018-06-08 | 2018-11-02 | 中国工程物理研究院机械制造工艺研究所 | A kind of resonance of very high frequency(VHF) declines can electric machining clock |
| CN108723524B (en) * | 2018-06-08 | 2020-02-21 | 中国工程物理研究院机械制造工艺研究所 | Very high frequency resonance type micro-energy electric machining pulse source |
| CN110328419A (en) * | 2019-07-22 | 2019-10-15 | 南京理工大学 | No resistive spark pulse power and its processing and clearance discharge condition recognition methods |
| CN112859153A (en) * | 2019-11-12 | 2021-05-28 | 中国石油天然气集团有限公司 | Electric spark seismic source trigger device and control method |
| CN114799376A (en) * | 2022-05-13 | 2022-07-29 | 哈尔滨工业大学 | LC high-frequency pulse power supply for micro electric discharge machining |
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