CN101442488B

CN101442488B - Switching system and method for large port exchange chip

Info

Publication number: CN101442488B
Application number: CN200810241077A
Authority: CN
Inventors: 王达伟; 胡涛; 安学军; 孙凝晖
Original assignee: Institute of Computing Technology of CAS
Current assignee: Institute of Computing Technology of CAS
Priority date: 2008-12-25
Filing date: 2008-12-25
Publication date: 2012-10-10
Anticipated expiration: 2028-12-25
Also published as: CN101442488A

Abstract

The invention relates to a switching system and a switching method for a large-port switching chip. The switching chip comprises a plurality of port modules, the switching system comprises a plurality of first crossbar switches and at least one second crossbar switch, the port modules are connected with the first crossbar switches, and the second crossbar switch is connected with each first crossbar switch; the first crossbar switches are used for judging whether target ports of data packets are ports of the first crossbar switches or not when the data packets sent by port modules are received, the data packets are forwarded to the target ports of the data packets if yes, or else the data packets are forwarded to the second crossbar switch; the second crossbar switch is used for forwarding the data packets to the first crossbar switches where the target ports of the data packets are positioned when the data packets forwarded by the first crossbar switches are received, and the data packets are forwarded to the target ports of the data packets by the first crossbar switches where the target ports of the data packets are positioned. The system and the method can reduce the complexity of the switching chip and realize the large-scale switching on the same switch.

Description

A kind of switching system and method for large port exchange chip

Technical field

The present invention relates to the data communication network field, relate in particular to a kind of switching system and method for large port exchange chip.

Background technology

The network switch is to be used for carrying out the device that packet is transmitted.Packet gets into switch from source port, and according to the routing iinformation of packet, switch is forwarded to destination interface with packet.The acp chip of switch is an exchange chip.Exchange chip comprises a plurality of port modules and cross switch module.Each port module inside comprises transmission, reception and three modules of Flow Control.Cross switch module is made up of routing module and arbitration modules and the interconnecting relation between them.The sending module of port module is used to send packet and Flow Control bag.The receiver module of port module is used for extracting packet and Flow Control bag from receiving data stream.The destination interface that routing module provides according to packet, the application corresponding ports is carried out transfer of data.Arbitration modules is then arbitrated the routing module of applying for same destination interface, arbitrates successful packet and occupies destination interface, can transmit data; Next arbitration result is waited in the continuation of failure.

Because performance application is endless to the demand of computing capability, causes the computer system scale constantly to increase.According to the latest data display analysis, high-performance computer system has had ten thousand processors, and system scale enlarges rapidly.The expansion of system scale has proposed the challenge of three aspects, network extensibility, reliability and low power dissipation design to network interconnection.

Summary of the invention

For addressing the above problem, the invention provides the switching system and the method for a kind of large port exchange chip, can reduce the complexity of exchange chip, and be implemented in and carry out large-scale switching on the same switch.

The invention discloses a kind of switching system of large port exchange chip; Said exchange chip comprises a plurality of port modules; Said system comprises a plurality of first cross bar switches and at least one second cross bar switch; Said port module connects with said first cross bar switch, and said second cross bar switch connects with each said first cross bar switch;

Said first cross bar switch; Be used for when receiving the packet of said port module transmission; Whether the destination interface of judging said packet is the port of said first cross bar switch self; If then said packet is forwarded to the destination interface of said packet, otherwise said packet is transmitted to said second cross bar switch;

Said second cross bar switch is used for when receiving the packet of said first cross bar switch forwarding, said packet is forwarded to first cross bar switch at the destination interface place of said packet; Said packet is forwarded to the destination interface of said packet by first cross bar switch at the destination interface of said packet place.

Said first cross bar switch comprises upstream port and downstream port; Said second cross bar switch comprises downstream port; The downstream port of said first cross bar switch connects said port module, and the upstream port of said first cross bar switch connects the downstream port of said second cross bar switch.

The number of the downstream port of said first cross bar switch equals the number of the upstream port of said first cross bar switch;

The number of the downstream port of said second cross bar switch equals the number of said first cross bar switch;

The number of said second cross bar switch equals the number of the upstream port of said first cross bar switch.

Said first cross bar switch is formed 0 layer of cross bar switch, and said second cross bar switch is formed 1 layer of cross bar switch;

J upstream port of the i of said 0 layer of cross bar switch first cross bar switch connects with i downstream port of j second cross bar switch of said 1 layer of cross bar switch.

Said first cross bar switch judges that the destination interface of said packet is further used for when whether being the port of said first cross bar switch self; The value that rounds on the number income value of destination slogan divided by the downstream port of said first cross bar switch of the value that rounds on the number income value of source port number divided by the downstream port of said first cross bar switch with said packet with said packet relatively; If two values equate; The destination interface of then confirming said packet is the downstream port of said first cross bar switch self, otherwise confirms that the destination interface of said packet is the downstream port of other first cross bar switch.

Said first cross bar switch is further used for when said packet is forwarded to said destination interface confirming that the destination interface of said packet is m0 at the serial number of the downstream port of said first cross bar switch, said packet is forwarded to m0 downstream port of said first cross bar switch.

The destination slogan that said serial number m0 equals said data rounds the remainder of complementation gained divided by the number of the downstream port of said first cross bar switch.

The destination slogan that said first cross bar switch is further used for confirming transmitting the said first cross bar switch upstream port of said packet when said packet being transmitted to said second cross bar switch serial number m1 equals said packet rounds the remainder of complementation gained divided by the number of the said first cross bar switch upstream port, and said packet is transmitted to said second cross bar switch from m1 upstream port of said first cross bar switch.

Said second cross bar switch is further used for when first cross bar switch at the destination interface place that said packet is forwarded to said packet confirming that the serial number of first cross bar switch in said exchange chip under the destination interface of said packet is m2, said packet is transmitted to first cross bar switch of this m2 downstream port connection via m2 downstream port of said second cross bar switch.

Said serial number m2 equals the value that rounds on the number income value of destination slogan divided by the downstream port of said first cross bar switch of said packet.

The invention also discloses a kind of switching system of large port exchange chip; Said exchange chip comprises a plurality of port modules; Said system comprises a plurality of switched sub-networks and at least one the 3rd cross bar switch; Said switched sub-networks comprises a plurality of first cross bar switches and at least one second cross bar switch, and said port module connects with said first cross bar switch, and said first cross bar switch of each of said second cross bar switch and same switched sub-networks is connected; Said the 3rd cross bar switch connects with at least one second cross bar switch in each said switched sub-networks;

Said first cross bar switch; Be used for when receiving the packet of said port module forwarding; Whether the destination interface of judging said packet is the port of said first cross bar switch self; If then said packet is forwarded to the destination interface of said packet, otherwise said packet is transmitted to one second cross bar switch of same switched sub-networks;

Said second cross bar switch; Be used for when the packet of first cross bar switch forwarding that receives same switched sub-networks; Whether source port and the destination interface of judging said packet be in same switched sub-networks; If, then said packet is forwarded to first cross bar switch at the destination interface place of said packet, said packet is forwarded to the destination interface of said packet by first cross bar switch that receives said packet; Otherwise said packet is transmitted to said the 3rd cross bar switch;

Said the 3rd cross bar switch is used for when receiving the packet that said second cross bar switch transmits, and said packet is forwarded to one second cross bar switch of switched sub-networks at the destination interface place of said packet; Said packet is forwarded to first cross bar switch at the destination interface place of said packet by second cross bar switch that receives said packet; Said packet is forwarded to the destination interface of said packet by first cross bar switch that receives said packet.

Said first cross bar switch comprises upstream port and downstream port, and said second cross bar switch comprises upstream port and downstream port, and said the 3rd cross bar switch comprises downstream port;

The downstream port of said first cross bar switch connects said port module;

The upstream port of said first cross bar switch connects the downstream port of said second cross bar switch of same switched sub-networks;

The upstream port of said second cross bar switch connects the downstream port of said the 3rd cross bar switch.

The number of the downstream port of said first cross bar switch equals the number of the upstream port of said first cross bar switch, and the number of the downstream port of said second cross bar switch equals the number of the upstream port of said second cross bar switch;

The number of the downstream port of said the 3rd cross bar switch equals the number of said switched sub-networks;

The number of said the 3rd cross bar switch equals the sum of the downstream port of all said first cross bar switches in the said switched sub-networks;

The number of the downstream port of said second cross bar switch equals the number of first cross bar switch described in the same switched sub-networks;

The number of second cross bar switch equals the number of the upstream port of said first cross bar switch described in switched sub-networks.

Said first cross bar switch of same switched sub-networks is formed 0 layer of cross bar switch, and said second cross bar switch of same switched sub-networks is formed 1 layer of cross bar switch, and said the 3rd cross bar switch is formed 2 layers of cross bar switch;

J upstream port of the i of said 0 layer of cross bar switch of same switched sub-networks first cross bar switch connects with i downstream port of j second cross bar switch of 1 layer of cross bar switch of said switched sub-networks;

Q downstream port of the k of 2 layers of cross bar switch the 3rd cross bar switch connects with k upstream port of q switched sub-networks.

Said first cross bar switch judges that the value that rounds on the income value of destination slogan divided by the number of the downstream port of said first cross bar switch of value with said packet that the destination interface of said packet is further used for rounding on the income value of source port number divided by the number of the downstream port of said first cross bar switch with said packet when whether being the port of said first cross bar switch self relatively; If two values equate; Then the destination interface of said packet is the downstream port of said first cross bar switch self, otherwise the destination interface of said packet is the downstream port of other first cross bar switch.

Said first cross bar switch is further used for when said packet being forwarded to the destination interface of said packet confirming that the serial number of destination interface in the downstream port of said first cross bar switch of said packet is n0, said packet is forwarded to n0 downstream port of said first cross bar switch.

The destination slogan that said serial number n0 equals said packet rounds the remainder of complementation gained divided by the number of the downstream port of said first cross bar switch.

The destination slogan that said first cross bar switch is further used for confirm transmitting the said first cross bar switch upstream port of said packet when said packet being transmitted to second cross bar switch of same switched sub-networks serial number n1 equals said packet divided by the number of the upstream port of said first cross bar switch round the complementation gained remainder, said packet is transmitted to said second cross bar switch from n1 upstream port of said first cross bar switch.

Said second cross bar switch is further used for value that value that source port number with said packet rounds on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks rounds on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks with the destination slogan of said packet during whether in same switched sub-networks relatively at the source port of judging said packet and destination interface; If two values equate; Then the source port of said packet and destination interface be in same switched sub-networks, otherwise the source port of said packet and destination interface be not in same switched sub-networks.

Said second cross bar switch is further used for when first cross bar switch at the destination interface place that said packet is forwarded to said packet confirming that first cross bar switch serial number in the switched sub-networks under it under the destination interface of said packet is n2, and said packet is transmitted to said first cross bar switch from n2 downstream port of said second cross bar switch.

The value that said serial number n2 equals to round on the number income value of destination slogan divided by the downstream port of said first cross bar switch of said packet is divided by the remainder that rounds the complementation gained of the number of first cross bar switch described in the switched sub-networks.

Said second cross bar switch is further used for when said packet being transmitted to said the 3rd cross bar switch confirming that first cross bar switch serial number in the switched sub-networks under it under the destination interface of said packet is n3, and said packet is transmitted to said the 3rd cross bar switch from n3 upstream port of said second cross bar switch.

The value that said serial number n3 equals to round on the number income value of destination slogan divided by the downstream port of said first cross bar switch of said packet is divided by the remainder that rounds the complementation gained of the number of first cross bar switch described in the switched sub-networks.

Said the 3rd cross bar switch is further used for when the switched sub-networks at the destination interface place that said packet is forwarded to said packet confirming that the serial number of switched sub-networks in said exchange chip is n4 under the destination interface of said packet, and said packet is transmitted to said second cross bar switch from n4 downstream port of said the 3rd cross bar switch.

Said serial number n4 equals the value that rounds on the income value of destination slogan divided by the sum of the downstream port of all said first cross bar switches in the switched sub-networks of said packet.

The invention also discloses a kind of switching method of large port exchange chip, comprising:

Step 1, a plurality of port modules first cross bar switch connection together respectively with said exchange chip connects second cross bar switch with each said first cross bar switch;

Step 2; Said first cross bar switch receives the packet that said port module sends, and judges whether the destination interface of said packet is the port of said first cross bar switch self, if execution in step 4 then; Otherwise, said packet is transmitted to said second cross bar switch;

Step 3, said second cross bar switch receive the packet that said first cross bar switch is transmitted, and said packet are forwarded to first cross bar switch at the destination interface place of said packet;

Step 4, said first cross bar switch is forwarded to said packet the destination interface of said packet.

Said first cross bar switch comprises upstream port and downstream port, and said second cross bar switch comprises downstream port;

Said step 1 further connects said port module for the downstream port with said first cross bar switch, and the upstream port of said first cross bar switch connects the downstream port of said second exchange chip.

Said step 1 further is i the downstream port connection with individual second cross bar switch of j of said 1 layer of cross bar switch of j upstream port of i first cross bar switch that will said 0 layer of cross bar switch.

Whether the destination interface of judging said packet in the said step 2 is the further value comparison for rounding on the number income value of destination slogan divided by the downstream port of said first cross bar switch of value with said packet that rounds on the number income value of source port number divided by the downstream port of said first cross bar switch with said packet of port of said first cross bar switch self; If two values equate; Then the destination interface of said packet is the downstream port of said first cross bar switch self, otherwise the destination interface of said packet is the downstream port of other first cross bar switch.

Said step 4 further is:

Step 311 confirms that the serial number of destination interface in the downstream port of said first cross bar switch of said packet is m0;

Step 312 is forwarded to said packet m0 downstream port of said first cross bar switch.

The destination slogan that said serial number m0 equals said packet rounds the remainder of complementation gained divided by the number of the downstream port of said first cross bar switch.

In the said step 2 said packet being transmitted to said second cross bar switch further comprises:

Step 331, the destination slogan that definite serial number m1 that transmits the said first cross bar switch upstream port of said packet equals said packet rounds the remainder of complementation gained divided by the number of the upstream port of said first cross bar switch;

Step 332 is transmitted to said second cross bar switch with said packet from m1 upstream port of said first cross bar switch.

Said step 3 further is:

Step 341, confirm first cross bar switch under the destination interface of said packet in said exchange chip serial number be m2;

Step 342 is transmitted to said first cross bar switch with said packet from m2 downstream port of said second cross bar switch.

Step 1; First cross bar switch and second cross bar switch are formed a plurality of switched sub-networks; A plurality of port modules are connected with said first cross bar switch; Each said first cross bar switch of said second cross bar switch and same switched sub-networks is connected, said the 3rd cross bar switch is connected with at least one second cross bar switch in each said switched sub-networks;

Step 2; Said first cross bar switch receives the packet that said port module sends; Whether the destination interface of judging said packet is the port of said first cross bar switch self; If execution in step 6 then, otherwise, said packet is transmitted to one second cross bar switch of same switched sub-networks;

Step 3; Said second cross bar switch receives the packet that first cross bar switch of same switched sub-networks is transmitted, and whether source port and the destination interface of judging said packet in same switched sub-networks, if; Then execution in step 5, otherwise said packet is transmitted to said the 3rd cross bar switch;

Step 4, said the 3rd cross bar switch receive the packet that said second cross bar switch is transmitted, and said packet are forwarded to one second cross bar switch of switched sub-networks at the destination interface place of said packet;

Step 5, said second cross bar switch are transmitted to said packet first cross bar switch at said packet rs destination port place;

Step 6, said first cross bar switch is forwarded to said packet the destination interface of said packet.

Said step 1 further is:

Step 371 connects the downstream port of said first cross bar switch with said port module;

Step 372 is connected the downstream port of said second cross bar switch of the upstream port of said first cross bar switch and same switched sub-networks;

Step 373 connects the upstream port of said second cross bar switch downstream port with said the 3rd cross bar switch.

Said step 372 further is with i the downstream port connection with j second cross bar switch of 1 layer of cross bar switch of said switched sub-networks of j upstream port of the i of said 0 layer of cross bar switch of same switched sub-networks first cross bar switch;

Step 373 further is q downstream port k the upstream port connection of q switched sub-networks together with k the 3rd cross bar switch of 2 layers of cross bar switch.

Said step 6 further is:

Step 411 confirms that the serial number of destination interface in the downstream port of said first cross bar switch of said packet is n0;

Step 412 is forwarded to said packet n0 downstream port of said first cross bar switch.

Second cross bar switch that in the said step 2 said packet is transmitted to same switched sub-networks further does

Step 431, the destination slogan that definite serial number n1 that transmits the said first cross bar switch upstream port of said packet equals said packet rounds the remainder of complementation gained divided by the number of the upstream port of said first cross bar switch;

Step 432 is transmitted to said second cross bar switch with said packet from n1 upstream port of said first cross bar switch.

The value whether source port and the destination interface of judging said packet in the said step 3 further rounds on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks with the destination slogan of said packet for value that the source port number of said packet is rounded on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks in same switched sub-networks relatively; If two values equate; Then the source port of said packet and destination interface be in same switched sub-networks, otherwise the source port of said packet and destination interface be not in same switched sub-networks.

Said step 5 further is:

Step 451 confirms that affiliated first cross bar switch serial number in the switched sub-networks under it of destination interface of said packet is n2;

Step 452 is transmitted to said first cross bar switch with said packet from n2 downstream port of said second cross bar switch.

The value that said serial number n2 equals to round on the income value of destination slogan divided by the number of the downstream port of said first cross bar switch of said packet is divided by the remainder that rounds the complementation gained of the number of first cross bar switch described in the switched sub-networks.

In the said step 3 said packet being transmitted to said the 3rd cross bar switch further be:

Step 471 confirms that affiliated first cross bar switch serial number in the switched sub-networks under it of destination interface of said packet is n3;

Step 472 is transmitted to said the 3rd cross bar switch with said packet from n3 upstream port of said second cross bar switch.

The value that said serial number n3 equals to round on the income value of destination slogan divided by the number of the downstream port of said first cross bar switch of said packet rounds complementation gained remainder divided by the number of first cross bar switch described in the switched sub-networks.

Said step 4 further is:

Step 491 confirms that the affiliated serial number of switched sub-networks in said exchange chip of destination interface of said packet is n4;

Step 492 is transmitted to said second cross bar switch with said packet from n4 downstream port of said the 3rd cross bar switch.

Beneficial effect of the present invention is that the present invention adopts the structure of layering can reduce the complexity of exchange chip, and can realize a kind of exchange of switch of extensive port, thereby reduces the network number of plies; Effectively improve the extension of network performance; Reduce network delay, effectively reduce the number of switch, reduce power consumption; Reduce the number of inter-exchange interconnection line, improve system reliability.

Description of drawings

Fig. 1 is the structure chart of two layers of switching system of the present invention;

Fig. 2 is the method flow diagram that two layers of switching system of the present invention exchange;

Fig. 3 is the structure chart of three layers of switching system of the present invention;

Fig. 4 is the method flow diagram that three layers of switching system of the present invention exchange;

Fig. 5 is the specific embodiment structure chart of two layers of switching system of the present invention;

Fig. 6 is the specific embodiment structure chart of three layers of switching system of the present invention.

Embodiment

Below in conjunction with accompanying drawing, the present invention is done further detailed description.

The complexity of exchange chip and the port number of exchange chip square proportional.In order to reduce the complexity of exchange chip, the present invention is divided into exchange chip inside two-layer or three layers, the cross bar switch of every layer of a series of port small scale of correspondence.

The inner layering sequence number of exchange chip begins note with 0 among the present invention.For example: the exchange chip in two layers of switching system is divided into: 0 layer, 1 layer; The cross bar switch that different layers is corresponding is respectively: 0 layer of cross bar switch, 1 layer of cross bar switch; Exchange chip in three layers of switching system is divided into: 0 layer, 1 layer, 2 layers; The cross bar switch that different layers is corresponding is respectively: 0 layer of cross bar switch, 1 layer of cross bar switch, 2 layers of cross bar switch.

The structure of two layers of switching system of the present invention is as shown in Figure 1.Exchange chip has N port; With the cross bar switch that the port module of exchange chip directly links to each other is first cross bar switch; First all in this exchange chip cross bar switches are formed 0 layer of cross bar switch; First cross bar switch connects with second cross bar switch simultaneously, and all second cross bar switches in this exchange chip are formed 1 layer of cross bar switch.The port that links to each other with port module in first cross bar switch is called downstream port, and the port that links to each other with second cross bar switch is called upstream port.The port that connects with first cross bar switch in second cross bar switch is a downstream port.The upstream port number of supposing first cross bar switch is M, and the downstream port number of first cross bar switch also is M, and the port number of first cross bar switch is 2M, total K first cross bar switch in 0 layer of cross bar switch.The port number of second cross bar switch is K, and the second cross bar switch number is M in 1 layer of cross bar switch.Port number N=M * the K of exchange chip.

The total K of 0 layer of cross bar switch first cross bar switch, each first cross bar switch is marked as L0Xi by its order in 0 layer of cross bar switch, i=0 wherein, 1,2 ... K-1.Each first cross bar switch has M upstream port, and each upstream port is marked as L0Xi.Pj by its order in first cross bar switch, i=0 wherein, 1,2 ... K-1; J=0,1,2 ... M-1.Total M second cross bar switch of 1 layer of cross bar switch, each second cross bar switch is marked as L1Xi by its order in 1 layer of cross bar switch, i=0 wherein, 1,2 ... M-1.Each second cross bar switch has K downstream port, and each downstream port is marked as L1Xi.Pj by its order in second cross bar switch, i=0 wherein, 1,2 ... M-1; J=0,1,2 ... K-1.

Any one first cross bar switch exists and unique existence relation of linking to each other with any one second cross bar switch, and annexation is that the first cross bar switch upstream port L0Xr.Pt is connected with second cross bar switch downstream port L1Xt.Pr existence.By above-mentioned rule, the N of exchange chip data port is divided into the K group by 0 layer of cross bar switch, every group of M port, and every group of corresponding one first cross bar switch, and continuous with 0 layer of cross bar switch.The group number that FPDP is numbered the FPDP of S is the merchant of S divided by M, and the address is the remainder of S divided by M in the group of S.

Wherein, discuss for dividend divided by the value that rounds on the divisor income value; Remainder rounds complementation by dividend divided by divisor and obtains.

First cross bar switch can be realized the inner exchanging of its pairing M port on the one hand, can also be sent to corresponding second cross bar switch to the packet that is sent to other group on the other hand.Second cross bar switch is comprising routing iinformation in the packet header according to packet, is forwarded to another second cross bar switch to the packet that receives once more.First cross bar switch that is forwarded to is forwarded to the final purpose port according to routing iinformation with this packet.Therefore in exchange chip inside at most through three routes, the corresponding port that has three grades of specific items of packet, the port numbers of the specific item of each grade is calculated by the port numbers of destination interface in exchange chip of packet and is obtained.For a packet; The port of one-level specific item serial number in cross bar switch is expressed as DestPort0; The port of secondary specific item serial number in cross bar switch is expressed as DestPort1, and the port of three grades of specific items serial number in cross bar switch is expressed as DestPort2.

The method flow that two layers of switching system of the present invention exchange is as shown in Figure 2.

Comprise the port numbers of the destination interface of this packet in the packet, be called the destination slogan, be set at D at whole exchange chip.The port that packet is imported is a source port, and it is called source port number in the port numbers of whole exchange chip, is set at S.

Step S201, first cross bar switch judge whether source port and destination interface are at same group, if identical, execution in step S202, otherwise, execution in step S203.

Determination methods be with destination slogan D and source port number S respectively divided by M, get the merchant, judge whether two merchants identical; If identical, then both are at same group, otherwise, not at same group.

Step S202, the port of the one-level specific item of the first cross bar switch specified data bag is transmitted packet from the port of one-level specific item, accomplish the operation that packet is forwarded to final exchange chip destination interface.

The method of the port of the one-level specific item of specified data bag is to get the remainder of D divided by M, D mod M; DestPort0 equals this remainder, and the port of one-level specific item is a DestPort0 downstream port of this first cross bar switch, and this port essence is the destination interface of packet.

Step S203, the port of the one-level specific item of the first cross bar switch specified data bag is forwarded to second cross bar switch with packet from the port of one-level specific item.

The method of confirming the port of one-level specific item does, gets the remainder of D divided by M, D mod M, and DestPort0 equals this remainder, and the port of one-level specific item is a DestPort0 upstream port of this first cross bar switch.

Step S204 by annexation between 0 layer of cross bar switch and 1 layer of cross bar switch, confirms that 1 layer of DestPort0 in the cross bar switch second cross bar switch receives the packet of forwarding.This second cross bar switch is confirmed the port of the secondary specific item of this packet, data is forwarded to first cross bar switch at destination interface place from the port of secondary specific item.

The method of confirming the port of secondary specific item does, gets the merchant of D divided by M, and D/M, DestPort1 equal this merchant, and the port of secondary specific item is DestPort1 downstream port in this second cross bar switch.

Step S205 by annexation between 0 layer of cross bar switch and 1 layer of cross bar switch, confirms that DestPort1 first cross bar switch of 0 layer of cross bar switch receives the packet of forwarding.This first cross bar switch is confirmed the port of three grades of specific items of this packet, and packet is transmitted from the port of three grades of specific items, accomplishes the operation that packet is forwarded to final exchange chip destination interface.

The port of these three grades of specific items is the destination interface of this packet.

The method of confirming the port of three grades of specific items is to get the remainder of D divided by M, D mod M, and DestPort2 equals this remainder, and the port of three grades of specific items is DestPort2 downstream port of this first cross bar switch.

Formalization is expressed as:

If(D/M＝＝S/M)

DestPort0＝(D?mod?M)DownStream

Else

DestPort0＝(D?mod?M)UpStream

DestPort1＝(D/M)

DestPort2＝(D?mod?M)DownStream

Endif

The present invention carries out method such as Fig. 2 of two layers of exchange, and wherein the operation of first cross bar switch is identical among step S202 and the step S205, all is the destination interface that the packet that receives is sent to this packet; Just the source of packet is different, and one is that this first cross bar switch receives from port module, and one is that this first cross bar switch receives from second cross bar switch; So; Can step S202 and step S205 be merged into a step, step 200; First cross bar switch is transmitted packet from the destination interface of packet, accomplish the operation that packet is forwarded to final exchange chip destination interface.After step S201 is judged as and is, execution in step 200, after step S204 is complete, execution in step 200.

The specific embodiment structure of two layers of switching system of the present invention is as shown in Figure 5.

In having 64 port exchange chips, port numbering is 0 ~ 63.At 2 layers of cross bar structure of the inner employing of exchange chip, and adopt said method to realize connecting between the two-layer cross bar switch.64 data ports are divided into 8 groups, and every group of 8 ports link to each other with first cross bar switch respectively.First cross bar switch can be realized this 8 port inner exchanging on the one hand, can also be sent to corresponding second cross bar switch to the packet that is sent to other group on the other hand.Second cross bar switch is comprising routing iinformation in the packet header according to packet, is forwarded to another first cross bar switch to the packet that receives once more.

First cross bar switch is divided into two kinds to 16 ports: what be connected with the switching chip port module calls downstream port (Downstream Port), i.e. DP0～DP7; The port that links to each other with second cross bar switch is upstream port (Upstream Port), i.e. UP0～UP7.Second cross bar switch has 8 ports, is downstream port.

Comprising routing iinformation in the data packet head, first cross bar switch obtains the destination slogan of this packet from receiving buffering area read data packet packet header block message.Obtain the port numbers of specific items at different levels according to said method.The source port number of packet is S, and the destination slogan is D.

if(D/8＝＝S/8)

DestPort[0]＝(D?mod?8)DownStream

Else

DestPort[0]＝(D?mod?8)UpStream

DestPort[1]＝(D/8)DownStream

DestPort[2]＝(D?mod?8)DownStream

Endif

When source port and destination interface are in same group,, select downstream ports to transmit through mould 8 operations as long as carry out packet exchange through first cross bar switch.And when the source and destination port is not in same group, need to transmit completion through three times.For the first time select upstream ports to send to second cross bar switch through surplusing 8 operations at first cross bar switch; Second cross bar switch selects downstream port to transmit through removing 8 operations for the second time; First cross bar switch selects downstream ports to transmit through surplusing 8 operations for the third time, finally is forwarded to destination interface.

Suppose to exist 35 ports to have packet, its destination slogan is 38.Whether at first judge this two-port on the same group, because (35/8=4)=(38/8=4), so at same group.Therefore No. 4 first cross bar switches that receive packet are selected its downstream port, and its port numbers is 6, and computational methods are 38 mod 8=6, and packet is sent from downstream port 6.

Suppose to exist 35 ports to have packet, its destination interface is No. 43 ports.Whether at first judge this two-port on the same group, because (35/8=4) ≠ (43/8=5), so not on the same group.Therefore routing procedure will be divided into three phases.The first step, No. 4 first cross bar switch is selected its upstream port, and port numbers is 3, and computational methods are 43 mod 8=3, and packet is transmitted to second cross bar switch; In second step, No. 3 second cross bar switch is selected downstream port, and port numbers is 5, and computational methods are 43/8=5, and packet is sent to No. 5 first cross bar switches; In the 3rd step, No. 5 first cross bar switch is selected downstream port, and port numbers is 3, and computational methods are 43 mod 8=3, carries out packet and transmits, and finally sends out exchange chip.

The structure of three layers of switching system of the present invention is as shown in Figure 3.

More exchange chip the present invention adopts three-decker to carry out the exchange chip interconnected for port.

Exchange chip with N port can be interconnected by three layers of cross bar switch.

Aforesaid first cross bar switch and second cross bar switch are formed switched sub-networks, and a switched sub-networks is two layers of above-mentioned switching system.What wherein directly link to each other with port module is first cross bar switch, and the port number that each first cross bar switch is connected with port module is M, and the port number that first cross bar switch is connected with second cross bar switch also is M.The port number of each first cross bar switch is 2M.A switched sub-networks has K first cross bar switch, and first cross bar switch is formed 0 layer of cross bar switch.The higher level's cross bar switch that in switched sub-networks, links to each other with first cross bar switch is second cross bar switch, and the number that second cross bar switch connects the port of first cross bar switch is K.M second cross bar switch arranged in the switched sub-networks, and second cross bar switch is formed 1 layer of cross bar switch.Q switched sub-networks arranged in the exchange chip.So the port number of exchange chip is N=Q * K * M.

Second cross bar switch connects its upper strata the 3rd cross bar switch, and the number of the port of the 3rd cross bar switch connection also is K together.Second cross bar switch has 2K port.Each the 3rd cross bar switch has Q port and connects with second cross bar switch, total K * M the 3rd cross bar switch in the exchange chip, and the 3rd cross bar switch is formed 2 layers of cross bar switch.

In first cross bar switch, the port that links to each other with port module is called downstream port; The port that links to each other with second cross bar switch is called upstream port.In second cross bar switch, the port that links to each other with first cross bar switch is called downstream port; The port that links to each other with the 3rd cross bar switch is called upstream port.In the 3rd cross bar switch, the port that links to each other with second cross bar switch is called downstream port.In switched sub-networks, the upstream port of second cross bar switch of switched sub-networks is formed the upstream port of switched sub-networks.

Total Q * K of first cross bar switch in the exchange chip.Each first cross bar switch is numbered in exchange chip and is marked as L0Xi, i=0 wherein, 1,2 ... QK-1 is by its serial number in exchange chip.Each first cross bar switch and second cross bar switch have M port, and the numbering of first cross bar switch of each port under it is marked as L0Xi.Pj, i=0 wherein, 1,2 ... QK-1; J=0,1,2 ... M-1 is by its serial number in first cross bar switch.Total Q * M second cross bar switch in the exchange chip, numbering is marked as L1Xi in each second cross bar switch exchange chip, i=0 wherein, 1,2 ... QM-1 is by its serial number in exchange chip; The total K of each second cross bar switch downstream port, the numbering of each port in its affiliated second cross bar switch is marked as L1Xi.PDj, i=0 wherein, 1,2 ... QM-1; J=0,1,2 ... K-1 is by its serial number in affiliated second cross bar switch; The total K of each second cross bar switch upstream port, the numbering of each port in its affiliated second cross bar switch is marked as L1Xi.PUj, i=0 wherein, 1,2 ... QM-1; J=0,1,2 ... K-1 is by its serial number in affiliated second cross bar switch.In the exchange chip the total K * M of the 3rd cross bar switch, each the 3rd cross bar switch is marked as L2Xi, i=0 wherein, 1,2 ... KM-1.The total Q of each the 3rd cross bar switch downstream port, the numbering of each downstream port in its affiliated the 3rd cross bar switch is marked as L2Xi.Pj, i=0 wherein, 1,2 ... KM-1; J=0,1,2 ... Q-1 is by its serial number in affiliated the 3rd cross bar switch.

Exchange chip has Q switched sub-networks, is denoted as SubNETi by its order in exchange chip, i=0 wherein, 1,2 ... Q-1.Wherein each switched sub-networks is made up of K first cross bar switch and M second cross bar switch.First cross bar switch of switched sub-networks SubNETi is L0Xj, j=K * i+k wherein, (k=0 wherein, 1,2 ... K-1; Second cross bar switch of switched sub-networks SubNETi is L1Xj, j=M * i+k wherein, k=0 wherein, 1,2 ... M-1.

The numbering of first cross bar switch in exchange chip got surplus to K, remainder is this first cross bar switch numbering in the switched sub-networks under it; The numbering of second cross bar switch in exchange chip got surplus to M, remainder is this second cross bar switch numbering in the switched sub-networks under it.The upstream port of second cross bar switch is the upstream port of the switched sub-networks under it.N upstream port of the m of switched sub-networks second cross bar switch is h upstream port of this switched sub-networks, h=m * K+n, and m=0,1 ..., M-1; N=0,1 ..., K-1.

B upstream port of a of 0 layer of cross bar switch of same switched sub-networks first cross bar switch connects with a downstream port of b second cross bar switch of 1 layer of cross bar switch of this switched sub-networks.

The second cross bar switch upstream port exist and only exist one with being connected of the 3rd cross bar switch downstream port.Annexation is upstream port L1Xi.PUj (i=0,1,2 of second cross bar switch ... QM-1; J=0; 1,2 ... K-1) ((i mod M) * K+j) exists and is connected, and the port of the 3rd cross bar switch of connection is P (i/M) with the 3rd cross bar switch L2X; Just, d downstream port of the c of 2 layers of cross bar switch the 3rd cross bar switch connects with c upstream port of d switched sub-networks.

First cross bar switch can be realized the inner exchanging of its pairing M port on the one hand, can also be sent to corresponding second cross bar switch to the packet that is sent to other group on the other hand.Second cross bar switch is comprising routing iinformation in the packet header according to packet; Can be forwarded to another inner first cross bar switch of same switched sub-networks to the packet that receives once more on the one hand; Also can packet be forwarded to the 3rd cross bar switch on the other hand, thereby be forwarded to other switched sub-networks.The 3rd cross bar switch is responsible between switched sub-networks, carrying out data packet delivery.For a packet; The port of one-level specific item serial number in cross bar switch is expressed as DestPort0; The port of secondary specific item serial number in cross bar switch is expressed as DestPort1; The port of three grades of specific items serial number in cross bar switch is expressed as DestPort2, and the port of level Four specific item serial number in cross bar switch is expressed as DestPort3, and the port of Pyatyi specific item serial number in cross bar switch is expressed as DestPort4.These five sub-destination slogans calculate by the destination slogan of the exchange chip in the packet and obtain.

The method that three layers of switching system of the present invention exchange is as shown in Figure 4.

Provide destination interface in whole exchange chip, to number in the packet, be called the destination slogan, be set at D.The port that this packet is imported is a source port, and its numbering in whole exchange chip is called source port number, is set at S.

Step S401, first cross bar switch compares source port number and destination slogan, judges whether both are at same group, if on the same group, change step S402 over to; Otherwise, execution in step S403.

Determination methods does, destination slogan D and source port number S are respectively divided by M, and relatively whether two merchants are identical, if identical, then at same group, otherwise not at same group.

Represent that at same group source port and destination interface are at same first cross bar switch.

Step S402, the port of the one-level specific item of the first cross bar switch specified data bag is transmitted packet from the port of one-level specific item, accomplish the operation that packet is forwarded to final exchange chip destination slogan.

The method of confirming the port of this one-level specific item does, gets the remainder of D divided by M, D mod M, and DestPort0 equals this remainder, and the port of this one-level specific item is a DestPort0 downstream port of this first cross bar switch.

Step S403, first cross bar switch is confirmed the port of one-level specific item, and packet is transmitted to second cross bar switch from the port of one-level specific item.

The method of confirming the port of one-level specific item does, gets D surplus divided by M, D mod M, and DestPort0 equals this remainder, and the port of this one-level specific item is a DestPort0 upstream port of this first cross bar switch.

Step S404, the second fork pass that receives packet compares source port and destination interface, judges whether both are in same switched sub-networks, if, execution in step S405, otherwise execution in step S407.

Determination methods is respectively divided by (M * K), relatively whether two merchants are identical with destination slogan D and source port number S.If identical, then both are in same switched sub-networks, otherwise both are not in same switched sub-networks.

Step S405, the port of the secondary specific item of the second cross bar switch specified data bag is transmitted to packet first cross bar switch at destination interface place from the port of secondary specific item.

The method of confirming the port of secondary specific item does, gets the merchant of D divided by M, gets this merchant surplus divided by K again, ((D/M) mod K), DestPort1 equals this remainder, and the port of secondary specific item is a DestPort1 downstream port of this second cross bar switch.

Step S406 receives the port of three grades of specific items of the first cross bar switch specified data bag of packet, and the port of packet from three grades of specific items sent, and accomplishes the operation that packet is forwarded to final exchange chip destination slogan.

The method of confirming the port of three grades of specific items does, gets the remainder of D divided by M, D mod M, and DestPort2 equals this remainder, and the port of three grades of specific items is a DestPort2 downstream port of this first cross bar switch.

Step S407, the port of the secondary specific item of the second cross bar switch specified data bag is transmitted to the 3rd cross bar switch with packet from the port of this secondary specific item.

The method of confirming the port of secondary specific item does, gets the merchant of D divided by M, gets the remainder of this merchant divided by K again, ((D/M) mod K), DestPort1 equals this remainder, and the port of secondary specific item is DestPort1 upstream port of this second cross bar switch.

Step S408 according to above-mentioned 1 layer of cross bar switch and 2 layers of cross bar switch annexation, receives the port of three grades of specific items of the 3rd cross bar switch specified data bag of packet, and packet is sent to second cross bar switch from the port of these three grades of specific items.

The method of confirming the port of three grades of specific items does, gets the long-pending merchant that D multiply by K divided by M, (D/ (M * K)), DestPort2 equals this merchant, and the port of these three grades of specific items is a DestPort2 downstream port of the 3rd cross bar switch.

Step S409, according to above-mentioned 1 layer of cross bar switch and 2 layers of cross bar switch annexation, second cross bar switch that receives packet is confirmed the port of level Four specific item, and packet is sent to first cross bar switch from the port of this level Four specific item.

The method of confirming the port of level Four specific item does, gets the merchant of D divided by M, gets the remainder of this merchant divided by K again, ((D/M) mod K), DestPort3 equals this remainder, and the port of this level Four specific item is a DestPort3 downstream port of this second cross bar switch.

Step S410; According to above-mentioned 0 layer of cross bar switch and 1 layer of cross bar switch annexation; Receive the port of Pyatyi specific item of the first cross bar switch specified data bag of packet; Packet is transmitted from the port of Pyatyi specific item, accomplished the operation that packet is forwarded to final exchange chip destination slogan.

The method of confirming destination interface does, gets the remainder of D divided by M, D mod M, and DestPort4 equals this remainder, and the port of Pyatyi specific item is a DestPort4 downstream port of this first cross bar switch.

Formalization is expressed as:

If(D/M＝＝S/M)

DestPort[0]＝(D?mod?M)DownStream

Else?If(D/(M×K)＝＝S/(M×K))

DestPort[0]＝(D?mod?M)UpStream

DestPort[1]＝((D/M)mod?K)DownStream

DestPort[2]＝(D?mod?M)DownStream

Else

DestPort[0]＝(D?mod?M)UpStream

DestPort[1]＝((D/M)mod?K)UpStream

DestPort[2]＝(D/(M×K))DownStream

DestPort[3]＝((D/M)mod?K)DownStream

DestPort[4]＝(D?mod?M)DownStream

Endif

The method of three layers of exchange of the present invention is as shown in Figure 4.Wherein, Step S402, step S406, step S410 are that first cross bar switch can be combined into a step with the destination interface that the packet that receives sends to this packet; Step 400, first cross bar switch send to the packet that receives the destination interface of this packet.After step S401 is judged as and is, execution in step 400; Behind the execution of step S405, execution in step 400; Behind the execution of step S409, execution in step 400.Step S409 and step S405 are first cross bar switches that second cross bar switch sends to the packet that receives at this packet place; It merges into a step; Step 411, second cross bar switch send to the packet that receives first cross bar switch at this packet place.After step S404 is judged as and is, execution in step 411; Behind the execution of step S408, execution in step 411.

64 ports are made up of in the exchange chip three layers of cross bar switch, and port numbering is 0 ~ 63.At 3 layers of cross bar structure of the inner employing of exchange chip, and adopt said method to realize connecting between three layers of cross bar switch.First cross bar switch has 8 downstream ports and 8 upstream ports; Second cross bar switch has 4 downstream ports and 4 upstream ports; The 3rd cross bar switch has 2 ports, i.e. M=8, K=4, Q=2.64 data ports are divided into 8 groups, and every group of 8 ports link to each other with first cross bar switch respectively.Switched sub-networks is made up of 4 first cross bar switches and 8 second cross bar switches, has 2 switched sub-networks.Concrete connection sketch map is as shown in Figure 6.

Packet is comprising routing iinformation in the packet header, and first cross bar switch obtains the destination slogan of these bags from receiving buffering area read data packet packet header block message.Obtain the port numbers of specific items at different levels according to above-mentioned routing algorithm.Cross bar switch packet port routing mode is specific as follows: source port is S, and destination interface is D, and then the Route Selection function is following:

If(D/8＝＝S/8)

DestPort[0]＝(D?mod?8)DownStream

Else?If(D/(8×4)＝＝S/(8×4))

DestPort[0]＝(D?mod?8)UpStream

DestPort[1]＝((D/8)mod4)DownStream

DestPort[2]＝(D?mod?8)DownStream

Else

DestPort[0]＝(D?mod?8)UpStream

DestPort[1]＝((D/8)mod?4)UpStream

DestPort[2]＝(D/(8×4))DownStream

DestPort[3]＝((D/8)mod?4)DownStream

DestPort[4]＝(D?mod?8)DownStream

Endif

Suppose to exist port numbers 25 to have packet, its destination slogan is 28.Whether at first judge these two ports on the same group, because (25/8=3)=(28/8=3), so source port and destination interface are at same group.Therefore No. 3 first cross bar switches are selected its downstream port, and port numbers is 4, and computational methods are 28 mod 8=4, send.

Suppose to exist port numbers 15 to have packet, its destination slogan is 23.Whether at first judge this two-port on the same group, because (15/8=1) ≠ (23/8=2), so not on the same group; Because (15/ (8 * 4)=0)==(23/ (8 * 4)=0), so in same switched sub-networks.Therefore routing procedure will be divided into three phases.The first step, No. 1 first cross bar switch is selected its upstream port, and port numbers is 7, and computational methods are 23 mod8=7, and packet is sent to second cross bar switch; Second step, No. 7 second cross bar switches were selected downstream port, and port numbers is 2, and computational methods are ((23/8) mod 4=2), and packet is transmitted to first cross bar switch; The 3rd step, No. 2 first cross bar switches were selected downstream port, and port numbers is 7, and computational methods are 23 mod8=7, carried out packet and transmitted, and finally sent out exchange chip.

Suppose to exist 6 ports to have packet, its destination interface is No. 45 ports.Whether at first judge this two-port on the same group, because (6/8=0) ≠ (45/8=5), so not on the same group; Because (6/ (84)=0) ≠ (45/ (84)=1) is not also in same switched sub-networks.Therefore routing procedure will be divided into 5 stages.The first step, No. 1 first cross bar switch is selected its upstream port, and port numbers is 5, and computational methods are (45 mod8=5), and packet is transmitted to second cross bar switch; In second step, No. 5 second cross bar switch is selected its upstream port, and port numbers is 1, and computational methods are ((45/8) mod 4=1), and packet is sent to the 3rd cross bar switch; In the 3rd step, No. 21 the 3rd cross bar switch is selected downstream port, and port numbers is 1, and computational methods are (45/ (84)=1), and packet is transmitted to second cross bar switch; In the 4th step, No. 13 second cross bar switch is selected downstream port, and port numbers is 1, and computational methods are ((45/8) mod 4=1), and packet is sent to first cross bar switch; In the 5th step, No. 5 first cross bar switch is selected downstream port, and port numbers is 5, and computational methods are (45/8=5), carries out packet and transmits, and finally sends out exchange chip.

Those skilled in the art can also carry out various modifications to above content under the condition that does not break away from the definite the spirit and scope of the present invention of claims.Therefore scope of the present invention is not limited in above explanation, but confirm by the scope of claims.

Claims

1. the switching system of large port exchange chip; Said exchange chip comprises a plurality of port modules; It is characterized in that; Said system comprises a plurality of first cross bar switches and at least one second cross bar switch, and said port module connects with said first cross bar switch, and said second cross bar switch connects with each said first cross bar switch;

Said first cross bar switch comprises upstream port and downstream port, and said second cross bar switch comprises downstream port, and the number of each said first cross bar switch upstream port is identical, and the number of each said first cross bar switch downstream port is identical; If said second cross bar switch is a plurality of, then the number of each said second cross bar switch downstream port is identical;

The number of said second cross bar switch equals the number of the upstream port of said first cross bar switch, and the number of the downstream port of said second cross bar switch equals the number of said first cross bar switch;

The downstream port of said first cross bar switch connects said port module, and each upstream port of said first cross bar switch connects with the downstream port of each said second cross bar switch successively;

2. the switching system of large port exchange chip as claimed in claim 1 is characterized in that,

3. the switching system of large port exchange chip as claimed in claim 2; It is characterized in that; Said first cross bar switch judges that the destination interface of said packet when whether being the port of said first cross bar switch self further does; The value that rounds on the number income value of destination slogan divided by the downstream port of said first cross bar switch of the value that rounds on the number income value of source port number divided by the downstream port of said first cross bar switch with said packet with said packet relatively; If two values equate; The destination interface of then confirming said packet is the downstream port of said first cross bar switch self, otherwise confirms that the destination interface of said packet is the downstream port of other first cross bar switch.

4. the switching system of large port exchange chip as claimed in claim 2 is characterized in that,

Said first cross bar switch further for the destination interface of confirming said packet is m0 at the serial number of the downstream port of said first cross bar switch, is forwarded to said packet m0 downstream port of said first cross bar switch when said packet is forwarded to said destination interface;

5. the switching system of large port exchange chip as claimed in claim 2; It is characterized in that; Said first cross bar switch further equals said packet for the serial number m1 of the said first cross bar switch upstream port of confirming to transmit said packet when said packet being transmitted to said second cross bar switch destination slogan rounds the remainder of complementation gained divided by the number of the said first cross bar switch upstream port, and said packet is transmitted to said second cross bar switch from m1 upstream port of said first cross bar switch.

6. the switching system of large port exchange chip as claimed in claim 2; It is characterized in that; Said second cross bar switch further for the serial number of first cross bar switch in said exchange chip under the destination interface of confirming said packet is m2, is transmitted to said packet first cross bar switch of this m2 downstream port connection via m2 downstream port of said second cross bar switch when first cross bar switch at the destination interface place that said packet is forwarded to said packet;

7. the switching system of large port exchange chip; Said exchange chip comprises a plurality of port modules; It is characterized in that said system comprises a plurality of switched sub-networks and at least one the 3rd cross bar switch, said switched sub-networks comprises a plurality of first cross bar switches and at least one second cross bar switch; Said port module connects with said first cross bar switch, and said first cross bar switch of each of said second cross bar switch and same switched sub-networks is connected; Said the 3rd cross bar switch connects with one second cross bar switch in each said switched sub-networks;

The downstream port of said first cross bar switch connects said port module; The upstream port of said first cross bar switch connects the downstream port of said second cross bar switch of same switched sub-networks; The upstream port of said second cross bar switch connects the downstream port of said the 3rd cross bar switch;

8. the switching system of large port exchange chip as claimed in claim 7 is characterized in that,

9. the switching system of large port exchange chip as claimed in claim 8 is characterized in that,

10. the switching system of large port exchange chip as claimed in claim 9; It is characterized in that; Said first cross bar switch judge when whether the destination interface of said packet is the port of said first cross bar switch self further for the value that rounds on the income value of destination slogan divided by the number of the downstream port of said first cross bar switch of value that rounds on the income value of source port number with said packet with said packet divided by the number of the downstream port of said first cross bar switch relatively; If two values equate; Then the destination interface of said packet is the downstream port of said first cross bar switch self, otherwise the destination interface of said packet is the downstream port of other first cross bar switch.

11. the switching system of large port exchange chip as claimed in claim 9 is characterized in that,

Said first cross bar switch further for the serial number of destination interface in the downstream port of said first cross bar switch of confirming said packet is n0, is forwarded to said packet n0 downstream port of said first cross bar switch when said packet being forwarded to the destination interface of said packet;

12. the switching system of large port exchange chip as claimed in claim 9; It is characterized in that; Said first cross bar switch further equals said packet for the serial number n1 of the said first cross bar switch upstream port that confirm to transmit said packet when said packet being transmitted to second cross bar switch of same switched sub-networks destination slogan divided by the number of the upstream port of said first cross bar switch round the complementation gained remainder, said packet is transmitted to said second cross bar switch from n1 upstream port of said first cross bar switch.

13. the switching system of large port exchange chip as claimed in claim 9; It is characterized in that; The value whether said second cross bar switch further rounds on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks with the destination slogan of said packet for value that the source port number of said packet is rounded on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks during in same switched sub-networks at the source port of judging said packet and destination interface relatively; If two values equate; Then the source port of said packet and destination interface be in same switched sub-networks, otherwise the source port of said packet and destination interface be not in same switched sub-networks.

14. the switching system of large port exchange chip as claimed in claim 9 is characterized in that,

Said second cross bar switch further for first cross bar switch serial number in the switched sub-networks under it under the destination interface of confirming said packet is n2, is transmitted to said first cross bar switch with said packet from n2 downstream port of said second cross bar switch when first cross bar switch at the destination interface place that said packet is forwarded to said packet;

15. the switching system of large port exchange chip as claimed in claim 9 is characterized in that,

Said second cross bar switch further for first cross bar switch serial number in the switched sub-networks under it under the destination interface of confirming said packet is n3, is transmitted to said the 3rd cross bar switch with said packet from n3 upstream port of said second cross bar switch when said packet being transmitted to said the 3rd cross bar switch;

16. the switching system of large port exchange chip as claimed in claim 9 is characterized in that,

Said the 3rd cross bar switch when the switched sub-networks at the destination interface place that said packet is forwarded to said packet further for the destination interface of confirming said packet under the serial number of switched sub-networks in said exchange chip be n4, said packet is transmitted to said second cross bar switch from n4 downstream port of said the 3rd cross bar switch;

17. the switching method of a large port exchange chip is characterized in that, comprising:

Step 4, first cross bar switch at the destination interface place of said packet is forwarded to said packet the destination interface of said packet;

Said step 1 further connects said port module for the downstream port with said first cross bar switch, and the upstream port of said first cross bar switch connects the downstream port of said second cross bar switch;

18. the switching method of large port exchange chip as claimed in claim 17 is characterized in that,

19. the switching method of large port exchange chip as claimed in claim 18 is characterized in that,

20. the switching method of large port exchange chip as claimed in claim 18 is characterized in that

Said step 4 further is:

Step 312 is forwarded to said packet m0 downstream port of said first cross bar switch;

21. the switching method of large port exchange chip as claimed in claim 18 is characterized in that, in the said step 2 said packet is transmitted to said second cross bar switch and further comprises:

22. the switching method of large port exchange chip as claimed in claim 18 is characterized in that said step 3 further is:

Step 342 is transmitted to said first cross bar switch with said packet from m2 downstream port of said second cross bar switch;

23. the switching method of a large port exchange chip is characterized in that, comprising:

Step 1; First cross bar switch and second cross bar switch are formed a plurality of switched sub-networks; A plurality of port modules are connected with said first cross bar switch; Each said first cross bar switch of said second cross bar switch and same switched sub-networks is connected, said the 3rd cross bar switch is connected with one second cross bar switch in each said switched sub-networks;

Step 5, second cross bar switch that receives packet is transmitted to said packet first cross bar switch at said packet rs destination port place;

Step 6, first cross bar switch that receives packet is forwarded to said packet the destination interface of said packet;

Said step 1 further is:

24. the switching method of large port exchange chip as claimed in claim 23 is characterized in that,

25. the switching method of large port exchange chip as claimed in claim 24 is characterized in that,

26. the switching method of large port exchange chip as claimed in claim 25 is characterized in that,

27. the switching method of large port exchange chip as claimed in claim 25 is characterized in that said step 6 further is:

Step 412 is forwarded to said packet n0 downstream port of said first cross bar switch;

28. the switching method of large port as claimed in claim 25 exchange chip is characterized in that, second cross bar switch that in the said step 2 said packet is transmitted to same switched sub-networks further is:

29. the switching method of large port exchange chip as claimed in claim 25; It is characterized in that; The value whether source port and the destination interface of judging said packet in the said step 3 further rounds on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks with the destination slogan of said packet for value that the source port number of said packet is rounded on the total income value of downstream port of all said first cross bar switches in divided by a switched sub-networks in same switched sub-networks relatively; If two values equate; Then the source port of said packet and destination interface be in same switched sub-networks, otherwise the source port of said packet and destination interface be not in same switched sub-networks.

30. the switching method of large port exchange chip as claimed in claim 25 is characterized in that,

Said step 5 further is:

Step 452 is transmitted to said first cross bar switch with said packet from n2 downstream port of said second cross bar switch;

31. the switching method of large port exchange chip as claimed in claim 25 is characterized in that,

Step 472 is transmitted to said the 3rd cross bar switch with said packet from n3 upstream port of said second cross bar switch;

32. the switching method of large port exchange chip as claimed in claim 25 is characterized in that,

Said step 4 further is:

Step 492 is transmitted to said second cross bar switch with said packet from n4 downstream port of said the 3rd cross bar switch;