CN101430372A - Low-cost time service and synchronization method and device for global positioning system receiver - Google Patents

Low-cost time service and synchronization method and device for global positioning system receiver Download PDF

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CN101430372A
CN101430372A CNA2007101769374A CN200710176937A CN101430372A CN 101430372 A CN101430372 A CN 101430372A CN A2007101769374 A CNA2007101769374 A CN A2007101769374A CN 200710176937 A CN200710176937 A CN 200710176937A CN 101430372 A CN101430372 A CN 101430372A
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time
synchronous
time service
whole
signal
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CN101430372B (en
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郑睿
陈杰
李健
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Beijing Zhongke Pilot Technology Co ltd
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Institute of Microelectronics of CAS
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Abstract

The invention discloses a low-cost time service and synchronization method and equipment of a global positioning system receiver, relates to the field of time service and synchronization, and particularly relates to the field of low-cost time service and synchronization realized at the baseband processing chip level based on a global positioning system, such as the American Global Positioning System (GPS). The invention improves the time service and synchronization method based on the global positioning system, and is realized based on the baseband processing chip equipment of the global positioning system. The invention carries out soft calibration on the crystal oscillator by the coordinated universal time calculated by the global positioning system, realizes time service to external equipment by the combination of time codes and synchronous pulse signals, and can realize high-precision time service by using the crystal oscillator with low cost. Meanwhile, the invention does not need to calibrate the crystal oscillator in a hardware form, greatly simplifies the system design, reduces the cost, and has the advantages of low hardware overhead, strong expandability, high reliability and the like.

Description

The low-cost time service of GPS receiver and method for synchronous and equipment
Technical field
The present invention relates to authorizing and field of synchronization of time, relate in particular to, belong to the low-cost time service and the field of synchronization that realize in the baseband processing chip rank based on GPS.
Background technology
Global positioning satellite and navigational system, for example the GPS of the U.S. (GPS) comprises one group of satellite constellation (the Navstar satellite is otherwise known as) that sends gps signal, this gps signal can be received the position that machine is used for determining this receiver.Satellite orbit is arranged in a plurality of planes, so that any on earth position can both receive this kind signal from least four satellites.More typical situation is that most on earth places can both receive this kind signal from six above satellites.
The gps signal that each gps satellite transmitted all is a direct sequence expansion signal frequently.The signal of commercial use is relevant with standard setting service (SPS), and is referred to as the direct sequence two-phase spread signal of thick sign indicating number (C/A sign indicating number), under the carrier wave of 1575.42MHz, has the speed of per second 1.023 million chips.Pseudo noise (PN) sequence length is 1023 chips, corresponding to 1 millisecond time cycle.The PN sign indicating number that each satellites transmits is different (Gold sign indicating number) makes signal to send simultaneously from several satellites, and received simultaneously by a receiver, and is almost noiseless each other.Term " satellite asterisk " is relevant with this PN sign indicating number, can be in order to indicate different gps satellites.
The modulation signal of GPS is the combinational code of navigation message (the D sign indicating number is otherwise known as) and PN sign indicating number.The speed of navigation message is per second 50 bits.The base unit of D sign indicating number is the prime frame of one 1500 bit, and prime frame is divided into the subframe of 5 300 bits again.Wherein subframe one has comprised identification code, star kind data length of time, satellite clock corrected parameter information.Subframe two and subframe three have comprised real-time gps satellite ephemeris (ephemeris), and ephemeris is the main content of current navigator fix information.Subframe four and subframe five have comprised the health status of 1-32 satellite, the almanac (alamanc) of UTC calibration information and ionospheric corrections parameter and 1-32 satellite.Almanac is the simplified subset of satellite ephemeris parameter.Broadcasted once in its per 12.5 minutes, the life-span is a week, can extend to 2 months.
Coordinated Universal Time(UTC), (Coordinate Universal Time UTC) was a kind of time scale of international standard.It is that the time scale UT1 input of benchmark is formed by the time scale that drives from atomic clock with earth speed of rotation.Atomic time from atomic clock has the scale advantage of uniform, and based on the time scale of earth speed of rotation at a lot of application scenarios no less important.For coordinating two kinds of times, the second long strictness of UTC equals the second long of atomic time, and international earth rotation office (IERS) is responsible for determining to be suitably in UTC and adds deduct on the time leap second simultaneously, makes that UTC and universal time are synchronous.
GPS is to satisfy the needs of precision positioning and navigation, points out just to have set up the time system of own special use in system design and test.Be reference with UTC (USNO) during gps system.UTC (USNO) is more than 20 the caesium standard group that atom USNO-US Naval Observatory (USNO) utilization is held, and chronometer data forms the UTC version of oneself.UTC (USNO) remains in the 1 μ s of UTC.GPS is a continuous time scale, without adjusting leap second.Overlap 0 o'clock on the 6th 1980 days with UTC (NSNO) during gps system.GPS control section makes it to be in UTC (NSNO) the 1 μ s when regulating gps system.
One of main target of GPS receiver is to determine the time of arrival of PN sign indicating number.Term " between the GPS arrival " refers to that gps satellite PN sign indicating number arrives the time of GPS receiver.This is by (each received signal) local PN reference signal that produces being compared with the signal of reception and " slip " local reference is finished until aliging in time with received signal.By being referred to as multiplying each other and integral process of " being correlated with ", these two signals are compared mutually.When two signals were alignment in time, the result of output was maximum.Can make by this method receiver time and gps time synchronously on.
Be included in the navigation message, make the GPS receiver can be accurately and determine the local UTC time reliably with time-of-week (TOW) data of absolute time signal correction connection.The TOW data are transmitted by the time interval in 6 seconds by all satellites.The GPS receiver can use the absolute time signal to determine the position exactly.In case known the place, position, can be by utilizing between receiver and the satellite, the clear and definite time that computable propagation delay comes compensated receiver to obtain from satellite navigation message obtains.
The details of the data that gps signal comprised can find in interface control document (InterfaceControl Document) ICD-GPS-200C, this document was formulated in 1993, upgraded in 2003, publish by Rockwell Internation Corporation.
The method of time service has a variety of, compares with the time service method of classics, and the GPS time service precision is higher, and the equipment simple economy is reliable, and can carry out in real time continuously in the whole world, so obtained using widely.
The NMEA standard is the standard of being formulated by American National boats and ships Institution of Electronics (National Marine ElectronicsAssociation) that is used for the boats and ships electronic equipment interfaces, has mainly stipulated the electronic signal requirement, contents such as Data Transport Protocol.The NMEA0183 agreement that wherein is used for GPS receiver interface is extensively received by industry, becomes GPS receiver output transmission industrial standard.Wherein the first in Recommended Minimum Specific GPS/TRANSIT Data (RMC) form contain hour, minute, second and millisecond the UTC temporal information, form is hhmmss.sss.Session 9 has comprised the UTC date and time information of year, month, day, and form is ddmmyy.Wherein because the time delay of serial ports output itself, and the retardance calculated of receiver flush bonding processor, millisecond rank temporal information and the out of true of utilizing serial ports to export, thereby most GPS producer does not all have the output of operating period millisecond information.
Most GPS time service products of seeing in the market all are that the secondary development acquisition is done by third company on the basis of GPS baseband processing chip.And these GPS baseband processing chips overwhelming majority is at the location requirement design, and time service is not had special optimization, makes the system development merchant need suitable extra work, and the time dissemination system cost increases greatly owing to increased a large amount of extra equipment simultaneously.
On the other hand, the inside dominant frequency of common GPS baseband processing chip is mainly the needs of its flush bonding processor, and frequency is lower, and the frequency that is used for clock alignment is often lower, makes that the temporal resolution error of local clock is bigger.
Most GPS time service products relies on the precision that high-precision external crystal-controlled oscillation improves time service, wherein comprised frequency stability in temperature compensation crystal oscillator (TCXO) about 10-8 and frequency stability about 10-9 but expensive many constant-temperature crystal oscillators (OCXO), the product that has even use very expensive atomic clock as the reference source.The proportion of crystal oscillator departmental cost in the entire system cost is more and more higher, even has substantially exceeded baseband processing chip itself.
It is to improve the crystal oscillator precision that crystal oscillator is compensated, and lowers the effective ways to crystal oscillator requirement and cost.Existing time service scheme often is transformed into analog quantity by gps time and directly crystal oscillator is compensated, but such scenario-frame complexity, the introducing of mimic channel extra design difficulty and problem, cost significantly increases, stiffness of system is not high.And need custom-made crystal oscillator and compensating circuit thereof, and can only use TCXO can not use OCXO.Simultaneously because real-Time Compensation, make frequency instability between twice calibration.The other scheme uses the synthetic DDS of numerical frequency to realize frequency output, solves frequency problem of unstable between twice calibration.But still based on the crystal oscillator of DDS, this scenario-frame is more complicated simultaneously for its frequency stability, needs complicated encoding control circuit between GPS baseband processing chip and the DDS, the cost height.
Summary of the invention
The object of the invention provides the low-cost time service of a kind of chip-scale based on GPS receiver and method for synchronous and equipment thereof.The present invention is based on GPS (GPS) baseband processing chip and realize, utilize cheaply crystal oscillator can realize high-precision time service.
The time service and the method for synchronous of the GPS that the present invention proposes may further comprise the steps:
Calculate coordinated universal time (UTC) step, calculate coordinated universal time by software approach;
Calculate the synchronizing pulse step, calculate synchronizing pulse by software approach and hardware approach;
To the crystal oscillator calibration steps, crystal oscillator is carried out soft alignment by the coordinated universal time that calculates;
To external unit time service step, the combination by time code and synchronization pulse realizes the external unit time service.
Further, described calculating Coordinated Universal Time(UTC) intermediate step comprises:
Resolve the synchronizing signal rising edge and come temporarily, hardware latchs time register;
The navigation message of demodulation GPS satellite;
Calculate pseudo noise time of arrival;
When inclined to one side more than or equal to the clock between 4 effective times spent calculating receiver locations of satellite and receiver time and the satellite time;
Calculate the time of arrival of revising;
Calculate coordinated universal time.
Further, the software approach in the described calculating synchronizing pulse step comprises:
The corresponding constantly coordination world absolute time of synchronizing signal is resolved in calculating;
Calculate a coordinated universal time that resolves the synchronous signal cycle correspondence;
Revise the clock period that crystal oscillator drives;
Calculate the whole second moment of coordinated universal time and next resolving the mistiming of synchronizing signal between the moment;
Calculate the clock period of this time slot correspondence;
Counter enable signals and time slot clock number are deposited in the corresponding registers of the control register heap of hardware synchronization pulse.
Further, the hardware approach in the described calculating synchronizing pulse step comprises:
Whole second time slot counter waited for and resolved synchronizing signal, resolves the synchronizing signal rising edge and arrives then to trigger whole second counter works;
Latch and resolve synchronizing signal;
Read in enable signal and whole second time slot clock number in the whole pulse per second (PPS) control register heap;
If enable signal enables, then counter works is overflowed until counter;
Otherwise wait for the arriving of next time resolving synchronizing signal.
Further, described to the crystal oscillator calibration steps, comprising:
Calculate the GPS time that each resolves synchronous correspondence;
Calculate the coordinated universal time that each resolves the synchronization point correspondence;
Calculate continuous two coordinated universal times that resolve the time interval correspondence of synchronization point;
The absolute time of resolving the synchronous signal cycle correspondence that utilization calculates calculates the absolute time of each hardware clock signal period correspondence, realizes the calibration to crystal oscillator.
Further, the software section of described output synchronizing pulse step and hardware components are that strictness separates in time.And realize by following steps: after computed in software finishes, write the control register of the whole pulse per second (PPS) counter of hardware, resolve synchronizing signal and trigger whole pulse per second (PPS) counter.And first executive software part is carried out hardware components again.
Further, described time service and synchronous method, when resolving the arriving of synchronizing signal rising edge, whole second time slot counter sense enable signal enables, and then reads in the time slot clock number of storage, and counter is started working.Whole second (OnePPS) pulse signal of output when counter overflows becomes low level after keeping a period of time high level.
Further, described calculating coordinated universal time comprised the correction of system delay in whole second constantly with the next process of resolving the mistiming of synchronization point.Described system delay comprises that the delay of antenna groups delay, antenna cable, whole pulse per second (PPS) control register read and postpone and the output delay of time slot clock number counter.
Further, all computation processes of the software approach in the described calculating synchronizing pulse step are resolved in the synchronous signal cycle at one and are finished.
Further, described calculating synchronizing pulse hardware approach, the described synchronization point that resolves continuously resolves the generation of synchronizing signal maker by hardware.The described synchronous signal cycle that resolves was less than 1 second.
Further, described to external unit time service be by and coordinated universal time realize synchronously between each time service equipment synchronously.
The time service of the GPS that another technical matters that the present invention will solve proposes and synchronous equipment, comprise the external crystal-controlled oscillation trapping module, tracking module, the positioning calculation module is characterized in that, comprise that coordinated universal time resolves the unit, the internal frequency alignment unit, real-time clock, time zone time scaling unit, the synchronizing pulse generation unit, the special-purpose time service antenna of time code output unit and GPS.
Further, described synchronizing pulse generation unit comprises whole pulse per second (PPS) control register heap, resolves synchronizing signal maker and whole second time slot counter.
Further, described real-time clock is the external cell power supply, and is under the gps signal deletion condition, continues the external unit time service.
Further, whole pulse per second (PPS) control register heap is driven by low-speed clock described in the synchronizing pulse generation unit, and whole second time slot counter and Tick maker are to be driven by high-frequency clock.Low-speed clock is to be obtained by the high-frequency clock frequency division.Whole pulse per second (PPS) control register heap, the Tick maker, time slot counter was all resetted by same reset signal control in whole second.
Further, described whole pulse per second (PPS) control register heap comprises counter enable register and time slot clock number register.Counter enable register and time slot clock number register be by writing enable signal, address wire, and the combination of data line is rewritten.Time slot counter triggered by resolving synchronizing signal in described whole second.
This invention need not calibrated with example, in hardware, has simplified system design greatly, has reduced cost, and it is little to possess hardware spending simultaneously, and extensibility is strong, the reliability advantages of higher.One embodiment of the present of invention can realize 200ns other time service precision of level and other synchronization accuracy of 50ns level under the situation of using ordinary temp compensation crystal oscillator (0.5PPM).This time service and method for synchronous are applicable to hyperchannel GPS receiver arbitrarily, highly effective, and the chip area expense is little, and cost is low.
Description of drawings
Fig. 1 is the existing design details structured flowchart of a typical GPS processing module;
Fig. 2 is the general flow of GPS receiver positioning calculation;
Fig. 3 is the conventional method block diagram of GPS time service;
Fig. 4 is the synoptic diagram of GPS text synchronous code;
Fig. 5 is a GPS text hand-over word structural representation;
Fig. 6 is the existing project organization synoptic diagram of a kind of crystal oscillator calibration;
Fig. 7 is the GPS baseband chip structured flowchart that time service is optimized that aims at of a preferred embodiment of the present invention;
Fig. 8 is the software flow pattern of the calculating UTC time of a preferred embodiment of the present invention;
Fig. 9 is the sequential chart of the realization synchronizing pulse of a preferred embodiment of the present invention;
Figure 10 is the calculating synchronizing pulse software flow block diagram of a preferred embodiment of the present invention;
Figure 11 is the synchronizing pulse hardware block diagram of a preferred embodiment of the present invention;
Figure 12 is the output synchronizing pulse hardware logic diagram of a preferred embodiment of the present invention.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
For simplicity, gps time (GPST) when all referring to gps system among the present invention.
Gps system used time code and synchronizing pulse in conjunction with realizing time service and synchronous.Synchronizing pulse commonly used has multiple, whole pulse per second (PPS) OnePPS/1PPS is arranged usually, whole two pulse per second (PPS) 2PPS and whole 10 pulse per second (PPS) 10PPS etc.The principle of its time service all is identical.For simplicity, be that example is described synchronizing pulse with whole pulse per second (PPS) among the present invention, as other the synchronizing pulse of requiring emphasis can be in specific place explanation.
Fig. 1 describes the details of typical GPS processing module in detail.The GPS radio frequency rf signal receives the laggard radio frequency front end 102 of going into by gps antenna 101, is transformed to digital intermediate frequency and transfers to Base-Band Processing and partly make Base-Band Processing.Digital intermediate frequency enters and at first enters AD buffer behind the baseband processing module and carry out buffer memory, and then enters and catch path 10 6 with the gps satellite in the search visual field.Finish catch after, follow the tracks of 7 pairs of satellites that capture of path 10 and follow the tracks of, and synchronous with it so that calculate the launch time of PN sign indicating number, demodulate navigation message simultaneously in order to the location.Described bit synchronous and the frame synchronization of comprising synchronously.Embedded microprocessor 108 is used to control each and catches and follow the tracks of passage, the time of arrival of finish the demodulation text simultaneously, calculating the PN sign indicating number, and compute pseudo-ranges, and then resolve work such as receiver location, speed and time.Embedded microprocessor is also by the output through automatic gain control AGC 105 control radio-frequency front-ends 102, with the gain of stable simulation intermediate frequency in addition.
Embedded microprocessor is by Flash 112 and real-time clock 113 in ROM 110, ram in slice 111, the sheet in the internal bus 109 visit sheets.Inner ROM 110 is used to store the program that embedded microprocessor uses.Also some product in the inside Flash 112 that can write, has omitted ROM in the sheet with these procedure stores, simultaneously so that upgrading in the future.Inner Flash also is used to store the information that some need keep after power down, be to start the prior imformation of serving fast as gps satellite almanac etc.Internal RAM 208 is used for the flush bonding processor working procedure.Real-time clock 113 is in order to provide the precise time benchmark.Usually this clock can be independently-powered by the outer battery of sheet, still can operate as normal under the situation of assurance system power down.
The Base-Band Processing part also comprises Reset control 114 usually, is used to control the replacement under different situations of entire chip; And power managed 115, in order to reduce the power consumption of entire chip.
Output interface 116 will calculate the acquisition user coordinates and other information form is according to the rules exported to main control processor.NMEA0183 is a kind of widely accepted outputting standard.Some GPS baseband processing chip manufacturers have also formulated own proprietary output format, as the SiRF bin form of SiRF company.
Radio-frequency front-end 102 and baseband processing chip all utilize external crystal-controlled oscillation 104 as frequency reference, also have some product designs to become radio-frequency front-end to use different crystal oscillators with Base-Band Processing.
Fig. 2 has described the GPS receiver and has realized the flow process of location.This process finishes until calculating receiver location 206 from receiver power-up initializing 201, has finished one-time positioning and has resolved, and begins new round computation process immediately.This process is to be triggered by the Tick signal rising edge that the Tick maker generates.The Tick maker is driven by crystal oscillator, and the interval of twice tick signal is strict precisely only relevant with the frequency accuracy of crystal oscillator.Usually enter trapped state 202 after receiver powers on, search is to determine satellite, the carrier frequency of visible satellite and the code phase of PN sign indicating number in the sight line.Search to carrier frequency under this state is coarse, usually hundreds of hertz magnitude.Enter frequency pulling state 203 afterwards, local frequency pulling to and the satellite carrier frequency differ several hertz magnitude, carry out bit synchronous simultaneously.After finishing frequency pulling, receiver enters tracking mode 204, finishes frame synchronization, promptly can enter demodulation text state 205, and the text demodulation of modulating on the carrier wave is come out to be used for to calculate receiver location 206 times at subsequently the state that resolves.
What Fig. 3 described is the conventional method of GPS time service, and some embodiment of the present invention have used similar structure as basic skills, has carried out corresponding expansion at different applied environments simultaneously.Gps signal is passed to GPS time service chip 302 after amplifying after GPS time service dedicated antenna 301 receives.This chip comprises radio-frequency front-end shown in Figure 1 and baseband processing chip usually.After GPS time service chip calculates the UTC absolute time, by putting in order pps pulse per second signal 304 and time code 306 to the external unit time service.Wherein time code is responsible for characterizing the temporal information of second and second above magnitude, and synchronization pulse is responsible for and the UTC absolute time is accurately aimed at.A well accepted synchronization pulse is whole pps pulse per second signal (OnePPS/1PPS), and promptly each UTC exported a pulse in whole second constantly.But need to prove that synchronization pulse is not limited to whole second form, also have 2PPS according to using, 10PPS etc. are all multi-form.But the form that realizes is all similar, and the present invention is the synchronous calibration pulse signal that example is described all hardware output with whole pulse per second (PPS).Usually whole pps pulse per second signal is to produce 303 by hardware, and this signal was constantly exported a rising edge in whole second at UTC, and then kept a period of time high level.This is held time and can adjust as required, is held time by well accepted high level for one to be 1ms.And time code is according to being exported by corresponding ports behind certain rule encoding.A typical application is to utilize the RMC frame that meets the NMEA0183 agreement by the output of RS232 305 interfaces.This structure GPS industry is used widely.But it is, limited as the distance of RS232 interface transmission because the restriction of the physical property of RS232 interface own may not satisfied the needs of a lot of application scenarios.Some embodiments of the present invention also provide RS485 when the RS232 interface is provided, CAN and EtherNet interface 307.The form of time code also is not limited to the desired form of NMEA0183 agreement simultaneously, has also used self-defining, more succinct form 308.
Fig. 4 describes the synoptic diagram of GPS text synchronous code.Synchronous code (preamble) the 503rd, the preceding 8 bits of remote measurement word (telemery word, abbreviation TLW) 501, just the first eight bit of each subframe.Utilize this synchronous code can achieve frame synchronous.This synchronous code may or be " 01110100 " for " 10001011 " according to last two the indicated polarity 502 of last subframe.In case confirm to find this synchronous code, promptly can confirm the beginning of a subframe.TLM also has one 16 reservation position and one 6 check bit in addition.Concrete structural information and checking algorithm can find detailed description in the ICD-GPS-200C document.
In fact navigation message data stream itself may contain similar " 10001011 " or " 01110100 " data segment.So the present invention uses following combination verification criterion will miss synchronous probability and drops to low-down level:
A) find continuous three sub-frame synchronization codes
B) each subframe verification is passed through
C) frame number of each subframe is in the interval of [1:5]
D) TOW time phase difference 300 bits that demodulate of adjacent sub-frame.
Fig. 5 describes the structural representation of GPS text hand-over word.Hand-over word (Hand Over Word, abbreviation HOW) is right after after the remote measurement word.1 to 17 of hand-over word is TOW (Time of Week) 502, be from every Saturdays/start at during midnight zero Sunday time counting, the resolution of TOW is 6 seconds.The 18th 503 expression, after self-information was injected, the satellite momentum moment unloading phenomenon of whether rolling was indicated synchronously for satellite for the 19th 504, and whether the unlabeled data frame time is consistent with the subcode clock time.The 20th~23 505 is subframe numbers.Last six 507 is check bit.More detailed hand-over word structural information and checking algorithm can find in the ICD-GPS-200C document.
Fig. 6 has described the CONSTRUCTED SPECIFICATION of the existing design of a kind of crystal oscillator calibration.This scheme uses the synthetic DDS of numerical frequency to realize frequency output, solves frequency problem of unstable between twice calibration.This design is made up of GPS receiver 601, digital phase discriminator 602, DDS 603, cpu system 604 and constant temperature VCXO.The direct ground connection of voltage-controlled pin of constant temperature VCXO wherein, GPS receiver, DDS link to each other with digital phase discriminator, and digital phase discriminator links to each other with CPU, and CPU goes all to link to each other with DDS with the voltage-controlled concussion of constant temperature.Because the direct ground connection of voltage-controlled pin of constant voltage temperature control crystal oscillator is equivalent to the burning voltage that it imports 0V, the frequency of the clock signal of constant temperature VCXO output also is certain constant occurrence like this, and this value approaches 10MHz.DDS is that benchmark carries out frequency synthesis with this signal, and the degree of stability of the degree of stability of DDS output frequency and its input reference frequency is the same, so the clock signal frequency of DDS output also is stable, and the clock signal that DDS exports simultaneously feeds back to digital phase discriminator.Digital phase discriminator carries out phase demodulation with the standard second signal of clock signal and the GPS receiver input of feedback, exports differing of a numeral, and this is differed inputs to CPU.CPU compares through certain control algolithm, and exports the signal of a control DDS, and DDS is that benchmark carries out frequency synthesis again according to the control signal of CPU and the clock signal of importing with temperature and pressure control crystal oscillator, and output signal.But the frequency stability of this scheme still depends on the crystal oscillator of DDS, and complex structure for example needs a large amount of peripherals such as complicated encoding control circuit between GPS baseband processing chip and the DDS simultaneously.Fig. 7 has described the GPS baseband chip structure that time service is optimized that aims at of a preferred embodiment of the present invention.GPS time service dedicated antenna 701 is to aim at the special gps antenna of optimizing of GPS time service.Compare with common antenna, the time service dedicated antenna can be competent at long continuous working, and precision is higher simultaneously, postpones littler.Use for some time service cheaply, common antenna can meet the demands, but for improving time service precision, some embodiment of the present invention have used the time service dedicated antenna.Gps signal enters radio-frequency front-end 702 by antenna to carry out down coversion, amplification and sampling and enters baseband processing chip.The GPS baseband chip is to handle the baseband signal chip in the GPS receiver, is the core in the whole GPS receiver.The whole bag of tricks of the present invention is all realized in the GPS baseband chip.For simplicity, " receiver " all refers to " GPS baseband chip " among the present invention.
In the frame of broken lines is the composition module of GPS baseband chip.Whole baseband processing chip utilizes external crystal-controlled oscillation 712 as frequency reference.Crystal oscillator can use TCXO or the higher OCXO of precision, if even have the specific (special) requirements can the high atomic clock of service precision.Trapping module 703 is determined the carrier doppler and the PN sign indicating number code phase of its each visible satellite in order to the gps satellite in the search visual field.Tracking module 704 is used to follow the tracks of the satellite that captures, and synchronous with it, so that calculate the time of arrival of PN sign indicating number, demodulates navigation message simultaneously in order to the location.Described bit synchronous and the frame synchronization of comprising synchronously.Be equivalent to GPS baseband processing chip shown in Figure 1 framework commonly used, the time register heap and the Tick signal generator of tracking module clock have carried out corresponding modification, and concrete structure will be introduced in Figure 11 in detail.Positioning calculation module 705 utilizes PN sign indicating number time of arrival and navigation message to calculate satellite position, and then calculates receiver location.The GPS baseband processing chip that above-mentioned three modules are the location that are useful on all comprises.When UTC resolves unit 706 and is used to calculate gps system, and then calculate current UTC absolute time by the UTC calibration information that comprises in the navigation message.This process has detailed description in Fig. 8.Internal frequency alignment unit 707 is in order to the clock drift of calibration external crystal-controlled oscillation.Utilize this module can realize soft alignment, thereby reduced requirement, saved the crystal oscillator feedback control circuit crystal oscillator to crystal oscillator.Time zone time scaling unit 709 has been realized the conversion from the UTC time to other time zone standard time, thereby has saved the demand that the chip external equipment is carried out the time zone conversion.One embodiment of the present of invention use time zone, Beijing as default value, can make amendment by the configuration relevant register in its time zone.Real-time clock 708 is real-time clocks that baseband processing chip is built-in and UTC is synchronous, can be upgraded by the UTC absolute time that calculates.This clock both can be used for auxiliary realization catches fast, also can be used for the continuous positioning under the gps signal disappearance.This clock can be independently-powered by the outer battery of sheet simultaneously, still can operate as normal under the situation of assurance system power down.Usually, this real-time clock is that the real-time clock that utilizes the embedded microprocessor of baseband processing chip inside to comprise is realized.But this clock accuracy is lower, and the present invention has increased a real-time clock that precision is higher, to satisfy the requirement of time service precision.Synchronizing pulse generation unit 710 is in order to produce and the accurate synchronism pulse signal of UTC absolute time.Pulse width is adjustable, is generally 1ms, is used for the time service to external unit.
Time code output unit 711 is used to export the temporal information of second and second above magnitude.One embodiment of the present of invention use the NMEA0183 standard of industrywide standard by the output of RS232 interface.Utilize in the RMC form of standard code first output hour, minute, second and millisecond the UTC time, form is hhmmss.sss; Utilize the UTC date of Session 9 output year, month, day, form is ddmmyy.Time code and whole pulse per second (PPS) are united and promptly can be realized external unit is carried out time service.This process has a detailed description in Fig. 3.The expansion that the present invention also carries out the time code output unit according to the time service needs, provide meet NMEA0183 agreement time code in, also provide from customized time code form, be used for time service merely.An alternative embodiment of the invention is removed and is used RS232 also to use interfaces such as RS485, CAN bus and Ethernet to realize adapting to the application of varying environment as standard interface.
Fig. 8 has described the software flow of the calculating UTC time of a preferred embodiment of the present invention.Obtain the UTC absolute time and be to realize frequency calibration and to the prerequisite of external unit time service, thus most important.Whether system's detection hardware Tick maker after initialization 801 exports tick signal 802.If the tick rising edge arrives, then carry out one-time positioning and resolve and UTC Time Calculation process; If the tick rising edge does not arrive, then continue to wait for.In other words, twice positioning calculation and calculate tick cycle that is spaced apart of UTC time.Longer usually with respect to the Tick cycle at the GPS baseband processing chip of location requirement, a representative value is about 1 second.And the present invention is in order to obtain the frequency that higher time service precision has improved the tick signal.One embodiment of the present of invention use 0.3s as tick signal slot (Tick time), and an alternative embodiment of the invention is used 0.15s.The Tick signal is to be generated by the Tick maker of hardware, so frequency precisely and only relevant with the degree of stability of crystal oscillator.The detailed structure of this Tick maker will be described in detail in Figure 11.Suppose to have entered this moment tracking mode 204.When the tick signal comes, hardware latchs a series of time counter 803.These time registers comprise: code phase counter, half chip count device, millisecond counter, bit counter and second counter.These counters are initialised when frame synchronization, are modified the realization cascaded carry when carrying out related operation.The associating of these counters, can calculate PN sign indicating number launch time second following precision part.Further, demodulate the TOW information 804 in the navigation message, demodulate the ephemeris 805 of first subframe to the, three subframes, demodulate the UTC control information 806 of the 4th subframe.Demodulation text process 205 in these three process corresponding diagram 2 flow processs.The concrete structure of UTC calibration information and calibration algorithm all have detailed description in the ICD-GPS-200C document.Whether detect this moment has more than or equal to 4 effective satellites 807.If have, the information of binding time counter and TOW value promptly can calculate complete PN sign indicating number time of arrival 808; Otherwise wait for a new tick signal, a beginning new round is calculated.Obtaining after time of arrival, promptly can to calculate receiver location, obtain the receiver time simultaneously with respect to the clock of satellite time inclined to one side 809 more than or equal to the ephemeris of 4 satellites and PN sign indicating number.This process comprises: the position of calculating satellite time of arrival according to ephemeris and PN sign indicating number at first; Further, calculate receiver location according to following system of equations:
ρ = ( x sat 1 - x user ) 2 + ( y sat 1 - y user ) 2 + ( z sat 1 - z user ) 2 + bu
ρ = ( x sat 2 - x user ) 2 + ( y sat 2 - y user ) 2 + ( z sat 2 - z user ) 2 + bu
ρ = ( x sat 3 - x user ) 2 + ( y sat 3 - y user ) 2 + ( z sat 3 - z user ) 2 + bu
ρ = ( x sat 4 - x user ) 2 + ( y sat 4 - y user ) 2 + ( z sat 4 - z user ) 2 + bu
ρ=Ct wherein Arriveρ is a pseudorange, i.e. the product of PN sign indicating number time of arrival and light velocity C
Bu=C Δ t BiasBu is the light velocity and the inclined to one side product of clock.Further, utilize the inclined to one side correction of clock can calculate precision higher time of arrival 810.Coordinate system down when this time was in gps system.And then, utilize the UTC calibration information that demodulates promptly can calculate the UTC time 811.Wherein second and second other information of higher level can direct coding, utilize the output of time code output unit.
Fig. 9 is the sequential chart of output synchronizing pulse, how has separately strictly in time described software section and hardware components and be, and then the output that realizes pulse signal is not subjected to the influence of computed in software uncertain factor consuming time.901,902,906 is the continuous tick signal that generates as the hardware Tick maker among Figure 11.907 have characterized a whole second of UTC time (being absolute time), and just hardware need be exported the moment of the whole pps pulse per second signal of OnePPS.Because the tick signal is produced by hardware, thus the tick signal be at interval strictness accurately, only relevant with the frequency stability of crystal oscillator.Can realize adjustment to the tick cycle by the counter register of writing the tick maker, this cycle need be less than 1 second, to guarantee having only whole second an of UTC in two adjacent tick signals at most.One embodiment of the present of invention use 0.3s as the tick signal period, and an alternative embodiment of the invention is used 0.15s.The Tick signal period is short more, and time service precision is high more, but the length of tick signal period also is subjected to the restriction of the arithmetic capability and the power consumption of baseband processing chip.When each tick arrived, hardware latched all time registers, promptly can calculate the gps time of each tick correspondence, and then can calculate the corresponding constantly UTC time of each tick.This gps time has had detailed description to the conversion of UTC time in Fig. 6.The corresponding constantly UTC time of known adjacent two tick, then can calculate continuous two tick corresponding UTC time in the time interval (tick signal period just) constantly.Because tick is driven by crystal oscillator, the absolute time of the tick cycle correspondence that utilization calculates promptly can calculate the absolute time of each hardware clock signal period correspondence, in other words, realization is to the calibration of crystal oscillator, and this calibration process does not directly feed back crystal oscillator, do not need special scaling unit and compensating circuit, reduced system complexity.The present invention does not simultaneously require the type of crystal oscillator, only requires the short-term (a Tic cycle) of crystal oscillator frequency stability is higher to get final product, and does not need the crystal oscillator of custom-made, has reduced cost equally.In addition the Tick cycle short more, frequent more to the correction of crystal oscillator, low more to the requirement of crystal oscillator.This computation process is finished 903 constantly.Calculate the whole second moment of UTC and the difference between the next tick afterwards, further, convert the clock number of correction to.This transfer process has comprised simultaneously revises the time-delay of hardware counter and the delay of reading control register.This computation process is finished 904 constantly.Constantly write the control register that hardware is put in order the pulse per second (PPS) counter 905 immediately, counter enable signals enables.901~906th, realize by the flush bonding processor operating software.At Tick+1906 constantly, the tick signal triggering is put in order the pulse per second (PPS) counter, and this moment, all computed in software were finished, and result of calculation has deposited whole pulse per second (PPS) control register in and computed in software is irrelevant.Whole pulse per second (PPS) counter reads in the value in the control register, the detection counter enable signal, if can, then open counter.Counter works, when counting down to the value of whole second clock number register, just Tick+1 and whole second constantly 907 mistimings convert to clock number the time, also be whole second of UTC absolute time constantly, the pulse signal of output certain width, i.e. OnePPS signal.901~906th, realize by the flush bonding processor operating software, and 906~907 be to be realized by hardware fully, guaranteed that timing is not subjected to computed in software to postpone probabilistic the influence, guaranteed the time precisely.
Figure 10 has described the calculating synchronizing pulse software flow of a preferred embodiment of the present invention.After the system initialization 1001, whether same detection hardware Tick maker exports Tick signal 1002.If the Tick rising edge arrives, then once calculate the corresponding constantly UTC time 1003 of Tick; If the Tick rising edge does not arrive, then continue to wait for next time and calculate.This time is the Tick-1 701 UTC time constantly in the corresponding diagram 7.Calculate the absolute time 1004 of a Tick cycle correspondence subsequently.It is the time between 702 and 701 among Fig. 7.And then, carry out fault-tolerant processing 1005.The tick cyclical theory upper deviation that calculates only depends on crystal oscillator, and its error amount should be very little, promptly abandons if the calculated value deviation surpasses a threshold value.Further, in several tick cycles in the utilization, predict next tick cycle time corresponding 1006.Then can calculate next Tick (Tick+1,906 in the corresponding diagram 9 constantly) and the corresponding constantly UTC absolute time 1007 of following next Tick (Tick+2,708 in the corresponding diagram 7 constantly).And then whether whole second (907 in the corresponding diagram 9 constantly) constantly that can judge UTC be between Tick+1 and Tick+2 1008.Otherwise, then close counter 1009 and wait for calculating next time.The extra computation that can avoid so not arriving the whole second moment and introduce reduces power consumption, reduces the time interval in the Tick moment and the whole second moment simultaneously, reduces the error that the crystal oscillator frequency deviation is brought.Afterwards, utilize the clock period 1010 of the absolute time calibration crystal oscillator driving of the Tick cycle correspondence that calculates.Through such calibration, system reduces greatly to the requirement of crystal oscillator, only requires that the enough height of frequency stabilization of crystal oscillator short-term promptly can satisfy system requirements.This short-term is meant at a Tick in the cycle.Under short like this interval, the frequency shift (FS) of crystal oscillator is normally very little.Tick cycle while is more little, and time service precision is high more.The precision equivalence of the cheap temperature compensating crystal oscillator (TXCO) of one embodiment of the present of invention 5PPM has improved 2 orders of magnitude.This scheme does not need crystal oscillator is done any feedback and compensation simultaneously, has reduced the complexity and the cost of system, has improved reliability.Do not have mimic channel that crystal oscillator is fed back in real time in addition, guaranteed the frequency stability between twice calibration.
Further, calculate whole second difference (time interval between 906 and 907 in the corresponding diagram 9) 1011 of Tick+1 and UTC, and then calculate the clock number of this time interval correspondence, be used for whole second time slot counter of hardware and count with the correction clock number.This transfer process has comprised the content of calibration system time delay simultaneously.System's time delay comprises that cable delay, antenna groups postpone and the whole delay that second, time slot counter read register.This counter will be described in detail at Figure 11.Then, whole second time slot counter enable signal and count value are write whole pulse per second (PPS) control register 1013,1014 (705 in the corresponding diagram 9 constantly), wait for that immediately the arriving of tick signal carries out the calculating of a new round.Whole second time slot counter of hardware this moment do not started working, and has only Tick+1 interim constantly, and Tick maker output Tick signal just can trigger whole second time slot counter of hardware and start working.More than each step all finish by flush bonding processor software in the baseband processing chip, and finished constantly at Tick+1, computed in software uncertainty consuming time is carved into whole second hardware counting constantly of UTC in the time of can not influencing from Tick+1, guaranteed the accurate of time service.
Figure 11 has described the synchronizing pulse hardware configuration of a preferred embodiment of the present invention.This module is in order to the whole pps pulse per second signal that generates and the UTC absolute time was accurately aimed in whole second constantly.This module is mainly by whole pulse per second (PPS) control register heap 1101, Tick maker 1102, and 1,103 three modules of whole second time slot counter are formed.Wherein whole pulse per second (PPS) control register heap is driven by low-speed clock 1107, and the clock of this clock and correlator is consistent.One embodiment of the present of invention are used 5.555MHz, and an alternative embodiment of the invention is used 5.714MHz.Whole second time slot counter and Tick maker are to be driven by high-frequency clock 1104.One embodiment of the present of invention are used 100MHz.Low-speed clock is to be obtained by the high-frequency clock frequency division, thereby guarantees that between two clocks be synchronous.The introducing of high-frequency clock makes the clock resolution of whole second time slot counter improve greatly, and other parts of system use low-speed clock to reduce power consumption.Three all same reset signal 1105 controls of module reset.The Tick maker is used to produce tick signal 1113, in fact is exactly a configurable counter.There is individual register this maker inside, can pass through data line 1108, when being selected this address and writing enable signal 1106 to enable by address wire 1109, has write counter, realizes changing the purpose of Tick length.
Whole pulse per second (PPS) control register heap mainly comprises two registers: counter enable register 1110 and time slot clock number register 1111.These two registers can be rewritten by the combination of writing enable signal 1106, address wire 1108, data line 1109 equally.Time slot clock number register goes out the Tick moment and whole second time slot constantly, the i.e. result that 012 process calculates among Figure 10 who represents with the clock number of high-frequency clock in order to storage computation.The counter enable signals storer is in order to latch the enable signal of whole second time slot counter.When the Tick rising edge arrived, whole second time slot counter sense enable signal if enable, then read in the time slot clock number of storage, and counter is started working.Output OnePPS pulse signal 1112 when counter overflows becomes low level after keeping a period of time high level.This holds time adjustable, and a well accepted value is 1ms.
Figure 12 has described the output synchronizing pulse hardware logic process flow diagram of a preferred embodiment of the present invention, and its hardware configuration as shown in Figure 9.After system's power-up initializing 1201, time slot counter 903 was waited for the Tick signal 1202 that is generated by Tick maker 902 in whole second.Tick signal rising edge arrives then to trigger whole second counter works, latchs Tick signal 1203, and then reads in enable signal and whole second time slot clock number 1204 in the whole pulse per second (PPS) control register heap.If enable signal enables, then counter works 1206, overflow 907 until counter; Otherwise wait for the arriving of Tick signal next time.1208~1211 steps are to realize the whole pps pulse per second signal of certain width.This width can be according to the different application adjustment by level width counter controls.A typical application is 1ms.
In the discussion in front, the present invention describes with reference to american global positioning system (GPS).Yet, should be appreciated that these methods are equally applicable to similar global position system, as Muscovite GLONASS (Glonass) system, the Big Dipper 1 and the Big Dipper 2 systems of Galileo (Galileo) system in Europe and China.Employed term " GPS " also comprises some global position systems like this, as Muscovite GLONASS (Glonass) system, and the Big Dipper 1 and the Big Dipper 2 systems of Galileo (Galileo) system in Europe and China.Term " gps signal " comprises the signal from other global position systems.
Above, low-cost time service and method for synchronous and equipment based on GPS receiver have been described.Although the present invention describes with reference to specific embodiment, clearly, those of ordinary skill in the art under the situation of invention scope that non-migration claims are limited and spirit, can also make various modifications and changes to these embodiment.Therefore, instructions and accompanying drawing are descriptive, rather than determinate.
The above; only be the embodiment among the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with the people of this technology in the disclosed technical scope of the present invention; the conversion that can expect easily or replacement all should be encompassed in of the present invention comprising within the scope.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claims.

Claims (26)

1. the time service of a GPS and method for synchronous is characterized in that, comprising:
Calculate the Coordinated Universal Time(UTC) intermediate step, calculate coordinated universal time by software approach;
Calculate the synchronizing pulse step, calculate synchronizing pulse by software approach and hardware approach;
To the crystal oscillator calibration steps, crystal oscillator is carried out soft alignment by the coordinated universal time that calculates;
To external unit time service step, the combination by time code and synchronization pulse realizes the external unit time service.
2. time service as claimed in claim 1 and method for synchronous is characterized in that, described calculating Coordinated Universal Time(UTC) intermediate step comprises:
Resolve the synchronizing signal rising edge and come temporarily, hardware latchs time register;
The navigation message of demodulation GPS satellite;
Calculate pseudo noise time of arrival;
When inclined to one side more than or equal to the clock between 4 effective times spent calculating receiver locations of satellite and receiver time and the satellite time;
Calculate the time of arrival of revising;
Calculate coordinated universal time.
3. time service as claimed in claim 1 and method for synchronous is characterized in that, the software approach in the described calculating synchronizing pulse step comprises:
The corresponding constantly coordinated universal time of synchronizing signal is resolved in calculating;
Calculate a coordinated universal time that resolves the synchronous signal cycle correspondence;
Revise the clock period that crystal oscillator drives;
Calculate the whole second moment of coordinated universal time and next resolving the mistiming of synchronizing signal between the moment;
Calculate the clock period of this time slot correspondence;
Counter enable signals and time slot clock number are deposited in the corresponding registers of the control register heap of hardware synchronization pulse.
4. time service as claimed in claim 1 and method for synchronous is characterized in that, the hardware approach in the described calculating synchronizing pulse step comprises:
Whole second time slot counter waited for and resolved synchronizing signal, resolves the synchronizing signal rising edge and arrives then to trigger whole second counter works;
Latch and resolve synchronizing signal;
Read in enable signal and whole second time slot clock number in the whole pulse per second (PPS) control register heap;
If enable signal enables, then counter works is overflowed until counter;
Otherwise wait for the arriving of next time resolving synchronizing signal.
5. time service as claimed in claim 1 and method for synchronous is characterized in that, and be described to the crystal oscillator calibration steps, comprising:
Calculate the GPS time that each resolves synchronous correspondence;
Calculate the coordinated universal time that each resolves the synchronization point correspondence;
Calculate continuous two coordinated universal times that resolve the time interval correspondence of synchronization point;
The absolute time of resolving the synchronous signal cycle correspondence that utilization calculates calculates the absolute time of each hardware clock signal period correspondence, realizes the calibration to crystal oscillator.
6. time service as claimed in claim 1 and method for synchronous is characterized in that, described software section and the hardware components that calculates the synchronizing pulse step is that strictness separates in time.
7. time service as claimed in claim 6 and method for synchronous, it is characterized in that, the software section of described calculating synchronizing pulse step and hardware components are strict in time separately to be realized by following steps: after computed in software finishes, write the control register of the whole pulse per second (PPS) counter of hardware, resolve synchronizing signal and trigger whole pulse per second (PPS) counter.
8. time service as claimed in claim 1 and synchronous method, it is characterized in that, in the described calculating synchronizing pulse step, resolving the synchronizing signal rising edge temporarily, whole second time slot counter sense enable signal enables, then read in the time slot clock number of storage, counter is started working, and the whole pps pulse per second signal of output when counter overflows becomes low level after keeping a period of time high level.
9. time service as claimed in claim 1 and method for synchronous is characterized in that, in the described calculating synchronizing pulse step, first executive software part is carried out hardware components again.
10. time service as claimed in claim 3 and method for synchronous is characterized in that, described calculating coordinated universal time comprised the correction of system delay in whole second constantly with the next process of resolving the mistiming of synchronization point.
11. time service as claimed in claim 10 and method for synchronous is characterized in that, described system delay comprises that the delay of antenna groups delay, antenna cable, whole pulse per second (PPS) control register read and postpone and the output delay of time slot clock number counter.
12. time service as claimed in claim 1 and method for synchronous is characterized in that, all computation processes of the software approach in the described calculating synchronizing pulse step are resolved in the synchronous signal cycle at one and are finished.
13. time service as claimed in claim 5 and method for synchronous is characterized in that, the described synchronization point that resolves continuously resolves the generation of synchronizing signal maker by hardware.
14. time service as claimed in claim 4 and method for synchronous is characterized in that, the described synchronous signal cycle that resolves was less than 1 second.
15. time service as claimed in claim 1 and method for synchronous is characterized in that, described to external unit time service be by and coordinated universal time realize synchronously between each time service equipment synchronously.
16. the time service of a GPS and synchronous equipment, comprise the external crystal-controlled oscillation trapping module, tracking module, the positioning calculation module is characterized in that, comprise that coordinated universal time resolves the unit, the internal frequency alignment unit, real-time clock, time zone time scaling unit, the synchronizing pulse generation unit, the special-purpose time service antenna of time code output unit and GPS.
17. time service as claimed in claim 16 and synchronous equipment is characterized in that, described synchronizing pulse generation unit comprises whole pulse per second (PPS) control register heap, resolves synchronizing signal maker and whole second time slot counter.
18. time service as claimed in claim 16 and synchronous equipment is characterized in that, described real-time clock is the external cell power supply.
19. time service as claimed in claim 16 and synchronous equipment is characterized in that, described real-time clock is under the global positioning system signal deletion condition, continues the external unit time service.
20. time service as claimed in claim 17 and synchronous equipment is characterized in that, described whole pulse per second (PPS) control register heap is driven by low-speed clock.
21. time service as claimed in claim 17 and synchronous equipment is characterized in that, time slot counter was to be driven by high-frequency clock with resolving the synchronizing signal maker in described whole second.
22. time service as claimed in claim 16 and synchronous equipment is characterized in that, the low-speed clock in the described real-time clock is to be obtained by the high-frequency clock frequency division.
23. time service as claimed in claim 17 and synchronous equipment is characterized in that, described whole pulse per second (PPS) control register heap resolves the synchronizing signal maker, and time slot counter was all resetted by same reset signal control in whole second.
24. time service as claimed in claim 17 and synchronous equipment is characterized in that, described whole pulse per second (PPS) control register heap comprises counter enable register and time slot clock number register.
25. time service as claimed in claim 24 and synchronous equipment is characterized in that, described counter enable register and time slot clock number register be by writing enable signal, address wire, and the combination of data line is rewritten.
26. time service as claimed in claim 17 and synchronous equipment is characterized in that, time slot counter triggered by resolving synchronizing signal in described whole second.
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