CN101426099B - Digital television system and method for processing data signal in digital television - Google Patents
Digital television system and method for processing data signal in digital television Download PDFInfo
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Abstract
The present invention provides a digital TV system and a method for processing data signal in the digital TV. The digital TV system includes a memory, a signal processing module and a processor. The memory is used to store program codes; the signal processing module is used for receiving and processing data signals, and generating an interrupt signal; the processor is used to receive the interrupt signal, as well as to read the program code in the memory, and to implement the program code in order to achieve the function of digital TV. The memory can be divided into a plurality of memory blocks; the processor access the memory by taking the memory blocks as the access scope; the memory block includes a first sub-block, stored with specific program codes. When the processor receives the interrupt signal, the processor will read the specific program code stored in the first sub-block of the memory block at that time and executes the specific program code.
Description
Technical field
The method of process data signal in relevant a kind of digital television system of the present invention and the Digital Television, especially refer to that a kind of memory can be divided into a plurality of blocks, and this memory of processor access is the digital television system of the scope of access with this block, and the method for handling the data-signal of Digital Television.
Background technology
At present Digital Television is in the stage of a large amount of growth, and many companies drop into exploitation and the manufacturing that a large amount of manpowers and goods and materials are engaged in digital television chip.Compared to traditional simulated television, the more complex functions of Digital Television, the data volume of required processing is also bigger, therefore also just needs more powerful arithmetic element to realize the function of Digital Television, and in comparison, the employed arithmetic element of simulated television is just comparatively simplified.In transition period of simulated television and Digital Television now, the research staff of many system manufacturer still uses widely used development equipment on simulated television, compiler etc. for example, and the research staff also is familiar with the interface and the system of simulated television.Yet when being converted to Digital Television, because the characteristic of employed arithmetic element is different with simulated television, therefore not only needs to revise development equipment, research staff also to need to adapt to again new system environments and interface, so cause the increase of development cost, and the delay on the timeliness.
Summary of the invention
Main purpose of the present invention is to provide the method for process data signal in a kind of digital television system and the Digital Television, to solve the above problems.
The present invention discloses a kind of digital television system, includes a memory, a signal processing module and a processor.This memory is used for program code stored; This signal processing module is used for receiving and handling a data-signal, and produces an interrupt signal; And this processor is coupled to this memory and this signal processing module, is used for receiving this interrupt signal and reads this program code in this memory, and carry out this program code to realize the function of a Digital Television.Wherein this memory can be divided into a plurality of blocks, be the scope of access with this block during this memory of this processor access, this block includes one first sub-block, this first sub-block stores a specific program code, when this processor receives this interrupt signal, this processor promptly can read this specific program code that this first sub-block of this block of access is at that time stored, and carries out this specific program code.
The present invention discloses the method for handling a data-signal in a kind of Digital Television in addition, and include: a memory is provided, and this memory can be divided into a plurality of blocks, and this block includes one first sub-block; Program code stored to this memory; Store a specific program code this first sub-block to this memory; Receive and handle a data-signal, when the data of having handled that data-signal comprised arrive a predetermined data volume, produce an interrupt signal; With this block is the scope of access, reads this program code in this memory certainly, and carries out this program code to realize the function of a Digital Television; And when this interrupt signal produces, read this specific program code of being stored by this first sub-block of this block of access at present, and carry out this specific program code.
Description of drawings
Fig. 1 utilizes the partial circuit diagram of the Digital Television of simple type processor for the present invention.
Fig. 2 is the configuration mode of memory of the present invention and the schematic diagram that reads the specific program code.
Fig. 3 is the schematic diagram of the configuration mode of memory of the present invention.
Fig. 4 is the schematic diagram of the configuration mode of memory of the present invention.
Fig. 5 switches the schematic diagram of block during for access memory of the present invention.
Fig. 6 is the flow chart of the method for process data signal in the Digital Television of the present invention.
The main element symbol description
The local circuit of 100 Digital Television
110 processors
120 signal processing modules
130 buffers
140 memory control units
150 memories
210, the block of 220,230 memories
212,222,232 first sub-block
214,224,234 second sub-block
Embodiment
In the middle of specification and follow-up claim, used some vocabulary to censure specific element.The person with usual knowledge in their respective areas should understand, and same element may be called with different nouns by hardware manufacturer.This specification and follow-up claim are not used as distinguishing the mode of element with the difference of title, but the criterion that is used as distinguishing with the difference of element on function.Be an open term mentioned " comprising " in the middle of specification and the follow-up request in the whole text, so should be construed to " comprising " but be not limited to.In addition, " couple " speech and comprise any indirect means that are electrically connected that directly reach at this.Therefore, be coupled to one second device, then represent this first device can directly be electrically connected in this second device, or be electrically connected to this second device indirectly by other devices or connection means if describe one first device in the literary composition.
See also Fig. 1, Fig. 1 utilizes the partial circuit diagram of the Digital Television of simple type processor for the present invention.Now will be with this circuit, and the function that this circuit can be finished is example, and the partial function that how to utilize the simple type processor to realize Digital Television is described.As shown in Figure 1, the local circuit 100 of Digital Television includes processor 110, signal processing module 120, buffer 130, memory control unit 140 and memory 150.Signal processing module 120 is used for receiving data-signal, handle this data-signal after, produce interrupt signal according to the situation of handling.According to a preferred embodiment, signal processing module 120 can be transport stream processing module (TSP module), be used for receiving and pack processing contains information on services (the service information of Digital Television, SI) data-signal (is example with DVB (Digital VideoBroadcasting) system), this information on services for example includes the electronic program guides of Digital Television.
When handling this information on services, the transport stream processing module can carry out identification of data packets (packetidentification, PID) filtering and section (section) filtering, filtered packet content can be temporarily stored in the buffer 130, when the packet content in the buffer 130 arrives certain memory space, signal processing module 120 (being the transport stream processing module of present embodiment) can produce a control signal and give memory control unit 140, memory control unit 140 can dump to the packet content in the buffer 130 memory 150 and be combined as filtered information on services, and the data of handling when the transport stream processing module are when arriving a predetermined data volume, information on services least unit for example, be section (section), the transport stream processing module promptly can be sent an interrupt signal and give processor 110.
Processor 110 is coupled to signal processing module 120 and memory control unit 140, and 110 pairs of memories 150 of processor read or when write-in program code or data, all are the actions of finishing access by memory control unit 140.Memory 150 code that has program stored therein, processor 110 is carried out the function that this program code is realized Digital Television, for example produces OSD (on screen display) menu, image and the decoding of sound, the poor benefit of image and decoding of convergent-divergent and information on services or the like.According to a preferred embodiment of the present invention, processor 110 can be the single-chip microprocessor that Intel company (Intel) was developed in 1981, for example is the single-chip microprocessor of 8 bits.During processor 110 access memories 150 scopes that are access with a block, when certain block of locking, processor 110 is the data that comprised in this block scope of access, and when the data beyond necessary this scope of access, then must switch to different blocks.That is to say, memory 150 can be divided into a plurality of blocks, as shown in Figure 2, program code stored part is divided into a plurality of blocks 210,220,230 in the memory 150, each block also includes two sub-block, and promptly block 210 includes that first sub-block 212 and second sub-block 214, block 220 include first sub-block 222 and second sub-block 224, block 230 includes first sub-block 232 and second sub-block 234.Please note, in each first sub-block or second sub-block block under separately, has same relative position, for example, as shown in Figure 2, in block 210,220,230, first sub-block 212,222,232 is the top of the block of position under separately all, and second sub-block 214,224,234 then is close to first sub-block 212,222,232 respectively.The configuration mode of other first and second sub-block still can be general as shown in Figures 3 and 4.
Each first sub-block stores specific program code, when processor 110 received by 120 interruptions in transmissions signals of signal processing module, processor 110 can read this specific program code by control storage control unit 140 from first sub-block of the block of present institute access; In more detail, block arrangement mode with Fig. 2 is an example, suppose that the eve processor 110 of receiving interrupt signal is reading and carrying out the program code (position A) beyond first and second sub-block in the block 220, when processor 110 receives interrupt signal, promptly can control storage control unit 140 move to and read this specific program code (position B) in the block 220 in first sub-block 222.Flag (flag) can be set when processor 110 is carried out this specific program code, control signal control storage control unit 140 can be produced according to the set condition of flag then.
Memory control unit 140 is coupled to processor 110, buffer 130 and memory 150.When memory control unit 140 receives the control signal of processor 110, can from memory 150, read the filtered information on services that combines by packet content, and send filtered information on services to processor 110, by processor 110 come the executive program code with should be filtered information on services decoding (parsing).The information on services that decoding is finished can be stored back memory 150 by memory control unit 140 again, or be stored to outside memory (not shown) by other devices, (inter-integrated circuit, I2C) signal is with the memory of storage to the outside for example can to pass through internal integrated circuit.
In memory 150, second sub-block of each block stores the linker code, when processor 110 will be carried out non-at present just during the program code that block comprised in access, processor 110 can read linker code in second sub-block of this block by memory control unit 140, and the next target block that will access of decision.For instance, see also Fig. 5, suppose that processor 110 is being a block 220 at the block of access just at present, after program code in carrying out block 220 beyond first sub-block and second sub-block comes to an end (position C), and will carry out program code beyond the block 220 time, processor 110 can decide target block by reading linker code (position D) in memory control unit 140 to second sub-block 224.The hypothetical target block is a block 210, processor 110 can read the linker code (position E) of this block by memory control unit 140 earlier to second sub-block 214 of block 210, with the part beyond first sub-block 212 in block 210 and second sub-block 214, initial the read position (position F) of decision processor 110 in block 210.
See also Fig. 6, Fig. 6 is the flow chart of the method for process data signal in the Digital Television of the present invention.At first that Digital Television is required program code is stored in the memory of Digital Television (S610).Please refer to the 2nd to 4 figure, in digital television system of the present invention, memory can be divided into a plurality of blocks, the scope that is access with a block when reading memory, when certain block of locking, be the data that comprised in this block scope of access, and when the data beyond necessary this scope of access, then must switch to different blocks, and each block includes first sub-block and second sub-block, note that in each first sub-block or second sub-block block under separately to have same relative position.Subsequently a kind of specific program code is stored in first sub-block of memory (S612), and with a kind of linker code storage (S614) to second sub-block of memory, be that access range reads and the executive program code then with the block, realize the function (S620) of Digital Television, for example produce the decoding of OSD menu, image and sound, the poor benefit of image and decoding of convergent-divergent and information on services or the like.
Receiving and handle a data-signal (S630) then, is example with the DVB system, and data-signal may comprise the information on services of Digital Television, and this information on services for example includes the electronic program guides of Digital Television.The program of handling for example comprises identification of data packets filtering and section filtering, and the packet content that is produced after the filtering can be temporarily stored in (S640) in the buffer.When the packet content in the buffer arrives certain memory space, be about to this packet content unloading to memory, to form filtered information on services (S642).
Then judge whether the data of having handled arrive predetermined data volume (S645), if no show, then execution in step S630 later if arrive, then produces an interrupt signal (S650).According to this interrupt signal, the processor of Digital Television can be in memory, reads at present by the specific program code of being stored in first sub-block of the block of access, and carries out this specific program code (S660).In more detail, block arrangement mode with Fig. 2 is an example, suppose that the eve processor of receiving interrupt signal is reading and carrying out the program code (position A) beyond first and second sub-block in the block 220, when receiving interrupt signal, processor promptly can move to and read and carry out this specific program code (position B) in the block 220 in first sub-block 222, set a flag then, and produce control signal (S670) according to the set condition of this flag.
Then according to control signal from reading this filtered information on services (S680) in this memory, carry out this program code at last with this filtered information on services decoding, and the storage information on services (S690) of having decoded and having finished.
Be noted that; the present invention is to be the scope of access with the block when reading the program code of memory; if certain function of processor combine digital TV; in the time of need reading a large amount of program codes; the information on services of the reception of present embodiment and decoded digital TV for example; the required program code that reads of processor usually can be greater than a program code that block comprised; therefore carry out at present just when the program code of the block of access comes to an end when processor, promptly must read more program code to next block.In order more to offer some clarification on the process of switching block, see also Fig. 5, suppose that processor 110 is being a block 220 at the block of access just at present, after program code in carrying out block 220 beyond first sub-block and second sub-block comes to an end (position C), can to second sub-block 224, read linker code (position D), decide target block.The hypothetical target block is a block 210, processor 110 can be earlier reads the linker code (position E) of this block to second sub-block 214 of block 210, with the part beyond first sub-block 212 in block 210 and second sub-block 214, initial the read position (position F) of decision processor 110 in block 210.The step of above-described switching block may occur in any step of flow process shown in Figure 6, as long as processor is just carried out at present when the program code of the block of access comes to an end, and the work of decoding information on services is not finished as yet, then processor just must switch block, continues to read more program code.
The present invention utilizes the simple type processor to realize the function of Digital Television, in an embodiment of the present invention, be example only with the information on services of handling Digital Television, illustrate how processor properly utilizes memory, yet the function that the simple type processor can be finished is not subject to this, the real work gone up proof, and the simple type processor can be finished other functions of in the past utilizing than the Digital Television of complex processor.That is to say, the present invention adopts the simple type processor to reduce production costs, and still keep the due function of Digital Television, and for the research staff of system manufacturer, just do not need to revise development equipment, do not need to adapt to again new system environments and interface yet, can speed the speed of production of product virtually.
The above only is preferred embodiment of the present invention, and all equivalences of carrying out according to claim of the present invention change and revise, and all should belong to covering scope of the present invention.
Claims (10)
1. digital television system includes:
One memory is used for program code stored;
One signal processing module is used for receiving and handling a data-signal, and produces an interrupt signal; And
One processor is coupled to this memory and this signal processing module, is used for receiving this interrupt signal and reads this program code in this memory, and carry out this program code to realize the function of a Digital Television; Wherein
This memory can be divided into a plurality of blocks, be the scope of access with this block during this memory of this processor access, this block includes one first sub-block, this first sub-block stores a specific program code, when this processor receives this interrupt signal, this processor promptly can read this specific program code that this first sub-block of this block of access is at that time stored, and carries out this specific program code, and
This block also includes one second sub-block, this second sub-block stores a linker code, when this processor will be carried out the program code that block comprised of non-present institute access, this processor can read this linker code that this second sub-block of this present block is stored, with the target block that determines that the next one will access.
2. digital television system as claimed in claim 1 wherein has identical relative position in each first sub-block this block under separately.
3. digital television system as claimed in claim 1 wherein has identical relative position in each second sub-block this block under separately.
4. digital television system as claimed in claim 1, wherein when this target block of this processor access, this processor can read this linker code that this second sub-block of this target block is comprised earlier, and then in this target block the part beyond this first sub-block and this second sub-block, determine an initial position of reading.
5. digital television system as claimed in claim 1, wherein this signal processing module is a transport stream processing module, this data-signal includes an information on services of Digital Television, when handled this information on services of this transport stream processing module arrived a predetermined data volume, this transport stream processing module produced this interrupt signal.
6. handle the method for a data-signal in the Digital Television, include:
One memory is provided, and this memory can be divided into a plurality of blocks, and this block includes one first sub-block;
Program code stored to this memory;
Store a specific program code this first sub-block to this memory;
Receive and handle a data-signal, when the data of having handled that data-signal comprised arrive a predetermined data volume, produce an interrupt signal;
With this block is the scope of access, reads this program code in this memory certainly, and carries out this program code to realize the function of a Digital Television;
When this interrupt signal produces, read this specific program code of being stored by this first sub-block of this block of access at present, and carry out this specific program code;
Store second sub-block that described block comprised of a linker code to this memory; And
When needs are carried out the non-program code that is comprised by the access block at present, read this linker code of being stored by this second sub-block of this block of access at present, with the target block that determines that the next one will access.
7. method as claimed in claim 6 wherein has identical relative position in each first sub-block this block under separately.
8. method as claimed in claim 6 wherein has identical relative position in each second sub-block this block under separately.
9. method as claimed in claim 6 also includes:
When this target block of access, read this linker code that this second sub-block of this target block is comprised earlier, and then in this target block the part beyond this first sub-block and this second sub-block, determine an initial position of reading.
10. method as claimed in claim 6, wherein this data-signal includes an information on services of Digital Television, handles this information on services and produces a packet content.
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CN1286775A (en) * | 1997-12-31 | 2001-03-07 | 英特尔公司 | Apparatus and method for initiating hardware priority managment by software controlled register access |
CN1744685A (en) * | 2004-08-31 | 2006-03-08 | 三星电子株式会社 | Be used for upgrading the devices and methods therefor of the function of digital broadcasting signal receiver |
CN1787108A (en) * | 2004-12-06 | 2006-06-14 | 明基电通股份有限公司 | Method and apparatus for partitioned memory |
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- 2007-10-31 CN CN2007101680182A patent/CN101426099B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US5802598A (en) * | 1995-06-23 | 1998-09-01 | Advanced Machines Risc Limited | Data memory access control and method using fixed size memory sections that are sub-divided into a fixed number of variable size sub-sections |
CN1286775A (en) * | 1997-12-31 | 2001-03-07 | 英特尔公司 | Apparatus and method for initiating hardware priority managment by software controlled register access |
CN1744685A (en) * | 2004-08-31 | 2006-03-08 | 三星电子株式会社 | Be used for upgrading the devices and methods therefor of the function of digital broadcasting signal receiver |
CN1787108A (en) * | 2004-12-06 | 2006-06-14 | 明基电通股份有限公司 | Method and apparatus for partitioned memory |
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Effective date of registration: 20200413 Address after: No.1, Duhang 1st Road, Hsinchu City, Hsinchu Science Park, Taiwan, China Patentee after: MEDIATEK Inc. Address before: Hsinchu County, Taiwan, China Patentee before: MSTAR SEMICONDUCTOR Inc. |
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