CN101406013A - Pulse transmitter, pulse receiver, pulse transmitting method, and pulse demodulating method - Google Patents

Abstract

A pulse transmitter having a relatively simple structure and generating a pulse modulating signal even at a high transmission rate. In the pulse transmitter, a symbol pulse generating part (103) generates a symbol pulse of amplitude level beta when data S1 is '0', and that of amplitude level gamma when data S1 is '1' in the first pulse slot section, the data pulse generating part (104) generates a data pulse of amplitude level 0 when data S2 to Sn is '0', and that of amplitude level alpha when data S2 to Sn is '1' in a later pulse slot section. The relationship of the amplitude levels keep the relation alpha<beta<gamma. An adder (105) adds the symbol pulse and the data pulse and outputs the sum as a pulse modulating signal.

Description

Pulse transmitter, reception of impulse device, pulse transmission method and pulse demodulation method

Technical field

The present invention relates to pulse transmitter, reception of impulse device, pulse transmission method and pulse demodulation method, particularly be used for pulse transmitter, reception of impulse device, pulse transmission method and the pulse demodulation method of radio communication and optical communication.

Background technology

Pulse transmission method has, OOK by having or not burst transmissions information (On Off Keying: on-off keying) PPM of modulation system, the location transmission information by pulse (Pulse Position Modulation: pulse position modulation) PWM of mode, the width transmission information by pulse (Pulse WidthModulation: pulse-width modulation) method miscellaneous such as mode, according to answering system for transmitting to be suitable for optimal modulation.

In addition, as information is transferred to the method for receiving terminal from transmitting terminal, the serial transmission method of the parallel transmission method of the transmission system transmission information by multisystem and the transmission system transmission information by a system is arranged.The serial transmission method is, a transmission system is carried out the time-division, with each time after the time-division be unit, the information of the system of correspondence is carried out method multiplexing and transmission, and it is compared with the parallel transmission method that transmits by the transmission system of multisystem, has the negligible amounts of transmission system and can simplify the advantage of the structure of transmission unit, therefore in recent years, in wire communication and radio communication, compare with the parallel transmission mode, be more prone to be suitable for the serial transmission method.

For example, in patent documentation 1, as a kind of method of the suitable serial transmission of paired pulses transmission means, the method that the PWM modulation system is suitable for serial transmission is disclosed.Patent documentation 1 disclosed method is for the combination of a plurality of data, to transmit the method for the pulse signal of the pulsewidth that is predetermined.Fig. 1 is illustrated in data when using the disclosed method of patent documentation 1 and the relation between the pulse signal.As shown in Figure 1, when using this transmission method, in the time of code-element period T, based on the value of the symbol data of the m=4 value that constitutes by the n=2 bit, four pulsewidths (W00, W01, W10, W11) are also disposed in definition, and the transfer of setting from H (Hi) to L (Low) is for for once transmitting.

Fig. 2 represents to be used for the major part structure of the demodulating equipment of patent documentation 1 disclosed transmission method.Detect the rising edge of received PWM modulation signal by rising edge detecting unit 11, two times that reproduce with code-element period T is the clock signal of clock cycle.Then, (Phase Locked Loop: phase-locked loop) circuit 12 uses the clock signal after reproducing to generate the high-speed clock signal that is used to detect minimum pulsewidth by PLL.Then, by counter 13, be benchmark with the high-speed clock signal that generates, calculate each pulsewidth of PWM modulation signal.Then,, estimate pulsewidth, it is transformed to corresponding to carrying out demodulation behind the symbol data of pulsewidth based on the value that calculates by data generating unit 14.That is to say, in above-mentioned transmission method, can a plurality of bit serials be transmitted, so the utilization ratio advantage of higher of transmission system is arranged by pulsewidth.

In addition, in above-mentioned transmission method, in the time that is set in code-element period T, transfer from H to L is for for once, thereby can be from the received PWM modulation signal of demodulating equipment, extract the code element clock of code-element period T, its result, can generate with the PWM modulation signal synchronous high-speed clock signal as the high-speed clock signal that is used to detect minimum pulsewidth.And, use high-speed clock signal to calculate each pulsewidth of the PWM modulation signal that receives, detect pulsewidth thus, and the demodulation symbol data corresponding with pulsewidth.

[patent documentation 1] spy opens flat 9-36923 communique (the 7th page of Fig. 3, the 8th page of Fig. 2)

Summary of the invention

The problem that the present invention need solve

Yet following problem is arranged in above-mentioned transmission method: along with transmission rate becomes at a high speed, the circuit scale of demodulating equipment increases, structure complicated.That is to say, in above-mentioned transmission method, even code-element period T is identical, if but transmission rate becomes high speed, and the bit number n that then distributes to the data of a symbol data increases, minimum pulse width P=T/ (2 ⁿ+ 1) narrows down.Therefore, in order to generate or detect minimum pulse width, need be more at a high speed and the high accuracy clock signal than code element clock, its result, circuit scale increases, structure complicated.In addition, even it is identical to distribute to the bit number n of data of a symbol data, if transmission rate becomes at a high speed but code-element period T shortens, then minimum pulse width P narrows down.Therefore, in order to generate or detect minimum pulse width, need be more at a high speed and the high accuracy clock signal than code element clock, its result, circuit scale increases, and it is complicated that structure becomes.

The purpose of this invention is to provide pulse transmitter, reception of impulse device, pulse transmission method and pulse demodulation method,, also can generate and the demodulated pulse modulation signal by simpler structure even when transmission rate becomes high speed.

The scheme of dealing with problems

In order to address the above problem, the structure that pulse transmitter of the present invention adopts comprises: allocation units, and with the data message of n bit, a bit one is the pulse slot of time slot width than the 1/n that specially is assigned to code-element period; The data pulse generation unit is selected and the corresponding amplitude level of described data message that is assigned to the rear portion pulse slot except that the beginning pulse slot, generates the data pulse modulation signal in pulse slot interval, described rear portion; The symbol pulses generation unit, according to the described data message that is assigned to described beginning pulse slot, from 2 value amplitude levels, select one of them amplitude level, in described beginning pulse slot interval, generate the code element pulse-modulated signal greater than the amplitude level of described data pulse modulation signal; And adder unit, with described symbol pulses modulation signal and the addition of described data pulse modulation signal, thus the production burst modulation signal.

According to this structure, can be according to the pulse slot position in the data message of distributing to each pulse slot and the code element, each pulse slot is changed the amplitude level of the pulse-modulated signal that generates in each pulse slot interval and sends, and not to pulsewidth distribute data information.Therefore,, do not need to be used to control the high-speed clock signal of pulsewidth yet, can pass through simpler structure production burst modulation signal even transmission rate becomes at a high speed.In addition, irrelevant with data message, therefore the amplitude level that starts the pulse-modulated signal in the pulse slot interval detects beginning pulse slot position easily always greater than the amplitude level of the pulse-modulated signal in the pulse slot interval, rear portion, can obtain the synchronous of pulse-modulated signal exactly.Also have, can be at the beginning pulse slot, symbol timing and data message is overlapping, can prevent that therefore efficiency of transmission from descending.

The structure that reception of impulse device of the present invention adopts comprises: receiving element, the symbol data that reception will be made of the data message of each code element n bit, a bit one is the pulse-modulated signal that the pulse slot of time slot width sends than specially being assigned to 1/n with code-element period; The symbol timing detecting unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 1, detects beginning pulse slot position; The beginning data extracting unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 2, is extracted the described data message that is assigned to described beginning pulse slot; And the rear portion data extraction unit, by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 3, extract the described data message that is assigned to described rear portion pulse slot.

According to this structure, passing threshold is judged, can extract the beginning pulse slot of expression code element timing position, and the data message that has been assigned to beginning pulse slot and rear portion pulse slot.Therefore, do not need high-speed clock signal, circuit scale is increased, and can realize simplification, miniaturization and the low consumpting power of reception of impulse device.In addition, carry out threshold determination by using different threshold values, can be separated in beginning in the pulse slot overlapping symbol timing and data message, prevent that efficiency of transmission from descending.

Beneficial effect of the present invention

According to the present invention, pulse transmitter, reception of impulse device, pulse transmission method and pulse demodulation method can be provided, even when transmission rate becomes high speed, also can pass through simpler structure production burst modulation signal, and carry out demodulation.

Description of drawings

Fig. 1 is the figure that represents the transformat of PWM modulation signal in the past.

Fig. 2 is a block diagram of representing the major part structure of demodulating equipment in the past.

Fig. 3 is the block diagram of major part structure of the pulse transmitter of expression embodiment of the present invention 1.

Fig. 4 is the figure of burst transmissions form of the pulse-modulated signal of expression execution mode 1.

Fig. 5 is the sequential chart of action that is used to illustrate the pulse transmitter of execution mode 1.

Fig. 6 is the sequential chart of action that is used to illustrate the pulse transmitter of embodiment of the present invention 2.

Fig. 7 is the block diagram of major part structure of the pulse transmitter of expression embodiment of the present invention 3.

Fig. 8 is the sequential chart of action that is used to illustrate the pulse transmitter of execution mode 3.

Fig. 9 is the block diagram of major part structure of the reception of impulse device of expression embodiment of the present invention 4.

Figure 10 is the sequential chart of action that is used to illustrate the reception of impulse device of execution mode 4.

Figure 11 is the block diagram of major part structure of the reception of impulse device of expression embodiment of the present invention 5.

Figure 12 is the sequential chart of action that is used to illustrate the reception of impulse device of execution mode 5.

Figure 13 is the block diagram of major part structure of the pulse transmitter of expression embodiment of the present invention 6.

Figure 14 is the sequential chart of action that is used to illustrate the pulse transmitter of execution mode 6.

Figure 15 is the block diagram of major part structure of the reception of impulse device of expression embodiment of the present invention 7.

Figure 16 is the sequential chart of action that is used to illustrate the reception of impulse device of execution mode 7.

Embodiment

Below, use the description of drawings embodiments of the present invention.

(execution mode 1)

Fig. 3 illustrates the major part structure of the pulse transmitter of embodiment of the present invention 1.Pulse transmitter 100 shown in Figure 3 comprises data distributor 101, symbol timing generation unit 102, symbol pulses generation unit 103, data pulse generation unit 104 and adder 105.

Data distributor 101 will be distributed to the data message of the n bit of a code element, be assigned as n data S1, S2 ..., Sn, data S1 is outputed to symbol pulses generation unit 103.And data distributor 101 outputs to data pulse generation unit 104 with data S2～Sn.Also have, data distributor 101 outputs to symbol timing generation unit 102 with code element clock SC.

Symbol timing generation unit 102 for example is made of single-shot trigger circuit (One-shot circuit) 1020, rising edge with code element clock SC is triggering, be created on the symbol timing ST of the time of the pulsewidth Wp that is equivalent to expect pulse signal, and symbol timing ST is outputed to symbol pulses generation unit 103 and data pulse generation unit 104 for " H ".In addition, symbol timing generation unit 102 generation amplitude levels are α, the pulsewidth Wp symbol timing ST less than pulse slot period T p.In addition, pulse slot is, 1 code-element period Ts carried out n cut apart gained, and pulse slot period T p is the 1/n of 1 code-element period Ts.

Symbol pulses generation unit 103 possesses amplifier 1030,1031 and selector 1032, and amplifier 1030 and 1031 amplifies symbol timing ST with the magnification ratio that differs from one another, and the symbol pulses SP0 and the SP1 of gained outputed to selector 1032.In addition, amplifier 1030 amplifies so that the amplitude level of symbol pulses SP0 becomes β.In addition, amplifier 1031 amplifies so that the amplitude level of symbol pulses SP1 becomes γ.Selector 1032 is selected the wherein side of symbol pulses SP0 or symbol pulses SP1 according to the value of data S1, and it is outputed to adder 105 as symbol pulses SP.

For example, when data S1 was " 0 ", selector 1032 was chosen as symbol pulses SP with symbol pulses SP0, and when data S1 was " 1 ", selector 1032 was chosen as symbol pulses SP with symbol pulses SP1.That is to say, when symbol pulses generation unit 103 was " 0 " at the data S1 that is assigned to the beginning pulse slot, generating amplitude level was the symbol pulses SP of β, and when data S1 is " 1 ", generating amplitude level is the symbol pulses SP of γ, and outputs to adder 105.

Data pulse generation unit 104 possesses delayer 1041-2～1041-n, "AND" circuit 1042-1～1042-n and OR circuit 1040.Delayer 1041-2 makes symbol timing ST postpone pulse slot Tp, and symbol timing ST after "AND" circuit 1042-2 postpones and the AND operation of data S2 output to OR circuit 1040 with the result of AND operation.

Equally, (k=3～n) makes symbol timing ST postpone pulse slot Tp * (k-1), symbol timing ST after "AND" circuit 1042-k postpones and the AND operation of data Sk to delayer 1041-k.That is to say that "AND" circuit 1042-k is assigned to pulse slot k by carrying out AND operation with data Sk.The data Sk that "AND" circuit 1042-k will be assigned to pulse slot k outputs to OR circuit 1040.

The data Sk that 1040 couples of "AND" circuit 1042-2～1042-n of OR circuit are exported carries out inclusive-OR operation.That is to say that OR circuit 1040 is by carrying out inclusive-OR operation, (k=2～n) has distributed the data pulse DP of data Sk to generate paired pulses time slot k.That is to say, when data pulse generation unit 104 was " 0 " at data Sk, the generation amplitude level was 0 data pulse DP in pulse slot k, and when data Sk is " 1 ", generating amplitude level in pulse slot k is the data pulse DP of α, and outputs to adder 105.

Adder 105 is exported symbol pulses SP and data pulse DP addition as pulse-modulated signal.

Then, use the relation of Fig. 4 employed in the present embodiment burst transmissions form of explanation and amplitude level.As shown in Figure 4, employed in the present embodiment burst transmissions form is cut apart n pulse slot of gained and is constituted by code-element period Ts being carried out n, the beginning pulse slot is distributed symbol timing ST and data S1, to the rear portion pulse slot distribute data S2～Sn beyond the beginning pulse slot.

And in beginning pulse slot interval, when data S1 was " 0 ", the amplitude level that makes pulse-modulated signal was β, and when data S1 was " 1 ", the amplitude level that makes pulse-modulated signal was γ.And then in pulse slot interval, rear portion, when data S2～Sn was " 0 ", the amplitude level that makes pulse-modulated signal was 0, and when data S2～Sn was " 1 ", the amplitude level that makes pulse-modulated signal was α.At this moment, suppose the relation of the relation maintenance α＜β＜γ of amplitude level.

That is to say, irrelevant with the value that is assigned to the data S2～Sn in the pulse slot interval, rear portion with the data S1 that is assigned in the beginning pulse slot interval, the amplitude level of the pulse-modulated signal in the beginning pulse slot interval is always set greatlyyer than the amplitude level of the pulse-modulated signal in the pulse slot interval, rear portion.

As mentioned above, (k=1～n) is to be that benchmark is assigned to each pulse slot k with symbol timing ST, so at receiving terminal, as long as detect symbol timing ST, just can obtain synchronously with pulse-modulated signal because data Sk.

Therefore, in the present embodiment, make the amplitude level of the pulse-modulated signal in the superimposed beginning pulse slot interval of symbol timing ST, bigger than the amplitude level of the pulse-modulated signal in the pulse slot interval, rear portion.Thus, at the easy detected symbol timing of receiving terminal ST, can carry out demodulation more accurately by the paired pulses modulation signal.

Below, the sequential chart of use Fig. 5 illustrates the action of the pulse transmitter 100 that as above constitutes.Fig. 5 is the example of the data message with 4 bits when being assigned to a code element, and it is the pulse slot of pulse slot period T p that data message is assigned to 1/4 of 1 code-element period Ts.In addition, in the following description, suppose to distribute the situation of the data message of n bit to describe to 1 code-element period Ts.

At first, by data distributor 101, data message is assigned as data S1～Sn, data S1 is output to the selector 1032 of symbol pulses generation unit 103, and data S2～Sn is output to the delayer 1041-2～1041-n of data pulse generation unit 104.

On the other hand, by the single-shot trigger circuit 1020 of symbol timing generation unit 102, be triggering with the rising edge of code element clock SC, be created on its symbol timing ST of time of the pulsewidth that is equivalent to expect pulse signal for " H ".The symbol timing ST that generates is output to symbol pulses generation unit 103 and data pulse generation unit 104.

Then, amplified so that its amplitude becomes β and γ by amplifier 1030 and 1031 couples of symbol timing ST of symbol pulses generation unit 103, symbol pulses SP0 after the amplification and SP1 are output to selector 1032.

Then, by selector 1032, a wherein side who selects β or γ based on data S1 is as the amplitude level that is assigned to the pulse-modulated signal in the beginning pulse slot interval.Particularly, when data S1 is " 0 ", selects β as amplitude level, and when data S1 is " 1 ", select γ as amplitude level.That is to say that based on data S1, the selection amplitude level is that symbol pulses SP0 or the amplitude level of β is the symbol pulses SP1 of γ, and outputs to adder 105.

Then, (k=2～n) makes symbol timing ST postpone to be equivalent to pulse slot width Tp * (k-1) respectively, and outputs to "AND" circuit 1042-k by the delayer 1041-k of data pulse generation unit 104.Then, (k=2～n), symbol timing ST after postponing and the AND operation of data Sk output to OR circuit 1040 with operation result by "AND" circuit 1042-k.Then, each operation result is carried out inclusive-OR operation, generate the pulse-modulated signal that the rear portion pulse slot has been distributed data S2～Sn by OR circuit 1040.The pulse-modulated signal that generates is output to adder 105 as data pulse DP.In addition, based on data Sk, the amplitude level of data pulse DP becomes 0 or α.

That is to say, particularly, by AND operation and inclusive-OR operation, be created on data Sk (k=2～n) is during for " 1 ", paired pulses time slot k distributed amplitude level be α pulse-modulated signal and data Sk during for " 0 " etc. paired pulses time slot k to have distributed amplitude level be the rear portion pulse slot data pulse DP of 0 pulse-modulated signal.

Then,,, promptly start pulse slot and the rear portion pulse slot synthesizes, thereby generate the pulse-modulated signal that has constituted a code element symbol pulses SP and data pulse DP by adder 105.

As above-mentioned, according to present embodiment, can only use symbol timing ST as reference clock, make the amplitude level of the symbol pulses SP that the superimposed beginning pulse slot of symbol timing ST is distributed be amplitude level greater than the data pulse DP that the rear portion pulse slot beyond the beginning pulse slot is distributed, and, change the amplitude level of symbol pulses SP according to the data S1 that is assigned to the beginning pulse slot.Therefore, at receiving terminal, can detect required symbol timing ST synchronously exactly, and can only obtain synchronously, and carry out demodulation with detected symbol timing ST and pulse-modulated signal.

Also have, only use symbol timing ST and do not need the multiplied clock signal of code-element period Ts as reference clock, so, also can pass through simpler structure production burst modulation signal even transmission rate becomes at a high speed.And then, symbol timing ST and data message S1 can be overlapped the beginning pulse slot, can prevent that therefore efficiency of transmission from descending.

In addition, in the above description, supposed that symbol timing generation unit 102 is made of single-shot trigger circuit 1020, but also can use delayer and "AND" circuit to generate symbol timing ST.Particularly, make code element clock SC postpone to be equivalent to expect the pulsewidth Wp of pulse signal by delayer, the code element clock SC before postponing and postpone after the AND operation of code element clock SC, thereby generate symbol timing ST.Thus, can carry out high-precision adjustment, situation about also can corresponding transmission rate become at a high speed, pulse slot period T p shortening to the pulsewidth of symbol timing ST.

(execution mode 2)

The major part structure of the pulse transmitter 100 of present embodiment 2 is identical with pulse transmitter 100 shown in Figure 3, and different aspects are, are generated the symbol timing ST of the pulsewidth identical with the pulse slot cycle by single-shot trigger circuit 1020.That is to say, in the present embodiment, send the pulse-modulated signal of the pulsewidth identical with the pulse slot cycle.

Single-shot trigger circuit 1020 change time constants were adjusted the time that generates " H " pulse, were created on its symbol timing ST for " H " of the time identical with the pulse slot cycle.

Below, the sequential chart of use Fig. 6 illustrates the action of the pulse transmitter 100 that as above constitutes.Fig. 6 is, the example the when data message of 4 bits is assigned to a code element, and it is the pulse slot of pulse slot period T p that data message is assigned to 1/4 of 1 code-element period Ts.In addition, in the following description, suppose to distribute the situation of the data message of n bit to describe to 1 code-element period Ts.

At first, by data distributor 101, data message is assigned as data S1～Sn, data S1 is output to the selector 1032 of symbol pulses generation unit 103, and data S2～Sn is output to the delayer 1041-2～1041-n of data pulse generation unit 104.

On the other hand, single-shot trigger circuit 1020 by symbol timing generation unit 102, rising edge with code element clock SC is triggering, be created on the symbol timing ST of the time identical with the pulse slot width for " H ", the symbol timing ST of generation is output to symbol pulses generation unit 103 and data pulse generation unit 104.

Afterwards, with above-mentioned execution mode 1 similarly, amplify so that the amplitude of symbol timing ST becomes β and γ by the amplifier 1030 and 1031 of symbol pulses generation unit 103.In addition, by selector 1032, a wherein side who selects β or γ based on data S1 is as the amplitude level that is assigned to the pulse-modulated signal in the beginning pulse slot interval.

Then, (k=2～n) makes symbol timing ST postpone to be equivalent to pulse slot width Tp * (k-1) respectively, and outputs to "AND" circuit 1042-k by the delayer 1041-k of data pulse generation unit 104.In addition, (symbol timing ST after k=2～n) postpones and the AND operation of data Sk output to OR circuit 1040 with operation result to "AND" circuit 1042-k.Then, each operation result is carried out inclusive-OR operation, and output to adder 105 by OR circuit 1040.Then,, will start pulse slot and the rear portion pulse slot synthesizes, thereby generate the pulse-modulated signal that has constituted a code element by adder 105.

As shown in Figure 6, the pulse-modulated signal of Sheng Chenging is like this, is the pulse-modulated signal of pulsewidth with the time width identical with pulse slot period T p, i.e. ASK (amplitude shift keying) modulation signal.

As above-mentioned, according to present embodiment,, circuit scale is increased by the time constant of Request for Change circuits for triggering 1020, by simpler structure, also corresponding A SK modulation system.

In addition, in the above description, supposed that symbol timing generation unit 102 is made of single-shot trigger circuit 1020, but also can use delayer and "AND" circuit to generate symbol timing ST.Particularly, make code element clock SC postpone to be equivalent to pulse slot period T p by delayer, the AND operation of the code element clock SC ' after code element clock SC before postponing and the delay, thus generate symbol timing ST.Thus, can carry out high-precision adjustment, situation about can also corresponding transmission rate become at a high speed, pulse slot period T p shortening to the pulsewidth of symbol timing ST.

(execution mode 3)

Fig. 7 illustrates the major part structure of the pulse transmitter 200 of embodiment of the present invention 3.Among this figure, the part identical with Fig. 3 added identical label, and omits its explanation.Fig. 7 adopts the structure of having added oscillator 201 and frequency mixer 202 for Fig. 3.

Oscillator 201 generates carrier signal, and carrier signal is outputed to frequency mixer 202.

Pulse-modulated signal and carrier signal that frequency mixer 202 is exported adder 105 multiply each other, and generate the pulse-modulated signal (hereinafter referred to as " carrier (boc) modulated signals ") of radio band.

Below, the sequential chart of use Fig. 8 illustrates the action of the pulse transmitter 200 that as above constitutes.Fig. 8 is the example of the data message with 4 bits when being assigned to a code element, and it is the pulse slot of pulse slot period T p that data message is assigned to 1/4 of 1 code-element period Ts.In addition, in the following description, suppose to distribute the situation of the data message of n bit to describe to 1 code-element period Ts.

As mentioned above, by data distributor 101～adder 105, the pulse-modulated signal of amplitude has been selected in generation based on symbol timing ST and data S1～Sn.

Then,, adder 105 pulse-modulated signal of being exported and the carrier signal of exporting from oscillator 201 are multiplied each other, generate the pulse-modulated signal (carrier (boc) modulated signals) of radio band by frequency mixer 202.As shown in Figure 8, the amplitude level of carrier (boc) modulated signals becomes one of them value of α, β and γ based on the amplitude level of pulse-modulated signal.

As above-mentioned, according to present embodiment,, do not use complicated circuit and, can generate carrier (boc) modulated signals, the pulse communication in therefore can corresponding radio band based on carrier signal by simpler structure by possessing oscillator 201 and frequency mixer 202.

In addition, Fig. 8 represents the example of the situation that the amplitude level of carrier (boc) modulated signals is identical with the amplitude level of pulse-modulated signal, but the situation that the amplitude level that is not limited to carrier (boc) modulated signals is identical with the amplitude level of pulse-modulated signal, as long as keep the relation of α＜β＜γ, can increase and decrease the amplitude level of carrier (boc) modulated signals.

In addition, can also make the pulsewidth of carrier (boc) modulated signals identical, thereby generate carrier (boc) modulated signals based on the ASK modulation signal with pulse slot period T p.

(execution mode 4)

Fig. 9 illustrates the major part structure of the reception of impulse device of embodiment of the present invention 4.Reception of impulse device 300 shown in Figure 9 is, is used for the pulse-modulated signal that the pulse transmitter 100 to execution mode 1 sent and receives and the demodulated received device.

Reception of impulse device 300 comprises data pulse detecting unit 301, symbol timing detecting unit 302, identification pulse generation unit 303 and data generating unit 304.

Data pulse detecting unit 301 by comparator 3010 and 3011 and single- shot trigger circuit 3012 and 3013 constitute.

Comparator 3010 is the amplitude level and the threshold value A of pulse-modulated signal relatively, is transformed to the bi-level digital signal.Equally, comparator 3011 is the amplitude level and the threshold value B of pulse-modulated signal relatively, is transformed to the bi-level digital signal.The threshold value of each comparator is set to and can be identified in amplitude level α, β that transmitting terminal set and the value of γ.

Particularly, in order to discern β and γ, threshold value A is set to and satisfies β＜A＜γ, and in order to discern 0 and α, threshold value B is set to and satisfies o＜B＜ α.Comparator 3010 and 3011 digital signals with the threshold determination result output to single- shot trigger circuit 3012 and 3013 respectively.In addition, the 0th, be assigned to the data Sk (amplitude level during for " 0 " of k=2～n) of rear portion pulse slot, α is the data Sk that the is assigned to the rear portion pulse slot (amplitude level during k=2～n) for " 1 ", β is the amplitude level of data S1 when " 0 " that is assigned to the beginning pulse slot, and γ is the amplitude level of data S1 during for " 1 " that is assigned to the beginning pulse slot.

Single- shot trigger circuit 3012 and 3013 rising edges with digital signal are triggering, and being created on the time that is equivalent to pulse slot period T p is the data pulse DPA and the DPB of " H " pulse, and data pulse DPA and DPB are outputed to data generating unit 304.

Like this, comparator 3010 and single-shot trigger circuit 3012 extracts the data S1 that is assigned to the beginning pulse slot, and comparator 3011 and single-shot trigger circuit 3013 extract the data Sk that is assigned to the rear portion pulse slot (k=2～n).

Symbol timing detecting unit 302 is made of comparator 3020.Comparator 3020 is the amplitude level and the threshold value C of pulse-modulated signal relatively, is transformed to the bi-level digital signal.At this moment, be set at the relation that satisfies α＜C＜β by value with threshold value C, being judged to be in the time of can being lower than threshold value C at the amplitude level of pulse-modulated signal is the rear portion pulse slot, and being judged to be during greater than threshold value C at the amplitude level of pulse-modulated signal is the beginning pulse slot.

As mentioned above,, only send starting distribution symbol timing ST on the pulse slot from pulse transmitter 100, so passing threshold is judged the position that starts pulse slot as can be known, can detected symbol timing ST.Symbol timing detecting unit 302 outputs to identification pulse generation unit 303 with detected symbol timing ST, outputs to data generating unit 304 simultaneously.

Identification pulse generation unit 303 is made of single-shot trigger circuit 3031～303n, and single-shot trigger circuit 3031～303n is triggering with the rising edge of symbol timing ST, generates n identification pulse DP1～DPn that its pulsewidth differs from one another.Figure 10 represents the sequential chart of identification pulse DP1～DPn.As shown in figure 10, identification pulse generation unit 303 generates near the identification pulse DP1～DPn in center that its trailing edge is positioned at each pulse slot, and identification pulse DP1～DPn is outputed to data generating unit 304.

Data generating unit 304 is made of trigger (F/F:Flip Flop) 304A1～304An and 304B1～304Bn.

Trigger 304A1 is at the trailing edge of identification pulse DP1, and the data pulse DPA that single-shot trigger circuit 3012 is exported samples, and the recognition data DD1 after the sampling is outputed to trigger 304B1.

Trigger 304A2～304An is at the trailing edge of identification pulse DP2～DPn, and the data pulse DPB that single-shot trigger circuit 3013 is exported samples, and the recognition data DD2～DDn after the sampling is outputed to trigger 304B2～304Bn.

Trigger 304B1～304Bn gets Phase synchronization at the rising edge of symbol timing ST to recognition data DD1～DDn, and demodulates the data R1～Rn that is made of the bit that is assigned to a code element.

Below, reuse the sequential chart of Figure 10, the action of the reception of impulse device 300 that as above constitutes is described.Figure 10 is when 1 code-element period Ts is split into four pulse slots, is assigned to the example of sequential chart of the pulse-modulated signal of each pulse slot.In addition, in the following description, suppose that 1 code-element period Ts is split into n pulse slot and the situation of each pulse slot distribute data information is described.

Never the pulse-modulated signal that illustrated pulse transmitter 100 sends is output to data pulse detecting unit 301 and symbol timing detecting unit 302.Then, by the comparator 3010 of data pulse detecting unit 301, the amplitude level that carries out pulse-modulated signal is transformed to the bi-level digital signal whether greater than the threshold determination of threshold value A.Bi-level digital signal after the conversion is output to single-shot trigger circuit 3012, rising edge with detected pulse is triggering, generation is equivalent to " H " pulse of the time of pulse slot period T p, and the data pulse DPA that is generated is output to the trigger 304A1 of data generating unit 304.

As mentioned above, threshold value A is set to and satisfies β＜A＜γ, so the data pulse DPA that comparator 3010 is generated represents to be assigned to the data S1 of beginning pulse slot.

Equally, by the comparator 3011 of data pulse detecting unit 301, the paired pulses modulation signal carries out the amplitude level of pulse-modulated signal whether greater than the threshold determination of threshold value B, is transformed to the bi-level digital signal.Bi-level digital signal after the conversion is output to single-shot trigger circuit 3013, rising edge with detected pulse is triggering, generation is equivalent to " H " pulse of the time of pulse slot period T p, and the data pulse DPB that is generated is output to the trigger 304A2～304An of data generating unit 304.

Threshold value B is set to and satisfies 0＜B＜α, so the beginning pulse slot of data pulse DPB is always " H " pulse, the rear portion pulse slot represents to be assigned to the value of the data S2～Sn of each pulse slot.

And then by the comparator 3020 of symbol timing detecting unit 302, the paired pulses modulation signal carries out the amplitude level of pulse-modulated signal whether greater than the threshold determination of threshold value C, is transformed to the bi-level digital signal.Therefore as mentioned above, threshold value C is set to and satisfies α＜C＜β, means that passing threshold is judged and the zone that is judged to be greater than threshold value C is to have distributed the beginning time slot of symbol timing.

Like this, by symbol timing detecting unit 302 detected symbol timing ST, detected symbol timing ST is output to the single-shot trigger circuit 3031～303n of identification pulse generation unit 303, is output to the trigger 304B1～304Bn of data generating unit 304 simultaneously.

Single-shot trigger circuit 3031～303n by identification pulse generation unit 303, rising edge with symbol timing ST is triggering, generate n identification pulse DP1～DPn that its pulsewidth differs from one another, the identification pulse DP1～DPn that is generated is output to trigger 304A1～304An.As shown in figure 10, identification pulse DP1～DPn has trailing edge near the center of each pulse slot.

Then,, data pulsed D PA is sampled,, the recognition data DD1 after sampling is got Phase synchronization, be demodulated into data R1 at the rising edge of symbol timing ST by trigger 304B1 at the trailing edge of identification pulse DP1 by the trigger 304A1 of data generating unit 304.

Equally, trigger 304A2～304An by data generating unit 304, trailing edge at identification pulse DP2～DPn, respectively data pulsed D PB is sampled, by trigger 304B2～304Bn, at the rising edge of symbol timing ST, the recognition data DD2～DDn after the sampling is got Phase synchronization, be demodulated into data R2～Rn.

As above-mentioned, according to present embodiment, can use three threshold values (A, B, C:B＜C＜A) pulse-modulated signal that receives is carried out threshold determination, result based on threshold determination extracts symbol timing ST, data pulse DPA and DPB, and uses the symbol timing ST obtained that data pulsed D PA and DPB are sampled and with data R1～Rn demodulation.

Therefore, in the present embodiment, do not need with pulse slot period T s equal or than pulse slot period T s clock signal more at a high speed, circuit scale does not increase, and can realize simplification, miniaturization and the low consumpting power of reception of impulse device.

In addition, carry out threshold determination, can separate the symbol timing and the data message that are configured in the beginning pulse slot, prevent that efficiency of transmission from descending by using different threshold values.

In addition, in the above description, identification pulse generation unit 303 uses single-shot trigger circuit 3031～303n to generate identification pulse DP1～DPn, but also can use delayer and anticoincidence circuit to generate identification pulse DP1～DPn.Particularly, the timing signal of two divided-frequency is carried out in generation to symbol timing ST by trigger etc., carry out this timing signal and make this timing signal postpone the nonequivalence operation between the inhibit signal of retardation arbitrarily, thereby generate identification pulse DP1～DPn by delayer.When adopting such structure, can generate identification pulse DP1～DPn accurately, so, also can construct reception of impulse device corresponding to high transfer rate even become at a high speed and pulse slot period T s shortens in transmission rate.

In addition, when receiving from ASK modulation signal that the pulse transmitter 100 of execution mode 2 sends, the single- shot trigger circuit 3012 and 3013 that does not need data pulse detecting unit 301 so circuit scale does not increase, can carry out demodulation to the ASK modulation signal by simpler structure.

(execution mode 5)

Figure 11 illustrates the major part structure of the reception of impulse device of embodiment of the present invention 5.Reception of impulse device 400 shown in Figure 11 is to be used to receive the carrier (boc) modulated signals that sends from the pulse transmitter 200 of execution mode 3 and with its demodulated received device.In addition, among this figure, the part identical with Fig. 9 added identical label, and omits its explanation.Figure 11 adopts the structure of having added wave detector 401 for Fig. 9.

Wave detector 401 possesses linear envelope detector 4010 and amplifier 4011.Linear envelope detector 4010 carries out the envelope of carrier (boc) modulated signals, has promptly connected the detection of curve of the peak dot of modulation signal smoothly, and the envelope after the detection is outputed to amplifier 4011.Figure 12 represents the waveform of the signal after the detection.Linear envelope detector 4010 general using diodes wait the negative part that cuts down carrier (boc) modulated signals, by the low pass filter that is made of resistance and capacitor etc., carry out the asynchronous detection of envelope.In addition, linear envelope detector 4010 also can carry out the detection of envelope by synchronous detection.

Envelope after 4011 pairs of detections of amplifier amplifies, and the rectified signal after amplifying is outputed to data pulse detecting unit 301 and symbol timing detecting unit 302.

Afterwards, same with execution mode 4, generate data pulse DPA and DPB by data pulse detecting unit 301, by symbol timing detecting unit 302 detected symbol timing ST, demodulate data R1～Rn by identification pulse generation unit 303 and data generating unit 304.

As above-mentioned, according to present embodiment,, need not prepare other complicated circuit by possessing wave detector 401, can carry out demodulation to the carrier (boc) modulated signals of modulating with radio band by simpler structure, corresponding to wireless pulse communication.

In addition, in the above description, illustrated that receiving with the time width that is shorter than pulse slot period T p is the situation of the carrier (boc) modulated signals of its pulsewidth Wp, but, the signal that is generated at the pulse transmitter 100 that receives as enforcement mode 2, with the time width identical with pulse slot period T p is its pulsewidth Wp's, when passing through the carrier (boc) modulated signals of ASK modulation, the single- shot trigger circuit 3012 and 3013 of data pulse detecting unit 301 as long as dismantle, circuit scale is increased, can construct reception of impulse device yet by simpler structure corresponding to the ASK modulation system.

In addition, after having passed through linear envelope detector 4010, amplitude level α, β and the γ of carrier (boc) modulated signals become half, therefore once more amplitude level is enlarged into α, β and γ by amplifier 4011, but, also can not use amplifier 4011 according to the precision of the comparator of the transmission amplitude level of transmitting terminal and data pulse detecting unit 301 and symbol timing detecting unit 302.

(execution mode 6)

Figure 13 illustrates the major part structure of the pulse transmitter of embodiment of the present invention 6.In description of the present embodiment,, and omit its explanation to the additional same numeral of the structure division identical with Fig. 3.Present embodiment is to be applicable to the example of the dispensing device that sends qpsk modulation signal.

Pulse transmitter 500 shown in Figure 13 comprises data distributor 101, symbol timing generation unit 102, symbol pulses generation unit 501-i and 502-q, data pulse generation unit 502-i and 502-q, adder 503-i and 503-q and quadrature modulation unit 504.

Data distributor 101 will be assigned to the data message of n bit of a code element separately of I axle and Q axle respectively, be assigned to n data S1i～Sni and n data S1q～Snq, data S1i is outputed to symbol pulses generation unit 501-i, data S1q is outputed to symbol pulses generation unit 501-q, data S2i～Sni is outputed to data pulse generation unit 502-i, data S2q～Snq is outputed to data pulse generation unit 502-q.In addition, data distributor 101 outputs to symbol timing generation unit 102 with code element clock SC.

Symbol pulses generation unit 501-i possesses level converter 5011-i and amplifier 5012-i, and level converter 5011-i is transformed to positive and negative signal based on the value of data S1i with symbol timing ST.Amplifier 5012-i amplifies so that the amplitude level of symbol pulses SPi becomes β.In addition, suppose that β is the value greater than the amplitude level α of symbol timing ST.

Equally, symbol pulses generation unit 501-q possesses level converter 5011-q and amplifier 5012-q, and level converter 5011-q is transformed to positive and negative signal based on the value of data S1q with symbol timing ST.Amplifier 5012-q amplifies so that the amplitude level of symbol pulses SPq becomes β.

Like this, symbol pulses generation unit 501-i and 501-q are only when symbol timing ST is " 1 ", based on data S1i that is assigned to the beginning pulse slot and the value of S1q, it is transformed to positive and negative signal and generates symbol pulses SPi and the SPq that amplitude level is β, when symbol timing ST is " 0 ", irrespectively generating amplitude level with the value of data S1i and S1q is 0 symbol pulses SPi and SPq, and outputs to adder 503-i and 503-q.

Data pulse generation unit 502-i possesses delayer 5021-ki (k=2～n), level converter 5022-ki (k=2～n) and adder 5023-i.Delayer 5021-ki makes symbol timing ST postpone to be equivalent to pulse slot width Tp * (k-1) respectively.In addition, level converter 5022-ki is transformed to positive and negative signal based on the value of data Ski with the symbol timing ST after postponing.Adder 5023-i will generate data pulse DPi from each positive and negative signal plus of level converter 5022-ki output.

Similarly, data pulse generation unit 502-q possesses delayer 5021-kq (k=2～n), level converter 5022-kq (k=2～n) and adder 5023-q.Delayer 5021-kq makes symbol timing ST postpone to be equivalent to pulse slot width Tp * (k-1) respectively.In addition, level converter 5022-kq is transformed to positive and negative signal based on the value of data Skq with the symbol timing ST after postponing.Each positive and negative signal plus that adder 5023-q is exported level converter 5022-kq generates data pulse DPq.

Like this, data pulse generation unit 502-i and 502-q paired pulses time slot 2～n distribute data Ski and Skq (k=2～n), when only the symbol timing ST after delay is " 1 ", (value of k=2～n) is transformed to positive and negative signal with it, and generating amplitude level is data pulse DPi and the DPq of α based on data Ski and Skq.In addition, when data pulse generation unit 502-i and the 502-q symbol timing ST after delay was " 0 ", irrespectively generating amplitude level with the value of data Ski and Skq was 0 data pulse DPi and DPq, and outputs to adder 503-i and 503-q.

Adder 503-i outputs to quadrature modulation unit 504 with symbol pulses SPi and data pulse DPi addition as the I pulse-modulated signal.Equally, adder 503-q outputs to quadrature modulation unit 504 with symbol pulses SPq and data pulse DPq addition as the Q pulse-modulated signal.

Quadrature modulation unit 504 possesses oscillator 5040, phase shifter 5041, frequency mixer 5042-i and 5042-q and adder 5043.Oscillator 5040 generates carrier signal, and outputs to frequency mixer 5042-i and phase shifter 5041.The carrier signal of the reference phase that phase shifter 5041 is generated oscillator 5040 is transformed to the carrier signal that has been offset 90 degree (pi/2) with respect to the carrier signal of this reference phase, and it is outputed to frequency mixer 5042-q.Frequency mixer 5042-i will multiply each other from the I pulse-modulated signal of adder 503-i output and the carrier signal of reference phase.Equally, frequency mixer 5042-q Q pulse-modulated signal that adder 503-q is exported multiplies each other with the carrier signals that carrier signal with respect to reference phase has been offset 90 degree.

I pulse-modulated signal and the addition of Q pulse-modulated signal after adder 5043 will multiply each other with carrier signal respectively, the pulse-modulated signal (hereinafter referred to as " orthogonal demodulation signal ") of generation radio band.

Below, the sequential chart of use Figure 14 illustrates the action of the pulse transmitter 500 that as above constitutes.Figure 14 represents that to I axle and Q axle, each code element is distributed the situation of the data message of 4 bits respectively.Here, data message is assigned to 1/4 of 1 code-element period Ts and is the pulse slot of its pulse slot period T p.In addition, in the following description, suppose to distribute the situation of the data message of n bit to describe to 1 code-element period Ts.

At first, by data distributor 101 data message is distributed to data S1i～Sni and data S1q～Snq.Here, data S1i is output to the level converter 5011-i of symbol pulses generation unit 501-i.In addition, data S2i～Sni is output to level converter 5022-2i～5022-ni of data pulse generation unit 502-i.Similarly, data S1q is output to the level converter 5011-q of symbol pulses generation unit 501-q.In addition, data S2q～Snq is output to level converter 5022-2q～5022-nq of data pulse generation unit 502-q.

On the other hand, as mentioned above, symbol timing ST is triggering with the rising edge of code element clock SC, to be generated, be output to symbol pulses generation unit 501-i and 501-q and data pulse generation unit 502-i and 502-q in its mode of the time of the pulsewidth that is equivalent to expect pulse signal for " H ".

Then, in the level converter 5011-i and amplifier 5012-i of symbol pulses generation unit 501-i,, symbol timing ST is transformed to positive and negative signal based on the value of data S1i.Afterwards, the amplitude level of symbol timing ST is enlarged into β, is output to adder 503-i as symbol pulses SPi.Like this, based on symbol timing ST and data S1i, the amplitude level of symbol pulses SPi becomes 0 or β.

In addition, (k=2～n) makes symbol timing ST postpone to be equivalent to pulse slot width Tp * (k-1) respectively, and outputs to level converter 5022-ki (k=2～n) by the delayer 5021-ki of data pulse generation unit 502-i.Then, (among the k=2～n), (value of k=2～n) is transformed to positive and negative signal with the symbol timing ST after postponing based on data Ski at level converter 5022-ki.Like this, based on symbol timing ST and data Ski, the amplitude level of data pulse DPi becomes 0 or α.

Thus, the amplitude level of the symbol pulses SPi in the beginning pulse slot interval is set greater than the amplitude level of the data pulse DPi in the pulse slot interval, rear portion.

Then, by adder 5023-i, with symbol timing ST and data Ski (k=2～n) addition, thus generate the data pulse DPi that the rear portion pulse slot has been distributed data S2i～Sni.

Then,,, promptly start pulse slot and the rear portion pulse slot synthesizes, thereby generate the I pulse-modulated signal that constitutes a code element symbol pulses SPi and data pulse DPi by adder 503-i.

With symbol pulses generation unit 501-i and data pulse generation unit 501-i similarly, in symbol pulses generation unit 501-q and data pulse generation unit 502-q, generate symbol pulses SPq and data pulse DPq.And then, in adder 503-q,, promptly start pulse slot and the rear portion pulse slot synthesizes, thereby generate the Q pulse-modulated signal that constitutes a code element symbol pulses SPq and data pulse DPq.

Then, in frequency mixer 5042-i, the carrier signal of the reference phase that I pulse-modulated signal and oscillator 5040 are exported multiplies each other, and is same, in frequency mixer 5042-q, carrier signals 5041 that exported with Q pulse-modulated signal and phase shifter, that be offset 90 degree with respect to reference phase multiply each other.Then, in adder 5043,, generate the orthogonal demodulation signal of radio band with I pulse-modulated signal and the addition of Q pulse-modulated signal after multiplying each other with carrier signal respectively.

As mentioned above, (k=1～n) is a benchmark with symbol timing ST, is assigned to each pulse slot k for data Ski and Skq.Therefore at receiving terminal,, just can obtain synchronously with orthogonal demodulation signal as long as detect symbol timing ST.That is to say, amplitude level by making the orthogonal demodulation signal in the superimposed beginning pulse slot interval of symbol timing ST is greater than the amplitude level of the orthogonal demodulation signal in the pulse slot interval, rear portion, at the easy detected symbol timing of receiving terminal ST, can carry out demodulation more accurately to orthogonal demodulation signal.

As above-mentioned, in the present embodiment, be provided with the symbol pulses generation unit 501-i and 501-q, data pulse generation unit 502-i and 502-q and adder 503-i and the 503-q that are respectively applied for I axle and Q axle.

In the present embodiment, symbol pulses generation unit 501-i and 501-q use the two-value that amplitude level is big and polarity is reversed each other than data pulse DPi and DPq, based on each data S1i and the S1q that is assigned to the beginning pulse slot, select I component and Q component, thereby generate symbol pulses SPi and SPq.In addition, data pulse generation unit 502-i and 502-q are based on each data Ski and the Skq (k=2～n) that is assigned to the rear portion pulse slot, the two-value of using polarity to reverse is each other selected I component and Q component, thereby generates data pulse DPi and the DPq that is used for the I axle and is used for the Q axle.In addition, adder 503i and 503q with these symbol pulses SPi and SPq and data pulse DPi and DPq addition, generate the I/Q pulse-modulated signal by each axle.In addition, 504 generations of quadrature modulation unit are based on the orthogonal demodulation signal of carrier signal.

As above-mentioned, according to present embodiment, the pulse communication of the four phase phase modulation methods (claiming the QPSK modulation system again) in can corresponding radio band.

In addition, example when the amplitude level that Figure 14 represents orthogonal demodulation signal is identical with the amplitude level of I/Q pulse-modulated signal, but the situation that the amplitude level that is not limited to orthogonal demodulation signal is identical with the amplitude level of I/Q pulse-modulated signal, as long as keep the relation of α＜β, promptly, the amplitude level of the orthogonal demodulation signal in the beginning pulse slot interval gets final product greater than the relation of the amplitude level of the orthogonal demodulation signal in the pulse slot interval, rear portion, also can increase and decrease the amplitude level of orthogonal demodulation signal.

In addition, also can generate orthogonal demodulation signal in the following manner, that is to say, make the pulsewidth of orthogonal demodulation signal identical, so that it is identical with the ASK modulation signal with pulse slot period T p.

In addition, the amplitude level situation identical with the amplitude level of symbol timing ST of data pulse DPi and DPq has been described, but as long as the amplitude level of symbol pulses SPi and SPq greater than the amplitude level of data pulse DPi and DPq, be not yet be necessary for identical.

In addition, show that (value of k=1～n) is during for " 1 " at data Ski and Skq, ((k=2～n) is transformed to symbol timing ST the just polarity of (+) for k=2～n) and 5022-kq for level converter 5011-i, 5011-q, 5022-ki, when " 0 ", be transformed to the situation of the polarity of negative (-), but as long as keep the rule relation of conversion between sending and receiving, the logic of conversion also can be with above-mentioned opposite.

(execution mode 7)

Figure 15 illustrates the major part structure of the reception of impulse device of embodiment of the present invention 7.Reception of impulse device 600 shown in Figure 15 is, is used for the orthogonal demodulation signal that the pulse transmitter 500 to execution mode 6 sent and receives and the demodulated received device.

Reception of impulse device 600 comprises orthogonal detection unit 601, data pulse detecting unit 602-i and 602-q, symbol timing detecting unit 603-i and 603-q, identification pulse generation unit 303-i and 303-q and data generating unit 304-i and 304-q.

Orthogonal detection unit 601 is made of voltage-controlled oscillator 6011, carrier extract reproduction units 6012, phase shifter 6013, frequency mixer 6014-i and 6014-q, low pass filter 6015-i and 6015-q.Voltage-controlled oscillator 6011 produces the carrier signal of oscillator 5040 same frequencys that are suitable for when carrying out quadrature modulation in pulse transmitter 500.Carrier extract reproduction units 6012 extracts the absolute phase of carrier signal from the orthogonal demodulation signal that is sent, and based on the absolute phase that extracts the voltage of voltage-controlled oscillator 6011 is controlled, and reproduces the stabilized carrier signal.Phase shifter 6013 is transformed to the carrier signal of reproducing the carrier signal that has been offset 90 degree (pi/2) with respect to reference phase.

Frequency mixer 6014-i and 6014-q are with the carrier signal of the reference phase of orthogonal demodulation signal and the reproduction of input and be offset 90 carrier signals of spending with respect to reference phase and multiply each other respectively, thereby take out the phase information of base band respectively.Low pass filter 6015-i and 6015-q remove the frequency component of the twice of unwanted carrier wave from the phase information of having taken out, thereby generate I rectified signal and Q rectified signal.Low pass filter 6015-i outputs to data pulse detecting unit 602-i and symbol timing detecting unit 603-i with the I rectified signal.In addition, low pass filter 6015-q outputs to data pulse detecting unit 602-q and symbol timing detecting unit 603-q with the Q rectified signal.

Data pulse detecting unit 602-i is made of level converter 6021-i and single-shot trigger circuit 6022-i.Level converter 6021-i carries out binaryzation to the positive negative level of I rectified signal, is transformed to " 1/0 " of digital signal.As the description in execution mode 6, at transmitting terminal, make data S1i that is assigned to the beginning pulse slot and the data Ski that is assigned to the rear portion pulse slot (k=2～n), corresponding with the polarity of I pulse-modulated signal.Thus, the data Ski of level converter 6021-i by carrying out the threshold determination of I rectified signal and threshold value zero, extract being assigned to beginning pulse slot and rear portion pulse slot (k=1～n).Single-shot trigger circuit 6022-i is triggering with the rising edge of digital signal, and being created on the time that is equivalent to pulse slot period T p is the data pulse DPBi of " H " pulse, outputs to data generating unit 304-i.

Equally, data pulse detecting unit 602-q is made of level converter 6021-q and single-shot trigger circuit 6022-q.Level converter 6021-q carries out binaryzation to the positive negative level of Q rectified signal, is transformed to " 1/0 " of digital signal.Level converter 6021-q and level converter 6021-i similarly, (the k=1～n) of the data Skq by carrying out the threshold determination of Q rectified signal and threshold value zero, extract being assigned to beginning pulse slot and rear portion pulse slot.Single-shot trigger circuit 6022-q is triggering with the rising edge of digital signal, be created on be equivalent to pulse slot period T p time its be the data pulse DPBq of " H " pulse, output to data generating unit 304-q.

Symbol timing detecting unit 603-i is made of absolute value converter unit 6031-i and comparator 6032-i, and symbol timing detecting unit 603-q is made of absolute value converter unit 6031-q and comparator 6032-q.Absolute value converter unit 6031-i and 6031-q are absolute value with the level translation of I rectified signal and Q rectified signal.Comparator 6032-i and 6032-q compare the I absolute value signal that is transformed to absolute value and the amplitude level and the threshold value C of Q absolute value signal, and are transformed to the bi-level digital signal.

Here, the threshold value C that makes comparator 6032-i and 6032-q is the value of the relation that satisfies α/2＜C＜β/2, so that can be identified in amplitude level α and β that transmitting terminal has been set.Thus, during greater than threshold value C, can be judged to be is the beginning pulse slot at the amplitude level of absolute value signal.As mentioned above, from pulse transmitter 500, only send starting distribution symbol timing ST on the pulse slot.Therefore passing threshold is judged the position that starts pulse slot as can be known, just can detect symbol timing STi and STq.Symbol timing detecting unit 603-i and 603-q output to identification pulse generation unit 303-i and 304-q with detected symbol timing STi and STq respectively, output to data generating unit 304-i and 304-q simultaneously.

Identification pulse generation unit 303-i and 303-q and data generating unit 304-i and 304-q adopt the structure identical with the identification pulse generation unit 303 that has illustrated and data generating unit 304, therefore omission explanation in execution mode 4.In addition, (k=1～n) offers the data generating unit 304-i of Figure 15, and (k=1～n) offers data generating unit 304-q with data pulse DPkq by identification pulse generation unit 303-q with data pulse DPki by identification pulse generation unit 303-i.

Below, the sequential chart of use Figure 16 illustrates the action of the reception of impulse device 600 that as above constitutes.Figure 16 is, the example of situation that in dispensing device 500, I axle and each code element of Q axle is distributed the data message of 4 bits respectively, be that 1 code-element period Ts is split into four pulse slots, the example of the sequential chart of the orthogonal demodulation signal that each pulse slot is distributed.In addition, in Figure 16, below the Q rectified signal, only show the signal of in the system of I axle, handling, but the situation of Q axle is also identical.In the following description, suppose that 1 code-element period Ts is split into n pulse slot and has distributed the situation of data message to describe to each pulse slot.

The orthogonal demodulation signal that not shown pulse transmitter 500 is sent, carry out orthogonal detection by orthogonal detection unit 601, I rectified signal behind the orthogonal detection and Q rectified signal are outputed to data pulse detecting unit 602-i and 602-q respectively, and symbol timing detecting unit 603-i and 603-q.Then, in the level converter 6021-i and 6021-q of data pulse detecting unit 602-i and 602-q, the positive negative level of I rectified signal or Q rectified signal is carried out binaryzation, be transformed to " 1/0 " of digital signal.Particularly, carry out being transformed to " 1 " during for just (+), being transformed to the binaryzation conversion of " 0 " during for negative (-) at level at level.

I transformed value signal after the conversion and Q transformed value signal are outputed to single-shot trigger circuit 6022-i and 6022-q respectively.In addition, in single-shot trigger circuit 6022-i and 6022-q, be triggering with the rising edge of detected pulse, it is " H " pulse to be created on the time that is equivalent to pulse slot period T p.In addition, (k=1～n) is imported into the trigger 304Aki of data generating unit 304-i and 304-q and 304Akq (k=1～n) for data pulse DPBi that is generated and DPBq.

And then, in the absolute value converter unit 6031-i and 6031-q of symbol timing detecting unit 603-i and 603-q, I rectified signal and Q rectified signal are transformed to absolute value, and the level that makes negative (-) is the level of (+) just, and the level that makes just (+) is the level of (+) just.Then, in comparator 6032-i and 6032-q, the amplitude level that becomes the I absolute value signal of absolute value and Q absolute value signal is transformed to the bi-level digital signal whether greater than the threshold determination of threshold value C.Therefore as mentioned above, threshold value C is set to and satisfies α/2＜C＜β/2, means that passing threshold is judged and the zone that is judged to be greater than threshold value C is to be assigned with the beginning time slot of symbol timing.

Like this, detect symbol timing STi and STq by symbol timing detecting unit 603-i and 603-q.And detected symbol timing STi and STq are output to identification pulse generation unit 303-i and 303-q, also are output to the trigger 304Bki of data generating unit 304-i and 304-q and 304Bkq (k=1～n).Then, identification pulse generation unit 303-i and 303-q use symbol timing STi and STq, generate identification pulse DPki and DPkq (k=1～n), and output to the trigger 304Aki of data generating unit 304-i and 304-q and 304Akq (k=1～n).

And then (k=1～n), (trailing edge of k=1～n) is sampled respectively to data pulsed D PBi and DPBq at identification pulse DPki and DPkq by the trigger 304Aki of data generating unit 304-i and 304-q and 304Akq.Then, (k=1～n), at the rising edge of symbol timing, (k=1～n) gets Phase synchronization, as data Rki and Rkq (k=1～n) by demodulation to the recognition data DDki after the sampling and DDkq by trigger 304Bki and 304Bkq.

As above-mentioned, according to present embodiment, can use threshold value C (α/2＜C＜β/2) that I rectified signal behind the orthogonal detection and Q rectified signal are carried out threshold determination, result based on threshold determination, extract symbol timing STi and STq, and then the threshold determination by between I rectified signal and Q rectified signal and the threshold value zero extracts the data pulse DPBi and the DPBq that are assigned to beginning pulse slot and rear portion pulse slot.Thus, can use the symbol timing STi of acquisition and STq that data pulsed D PBi and DPBq are sampled and demodulate data Rki and Rkq (k=1～n), thereby pulse communication that can corresponding four phase phase modulation methods (claiming the QPSK modulation system again) in radio band.

In addition, show among the level converter 6021-i and 6021-q shown in Figure 15, I rectified signal and Q rectified signal are transformed to " 1 " during for just (+), be transformed to the situation of the conversion example of " 0 " during for negative (-), but as long as keep the rule relation of conversion between sending and receiving, the rule of conversion also can be with above-mentioned opposite.

In addition, Figure 16 shows the situation that threshold value C satisfies α/2＜C＜β/2, but also can set only threshold value C based on the amplitude level behind the orthogonal detection.

The structure that form of pulse transmitter of the present invention adopts comprises: allocation units, and with the data message of n bit, a bit one is the pulse slot of time slot width than the 1/n that specially is assigned to code-element period; The data pulse generation unit is selected and the corresponding amplitude level of described data message that is assigned to the rear portion pulse slot except that the beginning pulse slot, generates the data pulse modulation signal in pulse slot interval, described rear portion; The symbol pulses generation unit, according to the described data message that is assigned to described beginning pulse slot, from greater than selecting one of them amplitude level the two-value amplitude level of the amplitude level of described data pulse modulation signal, in described beginning pulse slot interval, generate the code element pulse-modulated signal; And adder unit, with described symbol pulses modulation signal and the addition of described data pulse modulation signal, thus the production burst modulation signal.

According to this structure, based on the pulse slot position in data message that is assigned to each pulse slot and the code element, each pulse slot is changed the amplitude level of the pulse-modulated signal that generates in each pulse slot interval and sends, and not to pulsewidth distribute data information, so even transmission rate becomes the high-speed clock signal that does not also need to be used to control pulsewidth at a high speed, can pass through simpler structure and the production burst modulation signal.In addition, irrelevant with data message, therefore the amplitude level that starts the pulse-modulated signal in the pulse slot interval detects beginning pulse slot position easily always greater than the amplitude level of the pulse-modulated signal in the pulse slot interval, rear portion, can obtain the synchronous of pulse-modulated signal exactly.Also have, symbol timing and data message can be overlapped the beginning pulse slot, can prevent that therefore efficiency of transmission from descending.

The structure that a form of pulse transmitter of the present invention adopts is, described symbol pulses generation unit comprises: first amplifying unit and second amplifying unit, to representing the symbol timing pulse of described beginning pulse slot position, amplify with the magnification ratio that differs from one another; And selected cell, based on the described data message that is configured in described beginning pulse slot, select the wherein side in the output of described first amplifying unit and second amplifying unit.

According to this structure, can easily switch the amplitude level of the pulse-modulated signal in the beginning pulse slot interval by simple structure.

The structure that a form of pulse transmitter of the present invention adopts is, also comprise the symbol timing generation unit, in described beginning pulse slot interval, generating its pulsewidth is the following symbol timing pulse of described time slot width, described data pulse generation unit possesses: delayer, import described symbol timing pulse, form a plurality of delay symbol timing pulse that the each time slot time ground of retardation increases; "AND" circuit to each described rear portion pulse slot, carries out the pulse of described delay symbol timing and is assigned to AND operation between the described data message of described rear portion pulse slot; And OR circuit, the described AND operation result of each described rear portion pulse slot is carried out inclusive-OR operation, generate described data pulse modulation signal.

According to this structure, can use the inhibit signal of symbol timing pulse, the pulsewidth of the pulse-modulated signal in the pulse slot interval, rear portion and the position of the pulse-modulated signal in each pulse slot interval are controlled, even therefore transmission rate becomes at a high speed, also can pass through simpler structure and the production burst modulation signal.

The structure that a form of pulse transmitter of the present invention adopts is that described symbol timing generation unit possesses single-shot trigger circuit.

According to this structure, generate the code element commutator pulse by single-shot trigger circuit, therefore can pass through simpler structure and the production burst modulation signal, and single-shot trigger circuit can easily to generate with the time slot width of pulse slot be the symbol timing pulse of pulsewidth, so also can corresponding A SK modulation signal.

The structure that a form of pulse transmitter of the present invention adopts also comprises: the carrier (boc) modulated signals generation unit with described pulse-modulated signal and carrier multiplication, generates carrier (boc) modulated signals.

According to this structure, can generate the pulse-modulated signal of radio band by simpler structure, can corresponding radio communication.

The structure that a form of pulse transmitter of the present invention adopts is to comprise: be respectively applied for the I axle and be used for the described data pulse generation unit of Q axle, described symbol pulses generation unit and described adder unit; And the quadrature modulation unit that is used to generate orthogonal demodulation signal, described allocation units distribute the data message of n bit respectively to I axle and Q axle, described data pulse generation unit is according to each the described data message that is assigned to described rear portion pulse slot, from the reciprocal two-value of polarity, select I component and Q component, generation is used for the I axle and is used for the described data pulse modulation signal of Q axle, described symbol pulses generation unit is according to each the described data message that is assigned to described beginning pulse slot, from amplitude level and the reciprocal two-value of polarity greater than described data pulse modulation signal, select I component and Q component, generation is used for the I axle and is used for the described symbol pulses modulation signal of Q axle, the described symbol pulses modulation signal that described adder unit will be used for the I axle and be used for the Q axle be used for the I axle and be used for the described data pulse modulation signal of Q axle by each addition, generate I pulse-modulated signal and Q pulse-modulated signal, described quadrature modulation unit carries out quadrature modulation to I pulse-modulated signal and Q pulse-modulated signal, generates described orthogonal demodulation signal.

According to this structure, based on the pulse slot position in data message that is assigned to each pulse slot and the code element, each pulse slot is changed the amplitude level of the I pulse-modulated signal that generates in each pulse slot interval and Q pulse-modulated signal and sends, and not to pulsewidth distribute data information, even, can generate orthogonal demodulation signal by simpler structure so transmission rate becomes the high-speed clock signal that does not also need to be used to control pulsewidth at a high speed.In addition, irrelevant with data message, therefore the amplitude level that starts the pulse-modulated signal in the pulse slot interval detects beginning pulse slot position easily always greater than the amplitude level of the pulse-modulated signal in the pulse slot interval, rear portion, can obtain the synchronous of pulse-modulated signal exactly.Also have, symbol timing and data message can be overlapped the beginning pulse slot, can prevent that therefore efficiency of transmission from descending.

The structure that a form of pulse transmitter of the present invention adopts is, described symbol pulses generation unit possesses: level converter, according to the described data message that is assigned to described beginning pulse slot, switch the polarity of the symbol timing pulse of the described beginning pulse slot of expression position; And amplifying unit, the output of described level converter is amplified.

According to this structure, can easily switch the amplitude level of the I/Q pulse-modulated signal in the beginning pulse slot interval by simple structure.

The structure that a form of pulse transmitter of the present invention adopts is, also comprise the symbol timing generation unit, in described beginning pulse slot interval, generating its pulsewidth is the following symbol timing pulse of described time slot width, described data pulse generation unit possesses: delayer, import described symbol timing pulse, form a plurality of delay symbol timing pulse that the each time slot time ground of retardation increases; The level translation unit according to the described data message that is assigned to described rear portion pulse slot, to each described rear portion pulse slot, switches the polarity of described delay symbol timing pulse; And adder unit, with the level translation results added of each described rear portion pulse slot, generate described data pulse modulation signal.

According to this structure, can use the inhibit signal of symbol timing pulse, the pulsewidth of the I/Q pulse-modulated signal in the pulse slot interval, rear portion and the position of the pulse-modulated signal in each pulse slot interval are controlled, even therefore transmission rate becomes at a high speed, also can generate orthogonal demodulation signal by simpler structure.

The structure that a form of reception of impulse device of the present invention adopts comprises: receiving element, the symbol data that reception will be made of the data message of each code element n bit, a bit one is the pulse-modulated signal that the pulse slot of time slot width sends than specially being assigned to 1/n with code-element period; The symbol timing detecting unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 1, detects beginning pulse slot position; The beginning data extracting unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 2, is extracted the described data message that is assigned to described beginning pulse slot; And the rear portion data extraction unit, by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 3, extract the described data message that is assigned to described rear portion pulse slot.

According to this structure, passing threshold is judged, can extract the beginning pulse slot of expression code element timing position and the data message that is assigned to beginning pulse slot and rear portion pulse slot, therefore do not need high-speed clock signal, circuit scale is increased, and realize simplification, miniaturization and the low consumpting power of reception of impulse device.In addition, carry out threshold determination, can separate the symbol timing and the data message that overlap the beginning pulse slot, can prevent that efficiency of transmission from descending by using different threshold values.

The structure that form of reception of impulse device of the present invention adopts is, described threshold value 2 is the value greater than described threshold value 1, and described threshold value 3 is the value less than described threshold value 1.

According to this structure, based on be assigned to the beginning pulse slot data message, from two-value amplitude level greater than the amplitude level of the data pulse modulation signal in the pulse slot interval, rear portion, when selecting one of them amplitude level as the amplitude level of the pulse-modulated signal in the beginning pulse slot interval of superimposed symbol timing, can judge by passing threshold, extract the data message that is assigned to symbol timing, beginning pulse slot and rear portion pulse slot.

The structure that form of reception of impulse device of the present invention adopts also comprises: detection unit, carry out with carrier multiplication after the detection of envelope of described pulse-modulated signal.

According to this structure, can carry out demodulation to the pulse-modulated signal of radio band by simpler structure, can corresponding radio communication.

The structure that a form of reception of impulse device of the present invention adopts is, described pulse-modulated signal is, the orthogonal demodulation signal that symbol data one bit one that is made of the data message of each code element n bit is sent out after than the pulse slot that specially is assigned to I axle that 1/n with code-element period is a time slot width and Q axle respectively, the reception of impulse device also comprises: the orthogonal detection unit, with described orthogonal demodulation signal and reference phase and the carrier multiplication that have been offset 90 degree from reference phase, generation is used for the I axle and is used for the rectified signal of Q axle, described symbol timing unit is transformed to absolute value with described rectified signal, amplitude level by becoming absolute value and the threshold determination between the described threshold value 1, detect described beginning pulse slot position, described threshold value 2 and described threshold value 3 are zero, described beginning DISCHARGE PULSES EXTRACTION unit and DISCHARGE PULSES EXTRACTION unit, described rear portion are positive and negative according to described rectified signal, extract the data message that is assigned to described beginning pulse slot and described rear portion pulse slot.

According to this structure, carry out threshold determination respectively by each axle to I axle and Q axle, can extract the beginning pulse slot of expression code element timing position and the data message that is assigned to beginning pulse slot and rear portion pulse slot to each, therefore to quadrature modulation information, do not need high-speed clock signal yet, circuit scale is increased, realize simplification, miniaturization and the low consumpting power of reception of impulse device.In addition, carry out threshold determination, the symbol timing that overlaps the beginning pulse slot can be separated with data message, can prevent that efficiency of transmission from descending by using different threshold values.

The disclosure of specification, accompanying drawing and specification digest that the Japanese patent application of Japanese patent application 2006-117259 number of application on April 20th, 2006 and application on April 16th, 2007 is comprised for 2007-107032 number all is incorporated in the application.

Industrial applicibility

Pulse transmitter of the present invention, reception of impulse device, pulse transmission method and pulse demodulation method, Even when transfer rate becomes high speed, also can by fairly simple structure, generate and demodulated pulse Modulation signal, for example as the pulse transmitter that is used for radio communication and optic communication, reception of impulse device, Pulse transmission method and pulse demodulation method are extremely useful.

Claims (14)

1. pulse transmitter comprises:

Allocation units, with the data message of n bit, a bit one is the pulse slot of time slot width than the 1/n that specially is assigned to code-element period;

The data pulse generation unit is selected and the corresponding amplitude level of described data message that is assigned to the rear portion pulse slot except that the beginning pulse slot, generates the data pulse modulation signal in pulse slot interval, described rear portion;

The symbol pulses generation unit, according to the described data message that is assigned to described beginning pulse slot, from greater than selecting one of them amplitude level the two-value amplitude level of the amplitude level of described data pulse modulation signal, in described beginning pulse slot interval, generate the code element pulse-modulated signal; And

Adder unit, with described symbol pulses modulation signal and the addition of described data pulse modulation signal, thus the production burst modulation signal.

2. pulse transmitter as claimed in claim 1, wherein,

Described symbol pulses generation unit comprises:

First amplifying unit and second amplifying unit to representing the symbol timing pulse of described beginning pulse slot position, amplify with the magnification ratio that differs from one another; And

Selected cell according to the described data message that is assigned to described beginning pulse slot, is selected the wherein side in the output of described first amplifying unit and second amplifying unit.

3. pulse transmitter as claimed in claim 1, wherein,

Also comprise: the symbol timing generation unit, in described beginning pulse slot interval, generating its pulsewidth is the following symbol timing pulse of described time slot width,

Described data pulse generation unit possesses:

Delayer is imported described symbol timing pulse, forms a plurality of delay symbol timing pulse that the each time slot time ground of retardation increases;

"AND" circuit to each described rear portion pulse slot, carries out the pulse of described delay symbol timing and has distributed to AND operation between the described data message of described rear portion pulse slot; And

OR circuit carries out inclusive-OR operation to the described AND operation result of each described rear portion pulse slot, generates described data pulse modulation signal.

4. pulse transmitter as claimed in claim 3, wherein,

Described symbol timing generation unit possesses single-shot trigger circuit.

5. pulse transmitter as claimed in claim 1, wherein,

Also comprise: the carrier (boc) modulated signals generation unit with described pulse-modulated signal and carrier multiplication, generates carrier (boc) modulated signals.

6. pulse transmitter as claimed in claim 1, wherein,

Also comprise: be respectively applied for the I axle and be used for the described data pulse generation unit of Q axle, described symbol pulses generation unit and described adder unit; And

Generate the quadrature modulation unit of orthogonal demodulation signal,

Described allocation units distribute the data message of n bit respectively to I axle and Q axle,

Described data pulse generation unit is selected I component and Q component according to each the described data message that is assigned to described rear portion pulse slot from the reciprocal two-value of polarity, generate the described data pulse modulation signal that is used for the I axle and is used for the Q axle,

Described symbol pulses generation unit is according to each the described data message that is assigned to described beginning pulse slot, from amplitude level and the reciprocal two-value of polarity greater than described data pulse modulation signal, select I component and Q component, generation is used for the I axle and is used for the described symbol pulses modulation signal of Q axle

The described symbol pulses modulation signal that described adder unit will be used for the I axle and be used for the Q axle and the described data pulse modulation signal that is used for the I axle and is used for the Q axle generate I pulse-modulated signal and Q pulse-modulated signal by each addition,

Described quadrature modulation unit carries out quadrature modulation to I pulse-modulated signal and Q pulse-modulated signal, generates described orthogonal demodulation signal.

7. pulse transmitter as claimed in claim 6, wherein,

Described symbol pulses generation unit possesses:

Level converter according to the described data message that is assigned to described beginning pulse slot, switches the polarity of the symbol timing pulse of the described beginning pulse slot of expression position; And

Amplifying unit, the output of amplifying described level converter.

8. pulse transmitter as claimed in claim 6, wherein,

Also comprise: the symbol timing generation unit, in described beginning pulse slot interval, generating its pulsewidth is the following symbol timing pulse of described time slot width,

Described data pulse generation unit possesses:

Delayer is imported described symbol timing pulse, forms a plurality of delay symbol timing pulse that the each time slot time ground of retardation increases;

The level translation unit according to the described data message that is assigned to described rear portion pulse slot, to each described rear portion pulse slot, switches the polarity of described delay symbol timing pulse; And

Adder unit with the level translation results added of each described rear portion pulse slot, generates described data pulse modulation signal.

9. reception of impulse device comprises:

Receiving element, the symbol data that reception will be made of the data message of each code element n bit, a bit one is the pulse-modulated signal that the pulse slot of time slot width sends than specially being assigned to 1/n with code-element period;

The symbol timing detecting unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 1, detects beginning pulse slot position;

The beginning data extracting unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 2, is extracted the described data message that is assigned to described beginning pulse slot; And

The rear portion data extraction unit by the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 3, extracts the described data message that is assigned to described rear portion pulse slot.

10. reception of impulse device as claimed in claim 9, wherein,

Described threshold value 2 is the value greater than described threshold value 1, and described threshold value 3 is the value less than described threshold value 1.

11. reception of impulse device as claimed in claim 9, wherein,

Also comprise: detection unit, carry out with carrier multiplication after the detection of envelope of described pulse-modulated signal.

12. reception of impulse device as claimed in claim 10, wherein,

Described pulse-modulated signal is, by the symbol data that the data message of each code element n bit constitutes, and the orthogonal demodulation signal that a bit one is sent out after than the pulse slot that specially is assigned to I axle that 1/n with code-element period is a time slot width and Q axle respectively,

The reception of impulse device also comprises: the orthogonal detection unit, be offset the carrier multiplication of 90 degree with described orthogonal demodulation signal and reference phase and from reference phase, and generate the rectified signal that is used for the I axle and is used for the Q axle,

Described symbol timing unit is transformed to absolute value with described rectified signal, by being transformed to amplitude level behind the absolute value and the threshold determination between the described threshold value 1, detects described beginning pulse slot position,

Described threshold value 2 and described threshold value 3 are zero,

Described beginning DISCHARGE PULSES EXTRACTION unit and DISCHARGE PULSES EXTRACTION unit, described rear portion are positive and negative according to described rectified signal, extract the data message that is assigned to described beginning pulse slot and described rear portion pulse slot.

13. a pulse transmission method may further comprise the steps:

With the data message of n bit, a bit one is the pulse slot of time slot width than the 1/n that specially is assigned to code-element period;

Select and the corresponding amplitude level of described data message that is assigned to the rear portion pulse slot except that the beginning pulse slot, in pulse slot interval, described rear portion, generate the data pulse modulation signal;

According to the described data message that is assigned to described beginning pulse slot, from greater than selecting one of them amplitude level the two-value amplitude level of the amplitude level of described data pulse modulation signal, in described beginning pulse slot interval, generate the code element pulse-modulated signal; And

With described symbol pulses modulation signal and the addition of described data pulse modulation signal, thus the production burst modulation signal.

14. a pulse demodulation method may further comprise the steps:

The symbol data that reception will be made of the data message of each code element n bit, a bit one is the pulse-modulated signal that the pulse slot of time slot width sends than specially being assigned to 1/n with code-element period;

By the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 1, detect beginning pulse slot position;

By the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 2, extract the described data message that is assigned to described beginning pulse slot; And

By the amplitude level of described pulse-modulated signal and the threshold determination between the threshold value 3, extract the described data message that is assigned to described rear portion pulse slot.

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