CN101388687B - Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method - Google Patents

Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method Download PDF

Info

Publication number
CN101388687B
CN101388687B CN2008100449320A CN200810044932A CN101388687B CN 101388687 B CN101388687 B CN 101388687B CN 2008100449320 A CN2008100449320 A CN 2008100449320A CN 200810044932 A CN200810044932 A CN 200810044932A CN 101388687 B CN101388687 B CN 101388687B
Authority
CN
China
Prior art keywords
centerdot
signal
overbar
detector
noise ratio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2008100449320A
Other languages
Chinese (zh)
Other versions
CN101388687A (en
Inventor
魏平
张花国
任春辉
牟青
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
University of Electronic Science and Technology of China
Original Assignee
University of Electronic Science and Technology of China
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University of Electronic Science and Technology of China filed Critical University of Electronic Science and Technology of China
Priority to CN2008100449320A priority Critical patent/CN101388687B/en
Publication of CN101388687A publication Critical patent/CN101388687A/en
Application granted granted Critical
Publication of CN101388687B publication Critical patent/CN101388687B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Complex Calculations (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

The invention relates to a method for detecting direct sequence signals, which can be realized by a chip and has rapid speed, high efficiency, none cooperation, low signal-to-noise ratio. The method comprises the following steps: pre-collating received data, pre-calculating FFT, estimating consolidation biased autocorrelation functions, synthesizing consolidation unbiased autocorrelation functions, calculating four-level cross-correlation statistics quantity, and supposing examination. The method uses a covering principle (MCT) with FFT as a core and uses maximum cost to calculate main elements in a detector with optimum principles, and then an optimum detector can be rapidly and approximately realized through detecting symbolic code period parameters. The saved calculation amount and the size of a memory of the method are two magnitude orders more than that of the optimum detector. The mode of modulating signals has wide application range, wide Doppler frequency shift is tolerated, the constant false alarm rate and the detecting precession of the parameter are high, the detecting performance is much better than an existing symbolic code period detector, and the problem that OPSK or higher digital phase modulation DSSS signals can not be detected by a carrier frequency detector under low signal-to-noise ratio is solved.

Description

The attainable fast high-efficient non-cooperative signal-noise ratio direct spreading signal detecting method of a kind of chip
Technical field
This method belongs to communication technical field, specifically is applied to frequency range management, and signal is intercepted and the distress message analysis, also can be used for the sensor network of self-organizing or as the implementation of spread spectrum communication network of new generation.Be under low signal-to-noise ratio very, the directly approximate a kind of Fast implementation that realizes the Direct Sequence Spread Spectrum Signal optimum detector of all unknown parameters.
DSSS (DSSS, be called for short directly expand) signal is as a kind of signal that typically has secured feature, in many non-collaboration application occasions, if can obtain the parameter such as the carrier frequency f of DSSS signal in advance unlike the cooperation recipient c, chip rate R, pseudo-code cycle T pAnd pseudo-code sequence is such, and then signal is difficult to be detected under low signal-to-noise ratio.The attainable detection method of non-cooperation chip that this patent proposes has realized a kind of detection principle of novelty, has fast, the suitable characteristics that signal to noise ratio is low, the adaptation parameter scope is wide of detection speed, also can obtain the pseudo-code cycle T simultaneously pThe accurate estimation of this key parameter, estimated accuracy is far above the unit sampling interval.The application scenario that this patent algorithm relates to comprises: radio monitoring, signal of communication is scouted, satellite-signal intercepting and capturing etc.Its application simultaneously also comprises some new DSSS communication system of design, such as parameter or (with) the DSSS communications platform that becomes during pseudo-code, thereby obtain good anti-interception capability and antijamming capability; Perhaps as a kind of effective detection mode under the cooperative communication sync fail state, like emergency processing in danger.
Background technology
All the time, utilize algorithm that the pseudo-code periodic characteristic studies the DSSS input seldom, what a large amount of on the contrary Weak-signal detectors was directed against is common psk signal.Mainly contain two reasons: at first, support with theoretical about the systematic method of the detection of psk signal, such as the cyclic spectral detector; Simultaneously in engineering, also there are some practical algorithm, like the carrier frequency detector, the rate thread detector; Realize simple; Obtained number of applications, but there is great limitation in these detectors when being applied to the DSSS input: the carrier frequency detector is very responsive to Doppler frequency displacement and narrow band interference, and is not suitable for high-order PSK such as the QPSK modulation of widespread usage; The rate thread detector detects poor performance under low signal-to-noise ratio, and its performance is subject to pulse shaping and channel circumstance influence.On the other hand; Up to the present, the pseudo-code cycle detection device performance that existing method proposes is not good, and operand is bigger than normal; Do not have advantage compared with the psk signal detector, the main purpose of therefore studying pseudo-code cycle detection device is still in order to be used for estimating the pseudo-code cycle after detecting completion.Simultaneously, because the ratio of precision of estimating is lower, also be difficult to as reliable estimated value of pseudo-code cycle.At first briefly introduce existing non-cooperation DSSS signal detecting method below:
1. existing P SK signal detector is used for the detection of non-cooperation DSSS signal
Existing P SK signal detector mainly contains two kinds, and a kind of is the carrier frequency detector, if DSSS signal to be detected is the BPSK modulation system, then behind the signal square, its periodogram has spectral line and occurs at twice carrier frequency place, detects this spectral line and has or not and get final product; Another kind is the rate thread detector, and after signal and the delay conjugation of self matched, its periodogram had spectral line and occurs at the chip rate place, also can be used to detect the DSSS signal and have or not.If DSSS signal modulation system to be detected is the QPSK or the psk signal of high-order more; Quadratic method lost efficacy; The carrier frequency spectral line can more recover on high-order (QPSK the is a quadravalence) meaning, but well-known, exponent number is high more; The ability that suppresses noise more a little less than, so the carrier frequency detector is not suitable for the low signal-to-noise ratio occasion of high order modulation.On the other hand, rate thread detector performance is not good.Such as in practical application, the carrier frequency detector of frequency multiplication detects-20dB the low energy of BPSK-DSSS signal, and the rate thread detector only can detect to-10dB.Therefore, as far as the BPSK-DSSS signal, the carrier frequency detector is a kind of feasible scheme.But for the PSK-DSSS signal of other form, the carrier frequency detector performance under low signal-to-noise ratio (<-10dB) can't bear to use.The theory diagram of two kinds of detectors is respectively like Fig. 1, shown in Figure 2.
2. have the method for non-cooperation DSSS signal pseudo-code cycle detection now
For describing conveniently, consider following DSSS signal discrete model:
Figure S2008100449320D00021
Y, (k) expression is by the DSSS discrete signal of Gaussian noise pollution, and p is the average power of DSSS signal, { c (k) }, k=0,1;, L-1 is that length is the PSK pseudo-code sequence of L, and mod (k, L) expression k gets remainder to L, { s (k) }; K=0,1 ..., the PSK information code sequence that M-1 is
Figure 2008100449320_0
Figure 2008100449320_1
The maximum integer that expression is not more than, f cWith
Figure 2008100449320_2
cBe respectively carrier frequency frequency and first phase, n (k) is independent identically distributed multiple Gaussian noise sequence, and N representes that total sample counts.
At present, existing non-cooperation DSSS signal pseudo-code cycle detection algorithm mainly comprises:
(1). the fluctuation correlation method
Become a plurality of non-overlapped data windows (to satisfy the long L of window the DSSS division of signal 1>2L)
Figure S2008100449320D00022
I=1,2 ..., M 1(M 1Be the data window number), obtain the auto-correlation function of each data window signal r i ( τ ) = 1 L 1 Σ k = 1 L 1 y → i ( k ) y → i * ( k - τ ) , A sample as signal auto-correlation function; Y wherein *The complex conjugate of expression y; Auto-correlation function to all data windows are obtained is made even all, tries to achieve the estimated value of signal auto-correlation function mould square ρ ( τ ) = 1 M 1 Σ i = 1 M 1 | r i ( τ ) | 2 ; ρ (τ) is carried out peak value searching, in the ideal case, only peak value occurs, therefore carry out peak value and detect, and obtain the PN sign indicating number cycle according to the Minimum distance estimation, between the peak value at the integral multiple place in pseudo-code cycle, as shown in Figure 3.
(2). the secondary power spectrometry
Similar relevant fluctuation method becomes a plurality of non-overlapped data windows with the DSSS division of signal, tries to achieve the periodogram of signal in the window and estimates φ i ( ω ) = 1 L 1 | FT ( y → i ( k ) ) | 2 (FT representes Fourier Tranform); To fenestrate in the secondary power spectral line property of signal average, obtain ρ ( τ ) = 1 M 1 L 1 Σ i = 1 M 1 [ FT ( φ i ( ω ) ) ] ; ρ (τ) is carried out peak value searching, go out the PN sign indicating number cycle according to the distance detecting between the peak value.Utilize the corresponding relation of periodogram estimation and auto-correlation function estimated power spectrum; Therefore can prove; This method is consistent with the essence of fluctuation correlation method; But owing to directly utilize periodogram to have the problem (available correlation diagram is estimated alternative the elimination, but so just in full accord with relevant fluctuation method) of peak aliasing, the correlation method that therefore do not fluctuate is convenient.
(3). the cepstrum method
Same similar relevant fluctuation method becomes a plurality of non-overlapped data windows with the DSSS division of signal, and signal in each window is asked cepstrum C i ( τ ) = | FT [ Ln | FT [ y → i ( k ) ] | 2 ] | 2 ; The cepstrum of trying to achieve in each window is asked linear averaging ρ ( τ ) = 1 M 1 Σ i = 1 M 1 C i ( τ ) ; ρ (τ) is carried out peak value searching, go out the PN sign indicating number cycle according to the distance estimations between the peak value.
Emulation shows, and is best with fluctuation correlation method effect in the above algorithm.Comprehensive said method is not difficult to find out, this several method has all utilized the periodic characteristic of the quite sharp-pointed and pseudo-code sequence in pseudo-code sequence auto-correlation peak.The shortcoming of above algorithm mainly is that performance is not good when low signal-to-noise ratio, can only accomplish-15dB (under code length L≤1023 situation) above (seeing table 1).These methods are difficult to be used as the main detection means of low signal-to-noise ratio DSSS signal.In addition, if consider in the practical application sample rate and chip rate often an odd lot doubly concern, so the pseudo-code cycle that above-mentioned algorithm estimates only is the integer approximation value in true pseudo-code cycle.Because error is bigger, so these algorithms also are difficult to accurate estimating of task of competent pseudo-code cycle.
In a word, there are many weakness in existing DSSS signal detecting method, and particularly performance also has suitable distance apart from practicability when low signal-to-noise ratio and high-order digit modulation.
Summary of the invention:
The objective of the invention is to overcome foregoing problems, on the DSSS signal optimum detector basis of unknown all parameters, provide a kind of based on the attainable method for quick of chip.
The core of this method is to have designed a kind of Rapid Realization mode of DSSS signal optimum detector dexterously---netted covering table fast algorithm (fast Mesh-Covered table algorithm; Be called for short the MCT algorithm); It has utilized FFT computing capability efficiently, the FFT arithmetic element is stitched together according to certain pattern carries out computing then.It is quite superior that this method detects performance: can realize the very detection in low signal-to-noise ratio DSSS signal pseudo-code cycle by enough quite short samples; Also existing other method under the same detection performance of amount of calculation simultaneously, and can obtain the pseudo-code cycle parameter of estimated accuracy simultaneously far above existing other method.
Different with aforementioned pseudo-code cycle detection algorithm based on the frequency domain processing; This detection method is regarded the DSSS signal as the sign indicating number sequence that Memorability is arranged of carrying bulk redundancy information; Through some specific computings on the time domain, make full use of redundant information and remove noise, thereby obtain good inhibition noise ability.
Describe for convenient, discrete DSSS signal y (k) can be write as column vector form y, uses y iI element among the expression column vector y, i=1,2 ..., N, and point of each pseudo-code chip samples establish L 0For a near value the pseudo-code period L, might as well establish L ∈ [ 2 3 L 0 , 4 3 L 0 ] , M 0=N/L 0Through the theoretical derivation of optimum detector, structure statistic ρ (L 0) as detection statistic:
Wherein γ is a decision threshold;
Figure S2008100449320D00043
hypothesis when being no signal,
Figure S2008100449320D00044
is the hypothesis when signal is arranged.The performance of this detector is outstanding, the detector that robustness is very good, widely applicable.Theoretical research shows: it is that the PSK-DSSS signal is tending towards optimum detector (the LMPI test under 0 in signal to noise ratio; Local maximal potential invariant test); Be its optimal performance at any noise variance, all be consistent under carrier frequency and the first phase, pseudo-code sequence and information code sequence.Simultaneously, this detector also is CFAR (CFAR) and influence that do not receive the PSK modulation type.Its computation complexity is approximately O (NM).
Amount of calculation that this detector is required and memory space are all very big, and are difficult to practical application.The MCT implementation of the present invention's design can be similar to and realize this non-cooperative signal-noise ratio direct spreading signal detector.Technical scheme of the present invention is as shown in Figure 4; Signal gets into receiver through antenna; After intermediate frequency quadrature reception and A/D sampling,, utilize the fpga chip implementation algorithm then with the sampled data input store; Generate the decision statistic amount at last and accomplish the detection of signal, estimate the pseudo-code cycle parameter of DSSS signal simultaneously.It is characterized in that this method comprises following steps successively in processor:
Step 1. receive the data preliminary finish, in processor, data are carried out preliminary treatment, can be through filtering and albefaction function, inhibition out-of-band noise, and the noise contribution that the makes the actual reception data suitable theoretical model of coincidence detection method more.Then that data are calculative structural segmented according to the MCT algorithm, and every section zero padding storage respectively, so that make processor can efficiently handle corresponding FFT computing.
Step 2. FFT calculates in advance.Every segment data is carried out the FFT computing respectively, deposit the result in memory.Because this group will be the result will use repeatedly, once all realize in advance, and computational efficiency is improved greatly.
Step 3. becoming during estimation has partial autocorrelation function.Be exactly in fact according to the MCT algorithm with corresponding data conjugation dot product and get the IFFT conversion.
Step 4. become no partial autocorrelation function when synthetic.According to the MCT algorithm, the adjacent partial autocorrelation function that has is combined into no partial autocorrelation function.
Step 5. calculate each item quadravalence cross covariance statistic in the optimal detection amount.Promptly after repeated execution of steps three and step 4, institute become sometimes obtain on the no partial autocorrelation function basis pseudo-code cycle the quadravalence cross covariance function of possible value correspondence.
Step 6. the check judgement.Detection statistic that obtains at last and thresholding are compared.Because this detector is CFAR, promptly thresholding does not rely on DSSS signal parameter and background noise size, so threshold value adopts the mode that presets to be solidificated in the program.In this method be to the pretreated method feature of data:
Signal gets into the intermediate frequency quadrature receiver through antenna, and through the A/D sampling, behind digital filtering and the noise whitening, sampled data is carried out data rearrangement then, and input store is so that the utilization subsequent treatment.Below will receive data and represent (y with vectorial y nN point among the expression y).Order L ′ = min k ∈ N ( p k ) > 2 L 0 - 1 , Define L ' * (M respectively 0-1) dimension matrix A (1), A (2)And matrix B (1), B (2)P is the substrate of the FFT conversion supported of platform, is generally 2.
A ( 1 ) = y 0 y L 0 · · · y ( M 0 - 2 ) L 0 y 1 y L 0 + 1 · · · y ( M 0 - 2 ) L 0 + 1 · · · · · · · · · · · · y L 0 - 1 y 2 L 0 - 1 · · · y ( M 0 - 1 ) L 0 - 1 0 0 0 0 · · · · · · · · · · · · 0 0 0 0 , B ( 1 ) = y L 0 / 2 y 3 L 0 / 2 · · · y ( M 0 - 3 / 2 ) L 0 y L 0 / 2 + 1 y 3 L 0 / 2 + 1 · · · y ( M 0 - 3 / 2 ) L 0 + 1 · · · · · · · · · · · · y 3 L 0 / 2 - 1 y 5 L 0 / 2 - 1 · · · y ( M 0 - 1 / 2 ) L 0 - 1 0 0 0 0 · · · · · · · · · · · · 0 0 0 0
A ( 2 ) = | y 0 | 2 | y L 0 | 2 · · · | y ( M 0 - 2 ) L 0 | 2 | y 1 | 2 | y L 0 + 1 | 2 · · · | y ( M 0 - 2 ) L 0 + 1 | 2 · · · · · · · · · · · · | y L 0 - 1 | 2 | y 2 L 0 - 1 | 2 · · · | y ( M 0 - 1 ) L 0 - 1 | 2 0 0 0 0 · · · · · · · · · · · · 0 0 0 0 , B ( 2 ) = | y L 0 / 2 | 2 | y 3 L 0 / 2 | 2 · · · | y ( M 0 - 3 / 2 ) L 0 | 2 | y L 0 / 2 + 1 | 2 | y 3 / L 0 / 2 + 1 | 2 · · · | y ( M 0 - 3 / 2 ) L 0 + 1 | 2 · · · · · · · · · · · · | y 3 L 0 / 2 - 1 | 2 | y 5 L 0 / 2 - 1 | 2 · · · | y ( M 0 - 1 / 2 ) L 0 - 1 | 2 0 0 0 0 · · · · · · · · · · · · 0 0 0 0
And establish A ( 1 ) = a 0 ( 1 ) · · · a M 0 - 2 ( 1 ) , A ( 2 ) = a 0 ( 2 ) · · · a M 0 - 2 ( 2 ) , B ( 1 ) = b 0 ( 1 ) · · · b M 0 - 2 ( 1 ) , B ( 2 ) = b 0 ( 2 ) · · · b M 0 - 2 ( 2 ) . A (1)With B (1), A (2)With B (2)L just in time staggers 0/ 2, so that in step 4, can effectively suppress information code initial phase difference to detecting the fluctuation of performance.
In this method preparatory FFT Calculation Method is characterized as:
Realize A respectively by the fpga chip module (1), A (2), B (1), B (2)Base-p FFT the computing of each row.Obtain: A ~ ( 1 ) = a ~ 0 ( 1 ) · · · a ~ M 0 - 2 ( 1 ) , A ~ ( 2 ) = a ~ 0 ( 2 ) · · · a ~ M 0 - 2 ( 2 ) , B ~ ( 1 ) = b ~ 0 ( 1 ) · · · b ~ M 0 - 2 ( 1 ) , B ~ ( 2 ) = b ~ 0 ( 2 ) · · · b ~ M 0 - 2 ( 2 ) , Then the result is sent back in the memory.
Become when estimating in this method method feature that partial autocorrelation function is arranged into: being this step of intuitivism apprehension, describing (shown in Figure 5 in the description of drawings) with figure here, is (m, the corresponding y that is defined as of some n) with coordinate on the plane m *y nWith | y m| 2| y n| 2( *The expression conjugation), m=0 ..., N-1, n=0 ..., N-1.And definition has inclined to one side estimation auto-correlation function:
r m , n ( 1 ) ( k ) = &Sigma; i = 0 L 0 - k y * ( m + k + i ) y ( n + i ) 0 &le; k &le; L 0 - 1 &Sigma; i = 1 L 0 - k y * ( m + i ) y ( n - k + i ) - L 0 + 1 &le; k < 0
With
r m , n ( 2 ) ( k ) = &Sigma; i = 0 L 0 - k | y ( m + k + i ) | 2 | y ( n + i ) | 2 0 &le; k &le; L 0 - 1 &Sigma; i = 1 L 0 - k | y ( m + i ) | 2 | y ( n - k + i ) | 2 - L 0 + 1 &le; k < 0
Use length to be L 0Empty frame each point on the plane is carried out piecemeal (among Fig. 5 with L 0=4 is example), calculate the inclined to one side estimation auto-correlation function of having of each empty frame r M, n (1)(k) and r M, n (2)(k) r M, n (1)(k).Calculating has the process of inclined to one side estimation auto-correlation function: read successively from memory by the fpga chip module
Figure S2008100449320D00063
With And their corresponding element multiplied each other, and do base-p IFFT conversion, the sequence that obtains is [r M, n (1)(0) ... R M, n (1)(L 0-1) 0 ... 0r M, n (1)(L 0+ 1) ... R M, n (1)(1)] TIn like manner, respectively with each vector With Corresponding element multiplies each other, and does base-p IFFT conversion, and the sequence that obtains is [r M, n (2)(0) ... R M, n (2)(L 0-1) 0 ... 0r M, n (2)(L 0+ 1) ... R M, n (2)(1)] T
The method feature that becomes no partial autocorrelation function in this method when synthetic into:
Calculate the auto-correlation function that (part) nothing is estimated partially With Every L on the same diagonal line about being or in neighbouring two empty frames 0The sum of individual next-door neighbour's element (being the sum of per 4 next-door neighbours' element among Fig. 5), (m n) is defined as y when coordinate points m *y nThe time tried to achieve and do When coordinate points (m n) is defined as | y m| 2| y n| 2The time tried to achieve and do
Figure S2008100449320D000610
All of trying to achieve like this
Figure S2008100449320D000611
With
Figure S2008100449320D000612
Can represent that also the coordinate meaning that Fig. 6 and Fig. 5 represent is in full accord with Fig. 6, promptly more corresponding one by one, only in order more succinctly intuitively to represent each element with [].Work as m=0, L 0..., (M-2) L 0, n=L 0/ 2,3L 0/ 2 ..., (M-3/2) L 0The time, have &alpha; &OverBar; ( m + k , n ) = r m , n ( 1 ) ( k ) + r m + L 0 , n ( 1 ) ( k - L 0 ) , k = 1 , &CenterDot; &CenterDot; &CenterDot; , L 0 - 1 . This pair relationhip shows with empty tiltedly frame table respectively in Fig. 6, and has marked
Figure S2008100449320D000614
as example.
&alpha; &OverBar; ( m , n ) = r m , n ( 1 ) ( k ) , k = 0
&alpha; &OverBar; ( m , n - k ) = r m , n ( 1 ) ( k ) + r m , n + L 0 ( 1 ) ( k + L 0 ) , k = - L 0 + 1 , &CenterDot; &CenterDot; &CenterDot; , - 1 . This pair relationhip shows with empty tiltedly frame table respectively in Fig. 6, and has marked
Figure S2008100449320D00073
as example.
In like manner:
&beta; &OverBar; ( m + k , n ) = r m , n ( 2 ) ( k ) + r m + L 0 , n ( 2 ) ( k - L 0 ) , k = 1 , &CenterDot; &CenterDot; &CenterDot; , L 0 - 1
&beta; &OverBar; ( m , n ) = r m , n ( 2 ) ( k ) , k = 0
&beta; &OverBar; ( m , n - k ) = r m , n ( 2 ) ( k ) + r m , n + L 0 ( 2 ) ( k + L 0 ) , k = - L 0 + 1 , &CenterDot; &CenterDot; &CenterDot; , - 1
In full accord during their pair relationhip and calculating
Figure S2008100449320D00077
in Fig. 6.
The method feature that calculates each item quadravalence cross covariance statistic in the optimal detection amount in this method is:
Calculate judgement sequence γ (k):
&gamma; ( k ) = 1 2 [ &Sigma; j = 0 M 0 - 2 ( | &alpha; &OverBar; ( j L 0 , j L 0 + k ) | 2 - &beta; &OverBar; ( j L 0 , jL 0 + k ) ) ,
+ &Sigma; j = 1 M 0 - 2 ( | &alpha; &OverBar; ( ( j + 1 / 2 ) L 0 - k , ( j + 1 / 2 ) L 0 ) | 2 - &beta; &OverBar; ( ( j + 1 / 2 ) L 0 - k , ( j + 1 / 2 ) L 0 ) ) ]
Wherein, k=2L 0/ 3+1 ..., (M 0-3/2) L 0, being about to satisfy n-m is owning of identical value ( | &alpha; &OverBar; ( m , n ) | 2 - &beta; &OverBar; ( m , n ) ) / 2 The item addition.
The method feature of check judgement is in this method:
Calculate detection statistic ρ ':
Figure S2008100449320D000711
wherein round () is the round function,
Figure S2008100449320D000712
be the maximum integer that is not more than.At last, calculate detection statistic
Figure S2008100449320D000713
L among the maximum ρ (L) is the estimated value in pseudo-code cycle.
The present invention has reached intended purposes, and the DSSS signal has successfully been realized detection, and has obtained pseudo-code cycle estimated value.
Through test, this detector and existing relevant fluctuation method pseudo-code cycle detection device and carrier frequency detector are carried out performance relatively, pseudo-code sequence length L=1023 of establishing the BPSK-DSSS signal, carrier frequency f c=1/4 (adopting the normalization numerical frequency), pseudo-code bit rate R c=1/6, sample length N=30K carries out Monte-Carlo Simulation 10000 times, false alarm probability P Fa=0.01, simulation result is as shown in the table, and visible detector of the present invention more also has good detection performance at sample length, and its performance obviously is superior to existing other detector under the same sample length situation.
Table 1. detector performance relatively
Signal to noise ratio (dB) -16 -17 -18
Detection probability P d(relevant fluctuation method) 71.5% 35.5% 18.2%
Detection probability P d(carrier frequency detector) 29.8% 6.5% 1.2%
Detection probability P d(MCT that the present invention proposes detects) 100% 92.4% 37.5%
Essence of the present invention is: the present invention directly utilizes and has simplified the optimum detector of DSSS signal, has finally obtained a kind of performance in theory near the optimum attainable detector of chip simultaneously.
The DSSS signal optimum detector of foundation of the present invention is a kind of detection principle of novelty, and it is to be suggested first and to utilize at present.It is applied widely that it has the modulation signal form, the parameter transformation strong robustness, and CFAR, the outstanding feature that accuracy of detection is high is superior to existing detector especially greatly on the detection performance.Its appearance has also solved a QPSK or the DSSS signal of the digital phase moudlation of the high-order theoretical difficult problem that under low signal-to-noise ratio, can't use the carrier frequency detector to detect more especially.Simultaneously, owing to do not detect the carrier frequency parameter, it also can tolerate the Doppler frequency shift of wide range.More than these advantages, all be to utilize the detection principle that the present invention proposes under low signal-to-noise ratio, to realize first.
The present invention has invented a kind of chip that is used to simplify DSSS signal optimum detector can realize the MCT Fast implementation.It implements the search and the detection in pseudo-code cycle in the doubling time variable range in given pseudo-code cycle.It uses a kind of covering principle (MCT) based on FFT dexterously, calculates major ingredients in the optimum detector with very little calculation cost, thus the approximate apace optimum detector that realizes.Each FFT operation can be realized by the IP kernel parallel pipelining process among the FPGA just, in our design, contains the fft processing unit of three complete independent parallels.Because approximate, it has the loss of 1dB approximately than optimum detector on input signal-to-noise ratio, but improved realizability greatly.In our design, need the total size of memory to be about ten times of sample lengths based on FPGA.In the pseudo-code cycle is 10 3During the order of magnitude, can obtain amount of calculation than optimum detector and reduce at least more than about two one magnitude, memory space also reduces the saving of 2 one magnitude.Under cycle, performance improves also bigger in longer pseudo-code.Therefore be particularly suitable for the fast detecting of faint non-cooperation PSK-DSSS signal based on the pseudo-code cycle detection device of MCT fast algorithm; Also be fit to emission source with respect to recipient's high-speed motion; Practical matter such as noise background is unknown or variable have high practical value.
Description of drawings:
Fig. 1: quadratic method detects BPSK-DSSS signal basic principle block diagram.
Fig. 2: the rate thread detector detects BPSK-DSSS signal basic principle block diagram.
Fig. 3: the fluctuation correlation method detects DSSS signal basic principle block diagram.
Fig. 4: the attainable fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection algorithm of chip system principle diagram.
Fig. 5: the realization schematic diagram of optimum pseudo-code cycle detection device.
Fig. 6: the realization principle schematic of MCT fast method.
Embodiment:
The attainable fast high-efficient non-cooperative signal-noise ratio direct spreading signal detecting method of a kind of chip; Its core is to have designed a kind of Rapid Realization mode of DSSS signal optimum detector dexterously---netted covering table fast algorithm (fast Mesh-Covered tablealgorithm; Be called for short the MCT algorithm); It has utilized FFT computing capability efficiently, the FFT arithmetic element is stitched together according to certain pattern carries out computing then.It is quite superior that this method detects performance: can realize the very detection in low signal-to-noise ratio DSSS signal pseudo-code cycle by enough quite short samples; Also existing other method under the same detection performance of amount of calculation simultaneously, and can obtain the pseudo-code cycle parameter of estimated accuracy simultaneously far above existing other method.
Different with aforementioned pseudo-code cycle detection algorithm based on the frequency domain processing; This detection method is regarded the DSSS signal as the sign indicating number sequence that Memorability is arranged of carrying bulk redundancy information; Through some specific computings on the time domain, make full use of redundant information and remove noise, thereby obtain good inhibition noise ability.
Describe for convenient, discrete DSSS signal y (k) can be write as column vector form y, uses y iI element among the expression column vector y, i=1,2 ..., N, and point of each pseudo-code chip samples establish L 0For a near value the pseudo-code period L, might as well establish L &Element; [ 2 3 L 0 , 4 3 L 0 ] , M 0=N/L 0Through the theoretical derivation of optimum detector, structure statistic ρ (L 0) as detection statistic:
Figure S2008100449320D00092
Wherein γ is a decision threshold;
Figure S2008100449320D00093
hypothesis when being no signal,
Figure S2008100449320D00094
is the hypothesis when signal is arranged.The performance of this detector is outstanding, the detector that robustness is very good, widely applicable.Theoretical research shows: it is that the PSK-DSSS signal is tending towards optimum detector (the LMPI test under 0 in signal to noise ratio; Local maximal potential invariant test); Be its optimal performance at any noise variance, all be consistent under carrier frequency and the first phase, pseudo-code sequence and information code sequence.Simultaneously, this detector also is CFAR (CFAR) and influence that do not receive the PSK modulation type.Its computation complexity is approximately O (NM).
Amount of calculation that this detector is required and memory space are all very big, and are difficult to practical application.The MCT implementation of the present invention's design can be similar to and realize this non-cooperative signal-noise ratio direct spreading signal detector.Technical scheme of the present invention is as shown in Figure 4; Signal gets into receiver through antenna; After intermediate frequency quadrature reception and A/D sampling,, utilize the fpga chip implementation algorithm then with the sampled data input store; Generate the decision statistic amount at last and accomplish the detection of signal, estimate the pseudo-code cycle parameter of DSSS signal simultaneously.It is characterized in that this method comprises following steps successively in processor:
Step 1. receive the data preliminary finish, in processor, data are carried out preliminary treatment, can be through filtering and albefaction function, inhibition out-of-band noise, and the noise contribution that the makes the actual reception data suitable theoretical model of coincidence detection method more.Then that data are calculative structural segmented according to the MCT algorithm, and every section zero padding storage respectively, so that make processor can efficiently handle corresponding FFT computing.
Step 2. FFT calculates in advance.Every segment data is carried out the FFT computing respectively, deposit the result in memory.Because this group will be the result will use repeatedly, once all realize in advance, and computational efficiency is improved greatly.
Step 3. becoming during estimation has partial autocorrelation function.Be exactly in fact according to the MCT algorithm with corresponding data conjugation dot product and get the IFFT conversion.
Step 4. become no partial autocorrelation function when synthetic.According to the MCT algorithm, the adjacent partial autocorrelation function that has is combined into no partial autocorrelation function.
Step 5. calculate each item quadravalence cross covariance statistic in the optimal detection amount.Promptly after repeated execution of steps three and step 4, institute become sometimes obtain on the no partial autocorrelation function basis pseudo-code cycle the quadravalence cross covariance function of possible value correspondence.
Step 6. the check judgement.Detection statistic that obtains at last and thresholding are compared.Because this detector is CFAR, promptly thresholding does not rely on DSSS signal parameter and background noise size, so threshold value adopts the mode that presets to be solidificated in the program.
In this method be to the pretreated method feature of data:
Signal gets into the intermediate frequency quadrature receiver through antenna, and through the A/D sampling, behind digital filtering and the noise whitening, sampled data is carried out data rearrangement then, and input store is so that the utilization subsequent treatment.Below will receive data and represent (y with vectorial y nN point among the expression y).Order L &prime; = min k &Element; N ( p k ) > 2 L 0 - 1 , Define L ' * (M respectively 0-1) dimension matrix A (1), A (2)And matrix B (1), B (2)P is the substrate of the FFT conversion supported of platform, is generally 2.
A ( 1 ) = y 0 y L 0 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 2 ) L 0 y 1 y L 0 + 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 2 ) L 0 + 1 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; y L 0 - 1 y 2 L 0 - 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 1 ) L 0 - 1 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0 , B ( 1 ) = y L 0 / 2 y 3 L 0 / 2 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 3 / 2 ) L 0 y L 0 / 2 + 1 y 3 L 0 / 2 + 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 3 / 2 ) L 0 + 1 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; y 3 L 0 / 2 - 1 y 5 L 0 / 2 - 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 1 / 2 ) L 0 - 1 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0
A ( 2 ) = | y 0 | 2 | y L 0 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 2 ) L 0 | 2 | y 1 | 2 | y L 0 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 2 ) L 0 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; | y L 0 - 1 | 2 | y 2 L 0 - 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 1 ) L 0 - 1 | 2 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0 , B ( 2 ) = | y L 0 / 2 | 2 | y 3 L 0 / 2 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 3 / 2 ) L 0 | 2 | y L 0 / 2 + 1 | 2 | y 3 / L 0 / 2 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 3 / 2 ) L 0 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; | y 3 L 0 / 2 - 1 | 2 | y 5 L 0 / 2 - 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 1 / 2 ) L 0 - 1 | 2 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0
And establish A ( 1 ) = a 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; a M 0 - 2 ( 1 ) , A ( 2 ) = a 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; a M 0 - 2 ( 2 ) , B ( 1 ) = b 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; b M 0 - 2 ( 1 ) , B ( 2 ) = b 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; b M 0 - 2 ( 2 ) . A (1)With B (1), A (2)With B (2)L just in time staggers 0/ 2, so that in step 4, can effectively suppress information code initial phase difference to detecting the fluctuation of performance.
In this method preparatory FFT Calculation Method is characterized as:
Realize A respectively by the fpga chip module (1), A (2), B (1), B (2)Base-p FFT the computing of each row.Obtain: A ~ ( 1 ) = a ~ 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; a ~ M 0 - 2 ( 1 ) , A ~ ( 2 ) = a ~ 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; a ~ M 0 - 2 ( 2 ) , B ~ ( 1 ) = b ~ 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; b ~ M 0 - 2 ( 1 ) , B ~ ( 2 ) = b ~ 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; b ~ M 0 - 2 ( 2 ) , Then the result is sent back in the memory.
Become when estimating in this method method feature that partial autocorrelation function is arranged into:
As shown in Figure 5, with coordinate on the plane (m, the corresponding y that is defined as of some n) m *y nWith | y m| 2| y n| 2( *The expression conjugation), m=0 ..., N-1, n=0 ..., N-1.And definition has inclined to one side estimation auto-correlation function:
r m , n ( 1 ) ( k ) = &Sigma; i = 0 L 0 - k y * ( m + k + i ) y ( n + i ) 0 &le; k &le; L 0 - 1 &Sigma; i = 1 L 0 - k y * ( m + i ) y ( n - k + i ) - L 0 + 1 &le; k < 0
With
r m , n ( 2 ) ( k ) = &Sigma; i = 0 L 0 - k | y ( m + k + i ) | 2 | y ( n + i ) | 2 0 &le; k &le; L 0 - 1 &Sigma; i = 1 L 0 - k | y ( m + i ) | 2 | y ( n - k + i ) | 2 - L 0 + 1 &le; k < 0
Use length to be L 0Empty frame each point on the plane is carried out piecemeal (among Fig. 5 with L 0=4 is example), calculate the inclined to one side estimation auto-correlation function of having of each empty frame r M, n (1)(k) and r M, n (2)(k) r M, n (1)(k).Calculating has the process of inclined to one side estimation auto-correlation function: read successively from memory by the fpga chip module
Figure S2008100449320D00122
With
Figure S2008100449320D00123
And their corresponding element multiplied each other, and do base-p IFFT conversion, the sequence that obtains is [r M, n (1)(0) ... R M, n (1)(L 0-1) 0 ... 0r M, n (1)(L 0+ 1) ... R M, n (1)(1)] TIn like manner, respectively with each vector
Figure S2008100449320D00124
With
Figure S2008100449320D00125
Corresponding element multiplies each other, and does base-p IFFT conversion, and the sequence that obtains is [r M, n (2)(0) ... R M, n (2)(L 0-1) 0 ... 0r M, n (2)(L 0+ 1) ... R M, n (2)(1)] T
The method feature that becomes no partial autocorrelation function in this method when synthetic into:
Calculate the auto-correlation function that (part) nothing is estimated partially
Figure S2008100449320D00126
With Every L on the same diagonal line about being or in neighbouring two empty frames 0The sum of individual next-door neighbour's element (being the sum of per 4 next-door neighbours' element among Fig. 5), (m n) is defined as y when coordinate points m *y nThe time tried to achieve and do
Figure S2008100449320D00128
When coordinate points (m n) is defined as | y m| 2| y n| 2The time tried to achieve and do
Figure S2008100449320D00129
All of trying to achieve like this
Figure S2008100449320D001210
With
Figure S2008100449320D001211
Can represent that also the coordinate meaning that Fig. 6 and Fig. 5 represent is in full accord with Fig. 6, promptly more corresponding one by one, only in order more succinctly intuitively to represent each element with [].Work as m=0, L 0..., (M-2) L 0, n=L 0/ 2,3L 0/ 2 ..., (M-3/2) L 0The time, have &alpha; &OverBar; ( m + k , n ) = r m , n ( 1 ) ( k ) + r m + L 0 , n ( 1 ) ( k - L 0 ) , k = 1 , &CenterDot; &CenterDot; &CenterDot; , L 0 - 1 . This pair relationhip shows with empty tiltedly frame table respectively in Fig. 6, and has marked
Figure S2008100449320D001213
as example.
&alpha; &OverBar; ( m , n ) = r m , n ( 1 ) ( k ) , k = 0
&alpha; &OverBar; ( m , n - k ) = r m , n ( 1 ) ( k ) + r m , n + L 0 ( 1 ) ( k + L 0 ) , k = - L 0 + 1 , &CenterDot; &CenterDot; &CenterDot; , - 1 . This pair relationhip shows with empty tiltedly frame table respectively in Fig. 6, and has marked
Figure S2008100449320D001216
as example.
In like manner:
&beta; &OverBar; ( m + k , n ) = r m , n ( 2 ) ( k ) + r m + L 0 , n ( 2 ) ( k - L 0 ) , k = 1 , &CenterDot; &CenterDot; &CenterDot; , L 0 - 1
&beta; &OverBar; ( m , n ) = r m , n ( 2 ) ( k ) , k = 0
&beta; &OverBar; ( m , n - k ) = r m , n ( 2 ) ( k ) + r m , n + L 0 ( 2 ) ( k + L 0 ) , k = - L 0 + 1 , &CenterDot; &CenterDot; &CenterDot; , - 1
In full accord during their pair relationhip and calculating
Figure S2008100449320D00131
in Fig. 6.
The method feature that calculates each item quadravalence cross covariance statistic in the optimal detection amount in this method is:
Calculate judgement sequence γ (k):
&gamma; ( k ) = 1 2 [ &Sigma; j = 0 M 0 - 2 ( | &alpha; &OverBar; ( j L 0 , j L 0 + k ) | 2 - &beta; &OverBar; ( j L 0 , jL 0 + k ) ) ,
+ &Sigma; j = 1 M 0 - 2 ( | &alpha; &OverBar; ( ( j + 1 / 2 ) L 0 - k , ( j + 1 / 2 ) L 0 ) | 2 - &beta; &OverBar; ( ( j + 1 / 2 ) L 0 - k , ( j + 1 / 2 ) L 0 ) ) ]
Wherein, k=2L 0/ 3+1 ..., (M 0-3/2) L 0, being about to satisfy n-m is owning of identical value ( | &alpha; &OverBar; ( m , n ) | 2 - &beta; &OverBar; ( m , n ) ) / 2 The item addition.
The method feature of check judgement is in this method:
Calculate detection statistic ρ ':
Figure S2008100449320D00135
wherein round () is the round function,
Figure S2008100449320D00136
be the maximum integer that is not more than.At last, calculate detection statistic
Figure S2008100449320D00137
L among the maximum ρ (L) is the estimated value in pseudo-code cycle.
The present invention has reached intended purposes, and the DSSS signal has successfully been realized detection, and has obtained pseudo-code cycle estimated value.
Through test, this detector and existing relevant fluctuation method pseudo-code cycle detection device and carrier frequency detector are carried out performance relatively, pseudo-code sequence length L=1023 of establishing the BPSK-DSSS signal, carrier frequency F c=1/4 (adopting the normalization numerical frequency), pseudo-code bit rate R c=1/6, sample length N=30K carries out Monte-Carlo Simulation 10000 times, false alarm probability P Fa=0.01, simulation result is as shown in the table, and visible detector of the present invention more also has good detection performance at sample length, and its performance obviously is superior to existing other detector under the same sample length situation.
Table 1. detector performance relatively
Signal to noise ratio (dB) -16 -17 -18
Detection probability P d(relevant fluctuation method) 71.5% 35.5% 18.2%
Detection probability P d(carrier frequency detector) 29.8% 6.5% 1.2%
Detection probability P d(MCT that the present invention proposes detects) 100% 92.4% 37.5%

Claims (7)

1. attainable non-cooperative signal-noise ratio direct spreading signal detection method of chip; Through using a kind of covering principle MCT based on FFT; Design a kind of chip and can realize the MCT Fast implementation; In given DSSS (DSSS) the doubling time variable range in signal pseudo-code cycle, implement the search and the detection in pseudo-code cycle, calculate major ingredients in the optimum detector with very little calculation cost; Thereby the approximate optimum detector that realizes the DSSS signal, it is characterized in that: the MCT Fast implementation also comprises following steps successively in processor:
1. in processor through filtering and albefaction function; Suppress out-of-band noise; And the noise contribution that makes the actual reception data theoretical model that is suitable for of coincidence detection method more, then that data are calculative structural segmented according to the MCT algorithm, and every section zero padding storage respectively; So that make processor can efficiently handle corresponding FFT computing, achieve a butt joint and receive the preliminary treatment of data;
2. FFT calculates in advance: every segment data is carried out the FFT computing respectively, deposit the result in memory, because this group result will use repeatedly, once all realize in advance, computational efficiency is improved greatly;
3. according to the MCT algorithm with corresponding data conjugation dot product and get the IFFT conversion, become the estimation that partial autocorrelation function is arranged during realization;
4. according to the MCT algorithm, become no partial autocorrelation function when having partial autocorrelation function to be combined into adjacent;
5. calculate each item quadravalence cross covariance statistic in the optimal detection amount, promptly after repeated execution of steps three and step 4, institute become sometimes obtain on the no partial autocorrelation function basis pseudo-code cycle the quadravalence cross covariance function of possible value correspondence;
The detection statistic that 6. will obtain at last and thresholding relatively because this detector is CFAR, promptly thresholding does not rely on DSSS signal parameter and background noise size, so threshold value adopts the mode that presets to be solidificated in the program, realizes that the final inspection of this method is adjudicated.
2. the attainable non-cooperative signal-noise ratio direct spreading signal detection method of a kind of chip according to claim 1 is characterized in that: data are carried out pretreated method is:
Signal gets into the intermediate frequency quadrature receiver through antenna, and through the A/D sampling, behind digital filtering and the noise whitening, sampled data is carried out data rearrangement then, and input store is so that the utilization subsequent treatment; Below will receive data and represent y with vectorial y nN point among the expression y; Order
Figure FSB00000794616100011
Define L ' * (M respectively 0-1) dimension matrix A (1), A (2)And matrix B (1), B (2), L wherein 0Be a near value the pseudo-code period L, M 0=N/L 0Be to receive the pseudo-code number of cycles that sample of signal contains, N representes that total sample counts; P is the substrate of the FFT conversion supported of platform;
A ( 1 ) = y 0 y L 0 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 2 ) L 0 y 1 y L 0 + 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 2 ) L 0 + 1 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; y L 0 - 1 y 2 L 0 - 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 1 ) L 0 - 1 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0 , B ( 1 ) = y L 0 / 2 y 3 L 0 / 2 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 3 / 2 ) L 0 y L 0 / 2 + 1 y 3 L 0 / 2 + 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 3 / 2 ) L 0 + 1 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; y 3 L 0 / 2 - 1 y 5 L 0 / 2 - 1 &CenterDot; &CenterDot; &CenterDot; y ( M 0 - 1 / 2 ) L 0 - 1 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0
A ( 2 ) = | y 0 | 2 | y L 0 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 2 ) L 0 | 2 | y 1 | 2 | y L 0 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 2 ) L 0 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; | y L 0 - 1 | 2 | y 2 L 0 - 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 1 ) L 0 - 1 | 2 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0 , B ( 2 ) = | y L 0 / 2 | 2 | y 3 L 0 / 2 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 3 / 2 ) L 0 | 2 | y L 0 / 2 + 1 | 2 | y 3 L 0 / 2 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 3 / 2 ) L 0 + 1 | 2 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; | y 3 L 0 / 2 - 1 | 2 | y 5 L 0 / 2 - 1 | 2 &CenterDot; &CenterDot; &CenterDot; | y ( M 0 - 1 / 2 ) L 0 - 1 | 2 0 0 0 0 &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; &CenterDot; 0 0 0 0
And establish A ( 1 ) = a 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; a M 0 - 2 ( 1 ) , A ( 2 ) = a 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; a M 0 - 2 ( 2 ) , B ( 1 ) = b 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; b M 0 - 2 ( 1 ) , B ( 2 ) = b 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; b M 0 - 2 ( 2 ) ; A (1)With B (1), A (2)With B (2)L just in time staggers 0/ 2, so that in step 4, can effectively suppress information code initial phase difference to detecting the fluctuation of performance.
3. the attainable non-cooperative signal-noise ratio direct spreading signal detection method of a kind of chip according to claim 2 is characterized in that: to preparatory FFT Calculation Method be:
Realize A respectively by the fpga chip module (1), A (2), B (1), B (2)Base-pFFT the computing of each row;
Obtain: A ~ ( 1 ) = a ~ 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; a ~ M 0 - 2 ( 1 ) , A ~ ( 2 ) = a ~ 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; a ~ M 0 - 2 ( 2 ) , B ~ ( 1 ) = b ~ 0 ( 1 ) &CenterDot; &CenterDot; &CenterDot; b ~ M 0 - 2 ( 1 ) , B ~ ( 2 ) = b ~ 0 ( 2 ) &CenterDot; &CenterDot; &CenterDot; b ~ M 0 - 2 ( 2 ) , Then the result is sent back in the memory.
4. the attainable non-cooperative signal-noise ratio direct spreading signal detection method of a kind of chip according to claim 3 is characterized in that: become when estimating method that partial autocorrelation function is arranged into:
With coordinate on the plane (m, corresponding being defined as of some n)
Figure FSB000007946161000213
With | y m| 2| y n| 2, wherein *The expression conjugation, m=0 ..., N-1, n=0 ..., N-1; And definition has inclined to one side estimation auto-correlation function:
r m , n ( 1 ) ( k ) = &Sigma; i = 0 L 0 - k y ( m + k + i ) * y ( n + i ) 0 &le; k &le; L 0 - 1 &Sigma; i = 1 L 0 - k y ( m + i ) * y ( n - k + i ) - L 0 + 1 &le; k < 0
With
r m , n ( 2 ) ( k ) = &Sigma; i = 0 L 0 - k | y ( m + k + i ) | 2 | y ( n + i ) | 2 0 &le; k &le; L 0 - 1 &Sigma; i = 1 L 0 - k | y ( m + i ) | 2 | y ( n - k + i ) | 2 - L 0 + 1 &le; k < 0
Use length to be L 0Empty frame each point on the plane is carried out piecemeal, calculate the inclined to one side estimation auto-correlation function of having of each empty frame
Figure FSB00000794616100032
With
Figure FSB00000794616100033
Calculating has the process of inclined to one side estimation auto-correlation function: read successively from memory by the fpga chip module With
Figure FSB00000794616100035
And their corresponding element multiplied each other, and do base-pIFFT conversion, the sequence that obtains is r m , n ( 1 ) ( 0 ) &CenterDot; &CenterDot; &CenterDot; r m , n ( 1 ) ( L 0 - 1 ) 0 &CenterDot; &CenterDot; &CenterDot; 0 r m , n ( 1 ) ( - L 0 + 1 ) &CenterDot; &CenterDot; &CenterDot; r m , n ( 1 ) ( - 1 ) T ; In like manner, respectively with each vector
Figure FSB00000794616100037
With Corresponding element multiplies each other, and does base-pIFFT conversion, and the sequence that obtains does r m , n ( 2 ) ( 0 ) &CenterDot; &CenterDot; &CenterDot; r m , n ( 2 ) ( L 0 - 1 ) 0 &CenterDot; &CenterDot; &CenterDot; 0 r m , n ( 2 ) ( - L 0 + 1 ) &CenterDot; &CenterDot; &CenterDot; r m , n ( 2 ) ( - 1 ) T .
5. the attainable non-cooperative signal-noise ratio direct spreading signal detection method of a kind of chip according to claim 4 is characterized in that: the method that becomes no partial autocorrelation function when synthetic into:
The auto-correlation function that the nothing of calculating section is estimated partially With (m n) is defined as when coordinate points
Figure FSB000007946161000312
The time tried to achieve and do
Figure FSB000007946161000313
When coordinate points (m n) is defined as | y m| 2| y n| 2The time tried to achieve and do
Figure FSB000007946161000314
Work as m=0, L 0..., (M-2) L 0, n=L 0/ 2,3L 0/ 2 ..., (M-3/2) L 0The time, have
&alpha; &OverBar; ( m + k , n ) = r m , n ( 1 ) ( k ) + r m + L 0 , n ( 1 ) ( k - L 0 ) , k=1,…,L 0-1,
&alpha; &OverBar; ( m , n ) = r m , n ( 1 ) ( k ) , k=0
&alpha; &OverBar; ( m , n - k ) = r m , n ( 1 ) ( k ) + r m , n + L 0 ( 1 ) ( k + L 0 ) , k=-L 0+1,…,-1,
In like manner:
&beta; &OverBar; ( m + k , n ) = r m , n ( 2 ) ( k ) + r m + L 0 , n ( 2 ) ( k - L 0 ) , k=1,…,L 0-1
&beta; &OverBar; ( m , n ) = r m , n ( 2 ) ( k ) , k=0
&beta; &OverBar; ( m , n - k ) = r m , n ( 2 ) ( k ) + r m , n + L 0 ( 2 ) ( k + L 0 ) , k=-L 0+1,…,-1。
6. the attainable non-cooperative signal-noise ratio direct spreading signal detection method of a kind of chip according to claim 5 is characterized in that: the method to each item quadravalence cross covariance statistic in the compute optimal detection limit is:
Calculate judgement sequence γ (k):
&gamma; ( k ) = 1 2 [ &Sigma; j = 0 M 0 - 2 ( | &alpha; &OverBar; ( j L 0 , j L 0 + k ) | 2 - &beta; &OverBar; ( j L 0 , j L 0 + k ) ) ,
+ &Sigma; j = 1 M 0 - 2 ( | &alpha; &OverBar; ( ( j + 1 / 2 ) L 0 - k , ( j + 1 / 2 ) L 0 ) | 2 - &beta; &OverBar; ( ( j + 1 / 2 ) L 0 - k , ( j + 1 / 2 ) L 0 ) ) ]
Wherein, k=2L 0/ 3+1 ..., (M 0-3/2) L 0, being about to satisfy n-m is owning of identical value ( | &alpha; &OverBar; ( m , n ) | 2 - &beta; &OverBar; ( m , n ) ) / 2 The item addition.
7. the attainable non-cooperative signal-noise ratio direct spreading signal detection method of a kind of chip according to claim 6 is characterized in that the method for check judgement being:
Calculate detection statistic ρ ':
Figure FSB00000794616100044
wherein round () is the round function;
Figure FSB00000794616100045
maximum integer for being not more than calculates detection statistic at last
L among the maximum ρ (L) is the estimated value in pseudo-code cycle; Wherein η is a decision threshold;
Figure FSB00000794616100047
hypothesis when being no signal,
Figure FSB00000794616100048
is the hypothesis when signal is arranged.
CN2008100449320A 2008-03-11 2008-03-11 Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method Expired - Fee Related CN101388687B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2008100449320A CN101388687B (en) 2008-03-11 2008-03-11 Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2008100449320A CN101388687B (en) 2008-03-11 2008-03-11 Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method

Publications (2)

Publication Number Publication Date
CN101388687A CN101388687A (en) 2009-03-18
CN101388687B true CN101388687B (en) 2012-11-07

Family

ID=40477894

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008100449320A Expired - Fee Related CN101388687B (en) 2008-03-11 2008-03-11 Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method

Country Status (1)

Country Link
CN (1) CN101388687B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101801013B (en) * 2010-02-05 2012-08-29 上海华为技术有限公司 Method and device for detecting signal
CN103472468B (en) * 2012-06-06 2016-07-06 泰斗微电子科技有限公司 A kind of pseudo code phase pipeline searching method in GNSS satellite signal capture
CN103929215A (en) * 2014-05-06 2014-07-16 许昌学院 Efficient MSK direct spread communication detecting method
CN103957029B (en) * 2014-05-26 2016-03-02 许昌学院 A kind of QPSK-DS communication check method based on delay multiplication
CN105871413B (en) * 2016-06-13 2019-01-18 哈尔滨工业大学 Low signal-noise ratio direct-sequence spread-spectrum signal detection method
CN106357578A (en) * 2016-08-29 2017-01-25 成都九洲迪飞科技有限责任公司 Bpsk spread spectrum receiving system
CN106849992B (en) * 2016-12-12 2019-06-18 西安空间无线电技术研究所 A kind of detection method of the direct sequence signal based on Generalized Quadratic power spectrum
CN110752869B (en) * 2019-10-14 2020-11-17 南京天际易达通信技术有限公司 Method for detecting stealing signal in satellite communication
CN111398909B (en) * 2020-03-09 2022-01-21 哈尔滨工业大学 Clutter environment unmanned aerial vehicle detection method based on cepstrum analysis

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1729628A (en) * 2002-10-11 2006-02-01 米特公司 System for direct acquisition of received signals

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1729628A (en) * 2002-10-11 2006-02-01 米特公司 System for direct acquisition of received signals

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
张花国等.一种改进的DS/SS信号PN码序列估计算法.《信号处理》.2003,第19卷全文. *

Also Published As

Publication number Publication date
CN101388687A (en) 2009-03-18

Similar Documents

Publication Publication Date Title
CN101388687B (en) Chip implementing fast high-efficient non-cooperative signal-noise ratio direct spreading signal detection method
CN102333372B (en) Real-time positioning method and system based on radio frequency fingerprints
CN102662183B (en) Method and system for global position system (GPS) signal capture
CN105553507A (en) Full coherence accumulation time-frequency domain parallel capturing method based on FFT
CN103954951A (en) Power mid value and normalization covariance estimation based sea-surface target detection method
CN102007428A (en) Passive radar for presence and motion detection
Wimalajeewa et al. Cooperative sparsity pattern recovery in distributed networks via distributed-OMP
EP3748897B1 (en) Quantum chaotic wave packet digital signal generating method
CN101848177B (en) Bistable optimal stochastic resonance single-frequency weak signal detection method based on frequency conversion
CN104038249B (en) Cycle long code direct sequence signal pseudo-random code estimation method
CN104168233A (en) DSSS/UQPSK signal pseudo code sequence estimation method based on characteristic decomposition and Messay algorithm
CN104270167A (en) Signal detection and estimation method based on multi-dimensional characteristic neural network
CN104143997A (en) Multi-access interference false locking resistance judgment method based on spread spectrum mechanism
CN104459734A (en) Beidou satellite navigation signal capturing method based on NH code element jumping detection
CN105099499B (en) Noise like Chirp spread-spectrum signals are designed and quick capturing method
CN105656511B (en) Differential correlation acquisition method suitable for environment with frequency offset and low signal-to-noise ratio
CN101207405A (en) Method for capturing pseudo-code sequence
CN105445767A (en) BOC signal parameter blind estimation method based on average ambiguity function
CN108900445A (en) A kind of method and device of signal code rate estimation
CN103929215A (en) Efficient MSK direct spread communication detecting method
CN102111228B (en) Cognitive radio frequency spectrum sensing method based on circulation symmetry
CN112039648A (en) Data transmission method, device, transmission equipment and storage medium
CN101206259A (en) Method for capturing multi-constellation navigation weak signal based on digital matched filter
Sadiq et al. Automatic device-transparent RSS-based indoor localization
CN101237250B (en) Frequency spreading wave blind estimation method based on odd value analysis

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121107

Termination date: 20150311

EXPY Termination of patent right or utility model