CN101355099A - Gate dielectric material silicic acid lanthanum film with high dielectric coefficient as well as preparation method and use thereof - Google Patents
Gate dielectric material silicic acid lanthanum film with high dielectric coefficient as well as preparation method and use thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 26
- 239000003989 dielectric material Substances 0.000 title claims abstract description 17
- HCVNJMOLULRIQD-UHFFFAOYSA-N [La].[Si](O)(O)(O)O Chemical compound [La].[Si](O)(O)(O)O HCVNJMOLULRIQD-UHFFFAOYSA-N 0.000 title claims description 6
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 27
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000010703 silicon Substances 0.000 claims abstract description 24
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 claims abstract description 22
- 239000000463 material Substances 0.000 claims abstract description 22
- 229910052746 lanthanum Inorganic materials 0.000 claims abstract description 21
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims abstract description 20
- 239000000126 substance Substances 0.000 claims abstract description 7
- 230000005669 field effect Effects 0.000 claims abstract description 6
- 239000000919 ceramic Substances 0.000 claims description 23
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 20
- 230000012010 growth Effects 0.000 claims description 17
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 11
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 10
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 10
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 9
- 239000008367 deionised water Substances 0.000 claims description 8
- 229910021641 deionized water Inorganic materials 0.000 claims description 8
- 238000010438 heat treatment Methods 0.000 claims description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 5
- 238000000498 ball milling Methods 0.000 claims description 5
- 239000000843 powder Substances 0.000 claims description 5
- 238000004549 pulsed laser deposition Methods 0.000 claims description 5
- 238000005245 sintering Methods 0.000 claims description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 238000013461 design Methods 0.000 claims description 3
- 150000002500 ions Chemical class 0.000 claims description 3
- 239000011812 mixed powder Substances 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- VZPPHXVFMVZRTE-UHFFFAOYSA-N [Kr]F Chemical compound [Kr]F VZPPHXVFMVZRTE-UHFFFAOYSA-N 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims description 2
- 239000010408 film Substances 0.000 claims 12
- 239000010409 thin film Substances 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052573 porcelain Inorganic materials 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 abstract 1
- KTUFCUMIWABKDW-UHFFFAOYSA-N oxo(oxolanthaniooxy)lanthanum Chemical compound O=[La]O[La]=O KTUFCUMIWABKDW-UHFFFAOYSA-N 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 238000000137 annealing Methods 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 5
- 238000004458 analytical method Methods 0.000 description 4
- 238000002425 crystallisation Methods 0.000 description 3
- 230000008025 crystallization Effects 0.000 description 3
- 238000001239 high-resolution electron microscopy Methods 0.000 description 3
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010406 interfacial reaction Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 238000011056 performance test Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- BVKZGUZCCUSVTD-UHFFFAOYSA-L Carbonate Chemical compound [O-]C([O-])=O BVKZGUZCCUSVTD-UHFFFAOYSA-L 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000011282 treatment Methods 0.000 description 1
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Abstract
The invention discloses a gate dielectric lanthanum silicate film with high dielectric coefficient, a preparation method and application thereof. The chemical formula of the film is (La2O3) x (SiO2) 1-x, wherein x is more than or equal to 0.4 and less than or equal to 0.6. The preparation method of the film comprises the following steps: a KrF excimer laser (1) is started to focalize a pulse laser beam on an LSO porcelain target (5) through a focusing lens (2); pulse laser is used to strip off the LSO porcelain target (5); the generated laser plasma is deposited on a silicon substrate material so as to prepare the lanthanum silicate film; the lanthanum silicate film is a an amorphous film of which the physical thickness is 5 nanometers, the dielectric constant is 16.9, the thickness of an equivalent oxide is 1.11 nanometers and the leakage current is 21.7A/cm<2>; moreover, the lanthanum silicate film has higher thermodynamic stability; and no boundary layer is generated. The lanthanum silicate film can be used in a gate dielectric material of a metal-oxide-semiconductor field effect transistor.
Description
Technical field
The invention belongs to the microelectronic material field, specifically relate to be applied to gate dielectric material silicic acid lanthanum film with high dielectric coefficient as in the Metal-oxide-semicondutor field effect transistor (MOSFET) and preparation method thereof.
Background technology
In the silicon-based semiconductor integrated circuit, Metal-oxide-semicondutor field effect transistor (MOSFET) is the elementary cell that constitutes mnemon, microprocessor and logical circuit.The size of its volume is directly connected to the integrated level of very lagre scale integrated circuit (VLSIC).By famous Moore's Law, to double every the integrated level of 18 months integrated circuits, characteristic size is dwindled
Doubly.The prediction of the international semiconductor technology road figure (ITRS) that announces according to international semiconductor TIA in 1999 will be tending towards ripe to the photoetching technique of 2005 0.1 μ m, and among the corresponding M OSFET as the SiO of gate dielectric film
2The thickness of layer will reduce to 1.0-1.5nm; And will reach 0.05 μ m to photoetching technique level in 2011, the SiO of corresponding equivalence
2The thickness of gate dielectric film will reduce to 0.6-0.8nm.But showing, Quantum mechanical calculation works as SiO
2When the thickness of gate dielectric film will reduce to 2nm, grid knot that tunnel effect causes and the leakage current between the silicon chip had promptly reached the degree that can not allow.In order to address this problem, must use material to replace existing SiO with higher dielectric coefficient and low-leakage current
2Layer.This has become the bottleneck of restriction MOSFET integrated level raising in following 10 years, and has caused the very big concern and the extensive studies of various countries semiconductor educational circles and association area.People are accustomed to being equivalent to how thick SiO
2The equivalent oxide thickness (EOT) of layer is described the thickness of high-dielectric coefficient grid dielectric layer (high-k gate dielectric), and its expression formula is:
Wherein
The SiO that causes for interfacial reaction
2The thickness of layer, t
High-kBe the actual (real) thickness of high-dielectric coefficient dielectric layer,
And ε
High-kBe respectively SiO
2The dielectric coefficient of layer and high-dielectric coefficient dielectric substance, wherein
Be 3.9.In order to reduce leakage current, should make the actual (real) thickness of gate dielectric layer become big, but corresponding EOT also can increase.At this moment the approach that reduces EOT has two: one, selects for use the bigger material of dielectric coefficient as the gate dielectric membrane material; The 2nd, the SiO that try one's best minimizing and even elimination form at the interface
2Layer.
The basic principle that present stage is sought high-dielectric coefficient grid dielectric material is:
(1) electrical properties: the broad stopband, cation valence is few, low defective and interface state density;
(2) dielectric property: high-dielectric coefficient (>15), and more slow with temperature and frequency change, low-leakage current;
(3) thermal stability: can bear at least more than 800 ℃, 2 minutes short annealing heat treatment, preferably can bear the requirement (900-1000 ℃, 10-30 second) of traditional CMOS high-temperature post-treatment and keep can and SiO
2The high heating power of analogy is learned stability;
(4) chemical property and Si substrate compatibility do not form or only form the SiO of one or two atomic layer at the interface
2, compatible mutually with grid material, interfacial reaction does not take place, its preparation technology will with existing CMOS process compatible;
(5) thus for the defective that reduces gate dielectric film reduces leakage current, it is generally acknowledged that film is preferably epitaxy single-crystal film or amorphous film, the former preparation is difficulty comparatively, thereby amorphous film becomes object of greatest concern.
Many oxides such as ZrO
2, HfO
2, Ta
2O
5, La
2O
3, Al
2O
3Deng just being studied widely as candidate material.But they all can not satisfy alternative SiO fully
2Whole requirements.La
2O
3Have higher dielectric constant (k ≈ 30) and bigger energy gap (E
g≈ 5.5eV) still owing to absorbs water in air branch and CO easily
2With and very easily deliquescence is rotten, form hydroxide or the carbonate of La; And SiO
2Then be good gate dielectric material, dielectric coefficient that can be less (k ≈ 3.9) limits its further application.Based on this, in conjunction with these two kinds of oxides advantage separately, preparation has the very lanthanum silicate film of high chemical stability and medium dielectric constant.
Summary of the invention
1, goal of the invention
The objective of the invention is to provide a kind of high-dielectric coefficient grid dielectric material (La
2O
3)
x(SiO
2)
1-x(being called for short LSO) film and preparation method and application thereof.This material is under high vacuum under the low oxygen partial pressure condition, making the ultrathin membrane of thickness about 5nm on the silicon substrate, this film is an amorphous state, and has higher thermal stability, can bear the required The high temperature anneal more than 900 ℃ of CMOS technology and non-crystallization, its dielectric coefficient has variation by a small margin with the value difference of x.
2, technical scheme
A kind of gate dielectric material silicic acid lanthanum film with high dielectric coefficient as is characterized in that its chemical formula is (La
2O
3)
x(SiO
2)
1-x, wherein the span of x is 0.4≤x≤0.6.
The lanthanum silicate film is an amorphous film, has high thermodynamic stability, and its dielectric constant is 16.9, and physical thickness is 5nm, and effect oxide thickness such as lanthanum silicate film are 1.11nm, and leakage current is 21.7mA/cm
2, do not have boundary layer to produce.
A kind of preparation method who is applied to the grid dielectric material lanthanum silicate film of Metal-oxide-semicondutor field effect transistor, it is characterized in that lanthanum silicate film of the present invention is to utilize pulsed laser deposition technique, use the LSO ceramic target, prepare under the high vacuum low oxygen partial pressure, its preparation process is as follows:
(1) preparation of LSO ceramic target (5): with pure La
2O
3And SiO
2Powder through the abundant ball milling of ball mill, is cold-pressed into disk to mixed-powder according to 1: 1 mixed in molar ratio, the disk sintering, obtains the LSO ceramic target (5) of fine and close white in chamber type electric resistance furnace;
(2) selection of backing material and processing: select p type Si (100), at first p type Si (100) substrate is put into acetone or absolute ethyl alcohol ultrasonic cleaning, use the deionized water ultrasonic cleaning again, erode one deck SiO on the silicon chip surface with hydrofluoric acid solution then
2, take out with plastic grip again, with rinsed with deionized water number time, it is standby to dry up the back with high pure nitrogen at last;
(3) by intake valve (6) high pure nitrogen is charged in the growth room (3), make growth room (3) inside and outside air pressure balance, so that put into LSO ceramic target (5);
(4) on the target platform (4) with the fixing assorted pulsed laser deposition molding system (as shown in Figure 1) of LSO ceramic target (5), silicon substrate material is put on the substrate table (7), and target platform and substrate table all are placed in the growth room (3);
(5) with the interface valve (8) of vacuum pump by mechanical pump and molecular pump the interior vacuum in growth room (3) is extracted into 1.0 * 10
-1Pa starts molecular pump then, and growth room's internal pressure is extracted into 1.0 * 10
-4About Pa;
(6) with resistance furnace (9) heated substrate platform (7), make silicon substrate material reach design temperature 300-500 ℃;
(7) start laser (1), pulse laser beam is focused on laser beam on the LSO ceramic target (5) by condenser lens 2, peel off the LSO ceramic target with pulse laser, the lasing ion body that produces is deposited on the silicon substrate material and makes the LSO film, in film-forming process, target platform and substrate table rotate with constant 40-70 rev/min speed, are deposited on the silicon substrate equably to guarantee the laser beam plasma, thereby make the uniform film of thickness.
According to the preparation method of the described lanthanum silicate film of claim 3, it is characterized in that in steps A pure La
2O
3And SiO
2After the abundant ball milling 24-36 of powder hour, under 12-14MPa pressure, be cold-pressed into the disk of Φ 25 * 4mm,, obtain the LSO ceramic target (5) of fine and close white at 1400-1600 ℃ of following sintering 6-8 hour.
Preparation method according to the described lanthanum silicate film of claim 3, it is characterized in that the resistivity at the P type Si (100) described in the step B is 1-50 Ω cm, and Si (100) substrate put into acetone or absolute ethyl alcohol ultrasonic cleaning 4-6 minute, use rinsed with deionized water 4-5 minute again, erode one deck SiO on the silicon chip surface with 1: 25 hydrofluoric acid solution of mol ratio
2
It is constant that the resistance furnace (9) of above-mentioned steps (6) can keep under any temperature between 20-800 ℃, and the temperature of heating silicon substrate is 350 ℃.
The laser of above-mentioned steps (7) is a krypton fluoride excimer laser, wavelength 248nm, and pulse duration 20-30ns, single pulse energy 50-700mJ, energy density is 0-10J/cm
2
The application of lanthanum silicate film in the grid dielectric material of Metal-oxide-semicondutor field effect transistor of above-mentioned preparation.
The LSO film that makes after tested, the physical thickness of this film is the amorphous film of 5nm, has higher thermodynamic stability, after 900 ℃ of short annealing heat treatment, still keep amorphous state, its dielectric constant is 16.9, and equivalent oxide thickness is 1.11nm, and leakage current is 21.7mA/cm
2, do not have boundary layer to produce.
The microstructure analysis instrument of film: X-ray diffraction analysis instrument, model are D/Max-RA
The electrical performance testing instrument of film: HP4294A impedance/phase analysis instrument and HP4140B skin peace/direct voltage source.
Below in conjunction with LSO film performance test result is further specified useful result of the present invention.
XRD spectra analysis explanation among Fig. 2, after through 900 ℃ of short annealing heat treatments, the LSO film still keeps amorphous state; And after 1000 ℃ of annealing, the obvious diffraction peak has appearred in the LSO film, shows that film begins crystallization.
Fig. 3 is that physical thickness is the high resolution electron microscopy image of the LSO film of 5nm.As can be seen from the figure between film and substrate, there is not boundary layer to exist.
Fig. 4 and Fig. 5 show that respectively being grown in 5nm LSO film on the p type silicon substrate is capacitance voltage (C-V) curve and current/voltage (J-V) curve under the 1MHz in frequency.Sample is through high vacuum partial pressure of oxygen 1.0 * 10
-4The following 400 ℃ of annealing of Pa 20 minutes.By C-V curve among Fig. 4, the equivalent oxide thickness EOT that is calculated is 1.11nm.Owing between film and Si, do not have the low-k boundary layer fully, utilize
The dielectric constant of the LSO that calculates is 16.9.Fig. 5 shows that the leakage current density of the thick LSO film of 5nm under the gate voltage of-1V is 21.7mA/cm
2This value is than the SiO with identical EOT value
2The leakage current of film is little 4 orders of magnitude approximately.
The x-ray photoelectron that Fig. 6 obtained 400 ℃ of annealing for 5nm LSO film in 20 minutes can spectrogram.The spectrum peak that shows La3d, Si2p in the film among the figure is apparent in view, with they at La
2O
3And SiO
2In compare in conjunction with configuration, binding energy all has certain skew, is not that the single form with oxide exists in conjunction with the explanation of the peak position of O1s La atom and Si atom in the LSO film, and has the silicate of new material lanthanum to form.
3, useful result
Result by above-mentioned Micro-Structure Analysis and performance test to the LSO film can clearly be seen that the present invention compares with existing gate dielectric material, has tangible advantage.
The amorphous state LSO dielectric film of the present invention preparation has higher thermodynamic stability, can bear the required The high temperature anneal more than 900 ℃ of CMOS technology and non-crystallization can satisfy the requirement of the follow-up high-temperature heat treatment of current semi-conductor industry fully.The metal-insulator semiconductor of Pt-LSO-Si (MIS) capacitor arrangement that utilized this material preparation is calculated to such an extent that equivalent oxide thickness is 1.11nm, and leakage current is 21.7mA/cm
2Observing by high resolution electron microscopy, do not have the boundary layer generation between LSO film and the Si substrate, is the LSO film of 5nm corresponding to physical thickness, calculate dielectric coefficient be 16.9.Its performance index have reached the higher level that grid medium with high dielectric Materials Research Laboratories that colleague in the world obtains reaches.
The present invention utilizes the method for pulsed laser deposition, adopts metal oxide La
2O
3And SiO
2For raw material preparing EOT value is not appeared in the newspapers in the world as yet less than 1.3nm LSO film.
Description of drawings
Fig. 1: the present invention is used to prepare the PLD film growth system structural representation of LSO film, 1-KrF excimer laser; The 2-condenser lens; The 3-growth room; 4-target platform; The 5-LSO ceramic target; The 6-intake valve; The 7-substrate table; The interface valve of 8-mechanical pump and molecular pump; 9-substrate heating resistor stove.
Fig. 2: the LSO film after underlayer temperature is 350 ℃ of growths, do not have annealing and through 5 minutes measured XRD diffraction patterns of 800 ℃, 900 ℃, 1000 ℃ quick thermal annealing process, wherein the x axle is 2 θ scanning angles (unit degree), the y axle is represented intensity.
Fig. 3: physical thickness is about the LSO film of 5nm respectively at 20 minutes high resolution electron microscopy image of 400 ℃ of in-situ annealing.
Fig. 4: the LSO film is capacitance voltage (C-V) curve under the 1MHz in frequency, and wherein the x axle is represented gate voltage (unit volt), and the y axle is represented electric capacity (unit is a pico farad).
Fig. 5: the current/voltage of LSO film (J-V) curve, wherein the x axle is represented gate voltage (unit volt), the y axle is represented leakage current density (unit is every square centimeter of an ampere).
Fig. 6: x-ray photoelectron power spectrum (XPS) curve of LSO film, wherein the x axle is represented atomic binding energy (unit electron-volt), the y axle is represented relative intensity.
Embodiment
Preparation grid medium with high dielectric material (La
2O
3)
x(SiO
2)
1-xThe amount of substance ratio be 1: 1, its preparation process is as follows:
(1) preparation of LSO ceramic target 5: with pure La
2O
3And SiO
2Powder was according to 1: 1 mixed in molar ratio, through the abundant ball milling of ball mill 24 hours, mixed-powder is cold-pressed into the disk of Φ 25 * 4mm under 13Mpa pressure, in chamber type electric resistance furnace disk 1500 ℃ of following sintering 6 hours, obtain the LSO ceramic target of fine and close white;
(2) selection of backing material and processing: select p type Si (100), resistivity is 1-50 Ω cm.At first p type Si (100) substrate is put into acetone or absolute ethyl alcohol ultrasonic cleaning 5 minutes, used the deionized water ultrasonic cleaning again 5 minutes, use 1: 25 hydrofluoric acid solution of mol ratio to erode one deck SiO on the silicon chip surface then
2, take out with plastic grip again, with rinsed with deionized water number time, it is standby to dry up the back with high pure nitrogen at last;
(3) by intake valve (6) high pure nitrogen is charged in the growth room (3), make growth room (3) inside and outside air pressure balance, so that put into LSO ceramic target (5);
(4) LSO ceramic target (5) is fixed on the target platform (4) of deposition film making system of pulse laser (as shown in Figure 1), silicon substrate material is put on the substrate table (7), and target platform and substrate table all are placed in the growth room (3);
(5) with the interface valve (8) of vacuum pump by mechanical pump and molecular pump the interior vacuum in growth room (3) is extracted into 1.0 * 10
-1Pa starts molecular pump then, and growth room (3) internal pressure is extracted into 1.0 * 10
-4About Pa;
(6) with resistance furnace (9) heated substrate platform (7), make silicon substrate material reach 350 ℃ of design temperatures;
(7) start KeF excimer laser (1), making pulse laser beam pass through condenser lens (2) focuses on laser beam on the LSO ceramic target (5), peel off LSO ceramic target (5) with pulse laser, the lasing ion body that produces is deposited on the silicon substrate material and makes the LSO film, in film-forming process, target platform and substrate table are deposited on the silicon substrate equably to guarantee the laser beam plasma, thereby make the uniform film of thickness with 50 rev/mins of constant speed rotations.
Claims (8)
1, a kind of gate dielectric material silicic acid lanthanum film with high dielectric coefficient as, the chemical formula that it is characterized in that this film is (La
2O
3)
x(SiO
2)
1-xWherein the span of X is 0.4≤x≤0.6.
2, gate dielectric material silicic acid lanthanum film with high dielectric coefficient as according to claim 1, it is characterized in that it is the amorphous state film, has high thermodynamic stability, its dielectric constant is 16.9, physical thickness is 5nm, lanthanum silicate film equivalent oxide thickness is 1.11nm, and leakage current is 21.7mA/cm
2, do not have boundary layer to produce.
3, a kind of method for preparing claim 1 high-dielectric coefficient grid dielectric material silicate thin film, it is characterized in that silicate thin film of the present invention is to utilize pulsed laser deposition technique, use the LSO ceramic target, prepare under the high vacuum low oxygen partial pressure, its preparation process is as follows:
A, (La
2O
3)
x(SiO
2)
1-xThe preparation of ceramic target: with pure La
2O
3And SiO
2Powder through the abundant ball milling of ball mill, is cold-pressed into disk to mixed-powder according to 1: 1 mixed in molar ratio, the disk sintering, obtains the LSO ceramic target (5) of fine and close white in chamber type electric resistance furnace;
The selection of B, backing material and processing: select p type Si (100), at first p type Si (100) substrate is put into acetone or absolute ethyl alcohol ultrasonic cleaning, use the deionized water ultrasonic cleaning again, erode one deck SiO on the silicon chip surface with hydrofluoric acid solution then
2, take out with plastic grip again, with deionized water ultrasonic cleaning number minute, it is standby to dry up the back with high pure nitrogen at last;
C, high pure nitrogen is charged in the growth room (3), make growth room (3) inside and outside air pressure balance, so that put into LSO ceramic target (5) by intake valve (6);
D, LSO ceramic target (5) is fixed on the target platform (4) of impulse laser deposition system, silicon substrate material is put on the substrate table (7), and they all are placed in the growth room (3);
E, the interior vacuum in growth room (3) is extracted into 1.0 * 10 with the interface valve (8) of vacuum pump by mechanical pump and molecular pump
-1Pa starts molecular pump then, and growth room (3) internal pressure is extracted into 1.0 * 10
-4Pa;
F, usefulness resistance furnace (9) heated substrate platform (7) make silicon substrate material reach design temperature 300-500 ℃;
G, startup laser (1), making pulse laser beam pass through condenser lens (2) focuses on laser beam on the LSO ceramic target (5), peel off LSO ceramic target (5) with pulse laser, the lasing ion body that produces is deposited on the silicon substrate material and makes the LSO film, in film-forming process, target platform (5) rotates with constant 40-70 rev/min speed, is deposited on the silicon substrate equably to guarantee the laser beam plasma, thereby makes the uniform film of thickness.
4,, it is characterized in that in steps A pure La according to the preparation method of the described lanthanum silicate film of claim 3
2O
3And SiO
2After the abundant ball milling 24-36 of powder hour, under 12-14MPa pressure, be cold-pressed into the disk of Φ 25 * 4mm,, obtain the LSO ceramic target (5) of fine and close white at 1400-1600 ℃ of following sintering 6-8 hour.
5, according to the preparation method of the described lanthanum silicate film of claim 3, it is characterized in that the resistivity at the P type Si (100) described in the step B is 1-50 Ω cm, and Si (100) substrate put into acetone or absolute ethyl alcohol ultrasonic cleaning 4-6 minute, use rinsed with deionized water 4-5 minute again, erode one deck SiO on the silicon chip surface with 1: 25 hydrofluoric acid solution of mol ratio
2
6, the preparation method of lanthanum silicate film according to claim 3 is characterized in that keeping constant at the resistance furnace described in the step F under any temperature between 20-800 ℃, and the temperature of heating silicon substrate is 350 ℃.
7, the preparation method of lanthanum silicate film according to claim 3, it is characterized in that at the laser described in the step G be krypton fluoride excimer laser, its wavelength 248nm, pulse duration 20-30ns, single pulse energy 50-700mJ, energy density is 0-10J/cm
2
8, the application of lanthanum silicate film as claimed in claim 1 in the grid dielectric material of Metal-oxide-semicondutor field effect transistor.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101819995A (en) * | 2010-04-16 | 2010-09-01 | 南京大学 | GaN-based MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and preparation method thereof |
CN106601613A (en) * | 2015-10-20 | 2017-04-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Preparation method of mica film and transistor |
CN109216198A (en) * | 2017-06-30 | 2019-01-15 | 台湾积体电路制造股份有限公司 | Gate stack structure and forming method thereof |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101819995A (en) * | 2010-04-16 | 2010-09-01 | 南京大学 | GaN-based MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and preparation method thereof |
CN106601613A (en) * | 2015-10-20 | 2017-04-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Preparation method of mica film and transistor |
CN106601613B (en) * | 2015-10-20 | 2019-12-06 | 中国科学院苏州纳米技术与纳米仿生研究所 | Preparation method of mica film and transistor |
CN109216198A (en) * | 2017-06-30 | 2019-01-15 | 台湾积体电路制造股份有限公司 | Gate stack structure and forming method thereof |
CN109216198B (en) * | 2017-06-30 | 2022-03-29 | 台湾积体电路制造股份有限公司 | Gate stack structure and forming method thereof |
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