CN101290601B - Peripheral apparatus control circuit, computer system and method for loading firmware - Google Patents
Peripheral apparatus control circuit, computer system and method for loading firmware Download PDFInfo
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Abstract
The invention puts forward a peripheral device control circuit, a computer system and a method for loading firmware, and in particular relates to a peripheral device control circuit and a computer system applying the peripheral device control circuit. The computer system can be externally connected with a peripheral device and a storage device, and the computer system comprises a processor, a first memory and the peripheral device control circuit. The peripheral device control circuit comprises a specific interface circuit which is used specially for receiving firmware comprising a plurality of instruction codes and storing the firmware into the first memory, a second memory which can temporarily store one or a plurality of instruction codes of the firmware, as well as a first controller which is used for writing the instruction codes of the firmware stored in the first memory into the second memory. A second controller in the peripheral device control circuit executes the instruction codes temporarily stored in the second memory so as to control the peripheral device. The computer system does not need to be additionally provided with a read-only memory for storing the firmware of a microcontroller, thereby reducing hardware area and cost effectively.
Description
Technical field
The present invention is relevant for a kind of chipset of computer system, in particular to chipset and the firmware loading method thereof of integrating peripheral controllers.
Background technology
Figure 1A is a known computer system 100A Organization Chart.This computer system 100A can represent a typical X 86 systems, comprising a storer 110, one processors 120 and a chipset (CHIPSET) 130.This chipset 130 can be the general designation of South Bridge chip and north bridge chips, looks the integration situation of each tame system and difference is arranged.Wherein this processor 120 and chipset 130 can pass through this storer 110 of a storage access channel 102 accesses, and also can come transmission information by a specific high-speed bus 104 between processor 120 and the chipset 130.For the stretch system function, general computer system 100A can comprise one or more peripheral controls 140, in order to the various peripherals 150 of access.This peripherals 150 can be a kind of card reader, CD player or other peripheral applications devices that connects this computer system 100A by USB (universal serial bus) (USB), the advanced supplementary technology interface (SATA) of string type or integrating apparatus electronic interface (IDE), these peripheral controls 140 then are the unit that correspondence is used for controlling this peripherals 150, generally include a ROM (read-only memory) (ROM) 144 and a microcontroller (MCU) 142.This ROM (read-only memory) 144 generally is to use nonvolatile memory, in order to store the firmware of these peripherals 150 special uses of control, and this microcontroller 142 generally is to use 8051 chips or arm processor, be responsible for from this ROM (read-only memory) 144, reading and carry out this firmware, and then control the running of this peripherals 150.
In order to make portable system, volume and power consumption all have necessity of minimizing.For instance, in order to develop cover super mobile computer (UMPC) system, chipset must have higher integrated level.Figure 1B has shown the example of a computer system 100B, comprising existing storer 110 and processor 120.In addition, in order to reduce volume, a chipset 160 is incorporated into a microcontroller 162 wherein, is used for being responsible for the peripherals 150 that control is external in this computer system 100B.Because it is the running of microcontroller 162 must have firmware, so disposed a ROM (read-only memory) 164 among this computer system 100B in addition, couples this chipset 160, special-purpose to store the required firmware of this microcontroller 162.This ROM (read-only memory) 164 can be an intrinsic element among this computer system 100B, except being used for storing the required firmware of this microcontroller 162, also comprises the required firmware of this computer system 100B running itself.Yet there is bottleneck in such design.The space of general ROM (read-only memory) 164 is limited, and the required firmware capacity of microcontroller 162 is often up to more than hundreds of K.It on the Space Theory of a ROM (read-only memory) 164 firmware that can't hold computer system 100B itself the simultaneously firmware that adds microcontroller 162.
If adopt extra nonvolatile memory to make this ROM (read-only memory) 164 in fact, though can solve the problem of capacity limit, this chipset 160 must dispose extra pin position (PIN) and specially link to each other with this ROM (read-only memory) 164.Because the degree of integration of chipset 160 is quite high, newly-increased pin position is not only quite challenging, also can increase the volume and the cost of chipset 160.
On the other hand, if directly ROM (read-only memory) 164 is incorporated in the chipset 160, not only be not inconsistent cost, area is excessive, and the degree of difficulty of firmware upgrade also increases thereupon.Vertical the above, when being incorporated into microcontroller 162 in the chipset 160, the firmware storage problem of microcontroller 162 can be a main bottleneck, remains a kind of improvement framework to be solved.
Summary of the invention
In view of this, the present invention proposes a kind of peripheral apparatus control circuit, and a kind of computer system of using this peripheral apparatus control circuit.This computer system can an external peripherals and a storage device, comprises a processor, a first memory and this peripheral apparatus control circuit.This peripheral apparatus control circuit comprises a special interface circuit, comprises the firmware of a plurality of order codes and is stored in this first memory in order to receive one.One second memory is in order to one or more order code of temporary this firmware.One first controller writes this second memory in regular turn in order to this order code of the firmware that will be stored in this first memory.One second controller is in order to carry out order code temporary in this second memory to control a peripherals.
Wherein, this special interface circuit special use to be receiving this firmware, and this firmware is stored to a restricted area of this first memory, and wherein this restricted area is not subjected to the access control of this processor.This firmware is to be provided by this storage device.After this computer system initialization, this special interface circuit copies to this restricted area in this first memory with this firmware in this storage device.After the initialization of this computer system, at first be written into the driver of an operating system and this peripheral apparatus control circuit.This firmware can be in a unique file or the attached driver that hangs over this peripheral apparatus control circuit.
When the instruction of the required execution of this second controller was not in this second memory, this first controller further read this firmware in this restricted area to obtain the needed instruction of this second controller.
The present invention proposes a kind of computer system in addition, can an external peripherals and a storage device.This computer system comprises: the peripheral apparatus control circuit that a processor, couples the first memory of this processor and couples this first memory and this processor.This peripheral apparatus control circuit comprises: a special interface circuit special-purpose receive one with this storage device certainly and comprises the firmware of a plurality of order codes and be stored in this first memory.One second memory is in order to one or more order code of temporary this firmware.One first controller writes this second memory in regular turn in order to this order code of the firmware that will be stored in this first memory.One second controller is in order to carry out order code temporary in this second memory to control this peripherals.
The present invention proposes a kind of method of loading firmware in addition, can supply a computer system control one peripherals.This computer system comprises a processor, a first memory and a peripheral apparatus control circuit.The external storage device of this computer system.Store a firmware that comprises a plurality of order codes in this storage device.This peripheral apparatus control circuit comprises a controller, carries out this firmware to control this peripherals in order to order.The method of this loading firmware comprises: be written into an operating system with this computer system of initialization; After this computer system initialization, this firmware in this storage device is copied in this first memory; The order code of the firmware in this first memory is written into a second memory in this peripheral apparatus control circuit in regular turn; And this second memory reads and carries out this firmware to control this peripherals certainly.
The present invention does not need additionally to increase the firmware that ROM (read-only memory) is deposited microcontroller, has effectively reduced hardware area and cost.
Description of drawings
Figure 1A is a known computer system 100A Organization Chart;
Figure 1B is a known computer system 100B Organization Chart;
Fig. 2 is the computer system 200 of one of embodiment of the invention;
Fig. 3 is the firmware loading method process flow diagram of implementing according to Fig. 2;
Fig. 4 is the firmware flowchart among Fig. 3 embodiment.
Embodiment
The following example specifically describes as how preferable mode and realizes the present invention.The mode that embodiment only generally uses for explanation, but not in order to limit scope of the present invention.Actual range is as the criterion so that claims are listed.
Computer system using system storer of the present invention is deposited firmware, does not need the extra external memory chip that increases, and reduced volume can reduce cost.Because now system storage is increasing, so the size of firmware can reach millions of bytes more flexibly, and do not worry the problem of capacity.In addition, because the true content of firmware is to be kept in the driver, driver is that the form with document leaves in the hard disk, can change the content of firmware like this by the upgrading driver, makes the upgrading debugging of computer system become very easy.
Fig. 2 is the computer system 200 of one of embodiment of the invention, and wherein a microcontroller 208 is incorporated in the integrated chip 210.In present embodiment, integrated chip 210 can be the chipset that the north and south bridge is integrated.In other embodiment, integrated chip 210 also may be embodied as a peripheral apparatus control circuit, and wherein partial circuit is located in the south bridge, and partial circuit is located in the north bridge.With respect to known ROM (read-only memory) 144 or ROM (read-only memory) 164, the present invention adopts a storage device 250 to store the required firmware of control peripheral devices 150.Because the mode difference that stores so the present invention proposes a kind of method of loading firmware in addition, can move the microcontroller 208 in the integrated chip 210 in the execute phase smoothly.Comprised a special interface circuit (reservation port) 202 in the integrated chip 210, special use is stored in the restricted area 112 of this storer 110 with the external data that will receive.This restricted area 112 can be the isolated area that the firmware of operating system or computer system 200 is divided out by storer deallocation technology (REMAPPING), specializes in special interface circuit 202 storage data.In other words; restricted area 112 can be counted as a virtual bench with special interface circuit 202; after processor 120 writes restricted area 112 by special interface circuit 202 with data; can think that these data have write this virtual bench; rather than in the storer 110; thereby processor 120 can't revise or read restricted area 112 by the mode of reference-to storage 110 after data are write restricted area 112, and the data in the restricted area 112 can be protected and do not rewritten arbitrarily whereby.Can transmit data by direct channel independently between this special interface circuit 202 and this restricted area 112, also or by traditional storage access channel 102 link up.Still comprise a direct access controller 204 in this integrated chip 210, can be used to control the data access of 208 pairs of these qualification restricted areas 112 of this microcontroller.Basically this direct access controller 204 belongs to the element of general chipset indispensability, and the present invention then is the method that realizes firmware loads by its dynamical storage access ability.
For the performance that guarantees to improve system and the continuity of microcontroller 208 work, dispose a memory cache 206 in the integrated chip 210 of the present invention, capacity is approximately 1KB to 2KB, is used for buffer zone as firmware.This memory cache 206 can be a kind of static RAM (SRAM).Basically firmware is made up of a series of order code, and by direct access controller 204, these order codes can be temporarily stored in this memory cache 206 in regular turn, read and carry out for microcontroller 208.
In the present embodiment, this computer system 200 couples a storage device 250, comprising a firmware of these microcontroller 208 special uses.This storage device 250 can be the hard disk or the storage device of other patterns basically, wherein except the firmware that these microcontroller 208 special uses are provided, the driver (driver that comprises a peripheral apparatus control circuit 210 at least) of one operating system and each item also can be provided, use for computer system 200 start runnings.Employed interface between this storage device 250 and the computer system 200, can be advanced supplementary technology interface (SATA) of an integrating apparatus electronic interface (IDE), string type or USB (universal serial bus) (USB) one of them, the present invention is not limited to this.In general, these computer system 200 firmwares own must possess basic low order driver, just have way to be written into an operating system from this storage device 250 after initialization.The firmware function and the initialization procedure of computer system 200 belong to known technology, and the embodiment of the invention is introduced no longer in detail.
In the present embodiment, storer 110 in the computer system 200 and processor 120 normal operations according to the arrangement of operating system.After these computer system 200 initialization, processor 120 is written into the driver of operating system and each item immediately in regular turn to storer 110 from storage device 250, for example the driver of integrated chip 210 and storage device 250.Relevant running in the integrated chip 210 mainly all is responsible for control by the driver of this integrated chip 210.
The firmware of this microcontroller 208 also can be in the directly attached driver that hangs over this integrated chip 210, just directly is loaded in the restricted area 112 by special interface circuit 202 when operating system drives integrated chip 210.When this special interface circuit 202 duplicates this firmware after the action of this restricted area 112 is finished, processor 120 can be sent a successful load signal to operating system, makes computer system 200 continue other tasks.
When the action of access peripherals 150 took place, microcontroller 208 need be according to the firmware control of being correlated with.At first read this restricted area 112, in regular turn one or more order code in this firmware is kept in to memory cache 206, then read this memory cache 206 by this microcontroller 208 again, carry out order code wherein in regular turn by this direct access controller 204.Because the capacity of this memory cache 206 only can be kept in the part order code in the firmware of microcontroller 208, so when the instruction of these microcontroller 208 required execution is not in this memory cache 206, need further to read this firmware in this restricted area 112 to obtain this microcontroller 208 needed instructions by this direct access controller 204.
The present invention can be applied in card reader, solid state hard disc, CD player or other external devices.For instance, if this peripherals 150 is card reader, then microcontroller 208 promptly is a card reader controller, and the collocation firmware is to control this card reader.In general, this microcontroller 208 can be one 8051 chips or an arm processor, utilize circuit again the technology of layout and so on be incorporated in the integrated chip 210.As for the interface between this microcontroller 208 and this peripherals 150, mainly be USB, but also can be personal computer memory card international standard interface (PCMCIA), IEEE 1394 interfaces or SATA interface that the present invention is not limited to this.
Fig. 3 is the firmware loading method process flow diagram of implementing according to Fig. 2.For the operation of more specific description Fig. 2 framework, firmware loading method of the present invention can be put in order and be following flow process.At first in step 301, this computer system 200 starting up are responsible for basic low order running by the firmware of computer system 200, and the inspection flow process of primary element for example is for being written into of operating system carried out preposition preparation.Then in step 303, this computer system 200 begins to be written into operating system.For instance, operating system also can be that storage device 250 by Fig. 2 provides.Known to those skilled in the art, before the driver that is written into integrated chip 210, processor 120 is written into operating system self-storing mechanism 250 in the storer 110 according to the firmware control integrated chip 210 of computer system 200.In step 305, processor 120 is loaded into the driver of this integrated chip 210 in the storer 110 under the control of operating system, and order is moved the order code of driver to finish the driving of integrated chip 210.The driver may command of integrated chip 210 special interface circuit 202 wherein, direct access controller 204, the running of memory cache 206 and microcontroller 208.Microcontroller 208 needed firmware programs can be in the attached driver that hangs over integrated chip 210, also can be independently files.After special interface circuit 202 in integrated chip 210 was subjected to the driver activation of integrated chip 210, the firmware that processor 102 will be under the control of the driver of integrated chip 210 stores in storage device 250 was loaded in the restricted area 112 by special interface circuit 202.After firmware loads to the step of restricted area 112 was finished, processor 120 can send one and load into function signal and give operating system, and expression microcontroller 208 can use.In step 307, by the running of os starting microcontroller 208, the firmware that this microcontroller 208 is carried out in the restricted area 112 by direct access controller 204 and memory cache 206 begins to control the access facility to peripherals 150.And at one time, processor 120 and storer 110 are along with operating system is got back to normal running in step 309.
Fig. 4 is the firmware flowchart among Fig. 3 embodiment.As previously mentioned, the capacity of the memory cache 206 among Fig. 2 only has 1KB or 2KB, therefore once can only be written into one or 208 execution of part order code confession microcontroller in the firmware.The step 307 of Fig. 3 can be described in further detail as follows.At first, in step 401, microcontroller 208 brings into operation.In step 403, this direct access controller 204 is written into one or more order code in regular turn to memory cache 206 from restricted area 112.In step 405, this microcontroller 208 reads and carries out the order code that is taken at soon in this memory cache 206 in regular turn circularly.In step 407, microcontroller 208 can be checked the temporary situation of instruction in the memory cache 206.If the instruction that desire is carried out is not in memory cache 206, then microcontroller 208 can send and require signal to give direct access controller 204, make step get back to 403, from restricted area 112, be written into one or more follow-up order code further by direct access controller 204.In general, can possess programmable counter (PROGRAM COUNTER) in the microcontroller 208, can progressively increase, also can be used for jumping to the order code of particular address along with the execution of order code.As long as therefore set up the corresponding relation of the address and memory cache 206 addresses of restricted area 112, just can make direct access controller 204 correctly from restricted area 112, obtain microcontroller 208 desired order codes, offer this microcontroller 208 by memory cache 206.
In sum, the present invention does not need additionally to increase the firmware that read-only memory element is deposited microcontroller 208, has reduced hardware area and cost effectively.Because the capacity of storer 110 can be up to the number megabyte, the capacity problem that the solution firmware that therefore can fill part is deposited.In addition and since firmware can be a unique file or in be attached in the driver, framework of the present invention is not only upgraded conveniently, also can flexibly adjust test flexibly.Moreover; need to prove; though reduce the possibility that firmware is distorted or damaged by special interface circuit 202 and restricted area 112 in the above embodiment of the present invention; but also can use other mode to protect firmware, or firmware not protected design especially according to concrete use situation.If do not need firmware is protected especially; then the special interface circuit 202 in the present embodiment can be regarded the interface that is used for reading storage device 250 in the common chipset as; promptly only need the firmware in the storage device 250 is copied in the storer 110, but not processor 120 sightless restricted areas 112 in the present embodiment.
The above only is preferred embodiment of the present invention; so it is not in order to limit scope of the present invention; any personnel that are familiar with this technology; without departing from the spirit and scope of the present invention; can do further improvement and variation on this basis, so the scope that claims were defined that protection scope of the present invention is worked as with the application is as the criterion.
Claims (16)
1. a peripheral apparatus control circuit is characterized in that, in order to control a peripherals of a computer system, this computer system comprises a processor and a first memory, and this peripheral apparatus control circuit comprises:
One special interface circuit comprises the firmware of a plurality of order codes and is stored in this first memory in order to receive one;
One second memory is in order to one or more order code of temporary this firmware;
One first controller writes this second memory in regular turn in order to these a plurality of order codes of the firmware that will be stored in this first memory; And
One second controller is in order to carry out order code temporary in this second memory to control this peripherals.
2. peripheral apparatus control circuit according to claim 1 is characterized in that, this special interface circuit special use to be receiving this firmware, and this firmware is stored to a restricted area of this first memory, and wherein this restricted area is not subjected to the access control of this processor.
3. peripheral apparatus control circuit according to claim 1 is characterized in that, this coupled computer systems one storage device comprises this firmware in this storage device; And
After this computer system initialization, this special interface circuit copies to this firmware in this storage device in this first memory.
4. peripheral apparatus control circuit according to claim 3 is characterized in that the initialization procedure of this computer system comprises the driver that is written into an operating system and this peripheral apparatus control circuit; And
This firmware is attached to be hung in the driver of this peripheral apparatus control circuit.
5. peripheral apparatus control circuit according to claim 3, it is characterized in that, when this special interface circuit duplicates this firmware after the action of this first memory is finished, this first controller reads this first memory, in regular turn that one or more instruction in this firmware is temporary to this second memory, read and carry out for this second controller; And
When the instruction of the required execution of this second controller was not in this second memory, this first controller further read this firmware in this first memory to obtain the needed instruction of this second controller;
This second controller is a card reader controller; And
This peripherals is a card reader.
6. peripheral apparatus control circuit according to claim 1 is characterized in that this peripheral apparatus control circuit is packaged in the integrated chip.
7. a computer system is characterized in that, can an external peripherals and a storage device, comprising:
One processor;
One first memory couples this processor;
One special interface circuit receives one in order to this storage device certainly and comprises the firmware of a plurality of order codes and be stored in this first memory;
One second memory is in order to one or more order code of temporary this firmware;
One first controller writes this second memory in regular turn in order to these a plurality of order codes of the firmware that will be stored in this first memory; And
One second controller is in order to carry out order code temporary in this second memory to control this peripherals.
8. computer system according to claim 7 is characterized in that, this special interface circuit special use to be receiving this firmware, and this firmware is stored to a restricted area of this first memory, and wherein this restricted area is not subjected to the access control of this processor.
9. computer system according to claim 7 is characterized in that, after this computer system initialization, this special interface circuit copies to this firmware in this storage device in this first memory.
10. computer system according to claim 7 is characterized in that, this special interface circuit, this second memory, this first controller and this second controller mutual encapsulation are in an integrated chip.
11. computer system according to claim 10 is characterized in that,
The initialization procedure of this computer system comprises the driver that is written into an operating system and this integrated chip; And
This firmware is attached to be hung in the driver of this integrated chip.
12. computer system according to claim 7 is characterized in that,
When this special interface circuit duplicates this firmware after the action of this first memory is finished, this first controller reads this first memory, and is in regular turn that one or more instruction in this firmware is temporary to this second memory, reads and carries out for this second controller; And
When the instruction of the required execution of this second controller was not in this second memory, this first controller further read this firmware in this first memory to obtain the needed instruction of this second controller.
13. the method for a loading firmware, it is characterized in that, can supply a computer system control one peripherals, this computer system comprises a processor, a first memory and a peripheral apparatus control circuit, the external storage device of this computer system stores a firmware that comprises a plurality of order codes in this storage device, this peripheral apparatus control circuit comprises a controller, carry out this firmware to control this peripherals in order to order, the method for this loading firmware comprises:
Be written into an operating system with this computer system of initialization;
After this computer system initialization, this firmware in this storage device is copied in this first memory;
A plurality of order codes of the firmware in this first memory are written into a second memory in this peripheral apparatus control circuit in regular turn; And
Read and carry out this firmware to control this peripherals from this second memory.
14. the method for loading firmware according to claim 13 is characterized in that, is located at the restricted area that special interface circuit in this peripheral apparatus control circuit copies to this firmware this first memory by one.
15. the method for loading firmware according to claim 14 is characterized in that, the step of this computer system of initialization further comprises:
Be written into the driver of this peripheral apparatus control circuit; And
Stop this restricted area to be subjected to the access control of this processor.
16. the method for loading firmware according to claim 14, it is characterized in that, the step of carrying out this firmware in this restricted area comprises: when the order code of the required execution of this controller is not in this second memory, further read this firmware in this restricted area to obtain the needed order code of this controller.
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| CN102193804B (en) * | 2010-03-03 | 2013-11-06 | 华为技术有限公司 | Loading method of drivers in single board and communication equipment |
| US10977057B2 (en) * | 2017-01-23 | 2021-04-13 | Via Labs, Inc. | Electronic apparatus capable of collectively managing different firmware codes and operation method thereof |
| CN110780931A (en) * | 2019-09-25 | 2020-02-11 | 芯创智（北京）微电子有限公司 | Self-adaptive firmware starting method and system |
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| CN1484157A (en) * | 2002-09-20 | 2004-03-24 | 联发科技股份有限公司 | Embedding system and instruction prefetching device and method thereof |
| CN101051279A (en) * | 2007-05-15 | 2007-10-10 | 华为技术有限公司 | Peripheral equipment operation method, peripheral equipment and host |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1484157A (en) * | 2002-09-20 | 2004-03-24 | 联发科技股份有限公司 | Embedding system and instruction prefetching device and method thereof |
| CN101051279A (en) * | 2007-05-15 | 2007-10-10 | 华为技术有限公司 | Peripheral equipment operation method, peripheral equipment and host |
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