CN101276760A - Method for manufacturing wiring substrate with solder protrusion; and wiring substrate - Google Patents
Method for manufacturing wiring substrate with solder protrusion; and wiring substrate Download PDFInfo
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- CN101276760A CN101276760A CNA2008100085324A CN200810008532A CN101276760A CN 101276760 A CN101276760 A CN 101276760A CN A2008100085324 A CNA2008100085324 A CN A2008100085324A CN 200810008532 A CN200810008532 A CN 200810008532A CN 101276760 A CN101276760 A CN 101276760A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13016—Shape in side view
- H01L2224/13018—Shape in side view comprising protrusions or indentations
- H01L2224/13019—Shape in side view comprising protrusions or indentations at the bonding interface of the bump connector, i.e. on the surface of the bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Abstract
This invention provides a manufacturing method of a wiring base plate with a component, a manufacturing method of the wiring base plate with a solder embossment and a wiring base plate capable of reducing the measuring value of complanarity of the solder embossment and preventing generating the gap. In the forming process of the solder embossment, a top (27) of a plurality of solder embossments (22) is flatted and roughened. In the supply process of solder, a welding fluid (28) is supplied to the top (27) of a plurality of solder embossments (22) which is flatted and roughened. In the process of heating and melting, a plurality of connecting terminals (47) on an IC chip (45) and a plurality of solder embossments (22) whose welding fluid supply is finished are correspondingly configured, and under this state, a plurality of solder embossments (22) is heated and melted. So the welding fluid (28) contained in the solder embossments (22) is heated, melted, gasified and realistically discharged to the external from the top (27) in the process of the heating and melting.
Description
Technical field
The present invention relates to the solder protuberance that disposes on circuit board is carried out the manufacture method of the circuit board that has parts of planarization, the manufacture method of circuit board with solder protuberance and the circuit board that solder protuberance has been flattened.
Background technology
In the past, knownly be used to carry the circuit board (semiconductor packages) that is formed with solder protuberance on the pad of electronic unit.As this circuit board, have ball grid array (BGA), contact pin grid array all kinds such as (PGA).And,, can electronic unit be installed to high-density by the upside-down mounting mode for the solder protuberance that this circuit board has.In addition, solder protuberance is for example by formation such as soldering paste methods.Particularly, on the pad of circuit board upper surface, print and the Reflow Soldering slip.Thus, form the solder protuberance of the shape of hemispherical protuberances.
Yet,, be preferably formed in the height alignment of each solder protuberance on the circuit board for the zygosity that improves circuit board and electronic unit etc.In other words, preferably the measured value of the coplanarity of each solder protuberance (Coplanarity) is little.In addition, the height of solder protuberance depends on the volume of scolder or the area of pad etc.Yet, produce the little solder protuberance (present generation rate is 2～3%) of the volume be called as LVSB (Low Volume SolderBump) etc., thereby the height of each solder protuberance produces deviation.Its result, the measured value of coplanarity increases, and produces the possibility of bad connection between existence and the electronic unit.
Therefore, following technology (for example with reference to patent documentation 1) has been proposed: as shown in figure 18, above each solder protuberance 52 that forms on the circuit board 51, settle anchor clamps 61, and push etc. with 61 pairs of each solder protuberances 52 of anchor clamps, planarization (with reference to the dotted portion of Figure 18) is carried out at the top of each solder protuberance 52.Like this, the generation of LVSB can be prevented, and then the measured value of the coplanarity of each solder protuberance 52 can be reduced.In addition, on the circuit board 51 that has been flattened at the top of each solder protuberance 52, the following lift-launch (with reference to Figure 19) of carrying out electronic unit 71.At first, the splicing ear 72 of electronic unit 71 sides and the solder protuberance 52 of circuit board 51 sides are carried out aligned in position.And, heat, solder protuberance 52 is refluxed, thereby solder protuberance 52 and splicing ear 72 are engaged.Thus, electronic unit 71 is carried on the circuit board 51.
Patent documentation 1: the open 2004-6926 communique (Fig. 2 etc.) of Japan Patent
Yet,, when welding, supply with solder flux 53 (with reference to Figure 19) usually to the top of solder protuberance 52 in order to improve the zygosity with electronic unit 71.This solder flux 53 is gasification when refluxing, and from emitting to the outside with the joint interface of splicing ear 72, still is not trapped in the solder protuberance 52 because of emitting easily.Therefore its result in the joint interface generation space of solder protuberance 52 and splicing ear 72, and produces unfavorable condition when being connected with electronic unit 71.
Summary of the invention
The present invention has considered the problems referred to above, its purpose is to provide a kind of measured value that can reduce the coplanarity of solder protuberance, and can prevent to produce the manufacture method of the circuit board that has parts in space, the manufacture method of circuit board with solder protuberance and the circuit board with solder protuberance.
And, as being used for solution to the problems described above (method 1), a kind of manufacture method that has the circuit board of parts, this circuit board that has parts is engaged by a plurality of splicing ears that dispose on a plurality of solder protuberances that dispose on the face side of circuit board main body and the bottom surface side at parts and forms, it is characterized in that, comprise following operation: the solder protuberance forming process, planarization and roughening are carried out in the top of a plurality of solder protuberances; Solder flux is supplied with operation, to being flattened and solder flux is supplied with at the above-mentioned top of above-mentioned a plurality of solder protuberances of roughening; And the heating and melting operation, the above-mentioned a plurality of splicing ears on the above-mentioned parts are disposed accordingly with above-mentioned a plurality of solder protuberances of finishing the solder flux supply, and under this state, above-mentioned a plurality of solder protuberances are carried out heating and melting.
Thereby, manufacture method according to method 1, therefore in the solder protuberance forming process, the top of a plurality of solder protuberances is flattened, can be conscientiously and easily to obtain coplanarity excellent and have a circuit board that has parts that is suitable for the solder protuberance group who is connected of parts.And in the solder protuberance forming process, the top of a plurality of solder protuberances is roughened and forms small concavo-convexly, therefore piles up solder flux in this part easily.In addition, be formed on the concavo-convex gas drain passageway that becomes the solder flux of gasification when heating and melting on the top of solder protuberance, therefore the solder flux of gasification passes the gas drain passageway and is released to the outside from the top effectively.Therefore, can prevent to be trapped in the space generation that causes in the solder protuberance owing to the solder flux of gasification.Thereby the connection reliability of the splicing ear of solder protuberance and parts improves.
In addition, as another method that addresses the above problem (method 2), a kind of manufacture method with circuit board of solder protuberance is characterized in that, comprise following operation: the solder protuberance arrangement step, dispose a plurality of solder protuberances in the face side of circuit board main body; With the solder protuberance forming process, planarization and roughening are carried out in the top of above-mentioned a plurality of solder protuberances.
Therefore thereby according to the manufacture method of method 2, in the solder protuberance forming process, the top of a plurality of solder protuberances is flattened, can be conscientiously and easily to obtain coplanarity excellent and have a circuit board that is suitable for the solder protuberance that is connected with miscellaneous part.And in the solder protuberance forming process, the top of a plurality of solder protuberances is roughened and forms small concavo-convexly, therefore piles up solder flux in this part easily.In addition, be formed on the concavo-convex gas drain passageway that becomes the solder flux of gasification when solder protuberance is carried out heating and melting on the top of solder protuberance, therefore the solder flux of gasification passes the gas drain passageway and is released to the outside from the top effectively.Therefore, can prevent to be trapped in the generation that causes the space in the solder protuberance owing to the solder flux of gasification.Thereby the connection reliability of solder protuberance and miscellaneous part improves.
As the substrate (circuit board main body) that constitutes the circuit board among the present invention, can comprise the substrate that constitutes based on resin material or ceramic material etc. etc.As the concrete example of the substrate that constitutes based on resin material, EP resin (epoxy resin) substrate, PI resin (polyimide resin) substrate, BT resin (bismaleimides-cyanate resin) substrate are arranged, reach PPE resin (polyphenylene oxide resin) substrate etc.In addition, also can use the substrate that constitutes by the composite material of organic fibers such as above-mentioned resin and glass fibre (glass woven or glass nonwoven fabrics) or Fypro.Perhaps also can use substrate that the resin-resin composite materials by thermosetting resins such as epoxy resin-impregnated on three-dimensional network shape fluorine-type resin base materials such as continuous poriferous matter PTFE constitutes etc.In addition, as the concrete example of the substrate that constitutes based on ceramic material, substrate that is made of ceramic materials such as aluminium oxide, aluminium nitride, boron nitride, carborundum, silicon nitrides etc. is arranged.
Solder alloy as the formation material that becomes solder protuberance, can suitably select according to the material of the splicing ear of the parts that carried etc. etc., comprise Pb-Sn class scolders such as 90Pb-10Sn, 95Pb-5Sn, 40Pb-60Sn, Sn-Sb class scolder, Sn-Ag class scolder, Sn-Ag-Cu class scolder, Au-Ge class scolder, Au-Sn class scolder, and Au-Si class scolder etc.Particularly, preferred above-mentioned a plurality of solder protuberances are made of lead-free solder.Like this, not leaded in solder protuberance, therefore can reduce the environmental pressure of circuit board.In addition, lead-free solder is compared wetability (moistening れ) with leaded scolder poor, and therefore the trend that exists the generation in space to increase if the top roughening of solder protuberance made emit solder flux easily, then can more effectively prevent the generation in space.Here, as lead-free solder, comprise Sn-Sb class scolder, Sn-Ag class scolder, Sn-Ag-Cu class scolder, Au-Ge class scolder, Au-Sn class scolder, reach Au-Si class scolder etc.
In addition, solder protuberance is heated fusion in above-mentioned heating and melting operation (engaging the operation of above-mentioned parts), thereby owing to surface tension is varied to spherically, highly increases.Therefore, in above-mentioned solder protuberance forming process, the diameter if the top of solder protuberance increased planarization with the top increases, then when carrying out the heating and melting operation top fully near the splicing ear of parts.Therefore, even under the bigger situation of the measured value of the coplanarity at the top of solder protuberance, solder protuberance and splicing ear also engage easily.
Preferably in above-mentioned solder protuberance forming process, use to have the extrusion clamp of extruding with matsurface, push a plurality of solder protuberances the top so that its highly align, thereby carry out roughening when above-mentioned top carried out planarization.Like this, can make the circuit board of said method 1,2 effectively.
In addition, when carrying out the solder protuberance forming process, can heat extrusion clamp, also can not heat by heating units such as heaters.When extrusion clamp was heated, solder protuberance softened to a certain degree.Therefore, compare the solder protuberance easy deformation when carrying out at normal temperatures, can too increase the stress of extrusion clamp and make the top flattening of solder protuberance effectively.On the other hand, when extrusion clamp not being heated, do not need heating unit, therefore can make the top flattening of solder protuberance with simple structure.
Here, preferred above-mentioned extrusion clamp by ceramic materials such as titanium or stainless steel and other metal materials, aluminium oxide, silicon nitride, carborundum, boron nitride, and glass material etc. constitute the material of preferably not moistening (or being difficult to moistening) scolder.Particularly, preferred above-mentioned extrusion clamp and distortion few ceramic material that by heat caused high by machining accuracy constitutes.In addition, the extruding matsurface of preferred extrusion clamp is the plane.Like this, extruding force is applied on each solder protuberance equably, therefore can carry out planarization to the top of each solder protuberance accurately.
And then, as another method that addresses the above problem (method 3), a kind of manufacture method with circuit board of solder protuberance is characterized in that, comprise following operation: the solder protuberance arrangement step, dispose a plurality of solder protuberances in the face side of circuit board main body; With the solder protuberance forming process, roughening is carried out at the top of above-mentioned a plurality of solder protuberances.
Thereby according to the manufacture method of method 3, in the solder protuberance forming process, the top of a plurality of solder protuberances is roughened and forms small concavo-convexly, therefore piles up solder flux in this part easily.In addition, be formed on the concavo-convex gas drain passageway that becomes the solder flux of gasification when solder protuberance is carried out heating and melting on the top of solder protuberance, therefore the solder flux of gasification passes the gas drain passageway and is released to the outside from the top effectively.Therefore, can prevent to be trapped in the generation that causes the space in the solder protuberance owing to the solder flux of gasification.Thereby the connection reliability of solder protuberance and miscellaneous part improves.
In addition, as another method that addresses the above problem (method 4), a kind of manufacture method that has the circuit board of parts, this circuit board that has parts is engaged by a plurality of splicing ears that dispose on a plurality of solder protuberances that dispose on the face side of circuit board main body and the bottom surface side at parts and forms, it is characterized in that, comprise following operation: the solder protuberance forming process, roughening is carried out at the top of a plurality of solder protuberances; Supply with operation with solder flux, supply with solder flux to the above-mentioned top of the above-mentioned a plurality of solder protuberances that are roughened.
Thereby according to the manufacture method of method 4, in the solder protuberance forming process, the top of a plurality of solder protuberances is roughened and forms small concavo-convexly, therefore piles up solder flux in this part easily.In addition, be formed on the concavo-convex gas drain passageway that becomes the solder flux of gasification when solder protuberance is carried out heating and melting on the top of solder protuberance, therefore the solder flux of gasification passes the gas drain passageway and is released to the outside from the top effectively.Therefore, can prevent to be trapped in the generation that causes the space in the solder protuberance owing to the solder flux of gasification.Thereby the connection reliability of solder protuberance and miscellaneous part improves.
In addition, the whole surface of solder protuberance is covered by the fusing point oxide-film higher than solder protuberance, even therefore arrive the fusing point of solder protuberance by heating, solder protuberance also is difficult to fusion (backflow).Therefore, be difficult to engage solder protuberance and miscellaneous part.Therefore, above-mentioned a plurality of solder protuberances before supplying with above-mentioned solder flux have concavo-convex at above-mentioned top, and under the situation of whole surface with the oxide-film covering, preferably supply with in the operation, melt above-mentioned oxide-film by supplying with solder flux to the above-mentioned top of above-mentioned a plurality of solder protuberances at above-mentioned solder flux.Thus, the part that is melted at oxide-film is exposed the surface of solder protuberance.Its result, solder protuberance begins fusing when arriving the fusing point of solder protuberance, so the easy fusion of solder protuberance, and solder protuberance is connected easily with miscellaneous part.In addition, the top of solder protuberance has concavo-convex, so solder flux remains on this part effectively.Therefore, the preferential easily oxide-film from the top begins fusing.
In addition, as another method that addresses the above problem (method 5), a kind of circuit board with solder protuberance, it is characterized in that, the top has been flattened and a plurality of solder protuberances of roughening are configured on the surface of circuit board main body, and the measured value of the coplanarity at above-mentioned top is every 1cm
2Below 10 μ m, and surface roughness Ra is more than the 0.3 μ m, below the 5 μ m.
Thereby according to the circuit board of method 5, the top of a plurality of solder protuberances is flattened, and the measured value of coplanarity is every 1cm
2Therefore conscientiously and be connected with miscellaneous part easily below 10 μ m.If the measured value of coplanarity is every 1cm
2Greater than 10 μ m, then on the height of each solder protuberance, produce deviation, produce the possibility of bad connection between existence and the miscellaneous part.
And the top of a plurality of solder protuberances is roughened, and surface roughness Ra is more than the 0.3 μ m, below the 5 μ m, so the solder flux that contains in the solder protuberance gasifies when being heated fusion, is released to the outside from the top effectively.Therefore, can prevent to be trapped in the generation that causes the space in the solder protuberance owing to the solder flux of gasification.If surface roughness Ra is less than 0.3 μ m, then Qi Hua solder flux is trapped in the solder protuberance easily, is easy to generate the space.On the other hand, if surface roughness Ra greater than 5 μ m, then produces deviation on the height of each solder protuberance, there is the possibility of the measured value increase of coplanarity.Its result, the bond strength of solder protuberance and miscellaneous part can reduce.In addition, because surface roughness Ra forms dark recess greater than 5 μ m at the top of solder protuberance, the solder flux that therefore is trapped in recess can be difficult to be released to the outside.
Here, " coplanarity " expression described in this specification is with the terminal lowest surface uniformity of " method of measurement of the specification EIAJ ED-7304BGA of EIAJ given size " definition.And " measured value of coplanarity " is the measured value with " method of measurement of ED-7304BGA given size " definition, is the uniformity of the top of a plurality of solder protuberances of expression with respect to the surface of circuit board main body.In addition, " surface roughness Ra " described in the present invention is meant the arithmetic average roughness Ra with JIS B0601 definition.In addition, the method for measurement of surface roughness Ra is a standard with JIS B0651.
Description of drawings
Fig. 1 is the brief configuration figure of the solder protuberance planarizer of expression first execution mode.
Fig. 2 is the concise and to the point vertical view of the circuit board before the solder protuberance forming process is implemented.
Fig. 3 is the concise and to the point cutaway view of the circuit board before the solder protuberance forming process is implemented.
Fig. 4 is the major part cutaway view of the circuit board after expression IC chip and solder protuberance forming process are implemented.
Fig. 5 is the key diagram of heating and melting operation.
Fig. 6 is the key diagram of heating and melting operation.
Fig. 7 is the key diagram of comparative example 1.
Fig. 8 is the key diagram of comparative example 1.
Fig. 9 is the key diagram of comparative example 1.
Figure 10 is the key diagram of comparative example 2.
Figure 11 is the key diagram of comparative example 2.
Figure 12 is the key diagram of comparative example 2.
Figure 13 is the major part cutaway view of the circuit board after the solder protuberance forming process in expression second execution mode is implemented.
Figure 14 is the major part cutaway view of the circuit board when representing the enforcement of solder flux supply operation similarly.
Figure 15 is the key diagram of expression heating and melting operation similarly.
Figure 16 is the key diagram of expression heating and melting operation similarly.
Figure 17 is the major part cutaway view of the circuit board after the solder protuberance forming process in other execution modes of expression is implemented.
Figure 18 is the key diagram of solder protuberance forming process of the prior art.
Figure 19 is the major part cutaway view of the circuit board after expression IC chip and solder protuberance are shaped similarly.
Embodiment
First execution mode
Below, describe in detail the first specific execution mode of the present invention according to Fig. 1～Fig. 6.
Fig. 1 is the synoptic diagram of solder protuberance planarizer 10.Fig. 2 is the concise and to the point vertical view that is placed in the circuit board 11 on this solder protuberance planarizer 10, and Fig. 3 is the concise and to the point cutaway view at same position.As shown in Figure 1, solder protuberance planarizer 10 comprise last anchor clamps 13 as extrusion clamp, as the lower clamp 14 of support fixture and be used for circuit board 11 is placed in mobile anchor clamps 15 on the lower clamp 14 etc.
Shown in Fig. 2, Fig. 3 etc., the circuit board 11 of present embodiment is the semiconductor packages that can tackle contact pin grid array (PGA) type of the sub-high density flip-chip connections of multiterminal such as MPU.Particularly, this circuit board 11 is on the upper and lower surface of the central layer that is made of the resins such as bismaleimides-triazine that contain glass fibre, by the known method lamination multi-layer wire substrate of a plurality of resin insulating barriers.This multi-layer wire substrate is that thickness is about 1mm, the square flat-shaped part of greatly about 40mm, has not shown copper wiring between each resin insulating barrier.
The square area of the substantial middle on the surface 20 (upper surface of Fig. 3) of the circuit board main body 12 of formation circuit board 11 is that projection forms regional AR1.In projection formed regional AR1, a plurality of pads 21 that are used to engage IC chip 45 (with reference to Fig. 4 etc.) were arranged with clathrate roughly and are formed, and are formed with solder protuberance 22 on each pad 21.Pad 21 is formed by a plurality of coating, and diameter is set to 150 μ m, and thickness is set to 20 μ m.Solder protuberance 22 is printing and Reflow Soldering slips and forming on the pad 21 on the surface 20 of circuit board 11, has the shape of hemispherical protuberances.In addition, the solder protuberance 22 of present embodiment is made of the Sn-Ag class scolder as lead-free solder.
In addition, the whole zone at the back side 23 of circuit board main body 12 (lower surface of Fig. 3), a plurality of pads 24 are arranged with clathrate roughly and are formed, and have by solder joints on each pad 24 and insert a plurality of stitch 25 that usefulness is installed.In addition, be welded at each stitch 25 of the back side of circuit board 11 23 sides configurations welding projection 22 high scolders by fusing point specific surface 20 sides.
Shown in Fig. 3 waited, each stitch 25 had section and is circular axial region and the diameter head 26 greater than this axial region.And 26 pairs of pads 24 of head are welded.In addition, each stitch 25 is arranged to the stitch patchhole of not shown special-purpose positioning fixture once, joins circuit board 11 to by a welding sequence.Therefore, the positional precision between each stitch 25 on the circuit board 11 is than higher.
Above-mentioned mobile anchor clamps 15 shown in Figure 1 are moved in the horizontal direction along transmitting rail by not shown conveyer, and move in vertical direction under four jiaos the state that supports circuit board 11.Move by this horizontal/vertical that moves anchor clamps 15, circuit board 11 is arranged to lower clamp 14.
The above-mentioned lower surface of going up anchor clamps 13 is smooth extruding matsurface 30.In the present embodiment, extruding is set to every 1cm with the flatness of matsurface 30
2Below 10 μ m, extruding is set at 0.4 μ m with the surface roughness Ra of matsurface 30.Last anchor clamps 13 are driven downwards by not shown pressue device (pneumatic press or hydraulic press etc.), push above-mentioned solder protuberance 22 by extruding with matsurface 30.Thus, solder protuberance 22 is flattened, and the upper surface at the top 27 of solder protuberance 22 is roughened (with reference to Fig. 4).In addition, in the present embodiment, by anchor clamps 13 on ceramic material (boron nitride) formation.
As shown in Figure 1, above-mentioned lower clamp 14 in the central portion have the outstanding support portion 31 of quadrangular shape.The front end face of support portion 31 (upper surface) is the contact-making surface 32 that can contact with the back side 23 of above-mentioned circuit board main body 12.On the contact-making surface 32 of support portion 31, a plurality of stitch consents of opening (Pin Spill Port) 34 become clathrate with the spacing arrangement that equates with above-mentioned stitch 25 upward.
In the stitch consent 34 of present embodiment, the dark part of ratio open portion such as forms at section shape, and peristome forms along with increasing gradually near openend (upper end) sectional area on the other hand.In addition, the peristome of this stitch consent 34 has the aperture that big I is held the head 26 of stitch 25, has with respect to the diameter of stitch front that some are more than needed.In addition, the support portion 31 of lower clamp 14 is preferably formed by the high metal material of mechanicalness intensity, for example uses to comprise tungsten/carbide (WC) and the formation of cobalt superhard alloys such as (Co).
As shown in Figure 1, on the solder protuberance planarizer 10 of present embodiment, be provided with the electrothermal heater 41,42 that is used for last anchor clamps 13 and lower clamp 14 are heated to predetermined temperature.By under 41,42 pairs of each anchor clamps 13,14 heated state of this electrothermal heater, carry out the planarization and the roughening at the top 27 of above-mentioned solder protuberance 22.
Shown in Figure 4 be flattened and the solder protuberance 22 of roughening on, the height from the surface 20 of above-mentioned circuit board main body 12 to the top 27 of solder protuberance 22 is set to 30 μ m in the present embodiment.In addition, the surface roughness Ra at top 27 is set to 0.4 μ m, produces concavo-convex on the tabular surface at top 27.And then the extruding of the measured value of the coplanarity at top 27 and last anchor clamps 13 equates with the flatness of matsurface 30, is set to every 1cm
2Below 10 μ m.
In addition, be flattened and the maximum gauge of the solder protuberance 22 of roughening preferably is set to more than 0.5 times of diameter of above-mentioned pad 21, below 1.2 times.If the maximum diameter of solder protuberance 22 is greater than 1.2 times of the diameter of pad 21, then when solder protuberance 22 heating and meltings being engaged above-mentioned IC chip 45, exist the scolder that overflows from pad 21 to contact and risk of short-circuits with the solder protuberance 22 of adjacent pad 21.On the other hand, if the maximum diameter of solder protuberance 22 is less than 0.5 times of pad 21, even then solder protuberance 22 heating and meltings are also less increased, top 27 is difficult to the splicing ear 47 near IC chip 45, therefore is difficult to solder protuberance 22 and splicing ear 47 are engaged.In addition, in the present embodiment, the diameter of pad 21 is 150 μ m, so the maximum diameter of solder protuberance 22 is preferably more than the 75 μ m, below the 180 μ m.In addition, the diameter at the top 27 of solder protuberance 22 preferably is set to more than 0.5 times of maximum diameter of solder protuberance 22, less than 1.0 times, more preferably is set to more than 0.8 times of maximum diameter of solder protuberance 22, less than 1.0 times.If the diameter at top 27 is less than 0.5 times of the maximum diameter of solder protuberance 22, then can't fully be deposited on the tabular surface at top 27 by required solder flux 28 when engaging IC chip 45.On the other hand, if the diameter at top 27 is at more than 1.0 times of maximum diameter of solder protuberance 22, then when solder protuberance 22 heating and meltings were engaged IC chip 45, the scolder at existence formation top 27 contacted and risk of short-circuits with the solder protuberance 22 of adjacent pad 21.In addition, in the present embodiment, the maximum diameter of solder protuberance 22 is more than the 75 μ m, below the 180 μ m, so the diameter at top 27 is preferably more than the 37.5 μ m, less than 180 μ m.
Next, the manufacture method to the circuit board in the present embodiment 11 circuit board of parts (and have) describes.
Following manufacturing circuit board 11.At first, on central layer, form the resin insulating barrier that constitutes by epoxy resin, and on the surface of central layer and resin insulating barrier, form the copper wiring by the semi-additive process of using electroless plating copper and electrolytic copper plating.Thus, form circuit board main body 12.In addition, also can form the copper wiring by subraction or full additive method.
Next, on a plurality of positions on the surface 20 of circuit board main body 12, implement electroless Ni-P plating, and then implement electroless plating Au, thereby form the pad 21 that constitutes by Ni-P coating and Au coating.In addition, on the surface 20 of circuit board main body 12, do not form the position of pad 21, use acrylic resin or epoxy resin etc. to form solder resist 19 (with reference to Fig. 4 etc.).
And, in the solder protuberance arrangement step, on the pad 21 that forms on the surface 20 of circuit board main body 12, use not shown metal mask to print solder paste.And, the circuit board main body 12 that is printed with solder paste is configured in the reflow ovens, be heated to the temperature higher 10～40 ℃ than the fusing point of scolder, cool off then.Thus, a plurality of solder protuberances 22 of hemispherical protuberances shape are configured in surface 20 sides of circuit board main body 12.In addition, on the back side 23 of circuit board main body 12, form a plurality of pads 24, welding stitch 25 on each pad 24.Its result, circuit board 11 completes (with reference to Fig. 1～Fig. 3).
Next, with circuit board 11 surperficial 20 sides towards above state under be arranged on the mobile anchor clamps 15.In addition, will go up anchor clamps 13 by electrothermal heater 41,42 and lower clamp 14 is heated to 110 ℃.And,, make circuit board 11 support by the support portion 31 of lower clamp 14 by the transmission and the lifting action of mobile anchor clamps 15.Its result, on the back side 23 of circuit board 11, a plurality of stitch 25 in the supported regional AR2 (with reference to Fig. 1, Fig. 3) are directed to the stitch consent 34 that is formed on the support portion 31 effectively, and circuit board 11 is supported under the state of being close to the contact-making surface 32 of support portion 31.
And, in the solder protuberance forming process, anchor clamps 13 are descended, use each solder protuberance 22 on the circuit board 11 is pushed in the extruding of anchor clamps 13 with matsurface 30 top 27.At this moment, pushing each top 27 highly aligns it.Like this, pressure (being 0.07Kg in the present embodiment on each scolder) is applied on the top 27 of each solder protuberance 22 conscientiously and equably, and it is that solder protuberance 22 is roughened when being flattened that the result of collapsing is pressed at top 27.Then, be through with transmission and the lifting action of circuit board 11 by mobile anchor clamps 15 of solder protuberance forming process is sent to the device outside.Then, in solder flux is supplied with operation, to being flattened and solder flux 28 are supplied with at the top 27 of each solder protuberance 22 of roughening.In addition, as the method for supplying with solder flux 28, comprise aqueous solder flux 28 is applied to method on the top 27, aqueous solder flux 28 is supplied to method on the top 27, makes the method for the foam type that foamed solder flux 28 contacts with top 27 and vaporific solder flux 28 is blown to aerosol method on the top 27 etc. by the solder flux spreader.In addition, the kind of solder flux 28 is not particularly limited, and can use existing known solder flux.
And then, in the heating and melting operation, make the solder flux that disposes on surface 20 sides of a plurality of splicing ears of disposing on bottom surface 46 sides of IC chip 45 47 and circuit board 11 supply with a plurality of solder protuberances 22 that finish and dispose (with reference to Fig. 4) accordingly.And, under this state with each solder protuberance 22 heating and melting (backflow), thereby solder flux 28 is gasified, and each solder protuberance 22 and each splicing ear 47 engage (with reference to Fig. 5, Fig. 6).Thus, the circuit board that have parts of IC chip 45 lift-launchs on circuit board 11 completes.
Next, evaluation method and result thereof to coplanarity and space are described.
At first, following preparation measurement sample.The substrate of the solder protuberance identical with present embodiment 22 solder protuberance of roughening (be flattened and) is disposed in preparation, and with this as embodiment.In addition, prepare to dispose and be not flattened and the substrate 82 (with reference to Fig. 7) of the solder protuberance 81 of roughening, and with this as a comparative example 1.And then, prepare to dispose the substrate 92 (with reference to Figure 10) of solder protuberance same as the prior art 91 (be flattened and be not roughened solder protuberance), and with this as a comparative example 2.In addition, the surface roughness Ra at the top 27 of the solder protuberance 22 of embodiment is made as 0.4 μ m, the surface roughness Ra at the top of the solder protuberance 91 of comparative example 2 is made as 0.05 μ m.
Next, each measurement being carried out coplanarity with sample (embodiment, comparative example 1,2) measures.In addition, in order to improve the reliability of evaluation, change is measured with the making day of sample implementing twice measurement.In addition, can't measure and the coplanarity of the solder protuberance 22,91 that is flattened is measured with the coplanarity that identical measuring appliance is implemented the solder protuberance 81 that is not flattened.Therefore, measure the measuring appliance that uses Solvision company to make, measure the measuring appliance that uses カ ノ Co., Ltd. to make in the coplanarity of solder protuberance 22,91 in the coplanarity of solder protuberance 81.
Carry out the result that coplanarity is measured, the measured value maximum of the coplanarity of the solder protuberance 81 of the comparative example 1 that is not flattened.On the other hand, the solder protuberance 91 of the solder protuberance 22 of embodiment and comparative example 1 confirms all can reduce the measured value of coplanarity.In addition, confirm that carrying out the result that the second time, coplanarity was measured also is the result identical with primary measurement.
In addition, each measurement is carried out the measurement in space with sample (embodiment, comparative example 1,2).Particularly, engage with solder protuberance 22,81,91 with at the splicing ear 102 that the bottom surface side of simulating mould (dummy die) 101 disposes, and observe the state of this moment, thereby carry out the measurement (with reference to Fig. 8, Fig. 9, Figure 11, Figure 12 etc.) in space.Particularly, to before simulation mould 101 engages unconfirmed go out the space, but confirm for the first time that behind simulation mould 101 joints the position in space carries out the observation of X-ray diffraction device (XRD) (XRD observation), the number in space is counted.In addition, by the section of solder protuberance 22,81,91 is observed (cross-sectional view), also the number in space is counted.In addition, for the reliability of the evaluation that improves various observations, change is measured with the making day of sample respectively implementing twice measurement.In addition, also can carry out the measurement in space applying and making under the state of heat of the required temperature uniform temp of solder protuberance 22,81,91 heating and meltings.
Observe the result that the number in space is counted by XRD, confirm on the solder protuberance 91 of comparative example 2, to produce maximum spaces 93.On the other hand, the number of confirming on the solder protuberance 22,81 of embodiment and comparative example 1 space that produces is less than comparative example 2.In addition, the number of confirming the space that produces on the number in the space that produces on the solder protuberance 22 of embodiment and solder protuberance 81 at comparative example 1 does not almost have difference.In addition, the number in space is counted once more, confirmed to have identical result with primary XRD observation by secondary XRD observation.
In addition, the result by cross-sectional view is counted the number in space has produced more space 93 on the solder protuberance 91 of comparative example 2.Particularly, in comparative example 2, produced space 93 on 9 solder protuberances 91 in 98, the generation rate in space 93 is 9/98=about 9.2%.On the other hand, the number of confirming on the solder protuberance 22,81 of embodiment and comparative example 1 space that produces is less than comparative example 2.Particularly, in an embodiment, produced the space on 2 solder protuberances 22 in 98, the generation rate in space is 2/98=about 2.0%.In comparative example 1, produced the space on the solder protuberance 81 in 98, the generation rate in space is 1/98=about 1.0%.In addition, confirm that the space 93 that produces is bigger than the space that produces on the solder protuberance 22,81 at embodiment and comparative example 1 on the solder protuberance 91 of comparative example 2.In addition, confirm that the quantity in the space of generation on quantity in the space that produces on the solder protuberance 22 of embodiment is than the solder protuberance 81 at comparative example 1 is many slightly, but equal and opposite in direction.
And then, carry out secondary cross-sectional view, the number in the space of generation on the solder protuberance 81,91 of comparative example 1,2 is counted once more.In addition, the number in the space that produces on the solder protuberance 22 of embodiment and the situation of comparative example 1 are roughly the same, therefore specially do not carry out secondary cross-sectional view.Consequently, confirm to have found the trend identical with primary cross-sectional view.That is, in comparative example 2, produce space 93 on three solder protuberances 91 in 144, the generation rate in space 93 is 3/144=about 2.0%.On the other hand, in comparative example 1, produce the space on the solder protuberance 81 in 144, the generation rate in space is 1/144=about 0.7%.
Thus, confirm that the measured value of coplanarity of solder protuberance 22,91 of embodiment and comparative example 2 is greater than the measured value of the coplanarity of the solder protuberance 81 of comparative example 1.Thereby, proved if embodiment and comparative example 2 are used in circuit board 11, then with simulation mould 101 being connected of splicing ear 102 be difficult to produce unfavorable condition.But, confirmed to Duo in the space that produces on number in the space 93 that produces on the solder protuberance 91 of comparative example 2 is than the solder protuberance 22,81 at embodiment and comparative example 1 and greatly.Thereby it is little and produce the also little embodiment of possibility in space to have confirmed on circuit board 11 to be fit to the measured value of coplanarity.
Thereby, can access following effect according to present embodiment.
(1) in the circuit board 11 of present embodiment, the top 27 of a plurality of solder protuberances 22 is flattened in the solder protuberance forming process, and the measured value of coplanarity is every 1cm
2Below 10 μ m, therefore with can carry out conscientiously and easily being connected of splicing ear 47 of IC chip 45.Therefore, can prevent the generation of a part and the problem (open circuit fault) that splicing ear 47 is in not-connected status of solder protuberance 22.
And the top 27 of each solder protuberance 22 is roughened in the solder protuberance forming process, and making surface roughness Ra is 0.4 μ m, forms small concavo-convexly on the tabular surface at top 27, therefore piles up solder flux 28 in this part easily.Therefore in addition, be formed on the concavo-convex gas drain passageway that becomes the solder flux of gasification when heating and melting on the top 27, the solder flux 28 of gasification passes the gas drain passageway and 27 is released to the outside from the top effectively.Therefore, can prevent to be trapped in the generation that causes the space in the solder protuberance 22 owing to the solder flux 28 of gasification.Thereby solder protuberance 22 improves with the connection reliability of the splicing ear 47 of IC chip 45.
(2) in the present embodiment, produce concavo-convexly on the tabular surface at top 27, the solder flux 28 that the zygosity of splicing ear 47 is improved is deposited on the top 27 easily, and therefore solder flux 28 contacts with splicing ear 47 easily in the heating and melting operation.Therefore, solder protuberance 22 improves with the zygosity of splicing ear 47.
(3) in the present embodiment, when extruding solder protuberance 22, on supported regional AR2, concentrate extruding force easily, but can support supported regional AR2 by the support portion 31 of lower clamp 14 on the whole.Therefore, can prevent the distortion of circuit board 11, can be conscientiously and easily obtain having the solder protuberance group's of coplanarity excellence circuit board 11.Therefore, can a plurality of solder protuberances 22 that projection forms in the regional AR1 be pushed and planarization effectively by last anchor clamps 13.
Second execution mode
Next, describe in detail the second specific execution mode of the present invention according to Figure 13～Figure 16.Be that the center describes here, common part is marked with identical parts label, omit its explanation with the part different with first execution mode.
In the present embodiment, be that with the difference of above-mentioned first execution mode on the solder protuberance of supplying with between the solder flux 28 111, top 112 has concavo-convex, and whole surface is covered by oxide-film 113, and not by solder protuberance planarizer 10 planarizations (with reference to Figure 13).Below, the manufacture method of the circuit board 11a (circuit board that has parts) in the present embodiment is described.
At first, in the solder protuberance arrangement step, the circuit board main body 12 that will be printed with solder paste on pad 21 is configured in the reflow ovens, is heated to the temperature higher 10～40 ℃ than the fusing point of scolder.At this moment, with the solder paste fusion, become the solder protuberance 111 of the shape of hemispherical protuberances.Next, in the solder protuberance forming process, on circuit board 11a, dispose metal pattern (not shown), under the matsurface state of contact that makes metal pattern on the surface of solder protuberance 111, with solder protuberance 111 coolings.Its result forms the solder protuberance 111 (with reference to Figure 13) that is formed with concavo-convex (roughening) on the top 112.In addition, the surface oxidation of solder protuberance 111, the whole surface of solder protuberance 111 is covered by the oxide-film 113 that lead constitutes.In addition, also can handle or use top 112 roughenings of the additive methods such as grinding of lapping device by CZ with solder protuberance 111.
Supply with in the operation at ensuing solder flux, supply with solder flux 28 to the whole surface (top 112 and side) of each solder protuberance 111.Thus, oxide-film 113 is the starting point fusing to be formed on concavo-convex on the top 112, exposes to constitute concavo-convex projected front ends (with reference to Figure 14).Then, on the back side 23 of circuit board main body 12, form a plurality of pads 24, welding stitch 25 on each pad 24, then circuit board 11a completes.
And then, in the heating and melting operation, make a plurality of splicing ears 47 of IC chip 45 dispose (with reference to Figure 15) accordingly with a plurality of solder protuberances 111, and with each solder protuberance 111 heating and melting (backflow).Thus, solder flux 28 is gasified, and each solder protuberance 111 and each splicing ear 47 joints (with reference to Figure 15, Figure 16), and the circuit board that has parts completes.
Thereby in the present embodiment, the part of oxide-film 113 is supplied with in the operation at solder flux and is melted by supplying with solder flux 28 to each solder protuberance 111, on the surface that the part of fusing is exposed solder protuberance 111.Its result, solder protuberance 111 begins fusing when arriving the fusing point (being 183 ℃ in the present embodiment) of solder protuberance 111, so solder protuberance 111 easy fusions, and solder protuberance 111 is connected easily with IC chip 45.
In addition, also embodiments of the present invention can be carried out following change.
In the above-described first embodiment, in the solder protuberance forming process, when being carried out planarization, the top 27 of solder protuberance 22 carries out roughening.But, in the solder protuberance forming process, also can carry out respectively with the planarization operation of top 27 planarizations with the roughening operation of top 27 roughenings.
In the above-described first embodiment, push at the top 27 of 13 pairs of a plurality of solder protuberances 22 of anchor clamps in the use, thereby planarization and roughening are carried out in top 27.But, also can carry out planarization and roughening to the top 27 of solder protuberance 22 by plane lapping.For example, the circuit board 11 that will have a plurality of solder protuberances 22 is placed on the vacuum adsorption plate with a plurality of through holes, reduces the air pressure of the lower face side of vacuum adsorption plate, and is by vacuum suction that circuit board 11 is fixing.Next, use the lapping device that has as grinder spin finishing plates such as (Grinder), with top 27 unified grindings of a plurality of solder protuberances 22.Particularly, making roughness is that the discoideus spin finishing plate of #1000 rotates with 120rpm, and descends with the speed of 0.2mm/ second, with top 27 unified grindings of a plurality of solder protuberances 22, carries out planarization and roughening.In addition, as lapping mode, can use two kinds of dry type and wet types.
In the above-described 2nd embodiment, made circuit board 11a (circuit board that has parts) with solder protuberance 111 that top 112 is not flattened, but as shown in figure 17, also can make circuit board 11b (circuit board that has parts) with solder protuberance 121 that top 122 is flattened.
The solder protuberance 22,111 of above-mentioned execution mode is applicable to the device that uses on the joint of circuit board 11,11a and IC chip 45, still for example also go for the device that uses on the joint of circuit board 11,11a and mainboard (Motherboard).
Next, the technological thought of in the scope of claim, putting down in writing, be listed below based on the technological thought of above-mentioned execution mode.
(1) a kind of manufacture method that has the circuit board of parts, this circuit board that has parts is engaged by a plurality of splicing ears that dispose on a plurality of solder protuberances that dispose on the face side of circuit board main body and the bottom surface side at parts and forms, it is characterized in that, comprise following operation: the planarization operation, push a plurality of solder protuberances the top so that its highly align and planarization; The roughening operation is carried out roughening to the top of a plurality of solder protuberances; Solder flux is supplied with operation, to being flattened and solder flux is supplied with at the top of a plurality of solder protuberances of roughening; And the heating and melting operation, make above-mentioned a plurality of splicing ears on the above-mentioned parts and solder flux supply with the above-mentioned a plurality of solder protuberances that finish and dispose accordingly, and under this state, above-mentioned a plurality of solder protuberances are carried out heating and melting.
(2) a kind of manufacture method that has the circuit board of parts, this circuit board that has parts is engaged by a plurality of splicing ears that dispose on a plurality of solder protuberances that dispose on the face side of circuit board main body and the bottom surface side at parts and forms, it is characterized in that, comprise following operation: the solder protuberance forming process, planarization and roughening are carried out in the top of a plurality of solder protuberances; Solder flux is supplied with operation, to being flattened and solder flux is supplied with at the above-mentioned top of above-mentioned a plurality of solder protuberances of roughening; And heating and melting operation, making above-mentioned a plurality of splicing ears on the above-mentioned parts and solder flux supply with the above-mentioned a plurality of solder protuberances that finish disposes accordingly, and under this state, above-mentioned a plurality of solder protuberances are carried out heating and melting, in above-mentioned solder protuberance forming process, use has the extrusion clamp of extruding with matsurface, push a plurality of solder protuberances the top so that its highly align, thereby carry out roughening when planarization is carried out at above-mentioned top, above-mentioned extrusion clamp has and is used for heating unit that this extrusion clamp is heated.
(3) a kind of manufacture method that has the circuit board of parts, this circuit board that has parts is engaged by a plurality of splicing ears that dispose on a plurality of solder protuberances that dispose on the face side of circuit board main body and the bottom surface side at parts and forms, it is characterized in that, comprise following operation: the solder protuberance forming process, planarization and roughening are carried out in the top of a plurality of solder protuberances; Solder flux is supplied with operation, to being flattened and solder flux is supplied with at the above-mentioned top of above-mentioned a plurality of solder protuberances of roughening; And heating and melting operation, making above-mentioned a plurality of splicing ears on the above-mentioned parts and solder flux supply with the above-mentioned a plurality of solder protuberances that finish disposes accordingly, and under this state, above-mentioned a plurality of solder protuberances are carried out heating and melting, in above-mentioned solder protuberance forming process, use has the extrusion clamp of extruding with the ceramic of matsurface, push a plurality of solder protuberances the top so that its highly align, thereby carry out roughening when planarization is carried out at above-mentioned top, above-mentioned extrusion clamp has and is used for heating unit that this extrusion clamp is heated.
(4) a kind of circuit board with solder protuberance is characterized in that,
The top has been flattened and a plurality of solder protuberances of roughening are configured on the surface of circuit board main body, and the measured value of the coplanarity at above-mentioned top is every 1cm
2Below 10 μ m, and surface roughness Ra is more than the 0.3 μ m, below the 5 μ m, from the surface of above-mentioned circuit board main body to the height at above-mentioned top more than the 10 μ m, below the 30 μ m.
(5) a kind of solder protuberance planarizer, the circuit board that face side is provided with a plurality of solder protuberances is supported on the support fixture, and under this state, above-mentioned a plurality of solder protuberances are pushed and planarization by extrusion clamp, it is characterized in that, above-mentioned extrusion clamp possesses the support portion with the contact-making surface that can contact with the back side of above-mentioned circuit board main body, and above-mentioned extrusion clamp has surface roughness at the extruding matsurface more than the 0.3 μ m, below the 2 μ m.
Claims (11)
1. manufacture method that has the circuit board of parts, this circuit board that has parts is by at a plurality of solder protuberances that dispose on the face side of circuit board main body be configured in a plurality of splicing ears on the bottom surface side of parts and engage and form, it is characterized in that, comprise following operation:
The solder protuberance forming process is carried out planarization and roughening to the top of a plurality of solder protuberances;
Solder flux is supplied with operation, to being flattened and solder flux is supplied with at the above-mentioned top of above-mentioned a plurality of solder protuberances of roughening; And
The heating and melting operation makes above-mentioned a plurality of splicing ears on the above-mentioned parts and solder flux supply with the above-mentioned a plurality of solder protuberances that finish and disposes accordingly, under this state above-mentioned a plurality of solder protuberances is carried out heating and melting.
2. the manufacture method that has the circuit board of parts according to claim 1 is characterized in that,
In above-mentioned solder protuberance forming process, use to have the extrusion clamp of extruding with matsurface, push a plurality of solder protuberances the top so that its highly align, thereby carry out roughening when above-mentioned top carried out planarization.
3. the manufacture method that has the circuit board of parts according to claim 1 and 2 is characterized in that,
Above-mentioned a plurality of solder protuberance is made of lead-free solder.
4. the manufacture method with circuit board of solder protuberance is characterized in that, comprises following operation:
The solder protuberance arrangement step disposes a plurality of solder protuberances in the face side of circuit board main body; With the solder protuberance forming process, planarization and roughening are carried out in the top of above-mentioned a plurality of solder protuberances.
5. the manufacture method with circuit board of solder protuberance according to claim 4 is characterized in that,
In above-mentioned solder protuberance forming process, use to have the extrusion clamp of extruding with matsurface, push a plurality of solder protuberances the top so that its highly align, thereby carry out roughening when above-mentioned top carried out planarization.
6. according to claim 4 or 5 described manufacture methods, it is characterized in that with circuit board of solder protuberance,
Above-mentioned a plurality of solder protuberance is made of lead-free solder.
7. the circuit board with solder protuberance is characterized in that,
The top has been flattened and a plurality of solder protuberances of roughening are configured on the surface of circuit board main body, and the measured value of the coplanarity at above-mentioned top is every 1cm
2Below 10 μ m, and surface roughness Ra is more than the 0.3 μ m, below the 5 μ m.
8. the circuit board with solder protuberance according to claim 7 is characterized in that,
Above-mentioned a plurality of solder protuberance is made of lead-free solder.
9. the manufacture method with circuit board of solder protuberance is characterized in that, comprises following operation:
The solder protuberance arrangement step disposes a plurality of solder protuberances in the face side of circuit board main body; With the solder protuberance forming process, roughening is carried out at the top of above-mentioned a plurality of solder protuberances.
10. manufacture method that has the circuit board of parts, this circuit board that has parts is engaged by a plurality of splicing ears that dispose on a plurality of solder protuberances that dispose on the face side of circuit board main body and the bottom surface side at parts and forms, it is characterized in that, comprise following operation:
The solder protuberance forming process is carried out roughening to the top of a plurality of solder protuberances; With
Solder flux is supplied with operation, supplies with solder flux to the above-mentioned top of the above-mentioned a plurality of solder protuberances that have been roughened.
11. the manufacture method that has the circuit board of parts according to claim 10 is characterized in that,
Supply with above-mentioned a plurality of solder protuberances before the above-mentioned solder flux and have concavo-convexly at above-mentioned top, and whole surface covers by oxide-film,
Supply with in the operation at above-mentioned solder flux, melt above-mentioned oxide-film by supplying with solder flux to the above-mentioned top of above-mentioned a plurality of solder protuberances.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007014229 | 2007-01-24 | ||
| JP2007-014229 | 2007-01-24 |
Publications (1)
| Publication Number | Publication Date |
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| CN101276760A true CN101276760A (en) | 2008-10-01 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2008100085324A Pending CN101276760A (en) | 2007-01-24 | 2008-01-23 | Method for manufacturing wiring substrate with solder protrusion; and wiring substrate |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP4949281B2 (en) |
| CN (1) | CN101276760A (en) |
| TW (1) | TWI348881B (en) |
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| CN102522347A (en) * | 2011-12-23 | 2012-06-27 | 清华大学 | Method for manufacturing solder bump |
| CN105140203A (en) * | 2015-08-05 | 2015-12-09 | 三星半导体(中国)研究开发有限公司 | Solder ball and manufacturing method therefor, and ball grid array package comprising solder ball |
| CN107994002A (en) * | 2014-12-30 | 2018-05-04 | 日月光半导体制造股份有限公司 | Semiconductor substrate and the semiconductor package with Semiconductor substrate |
| CN110752194A (en) * | 2018-07-23 | 2020-02-04 | 美科米尚技术有限公司 | Micro-adhesive structures and methods of forming the same |
| CN113272943A (en) * | 2019-01-15 | 2021-08-17 | 佳能机械株式会社 | Solder flattening device, chip bonding machine, solder flattening method, and bonding method |
| CN114361730A (en) * | 2021-12-28 | 2022-04-15 | 湖南海博瑞德电智控制技术有限公司 | Busbar for battery cell module, battery cell module and manufacturing method of battery cell module |
| CN115362044A (en) * | 2020-04-06 | 2022-11-18 | 昭和电工材料株式会社 | Solder particle, method for producing solder particle, and substrate with solder particle |
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| EP3027347A2 (en) | 2013-07-31 | 2016-06-08 | Antaya Technologies Corporation | Electrical component having presoldered surface with flux reservoirs |
| JP6201816B2 (en) | 2014-02-28 | 2017-09-27 | 日亜化学工業株式会社 | Manufacturing method of light emitting device and wiring board for mounting light emitting element |
| SG10201701738VA (en) * | 2017-03-03 | 2018-10-30 | Aurigin Tech Pte Ltd | Apparatus And Method For Filling A Ball Grid Array |
| TWI807348B (en) * | 2021-06-21 | 2023-07-01 | 矽品精密工業股份有限公司 | Flip chip process and bonding equipment |
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| JPH09330933A (en) * | 1996-06-12 | 1997-12-22 | Matsushita Electric Ind Co Ltd | Formation of bump electrode part |
| JPH10112479A (en) * | 1996-10-07 | 1998-04-28 | Fuji Xerox Co Ltd | Method of connecting boards |
| JP4151136B2 (en) * | 1998-06-15 | 2008-09-17 | 松下電器産業株式会社 | Substrate, semiconductor device and manufacturing method thereof |
| JP4604387B2 (en) * | 2001-04-24 | 2011-01-05 | パナソニック電工株式会社 | IC mounting board |
| JP2006032446A (en) * | 2004-07-13 | 2006-02-02 | Toshiba Corp | Mounting method for semiconductor component, and mounting device |
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2008
- 2008-01-22 JP JP2008011110A patent/JP4949281B2/en not_active Expired - Fee Related
- 2008-01-23 TW TW097102429A patent/TWI348881B/en not_active IP Right Cessation
- 2008-01-23 CN CNA2008100085324A patent/CN101276760A/en active Pending
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| CN102522347A (en) * | 2011-12-23 | 2012-06-27 | 清华大学 | Method for manufacturing solder bump |
| CN102522347B (en) * | 2011-12-23 | 2015-04-29 | 清华大学 | Method for manufacturing solder bump |
| CN107994002A (en) * | 2014-12-30 | 2018-05-04 | 日月光半导体制造股份有限公司 | Semiconductor substrate and the semiconductor package with Semiconductor substrate |
| CN105140203A (en) * | 2015-08-05 | 2015-12-09 | 三星半导体(中国)研究开发有限公司 | Solder ball and manufacturing method therefor, and ball grid array package comprising solder ball |
| CN110752194A (en) * | 2018-07-23 | 2020-02-04 | 美科米尚技术有限公司 | Micro-adhesive structures and methods of forming the same |
| CN110752194B (en) * | 2018-07-23 | 2023-11-28 | 美科米尚技术有限公司 | Micro-adhesive structure and method of forming the same |
| CN113272943A (en) * | 2019-01-15 | 2021-08-17 | 佳能机械株式会社 | Solder flattening device, chip bonding machine, solder flattening method, and bonding method |
| CN113272943B (en) * | 2019-01-15 | 2022-04-26 | 佳能机械株式会社 | Solder flattening method and device, chip bonding machine and bonding method |
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Also Published As
| Publication number | Publication date |
|---|---|
| JP4949281B2 (en) | 2012-06-06 |
| TW200843598A (en) | 2008-11-01 |
| JP2008205446A (en) | 2008-09-04 |
| TWI348881B (en) | 2011-09-11 |
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