CN101272104A - Space vector modulation method - Google Patents
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- CN101272104A CN101272104A CNA2008101060470A CN200810106047A CN101272104A CN 101272104 A CN101272104 A CN 101272104A CN A2008101060470 A CNA2008101060470 A CN A2008101060470A CN 200810106047 A CN200810106047 A CN 200810106047A CN 101272104 A CN101272104 A CN 101272104A
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Abstract
A space vector modulating approach is caricaturized by calculating a sector number s, a correction z and the numerical values of the comparison registers v1, v2 and v3 in a digital signal processing chip DSP according to the DC input voltage of an inverter and A,B and C three-phase reference voltages Uan, Ubn and Ucn; corresponding six control signals P1 to P6 generated by the digital signal processing chip DSP are corresponding to P1' to P6' by an isolating drive circuit and respectively control switching tubes K1 to K6. Compared with a common space vector modulating method, the method of the invention has the advantages of smaller calculating capacity, higher modulating precision as well as full-digitization realizing etc., which can fast and accurately generate the control signal and realize the normal work of a three-phase full-bridge inverter.
Description
Technical field
The present invention relates to a kind of space vector modulating method.
Background technology
Inversion transformation technique is to change electric energy the technology of interchange into by direct current, is playing the part of important role in current commercial Application.The voltage-type three-phase full-bridge inverter is used very extensive, and its principle is to adopt the HF switch pipe to build main circuit, is equipped with corresponding modulator approach again, and the on off state of control switch pipe makes the output waveform near sinusoidal.
The basic principle of space vector modulating method is that eight kinds of different on off states of voltage-type three-phase full-bridge inverter are obtained eight kinds of voltage vectors through coordinate transform, again the three-phase reference voltage is drawn reference voltage vector through coordinate transform, select afterwards that some voltage vectors remove the synthesized reference voltage vector in eight kinds of voltage vectors, and determine the on off state of each switching tube thus.Theoretical derivation and experiment all show, space vector modulation has direct voltage utilance height, harmonic characterisitic is good, advantages such as torque pulsation is little, but also each phase pulse is remained unchanged respectively in two 60 ° of phase weekly, reduced by 33% switching loss, be particularly suitable for being applied in the big capacity inverter.
Yet, space vector modulating method tends to consume a large amount of computing times, because wherein need to carry out coordinate transform, relate to repeatedly nonlinear operations such as sine, arc tangent and evolution, so have to the minimum sampling period is limited, to guarantee to have sufficient time to calculate in each sampling sector number and relevant voltage base vector action time.This has increased the frequency of minimum subharmonic in the output waveform, and irregularity of wave form is increased, and the extensive use of space vector modulating method is exerted an adverse impact.
Chinese patent 200710019319, name is called " based on the modulator approach of space vector of voltage ", be applicable to the voltage-type three-phase full-bridge inverter, 120 ° of coordinate systems of this method utilization two-phase, utilize the corresponding relation of three-phase bridge arm voltage and reference voltage vector, directly find the solution the action time of three-phase bridge arm voltage by certain vector calculus rule, and finally obtain the control signal of each switching tube.Its shortcoming is still to be subjected to the constraint of coordinate transform, still needs to carry out the segment vector computing, and the minimizing degree of amount of calculation is few.
Summary of the invention
The objective of the invention is to overcome the shortcoming that existing space vector modulation method amount of calculation is big, realize complexity, versatility difference, propose a kind of new spatial vector modulation method.The present invention is applied to the voltage-type three-phase full-bridge inverter, can produce the control signal identical with conventional space vector modulating method, has saved amount of calculation simultaneously, has improved computational accuracy.
Voltage-type three phase full bridge voltage source inverter is characterised in that cross-over connection DC power supply or electric capacity between dc bus D and the dc bus E, and wherein the positive pole of DC power supply or electric capacity meets dc bus D, and the negative pole of DC power supply or electric capacity meets dc bus E.The output of voltage-type three-phase full-bridge inverter is divided into A, B, C three-phase, whenever, be composed in series by two switching tubes: A is composed in series by switching tube K1 and K2, the anode of switching tube K1 is connected to dc bus D, the negative electrode of switching tube K1 connects the anode of K2, the A of the anode connection inverter of switching tube K2 exports the negative electrode with switching tube K1 mutually, and the negative electrode of switching tube K2 connects dc bus E; B is composed in series by switching tube K3 and K4, the anode of switching tube K3 is connected to dc bus D, the negative electrode of switching tube K3 connects the anode of K4, and the A of the anode connection inverter of switching tube K4 exports the negative electrode with switching tube K3 mutually, and the negative electrode of switching tube K4 connects dc bus E; C is composed in series by switching tube K5 and K6, the anode of switching tube K5 is connected to dc bus D, the negative electrode of switching tube K5 connects the anode of K6, and the A of the anode connection inverter of switching tube K6 exports the negative electrode with switching tube K5 mutually, and the negative electrode of switching tube K6 connects dc bus E; Digital signal processing chip DSP is carried out programmed configurations, produce control signal P1～P6, because the electric pressure of P1～P6 inadequately and each other voltage is not isolated, direct control switch pipe K1～K6, to isolate and voltage amplification through isolated drive circuit, be used for control switch pipe K1～K6 again, P1～P6 corresponds respectively to P1 '～P6 ' behind isolated drive circuit, P1 '～P6 ' is connected respectively on the driving gate pole of each switching tube, the state that turns on and off of P1 ' control switch pipe K1; The state that turns on and off of P2 ' control switch pipe K2; The state that turns on and off of P3 ' control switch pipe K3; The state that turns on and off of P4 ' control switch pipe K4; The state that turns on and off of P5 ' control switch pipe K5; The state that turns on and off of P6 ' control switch pipe K6, thus realize inversion.
The space vector modulating method that the present invention proposes, by calculating the numerical value of comparand register in sector number, correction and the digital signal processing chip DSP, produce control signal by digital signal processing chip DSP, control signal is connected to switching tube through behind the isolated drive circuit, and the control switch pipe turns on and off.Supposing that DC input voitage is U, is reference point with dc bus E, and then each has exported U and 0 two kinds of voltages mutually.For the A phase, switching tube K1 is open-minded, and when K2 turn-offed, output voltage was U, and switching tube K1 turn-offs, and when K2 opened, output voltage was 0; For the B phase, switching tube K3 is open-minded, and when K4 turn-offed, output voltage was U, and switching tube K3 turn-offs, and when K4 opened, output voltage was 0; For the C phase, switching tube K5 is open-minded, and when K6 turn-offed, output voltage was U, and switching tube K5 turn-offs, and when K6 opened, output voltage was 0.The concrete course of work of the present invention is as follows:
Step 1: calculate sector number
In modulated process each time, at first according to three-phase reference voltage U
An, U
Bn, U
CnCalculate the value of sector number s.U wherein
AnThe reference voltage of expression A phase; U
BnThe reference voltage of expression B phase; U
CnThe reference voltage of expression C phase, U
An, U
Bn, U
CnCan obtain by gathering three-phase alternating voltage.
If U
AnGreater than U
Bn, judge U again
BnWhether greater than U
CnIf, U
BnGreater than U
Cn, then s gets 1, if U
BnBe not more than U
Cn, judge U again
AnWhether greater than U
CnIf, U
AnGreater than U
Cn, then s gets 6, if U
AnBe not more than U
Cn, then s gets 5; If U
AnBe not more than U
Bn, judge U again
BnWhether greater than U
CnIf, U
BnBe not more than U
Cn, then s gets 4, if U
BnGreater than U
Cn, judge U again
AnWhether greater than U
CnIf, U
AnGreater than U
Cn, then s gets 2, if U
AnBe not more than U
Cn, then s gets 3.
Step 2: calculate corresponding correction z according to the value of sector number s
The mode that adopts is to carry out different calculating formulas according to the difference of sector number s.If sector number s equals 1, then correction z gets U
Dc-U
AnIf sector number s equals 2, then correction z gets-U
CnIf sector number s equals 3, then correction z gets U
Dc-U
BnIf sector number s equals 4, then correction z gets-U
AnIf sector number s equals 5, then correction z gets U
Dc-U
CnIf sector number s equals 6, then correction z gets-U
Bn
Step 3: the numerical value that calculates comparand register in the digital signal processing chip DSP
With the be added to reference voltage u of A phase of correction z
AnOn obtain the actual value U of A phase reference voltage
An', with the be added to reference voltage U of B phase of correction z
BnOn obtain the actual value U of B phase reference voltage
Bn', with the be added to reference voltage U of C phase of correction z
CnOn obtain the actual value U of C phase reference voltage
Cn'.Multiply by the actual value U of A phase reference voltage at last with the timer half period maximum count value N in the digital signal processing chip DSP
An' after again divided by the DC input voitage U of inverter
DcObtain the numerical value of comparand register v1, multiply by the actual value U of B phase reference voltage with the timer half period maximum count value N in the digital signal processing chip DSP
Bn' after again divided by the DC input voitage U of inverter
DcObtain the numerical value of comparand register v2, multiply by the actual value U of C phase reference voltage with the timer half period maximum count value N in the digital signal processing chip DSP
Cn' after again divided by the DC input voitage U of inverter
DcObtain the numerical value of comparand register v3, U
An', U
Bn', U
Cn' physical significance when being illustrated in the application space vector modulation method, the actual value of A, B, C three-phase reference voltage, the present invention calculates U by the method for introducing correction
An', U
Bn', U
Cn'.
Step 4: digital signal processing chip DSP output control signal control switch pipe
For the A phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v1, then export control signal, make switching tube K1 open-minded, K2 turn-offs, if the timer count value of digital signal processing chip DSP is not less than the numerical value of v1, then exports control signal, switching tube K1 is turn-offed, and K2 is open-minded; For the B phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v2, then export control signal, make switching tube K3 open-minded, K4 turn-offs, if the timer count value of digital signal processing chip DSP is not less than the numerical value of v2, then exports control signal, switching tube K3 is turn-offed, and K4 is open-minded; For the C phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v3, then export control signal, make switching tube K5 open-minded, K6 turn-offs, if the timer count value of digital signal processing chip DSP is not less than the numerical value of v3, then exports control signal, switching tube K5 is turn-offed, and K6 is open-minded.
Step 5: wait for and repeat said process when extremely modulated process begins next time.
The present invention has avoided complex calculation such as coordinate transform in the conventional space vector modulating method and vector calculus, replaces the operation of a spot of compare operation and a spot of multiplication and division, thereby amount of calculation greatly reduces, and has improved computational accuracy, and versatility is better.The present invention is specially adapted to adopt digital signal processing chip DSP to realize.
Description of drawings
Fig. 1 voltage-type three phase full bridge inverter circuit figure;
Fig. 2 space vector modulating method block diagram of the present invention;
The computing block diagram of Fig. 3 sector number s;
The computing block diagram of Fig. 4 correction z;
The computing block diagram of Fig. 5 comparand register numerical value.
Embodiment
Further specify the present invention below in conjunction with the drawings and specific embodiments.
Space vector modulating method of the present invention, be applicable to voltage-type three phase full bridge inverter circuit shown in Figure 1, by calculating sector number s, the numerical value of comparand register in correction z and the digital signal processing chip DSP, produce six tunnel control signal P1～P6 by digital signal processing chip DSP, difference corresponding P1 '～P6 ' behind isolated drive circuit, difference control switch pipe K1～K6, concrete corresponding relation is: P1 control switch pipe K1, P2 control switch pipe K2, P3 control switch pipe K3, P4 control switch pipe K4, P5 control switch pipe K5, P6 control switch pipe K6, control signal is identical with the control signal that conventional space vector modulating method produces.
Figure 2 shows that space vector modulating method block diagram of the present invention, at first pass through three-phase reference voltage U
An, U
Bn, U
CnThe mode of carrying out the layering comparison is determined the value of sector number s.If A is with reference to voltage U
AnGreater than B with reference to voltage U
Bn, judge that again B is with reference to voltage U
BnWhether greater than C with reference to voltage U
CnIf, U
BnGreater than U
Cn, then s gets 1, if U
BnBe not more than U
Cn, judge U again
AnWhether greater than U
CnIf, U
AnGreater than U
Cn, then s gets 6, if U
AnBe not more than U
Cn, then s gets 5; If U
AnBe not more than U
Bn, judge U again
BnWhether greater than U
CnIf, U
BnBe not more than U
Cn, then s gets 4, if U
BnGreater than U
Cn, judge U again
AnWhether greater than U
CnIf, U
AnGreater than U
Cn, then s gets 2, if U
AnBe not more than U
Cn, then s gets 3.
Determine after the sector number s, calculate corresponding correction z according to the value of s, the mode of employing is to carry out different calculating formulas according to the difference of s, if s equals 1, then z gets U
Dc-U
AnIf s equals 2, then z gets-U
CnIf s equals 3, then z gets U
Dc-U
BnIf s equals 4, then z gets-U
AnIf s equals 5, then z gets U
Dc-U
CnIf s equals 6, then z gets-U
BnThen with correction z and U
AnAddition obtains U
An', with correction z and U
BnAddition obtains U
Bn', with correction z and U
CnAddition obtains U
Cn'.
Multiply by U with the timer half period maximum count value N in the digital signal processing chip DSP at last
An' after again divided by U
DcObtain the numerical value of comparand register v1, multiply by U with the timer half period maximum count value N in the digital signal processing chip DSP
Bn' after again divided by U
DcObtain the numerical value of comparand register v2, multiply by U with the timer half period maximum count value N in the digital signal processing chip DSP
Cn' after again divided by U
DcObtain the numerical value of comparand register v3.Digital signal processing chip DSP is in running, if the count value of timer is less than comparand register v1, then exporting control signal P1 makes switching tube K1 open-minded, output control signal P2 turn-offs switching tube K2, if the count value of timer is not less than v1, then export control signal P1 switching tube K1 is turn-offed, output control signal P2 makes switching tube K2 open-minded; If the count value of timer is less than comparand register v2, then exporting control signal P3 makes switching tube K3 open-minded, output control signal P4 turn-offs switching tube K4, if the count value of timer is not less than v2, then export control signal P3 switching tube K3 is turn-offed, output control signal P4 makes switching tube K4 open-minded; If the count value of timer is less than comparand register v3, then exporting control signal P5 makes switching tube K5 open-minded, output control signal P6 turn-offs switching tube K6, if the count value of timer is not less than v3, then export control signal P5 switching tube K5 is turn-offed, output control signal P6 makes switching tube K6 open-minded.
Figure 3 shows that the calculation process of sector number s, its computed path is for passing through relatively three-phase reference voltage U
An, U
Bn, U
CnMagnitude relationship draw the value of sector number s.For further reducing operand, adopted layering mode relatively.Flow process finally can enter the assignment link of s for progressively to carry out from the top of Fig. 3 downwards, determines the value of s.Concrete steps are: if A is with reference to voltage U
AnGreater than B with reference to voltage U
Bn, judge that again B is with reference to voltage U
BnWhether greater than C with reference to voltage U
CnIf, U
BnGreater than U
Cn, then s gets 1, if U
BnBe not more than U
Cn, judge U again
AnWhether greater than U
CnIf, U
AnGreater than U
Cn, then s gets 6, if U
AnBe not more than U
Cn, then s gets 5; If U
AnBe not more than U
Bn, judge U again
BnWhether greater than U
CnIf, U
BnBe not more than U
Cn, then s gets 4, if U
BnGreater than U
Cn, judge U again
AnWhether greater than U
CnIf, U
AnGreater than U
Cn, then s gets 2, if U
AnBe not more than U
Cn, then s gets 3.This shows that this process need carry out 3 compare operations at most, and minimumly only need twice compare operation, and the compare operation number of times that on average need carry out is 3*4/6+2*2/6=2.67 time.
Figure 4 shows that the concrete calculation flow chart of correction z, enter different calculating links, wherein U respectively according to sector number s
DcThe DC input voitage of expression inverter, U
AnExpression A phase reference voltage, U
BnExpression B phase reference voltage, U
CnExpression C phase reference voltage.Specifically, if sector number s equals 1, then correction z gets U
Dc-U
AnIf sector number s equals 2, then correction z gets-U
CnIf sector number s equals 3, then correction z gets U
Dc-U
BnIf sector number s equals 4, then correction z gets-U
AnIf sector number s equals 5, then correction z gets U
Dc-U
CnIf sector number s equals 6, then correction z gets-U
Bn
Figure 5 shows that the computing block diagram of the comparand register numerical value of digital signal processing chip DSP.Wherein N is the timer half period maximum count value in the digital signal processing chip DSP of setting.The numerical value of the comparand register v1 of A phase is the actual value U that N multiply by A phase reference voltage
An' after again divided by the DC input voitage U of inverter
Dc, the numerical value of the comparand register v2 of B phase is the actual value U that N multiply by B phase reference voltage
Bn' after again divided by the DC input voitage U of inverter
Dc, the numerical value of the comparand register v3 of C phase is the actual value U that N multiply by C phase reference voltage
Cn' after again divided by the DC input voitage U of inverter
Dc
Obtain v1, v2 is after the v3, for the A phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v1, then export control signal, make switching tube K1 open-minded, switching tube K2 turn-offs, if the timer count value of digital signal processing chip DSP is not less than v1, then export control signal, switching tube K1 is turn-offed, switching tube K2 is open-minded; For the B phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v2, then export control signal, make switching tube K3 open-minded, switching tube K4 turn-offs, if the timer count value of digital signal processing chip DSP is not less than v2, then exports control signal, switching tube K3 is turn-offed, and switching tube K4 is open-minded; For the C phase, if the timer count value of digital signal processing chip DSP is then exported control signal less than the numerical value of comparand register v3, make switching tube K5 open-minded, switching tube K6 turn-offs, if the timer count value of digital signal processing chip DSP is not less than v3, then export control signal, switching tube K5 is turn-offed, switching tube K6 is open-minded, like this, each switching tube state of voltage-type three-phase full-bridge inverter constantly changes, and just can realize inversion.
Claims (2)
1. a space vector modulating method is characterized in that, according to the DC input voitage of inverter and A, B, C three-phase reference voltage U
An, U
Bn, U
CnCalculate the numerical value of comparand register v1, v2, v3 in sector number s, correction z and the digital signal processing chip DSP, produce corresponding six tunnel control signal P1～P6 by digital signal processing chip DSP, difference corresponding P1 '～P6 ' behind isolated drive circuit, control switch pipe K1～K6 respectively.
2. space vector modulating method according to claim 1 is characterized in that this method may further comprise the steps:
Step 1: calculate sector number
In modulated process each time, at first according to three-phase reference voltage U
An, U
Bn, U
CnCalculate the value of sector number s;
If the reference voltage U of A phase
AnReference voltage U greater than the B phase
Bn, judge that again B is with reference to voltage U
BnWhether greater than the reference voltage U of C phase
CnIf B is with reference to voltage U
BnGreater than C with reference to voltage U
Cn, then s gets 1, if B is with reference to voltage U
BnBe not more than C with reference to voltage U
Cn, judge that again A is with reference to voltage U
AnWhether greater than C with reference to voltage U
CnIf A is with reference to voltage U
AnGreater than C with reference to voltage U
Cn, then s gets 6, if A is with reference to voltage U
AnBe not more than C with reference to voltage U
Cn, then s gets 5; If A is with reference to voltage U
AnBe not more than B with reference to voltage U
Bn, judge that again B is with reference to voltage U
BnWhether greater than C with reference to voltage U
CnIf B is with reference to voltage U
BnBe not more than C with reference to voltage U
Cn, then s gets 4, if B is with reference to voltage U
BnGreater than C with reference to voltage U
Cn, judge that again A is with reference to voltage U
AnWhether greater than C with reference to voltage U
CnIf A is with reference to voltage U
AnGreater than C with reference to voltage U
Cn, then s gets 2, if A is with reference to voltage U
AnBe not more than C with reference to voltage U
Cn, then s gets 3;
Step 2: calculate corresponding correction z according to the value of sector number s
The mode that adopts is to carry out different calculating formulas according to the difference of sector number s; If sector number s equals 1, then correction z gets U
Dc-U
AnIf sector number s equals 2, then correction z gets-U
CnIf sector number s equals 3, then correction z gets U
Dc-U
BnIf sector number s equals 4, then correction z gets-U
AnIf sector number s equals 5, then correction z gets U
Dc-U
CnIf sector number s equals 6, then correction z gets-U
Bn
Step 3: the numerical value that calculates comparand register in the digital signal processing chip DSP
With the be added to reference voltage U of A phase of correction z
AnOn obtain the actual value U of A phase reference voltage
An', with the be added to reference voltage U of B phase of correction z
BnOn obtain the actual value U of B phase reference voltage
Bn', with the be added to reference voltage U of C phase of correction z
CnOn obtain the actual value U of C phase reference voltage
Cn'.Multiply by the actual value U of A phase reference voltage at last with the timer half period maximum count value N in the digital signal processing chip DSP
An' after again divided by the DC input voitage U of inverter
DcObtain the numerical value of comparand register v1, multiply by the actual value U of B phase reference voltage with the timer half period maximum count value N in the digital signal processing chip DSP
Bn' after again divided by the DC input voitage U of inverter
DcObtain the numerical value of comparand register v2, multiply by the actual value U of C phase reference voltage with the timer half period maximum count value N in the digital signal processing chip DSP
Cn' after again divided by the DC input voitage U of inverter
DcObtain the numerical value of comparand register v3;
Step 4: digital signal processing chip DSP output control signal control switch pipe
For the A phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v1, then export control signal, make switching tube K1 open-minded, K2 turn-offs, if the timer count value of digital signal processing chip DSP is not less than the numerical value of v1, then exports control signal, switching tube K1 is turn-offed, and K2 is open-minded; For the B phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v2, then export control signal, make switching tube K3 open-minded, K4 turn-offs, if the timer count value of digital signal processing chip DSP is not less than the numerical value of v2, then exports control signal, switching tube K3 is turn-offed, and K4 is open-minded; For the C phase, if the timer count value of digital signal processing chip DSP is less than the numerical value of comparand register v3, then export control signal, make switching tube K5 open-minded, K6 turn-offs, if the timer count value of digital signal processing chip DSP is not less than the numerical value of v3, then exports control signal, switching tube K5 is turn-offed, and K6 is open-minded;
Step 5: wait for and repeat said process when extremely modulated process begins next time.
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| US6462974B1 (en) * | 2001-09-27 | 2002-10-08 | York International Corporation | Space vector modulation-based control method and apparatus for three-phase pulse width modulated AC voltage regulators |
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| CN100433536C (en) * | 2007-01-15 | 2008-11-12 | 南京航空航天大学 | Voltage space vector-based modulation method |
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| CN103078344A (en) * | 2012-12-31 | 2013-05-01 | 北京科诺伟业科技有限公司 | Method for improving double-fed converter low voltage ride through performance |
| CN103078344B (en) * | 2012-12-31 | 2015-08-12 | 北京科诺伟业科技股份有限公司 | A kind of method improving double-fed type current transformer low voltage crossing performance |
| CN103618685A (en) * | 2013-12-05 | 2014-03-05 | 中国电子科技集团公司第二十六研究所 | Vector modulator |
| CN103618685B (en) * | 2013-12-05 | 2017-01-11 | 中国电子科技集团公司第二十六研究所 | Vector modulator |
| CN113794369A (en) * | 2021-09-17 | 2021-12-14 | 北京迪赛奇正科技有限公司 | Three-phase PFC and PWM modulation method based on BUCK circuit |
| CN113794369B (en) * | 2021-09-17 | 2024-06-11 | 北京迪赛奇正科技有限公司 | Three-phase PFC and PWM modulation method based on BUCK circuit |
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