Embodiment
Be described in further detail below in conjunction with the CONSTRUCTED SPECIFICATION of accompanying drawing the utility model embodiment:
As shown in Figure 1, the intelligent electric sub-ballast of originally joining the 320W quartz burner by anti-interference filtration circuit 1, rectification circuit 2, second rectification circuit 3, APFC 4, semi-bridge inversion Drive and Control Circuit 5, ballasting circuit 6, protective circuit 7, lamp current sample circuit 8 ,+400V sample circuit 9 and microprocessor control circuit 10 constitute.The physical circuit that each parallel circuit below is described respectively constitutes (shown in Fig. 2,3,4,5):
One, the anti-interference filtration circuit 1
Exchange the overcurrent-overvoltage protecting circuit input anti-interference filtration circuit 1 that 22V input power supply is formed through fuse FUSE, piezo-resistance RT1, pressure-sensitive capacitance CT1; this anti-interference filtration circuit is formed the anti-interference filter of three grades of major loops by L11, L12, L13, L14, L15, L16 and CA3, CA4, CA5, CA6, is made of the direct current power supply loop anti-interference filter of APFC, semi-bridge inversion Drive and Control Circuit, protective circuit and microprocessor control circuit L17, L18, CA1, CA2.
Two, rectification circuit 2
Rectification circuit 2 is the BRIGE1 bridge rectifier, its power input is L15 in the anti-interference filtration circuit 1 and L16 two ends (between connect capacitor C A7), its output and the capacitor C 35 that connects, as high-frequency noise filtering, this rectifier provides the commutating pulse operating voltage of about 300V to the major loop that comprises APFC 4, semi-bridge inversion Drive and Control Circuit 5, ballasting circuit 6.
Three, second rectification circuit 3
Second rectification circuit 3 is the BRIGE2 bridge rectifier; its power supply input is provided by the transformer T1 that is connected the filter capacitor CA2 two ends in the anti-interference filtration circuit 1; its output and the capacitor C 33 that connects; also be as high-frequency noise filtering, this output output 12V direct voltage VCC is as the operating voltage of protective circuit 7 and chip IC L6561, IC IR2106 and microprocessor control circuit.
Four, APFC 4
Mainly comprise chip IC ST6561 as controller, the resistance series connection voltage divider that constitutes by R1 and R2, boost inductance winding T2, field effect transistor switch pipe VT1 and booster diode D1, full-wave rectification pulsating voltage by rectification circuit 2 inputs, sample by the resistance series connection voltage divider that R1 and R2 constitute, 3 pin of input IC ST6561, the full-wave rectification pulsating voltage of input is connected with the positive pole of booster diode D1 through boost inductance winding T2, the auxiliary winding of boost inductance winding T2 is connected to 5 pin of ICST6561 by resistance R 3,7 pin of IC ST6561 are connected to the grid of field effect transistor switch pipe VT1 by resistance R 4, the drain electrode of field effect transistor switch pipe VT1 is connected to the positive pole of booster diode D1, the source electrode of field effect transistor switch pipe VT1 divides two-way, one the tunnel through resistance R 31 earth terminals, one the tunnel is connected to 4 pin of IC ST6561 through R5 and shunt capacitance C10, the resitstance voltage divider sampling that the VD of the active PFC booster converter that produces at the negative pole of booster diode D1 and earth terminal is formed via resistance R 6 and R7,1 pin of input IC ST6561.In addition, 3 pin and 4 pin of IC ST6561 are connected with shunt capacitance C9, C10 respectively, are connected to capacitor C 11,8 pin between 1 pin and 2 pin and are connected to VCC by resistance R 8, this pin also is connected with ground connection shunt capacitance C12, is connected with capacitor C BX3 between the negative pole of booster diode D1 and earth terminal.
Five, the semi-bridge inversion Drive and Control Circuit 5
Mainly comprise chip IC IR2106 as controller; field effect transistor switch pipe VT2 and VT3; bootstrap diode D2 and bootstrap capacitor C24; 7 pin of IR2106 are connected to the grid of field effect transistor switch pipe VT2 by resistance R 10; 5 pin of IR2106 are connected to the grid of field effect transistor switch pipe VT3 by resistance R 12; the source electrode of field effect transistor switch pipe VT2 is connected with the drain electrode of field effect transistor switch pipe VT3; and be connected to 6 pin of IR2106 by resistance R 11; this pin is connected to 8 pin of IR2106 by bootstrap capacitor C24 simultaneously; be connected to 1 pin and the VCC (by the triode Q1 in the protective circuit) of IR2106 again through bootstrap diode D2, thereby be 50% square-wave pulse at the VT2 output duty cycle.In addition between the source electrode of field effect transistor switch pipe VT2 and drain electrode and be connected to protection diode D3 and capacitor C 25, between the source electrode of field effect transistor switch pipe VT3 and the drain electrode and be connected to protection diode D4 and capacitor C 17.
Six, ballasting circuit 6
Ballasting circuit 6 is the LC oscillating circuit of being made up of oscillator coil L and capacitor C 18, C19, C20, C21, and the high voltage of lighting quartz burner is provided.
Seven, protective circuit 7
Described protective circuit 7 comprises first sample circuit and second sample circuit, the filament electrode of the ultra-violet lamp of first sample circuit from ballasting circuit is taken a sample, obtain B point reference voltage, this benchmark B point is connected to the base stage of triode Q2 by diode D13, the grounded emitter of Q2, collector electrode is by voltage stabilizing didoe D9, diode D10, be connected to the control utmost point of controllable silicon SCR again via the resistance R 14 and the voltage divider of R17 formation, the anode of controllable silicon SCR is connected to the base stage of triode Q1 by diode D6, the collector electrode of Q1 connects VCC, emitter is connected to 1 pin of the IC IR2106 in the semi-bridge inversion Drive and Control Circuit, and by capacitor C 13 ground connection; The auxiliary winding T3 sampling of the outputting inductance L of second sample circuit from ballasting circuit, obtain A point reference voltage, described benchmark A point is by diode D7, voltage stabilizing didoe D8, after resistance R 14 and R17 dividing potential drop, be connected to the control utmost point of controllable silicon SCR again, also be connected the control coil of relay J and the ballast working indicating that constitutes by resistance R 16 and green light light-emitting diode GREED series connection between benchmark A point and the earth terminal, resistance 15 and red light light-emitting diode RED be connected formation ballast non-normal working indicating circuit between VCC and the earth terminal after the normally-closed contact of relay J is connected in series.In this protective circuit; benchmark B point is by capacitor C 23; resistance R 21; R22 is connected to the filament electrode end of the ultra-violet lamp in the ballasting circuit; the positive pole of diode D12 is connected on the B point; negative pole is connected on the base stage of triode Q2; be parallel with capacitor C 24 and protection diode D14 between the positive pole of diode D12 and the earth terminal; be parallel with resistance R 20 and capacitor C 25 between the negative pole of diode D12 and the earth terminal; VCC is connected to the base stage of triode Q2 by resistance 19 (being parallel with diode D11 at resistance R 19 two ends) and capacitor C 26; be connected to the collector electrode of triode Q2 by resistance R 18; be connected to the base stage of triode Q1 by R13; the base stage of Q1 is also by capacitor C 6 and diode D5 ground connection in parallel; above-mentioned benchmark A point is by diode D12; resistance R X and inductance L X are connected on the auxiliary winding T3 of the outputting inductance L in the ballasting circuit, the capacitor C 6 in this circuit; C38 and C29 are the filtering shunt capacitance.
The course of work of this protective circuit is as follows:
After connecting fluorescent tube, fluorescent tube normally starts, and A point voltage normal value is 14V among Fig. 2, and GREED is bright for work display lamp green light, and relay J is charged, and wherein a pair of normally closed contact disconnects, and with this red light RED that normally-closed contact links is not worked.Q2 place conducting state.
After connecting fluorescent tube, ballast or load abnormal, protective circuit is started working:
1) do not connect fluorescent tube
The load circuit open circuit, the original 0.7V of B point DC potential electricity reduces near 0V, and Q2 ends, at this moment the K point is 9V, voltage stabilizing didoe D9 is punctured the controllable silicon SCR conducting, Q1 ends, (normal operating conditions Q1 is conducting), the working power of cut-out IC IR2106, IC IR2106 quits work, the A point voltage drops to below the 2V, relay lamp dead electricity, the normally closed contact UNICOM that relay J is connected with red light RED, red light RED is bright.The normal opened contact that is connected with green light GREED disconnects, and green light GREED goes out.
2) fluorescent tube performance depreciation, internal resistance diminish (power become big)
When the fluorescent tube performance depreciation, internal resistance diminishes, cause power output to strengthen, when power is increased to when making the A point voltage be higher than 24V, D8 punctures, the controllable silicon SCR conducting, and Q1 ends, (during the ballast operate as normal, IC IR2106 power supply is given in the Q1 conducting), the working power of cut-out IC IR2106 quits work IC IR2106, the A point voltage drops to below the 2V, relay lamp dead electricity, the normally closed contact UNICOM that connects with red light RED, red some RED is bright, the normal opened contact that connects with green light GREED disconnects, and green light GREED goes out.
3) fluorescent tube performance depreciation, interior resistive big (power diminishes)
When the fluorescent tube performance depreciation, interior resistive is big, causes power output to diminish, and when power is varied down to when making the B point near 0V, Q2 ends, and at this moment the K point is 9V, voltage stabilizing didoe D9 is punctured following situation and 1) identical.
4) start capacitance short-circuit, cause load short circuits
Work as capacitance short-circuit, cause load short circuits, it is big that power becomes, and the A point voltage rises, on when being increased to 24V, D8 punctures, short circuit, following situation and 2) identical.
Eight, the lamp current sample circuit 8
This circuit as shown in Figure 4, G, H in Fig. 2 ballast circuit that G*, H* are connected respectively among Fig. 4, obtain the lamp current signal between G, the H, this signal produces alternating signal through resistance R D3, capacitor C D3 and rectification circuit CBridge frequency-selecting, rectification through CT, again through resistance R D1, RD2 dividing potential drop, the Current Regulation of triode QD1, CD1, CD2 filtering, output DC flushes the J1-5 (the 5th pin of interface J1) among Fig. 3, and input microprocessor control circuit 10 is handled;
Nine ,+400V sample circuit 9
This circuit as shown in Figure 5, the C* point of among C point among Fig. 2 and Fig. 59 (+400V) detect and link to each other, through RD4, DC1, DC2 and DC3 (voltage-stabiliser tube of 5.1V), CD4 produces sampling voltage and is detected by microprocessor, and output links to each other with J1-6 (the 6th pin of interface J1) among Fig. 3;
Ten, microprocessor control circuit 10
This circuit adopts the AT90PWM2 microprocessor that stores software control procedure, its circuit constitutes as shown in Figure 3, by circuit interface M1, half-bridge driven output circuit M2, the working power circuit M3 of microprocessor, reset circuit M4, crystal oscillating circuit M5, the unit mode of operation is selected circuit M6, connect the machine mode of operation and select circuit M7,485 communication interface circuit M8, the A/D conversion is reference point M9 relatively, analog circuit working power filter circuit M10, comparator reference value circuit M11, + 400V testing circuit M12, lamp current testing circuit M13, microprocessor AT90PWM2 circuit connection diagram M14 constitutes;
The physical circuit that above-mentioned each parallel circuit below is described respectively constitutes:
1, circuit interface M1
J1-1 ground connection;
J1-2 (+12V) be connected to the VCC output of second rectification circuit 3 among Fig. 2, promptly link to each other with 1 pin of IR2106 in the semi-bridge inversion Drive and Control Circuit 5 of Fig. 2;
2 pin of IR2106 in the semi-bridge inversion Drive and Control Circuit 5 of J1-3 PCS21 and Fig. 2 link to each other;
3 pin of IR2106 in the semi-bridge inversion Drive and Control Circuit of J1-4 PCS20 and Fig. 2 link to each other;
The microprocessor digital PWM produces soft start operating frequency and waveform, capacity operation operating frequency and waveform, and light modulation operating frequency and waveform; 2,3 pin by PCS20, PCS21 input control IR2106 road;
The output of the lamp current sample circuit 8 of the J1-5 of J1-5 DETECT-A in M1 and Fig. 4 links to each other;
Among J1-6 DETECT-B and Fig. 5+output of 400V sample circuit 9 links to each other;
J1-7 485-A links to each other with host computer;
J1-8 485-B links to each other with host computer;
2, half-bridge driven output circuit M2
Constitute LOUT by resistance R M14, RM6, constitute HOUT, export 2 among the IR2106 among Fig. 2,3 pin respectively to by resistance R M15, RM5;
3, the working power circuit M3 of microprocessor
VCC output by second rectification circuit 3 among Fig. 2 produces the 5V working power through filter circuit and the 7805 pressurizer U1 that diode DM4, capacitor C M5, CM7, CM8, CM9, CM10 and resistance R M13 form, for microprocessor work;
4, reset circuit M4
Constitute by resistance R M4, diode DM1 and capacitor C M11, link with RESET among the microprocessor M14;
5, crystal oscillating circuit M5
Constitute by capacitor C M13, CM14 and crystal oscillator X1, link to each other, produce microprocessor 8M operating frequency with 10,11 pin among the microprocessor M14;
6, the unit mode of operation is selected circuit M6
Adopt connector J3, its 1 pin meets VCC (+5V working power), and 2 pin are connected 3 pin ground connection with AT90PWM2-23ACTIVE among the M14;
When 1,2 pin of connector J3 connected, the unit mode of operation enabled,
When 2,3 pin of connector J3 connect, the cancellation of unit mode of operation;
7, connect the machine mode of operation and select circuit M7
Adopt connector J4, its 1 pin meets VCC (+5V working power), and 2 pin are connected 3 pin ground connection with AT90PWM2-22LEVEL among the M14;
When 1,2 pin of connector J4 connect, connect the machine mode of operation and enable,
When 2,3 pin of connector J4 connect, connect the cancellation of machine mode of operation;
8,485 communication interface circuit M8
Adopt IC chip ST485, the RO of ST485 links to each other with AT90PWM2-12RXD, the RE of ST485 links to each other with AT90PWM2-21RE, the DE of ST485 links to each other with AT90PWM2-20DE, and the DC of ST485 links to each other with AT90PWM2-5TXD, and the VCC of ST485 is+the 5V working power, the 485-B of ST485 links to each other with J1-8, the 485-A of ST485 links to each other with J1-7, is connected with resistance R M12* between 485-A and the 485-B, and the END of ST485 is an earth terminal;
9, reference point M9 is compared in the A/D conversion
By capacitor C M1, CM2 and resistance R M1, RM7
*Constitute, an end links to each other with the AT90PWM2-19AREF of M14, the other end and VCC (+5V power supply links to each other);
10, analog circuit working power filter circuit M10
Be made of capacitor C M4, CM12, an end links to each other with VCC (+5V power supply links to each other), and the other end links to each other with GND;
11, comparator reference value circuit M11
Be made of resistance R M2, RM3 and capacitor C M3, the AT90PWM2-14CMPM among the termination M14 of resistance R M2 links to each other, another termination VCC (+5V working power);
12 ,+400V testing circuit M12
By resistance R M16, RM17, RM9
*, RM10
*, capacitor C M5
*And diode DM3 formation, the AT90PWM2-15COMP0 of resistance R 16 1 termination M14, resistance R M17 one termination AT90PWM2-13COMP2, the J1-5 among the DETECT-A termination M1 causes+400V sample circuit 9 thus;
13, lamp current testing circuit M13
By resistance R M8
*, RM18, RM11 and diode DM2 constitute, RM18 one end is connected with AT90PWM2-16ADC5 among the M14, the J1-6 among the other end DECECT-B termination M1 causes lamp current sample circuit 8 thus;
14, microprocessor AT90PWM2 circuit connection diagram M14
The AT90PWM2 tie point
1 pin sky
2 pin RESET M4 RESET
3 pin skies
4 pin skies
5 pin TXD M8 TXD
6 pin VCC M3 VCC
7 pin GND
8 pin LOUT M2 LOUT
9 pin H0UT M2 H0UT
10 pin X1 M5 X1
11 pin X2 M5 X2
M8?RXD
12 pin RXD
M12COMP2
13 pin COMP2
14 pin CMPM M11CMPM
15 pin COMPO M12COMPO
16 pin ADC5 M13 ADC5
17 pin VCC M10 VCC
18 pin GND M10 ground
19 pin AREF M9 AREF
20 pin DE M8 DE
21 pin AREF M8 AREF
M7?LEVEL
22 pin LEVEL
23 pin ACTIVE M6ACTIVE
24 pin skies
11, software systems control method
After electric ballast powers on, microprocessor AT90PWM2 starts working, and behind system initialization, produces soft start power (60KHz) by microprocessor AT90PWM2, ballast is in this frequency operation, at this moment, the quartz burner filament is begun preheating, operating frequency is reduced to the operating frequency 40KHz of capacity operation after 5 seconds by 60KHz, at this moment whether its value of inspecting lamp tube current is lower than lower limit, if be lower than lower limit, then think to start failure, restart; Microprocessor AT90PWM2 is by above-mentioned repeatedly 3 times of 60KHz work, if lamp current is lower than lower limit again, then ballast starts failure, and ballast place guard mode is promptly cut off PSC by microprocessor, and PWM quits work, and starts defencive function, and the ballast red light is bright.If detect lamp current in normal range (NR), then electric ballast starts normally, and among capacity operation, green light is bright.
Init state: enable event capturing and trigger, the triggering source is the output (rising edge or high level trigger) of COMP2 (comparator 2), and trigger mode is MODE6;
Mode of operation: under the normal operation, PSC2 calculates and the output control signal according to the value of OCR2SA, OCR2SB, OCR2RA, four registers of OCR2RB; When triggering signal produced, when promptly comparator 2 was exported high level, PSC2 closed PSC output by pattern 6 modes.
This software includes 4 interrupt service routines:
1, communication receives service routine
What receive that host computer sends here is provided with the unit address, the soft start operating frequency is set, soft-start time is set, the capacity operation operating frequency is set, the lamp current normal range of operation is set, information such as light modulation working range is set.
2, communication sends service routine
This machine of transmission address, soft start operating frequency, soft-start time, capacity operation operating frequency, lamp current ,+400V operating state, light modulation operating state and ballast operating state.
3, comparator 0 interrupt service routine
Init state: ACMP2 pin rising edge produces and interrupts, and the ACMPM pin is done anti-phase input, and rising edge or high level trigger and interrupt;
Mode of operation: two electric resistance partial pressures determine anti-phase level on the ACMPM pin, when the level on the ACMP2 pin is higher than level on the ACMPM pin, COMP2 output high level is closed the output of PSC2, and triggering COMP2 interrupts, replacement related register and jump out operation circulation and remove in the interrupt service routine until triggering signal, triggering signal is removed the back and is reruned by relevant the setting;
4, comparator 2 interrupt service routines
Init state: ACMP2 pin rising edge produces and interrupts, and the ACMPM pin is done anti-phase input, and rising edge or high level trigger and interrupt;
Mode of operation: two electric resistance partial pressures determine anti-phase level on the ACMPM pin, when the level on the ACMP2 pin is higher than level on the ACMPM pin, COMP2 output high level is closed the output of PSC2, and triggering COMP2 interrupts, replacement related register and jump out operation circulation and remove until triggering signal in the interrupt service routine, triggering signal is removed the back and is reruned by relevant the setting.