CN101241854B - A wafer production technology - Google Patents

A wafer production technology Download PDF

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Publication number
CN101241854B
CN101241854B CN2007100371548A CN200710037154A CN101241854B CN 101241854 B CN101241854 B CN 101241854B CN 2007100371548 A CN2007100371548 A CN 2007100371548A CN 200710037154 A CN200710037154 A CN 200710037154A CN 101241854 B CN101241854 B CN 101241854B
Authority
CN
China
Prior art keywords
wafer
focusing ring
electrostatic chuck
edge
production technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2007100371548A
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Chinese (zh)
Other versions
CN101241854A (en
Inventor
梁昆约
刘改花
倪丹宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Manufacturing International Shanghai Corp
Original Assignee
Semiconductor Manufacturing International Shanghai Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Manufacturing International Shanghai Corp filed Critical Semiconductor Manufacturing International Shanghai Corp
Priority to CN2007100371548A priority Critical patent/CN101241854B/en
Publication of CN101241854A publication Critical patent/CN101241854A/en
Application granted granted Critical
Publication of CN101241854B publication Critical patent/CN101241854B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention provides a wafer production technology, comprising: firstly sequential depositing multi-layer medium to form the wafer, then entering etching, wherein the wafer surface needs for cleaning after each layer of medium deposition, especially the wafer edge; before etching, no metal is adhered on the wafer surface. In etching, the wafer is disposed on the electrostatic chuck; a focusing ring is arranged on at the outer edge of the wafer and covers the electrostatic chuck, wherein the focusing ring is higher than the surface of the wafer. Compared with the prior technology the inventive wafer has no metal residues on the surface before etching and effectively prevents the metal inductive electrons. Furthermore, the focusing ring is higher than the wafer surface all long time, which effectively prevents the electrons from gathering at the wafer edge so as to stop the arc discharge phenomenon.

Description

A kind of wafer production technology
Technical field
The present invention relates to wafer production technology.
Background technology
In the processing procedure of conductor etching, wafer is placed on the electrostatic chuck usually, and the zone beyond the crystal round fringes is blocked by focusing ring (Focus Ring).The electron distributions that focusing ring is used to prevent to produce by bombardment plasma is to wafer place in addition.
Yet in actual processing procedure, the excessive gathering owing to electronics on the wafer causes crystal round fringes the arc discharge phenomenon to occur usually, thereby causes wafer loss.
Through research, the reason that the excessive gathering of electronics causes on the crystal round fringes has two: one of them is because focusing ring is long service time, focusing ring will attenuation, when the thickness of focusing ring and wafer are on the same plane substantially, electronics will accumulate in crystal round fringes in a large number, causes arc discharge.
In addition and since the edge of wafer usually can processing procedure in front in residual a lot of metal patterns, these metal remained can be responded to electronics, make electronics accumulate in the edge of wafer, and then produce the phenomenon of arc discharge.
Summary of the invention
The object of the present invention is to provide a kind of wafer production technology, this technology can effectively solve the arc discharge phenomenon that produces in the etch process.
For achieving the above object, the invention provides a kind of wafer production technology, at first pass through the sequential aggradation multilayer dielectricity to form wafer, enter etch process then, wafer is placed on the electrostatic chuck, focusing ring is arranged on the outward flange of wafer and hides electrostatic chuck, wherein, after finishing, each layer of wafer dielectric deposition all need the cleaning wafer surface, and need the cleaning wafer edge, make wafer before entering etch process, do not have metal to adhere on its surface, and in etch process, keep focusing ring to be higher than the surface of wafer.
Compared with prior art, wafer of the present invention is when entering etch process, the surface of wafer can residual any metal, effectively prevent metal induction electronics, in addition, remain focusing ring and be higher than crystal column surface, prevent that effectively electronics from accumulating in crystal round fringes, and then effectively prevent the generation of arc discharge phenomenon.
Embodiment
Wafer production technology of the present invention deposits different medium at first in order to form wafer, enters etch process then.After each layer dielectric deposition finishes, all need the cleaning wafer surface, especially need the cleaning wafer edge.
In etch process, wafer is placed on the electrostatic chuck, and focusing ring is arranged on the outward flange of wafer and hides electrostatic chuck.
It is clean that the edge of the wafer that uses needs to keep before the electrostatic chuck of packing into, promptly can be in preceding continuous processing procedure at the edge of wafer kish, effectively prevent because kish to the induction of electronics, causes electronics to be collected at the surface of wafer, thereby causes the arc discharge phenomenon.
In the process of electronics sputter, electrostatic chuck can help electronics evenly to distribute on the surface of wafer.In addition, when the upper surface and the crystal column surface of focusing ring is in same plane, then need in time to change focusing ring.

Claims (1)

1. wafer production technology, at first pass through the sequential aggradation multilayer dielectricity to form wafer, enter etch process then, wafer is placed on the electrostatic chuck, focusing ring is arranged on the outward flange of wafer and hides electrostatic chuck, it is characterized in that: after each layer of wafer dielectric deposition finishes, all need the cleaning wafer surface, and need the cleaning wafer edge, make wafer before entering etch process, do not have metal to adhere on its edge, and in etch process, keep focusing ring to be higher than the surface of wafer.
CN2007100371548A 2007-02-06 2007-02-06 A wafer production technology Expired - Fee Related CN101241854B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2007100371548A CN101241854B (en) 2007-02-06 2007-02-06 A wafer production technology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2007100371548A CN101241854B (en) 2007-02-06 2007-02-06 A wafer production technology

Publications (2)

Publication Number Publication Date
CN101241854A CN101241854A (en) 2008-08-13
CN101241854B true CN101241854B (en) 2011-06-01

Family

ID=39933244

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2007100371548A Expired - Fee Related CN101241854B (en) 2007-02-06 2007-02-06 A wafer production technology

Country Status (1)

Country Link
CN (1) CN101241854B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102709254A (en) * 2012-06-11 2012-10-03 上海宏力半导体制造有限公司 Method for reducing arc discharge of wafer, wafer structure and method for manufacturing integrated circuit
CN105826240B (en) * 2015-01-07 2019-05-31 中芯国际集成电路制造(上海)有限公司 The method for avoiding wafer from generating point discharge defect
CN110670049A (en) * 2019-11-19 2020-01-10 武汉新芯集成电路制造有限公司 Vapor deposition method and device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6444027B1 (en) * 2000-05-08 2002-09-03 Memc Electronic Materials, Inc. Modified susceptor for use in chemical vapor deposition process
CN1508858A (en) * 2002-12-17 2004-06-30 华邦电子股份有限公司 Crystal circle center correcting device and correcting method
US6837967B1 (en) * 2002-11-06 2005-01-04 Lsi Logic Corporation Method and apparatus for cleaning deposited films from the edge of a wafer
CN1692475A (en) * 2003-05-12 2005-11-02 索绍株式会社 Plasma etching chamber and plasma etching system using same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6444027B1 (en) * 2000-05-08 2002-09-03 Memc Electronic Materials, Inc. Modified susceptor for use in chemical vapor deposition process
US6837967B1 (en) * 2002-11-06 2005-01-04 Lsi Logic Corporation Method and apparatus for cleaning deposited films from the edge of a wafer
CN1508858A (en) * 2002-12-17 2004-06-30 华邦电子股份有限公司 Crystal circle center correcting device and correcting method
CN1692475A (en) * 2003-05-12 2005-11-02 索绍株式会社 Plasma etching chamber and plasma etching system using same

Also Published As

Publication number Publication date
CN101241854A (en) 2008-08-13

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CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110601

Termination date: 20190206