CN101227449A - Design method of COFDM channel decoder - Google Patents
Design method of COFDM channel decoder Download PDFInfo
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- CN101227449A CN101227449A CNA2007100172667A CN200710017266A CN101227449A CN 101227449 A CN101227449 A CN 101227449A CN A2007100172667 A CNA2007100172667 A CN A2007100172667A CN 200710017266 A CN200710017266 A CN 200710017266A CN 101227449 A CN101227449 A CN 101227449A
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Abstract
The invention relates to an orthogonal frequency division modulation (COFDM) decoder, in particular to a design method of a frequency convolutional de-interleaver in the COFDM decoder, which combines the frequency de-interleave or sign de-interleave or bit de-interleave with an FFT processor in the data processing flow of the COFDM decoder, and changes the traditional method of placing on the back of DQPSK/QAM or any other modal of a modem into the method of placing in the front of the modem. The frequency or sign or bit de-interleave, FFT bit modem and reading sequence of the modem are combined integrally to obtain an address sequence which is collated independently on the basis of the frame of the COFDM decoder, which can be realized in the process of reading out data of the modem. The invention simplifies hardware and software which are demanded in the frame of the COFDM decoder, and reduces the capacity of a data register which is demanded in the process of storing intermediate object, and largely reduces calculation requests of the FFT processor and the modem.
Description
Technical field
The invention relates to the method for designing of the frequency deinterleaver in the COFDM channel decoder of COFDM (coded orthogonal division modulation) channel decoder, particularly DAB (digital audio broadcasting standard) receiver.The present invention is equally effective to the design of the COFDM channel decoder in other the digital receiver, as DVB-T/H (handheld digital television terrestrial broadcasting), DRM (another kind of digital audio broadcasting standard, be used for the intermediate waves frequency range) DMB-T/H (China Digital TV terrestrial broadcasting standard), the COFDM channel decoder of CMMB receivers such as (China Mobile's digital television broadcasting standards).
Background technology
Traditional COFDM channel decoder program and framework can be had gained some understanding by following description, and Fig. 1 has showed the block diagram of traditional DAB receiver COFDM channel decoder, shows required memory space with DAB pattern 1.In traditional DAB receiver COFDM decoder, the DAB symbol that receives (i.e. I in time domain, the Q data) at first being converted into 2048 by FFT (Fast Fourier Transform, rapid fourier change) processor also is to contain I, the frequency subcarriers data of Q component.Be reduced into binary bit code by the DQPSK modulator-demodulator then.But the bit code of DQPSK (modulation of difference four phase shifts) demodulator reduction may be the mode with soft sign indicating number to be presented, and promptly available 2,4 or 6 bit numbers are represented the sign indicating number of 1 bit-binary.
Because need two DAB symbols during the DQPSK modem processes, a promptly current symbol and a symbol before, so it needs twice FFT result, a promptly current result and a result before, the FFT result is stored in RAM 3 and RAM 4.
Be distributed in number on the frequency subcarriers and intentionally confused at coding side and resist the frequency attenuating effect that in transmission, causes, in the DAB standard, be called frequency interlacing, in the DVB-T/H standard, be called symbol interleaving, in the DRM standard, be also referred to as Bit Interleave.The number that is intentionally confused frequency subcarriers is sequenced when receiving terminal is done deinterleaving again.2048 couples of I when the frequency deinterleaving under the DAB pattern 1, the Q number is not all useful, has only recovered 1536 couple wherein after the frequency deinterleaving, other 512 logarithmic codes have nothing to do.
Number is also intentionally confused the attenuating effect of resisting the time domain that causes in transmission at the COFDM coding side in time domain, and its scope has related to 16CIF frame (Common InterleavedFrame).Before the processor of error correcting forward of receiving terminal, second deinterleaver also will be arranged, be called the time de-interweaving device again.These two deinterleavers of frequency and time have all used buffer (RAM 1 and RAM 2), and all there has been buffer in all numbers that are disturbed, as long as sequence the order of read and write in advance, number just can sequence again then.
Again the number that sequences is by error correcting processor forward, and promptly FEC or Viterbi decoder are done further processing.Remain in the desired information code of this one-level of fec decoder device and to be embedded in the redundant code, show as soft decision sign indicating number.This soft decision sign indicating number, or redundant code is to be converted into binary bit stream at FEC or in Viterbi decoder.When error correcting processor is forward read into soft decision sign indicating number from the buffer of deinterleaving, or during redundant code, the punctured codes information of encoder is also provided by square frame 5 simultaneously.
2048 couples of I, digital data buffer (RAM1) storage that needs 2048 * 2 * N bit usually of Q, N is the bit number of soft decision sign indicating number, normally 2,4 or 6.For example, N=4, RAM1 just need have 16384 bits.
The total volume of FFT dateout buffer RAM3 and RAM4 is 2 * 2048 * 2 * d_w, and d_w is the data live width of fft processor, normally 16 bits or more.Thereby RAM 3 and RAM 4 always have 2 * 4096 * d_w bit, can deposit the I on 2048 subcarriers, the data of Q component, and the width of each data is d_w bits.Square frame 8 is the address generators of reading of DQPSK, and is used for selecting from RAM3 and RAM4 data for the DQPSK demodulator processes.
Buffer RAM2 stores the I of 16CIF frame usually, the Q number, and total n_symbol * 1536 couples, n_symbol is the used symbolic number of DAB channel decoder, it is that the stream bit rate that will separate with the DAB decoder is relevant.The stream bit rate of each subchannel all is variable in DAB broadcasting, and audio frequency is generally the 64K-192K bit, and video can be 384K bit or higher, and data/literal can be between the 8K-32K bit, so long as the integral multiple of 8Kbit.If the DAB decoder reaches the complete solution code check, be exactly 18 at 1 time n_symbol of DAB pattern so.
Square frame 7 is energy scramble process devices, and it is changing again in the energy scrambling of COFDM encoder-side.It is placed on here just for the integrality of COFDM decoding program is described.
Summary of the invention
The purpose of this invention is to provide a kind of saving memory space, can reduce the method for designing of the processing demands of COFDM decoder.
The objective of the invention is such realization, the method for designing of COFDM channel decoder, it is characterized in that: the frequency deinterleaving or symbolic solution interweaves or the method for bit deinterleaving processing procedure before being placed on modulator-demodulator, modulator-demodulator can be that DQPSK/QAM or other are any type of in the flow chart of data processing of COFDM channel-decoding.
Described flow chart of data processing is as follows:
-at least one fft processor, the symbol that it advances the COFDM decoder to input is transformed into frequency domain from time-domain;
Frequency subcarriers data invalid in the FFT output symbol have been removed in-at least one frequency deinterleaving or symbolic solution interweaves or the bit deinterlacing processor, only export effective frequency subcarriers data;
-frequency deinterleaving output state is used for storing the effective frequency number of sub certificate of required symbol;
-at least one DQPSK or QAM or other any type of modulator-demodulators, it obtains redundant soft decision sign indicating number from effective frequency subcarriers data;
-at least one time de-interweaving device before error correcting processor or Viterbi decoder forward recovers the code stream that is disturbed at coding side in time domain;
-at least one error correcting processor or Viterbi decoder forward, it carries out error correcting computing forward, recovers binary bit stream from the soft decision sign indicating number of redundancy;
-at least one energy descrambler, it carries out the inverse operation of the energy scrambler of coding side, removes the energy scrambling in binary bit stream.
Described frequency deinterleaving/symbolic solution interleaver/bit deinterleaving was finished before modulator-demodulator.
Fig. 2 is based on a framework example of the COFDM decoder of this flow process, the framework 1 of DAB channel decoder.
Above-mentioned method further is reduced to the frequency deinterleaving or symbolic solution interweaves or the method that merges processing with the FFT bit reversal is handled in the bit deinterleaving.
Described flow chart of data processing is as follows:
The processor of-at least one FFT+ frequency deinterleaving merging, the symbol that it advances the COFDM decoder to input is transformed into frequency domain from time-domain, and has removed invalid frequency subcarriers, only exports effective frequency subcarriers data;
-FFT output state is used for storing the effective frequency number of sub certificate of required symbol;
-at least one DQPSK or QAM or other any type of modulator-demodulators, it obtains redundant soft decision sign indicating number from effective frequency subcarriers data;
-at least one time de-interweaving device before error correcting processor or Viterbi decoder forward recovers the code stream that is disturbed at coding side in time domain;
-at least one error correcting processor or Viterbi decoder forward, it carries out error correcting computing forward, recovers binary bit stream from the soft decision sign indicating number of redundancy;
-at least one energy descrambler, it carries out the inverse operation of the energy scrambler of coding side, removes the energy scrambling in binary bit stream.
The bit reversal of the FFT of described merging and frequency deinterleaving/symbolic solution interleaver/bit deinterleaving is to realize in proper order in the write data of finishing before the modulator-demodulator of resetting with an address when FFT exports operation result.Fig. 5 is based on a framework example of the COFDM decoder of this flow process, the framework 2 of DAB channel decoder.
Above-mentioned method can be again a step be reduced to the frequency deinterleaving or symbolic solution interweaves or the bit deinterleaving is handled, processing of FFT bit reversal and modulator-demodulator reading sequence three close the read data order of 11 single preface, realize from the data readout of FFT data storage at modulator-demodulator.
Described flow chart of data processing is as follows:
The fft processor of-at least one no bit counter-rotating level, the symbol that it advances the COFDM decoder to input is transformed into frequency domain from time-domain, and the data that are transformed into the symbol of frequency domain have just been stayed the operational data memory of FFT;
-at least one FFT bit reversal, the address generator of reading address three unification of frequency/symbol/bit deinterleaving and DQPSK demodulator;
-at least one DQPSK or QAM or other any type of modulator-demodulators, it obtains redundant soft decision sign indicating number from effective frequency subcarriers data;
-at least one time de-interweaving device before error correcting processor or Viterbi decoder forward recovers the code stream that is disturbed at coding side in time domain;
-at least one error correcting processor or Viterbi decoder forward, it carries out error correcting computing forward, recovers binary bit stream from the soft decision sign indicating number of redundancy;
-at least one energy descrambler, it carries out the inverse operation of the energy scrambler of coding side, removes the energy scrambling in binary bit stream.
The fft processor of described no bit counter-rotating level is stayed the FFT result its working storage, the FFT bit reversal, frequency/symbol/bit deinterleaving is to finish at the reading data course of modulator-demodulator, and it is to realize in proper order with the read data of a substance row address.Fig. 7 is based on a framework example of the COFDM decoder of this flow process, the framework 3 of DAB channel decoder.
Can see from form 1 that based on the required memory of DAB COFDM decoder method of the present invention and traditional DAB COFDM decoder method and the comparison of processor the traditional required RAM volume of method of the required RAM volumetric ratio of method of the present invention has reduced greatly.The hypothesis soft decision sign indicating number of 4 bits in this table, the output of fft processor is the data of 16 bits.
Except the volume of memory reduced, the method for this invention had also reduced the processing demands of modulator-demodulator, reduced to 1536 pairs from 2048 couple of conventional method.
Except the volume of memory reduces and needs the less modem processes, after an independent frequency deinterleaving process no longer independently existed, all devices relevant with the frequency deinterleaving had also all been given up, as read/write data and address generator.
Table 1 is the required memory of COFDM decoder method of the present invention and traditional COFDM decoder method and the comparison of processor, is example with the COFDM decoder of DAB receiver:
| Traditional COFDM decoder framework | COFDM decoder framework 1 of the present invention is based on the method for frequency deinterleaving before modulator-demodulator | |
|
|
| The FFT RAM that works | 2048×2× 16bit | 2048×2× 16bit | 2048×2× |
2×2048×2× 16bit |
| RAM 1 | 2048×2× 16bit | - | - | |
| |
2×2048×2× |
2×1536×2 × |
2×1536×2 ×16bit | - |
| Need the data handled in the COFDM symbol | 2048 pairs | 1536 pairs | 1536 pairs | 1536 pairs |
| Than traditional | 0 | 96Kbit， | 96Kbit， | 128Kbit， |
| The RAM volume that framework is saved | 37.5％ | 37.5％ | 50％ |
Carry out framework
The method of this invention of describing here that shows with illustration also can realize with software or hardware; Or the mode of soft or hard combination realizes.
The technical method of this invention can be applied to the COFDM decoder of other purposes, comprises that those are used in the digital communication standard at other.For example, method with this invention can be used in the COFDM decoder design of DVB-H (handheld digital television terrestrial broadcasting standard) receiver, in the COFDM decoder design of DMB-T/H (China Digital TV terrestrial broadcasting standard) receiver, in the COFDM decoder design of CMMB (Chinese digital moving-tv terrestrial broadcasting standard) receiver etc.
The invention will be further described below in conjunction with embodiment.
Description of drawings
Fig. 1 is the block diagram of traditional C OFDM channel decoder;
Fig. 2 is embodiments of the invention 1, based on a kind of framework of the DAB COFDM decoder of frequency deinterleaving before modulator-demodulator;
Fig. 3 is the block diagram of the FFT of traditional framework;
Fig. 4 is the processor block diagram that FFT of the present invention and frequency deinterleaving combine;
Fig. 5 is embodiments of the invention 2, a kind of framework of the DABCOFDM decoder that merges based on FFT and frequency deinterleaving;
Fig. 6 is the framework of the FFT of no bit counter-rotating of the present invention;
Fig. 7 is the embodiment of the invention 3, based on the frequency deinterleaving, and a kind of framework of reading the three-in-one DAB COFDM decoder in address of FFT bit reversal and modulator-demodulator.
Embodiment
The decoding program of COFDM channel decoder of the present invention
If change the program of COFDM channel-decoding, the framework of traditional COFDM decoder just can be simplified.The invention describes the program of an altered COFDM channel-decoding, after it moves on to fft processor to frequency deinterleaving process from the back of modulator-demodulator, before the modulator-demodulator.Make the result who does not change the COFDM decoder like this.
Fft processor itself has one-level data rearrangement process, is called bit reversal again, because rearrangement process is exactly the address of the digital binary form of counter-rotating.The COFDM channel decoding method of this invention moves on to the frequency deinterleaving front of modulator-demodulator from the back of modulator-demodulator, the back of fft processor, Fig. 2 is based on example one framework of this invention, the block diagram of COFDM channel decoder framework, the frequency deinterleaving is advanced to the front of DQPSK modulator-demodulator.DAB COFDM channel decoder framework of the present invention is similar to traditional DAB COFDM channel decoder framework.Because frequency deinterleaving reach, 512 pairs of irrelevant data have just been removed, and the volume of data buffer has just reduced.The RAM 1 of Fig. 1 has not needed yet.The DQPSK modulator-demodulator is as long as handle 1536 pairs of data.
After the frequency deinterleaving reach, can be again merge with the bit reversal level of fft processor.This bi-level treatment all is that same number is carried out layout again, so this bi-level treatment can merge, and can access identical decoded result.Traditional framework with fft processor usefulness of the present invention is drawn in respectively among Fig. 3 and Fig. 4.The volume that is used to deposit fft processor result's RAM among Fig. 4 has only 1536 * 2 * n bit, and is littler than the volume of the RAM that deposits the fft processor result among Fig. 3.
Fig. 5 is example two frameworks of this invention, and the block diagram of COFDM channel decoder framework has wherein been used the processor after FFT and frequency deinterleaving merge.DAB COFDM channel decoder framework of the present invention is similar to traditional DAB COFDM channel decoder framework.Yet because the bit reversal of frequency deinterleaving and FFT combines, square frame 3 among Fig. 1 and RAM1 have been removed in the COFDM channel decoder framework of the inventive method that Fig. 5 represents, the frequency deinterleaving no longer is that one of COFDM channel decoder is independently handled level.Because the inventive method can just can be selected 1536 couples of useful I for use before modulator-demodulator work, the Q number has just reduced than the volume (2 * 2048 long word) with the dateout buffer (RAM3 and RAM4) of conventional method among Fig. 1 so be used for storing the volume (2 * 1536 long word) of the FFT dateout buffer (RAM3 and RAM4) of current and symbol before among Fig. 5.
Fig. 6 and Fig. 7 have represented the COFDM decoder framework of further simplifying to previously described invention program, promptly based on example three of the present invention, and the block diagram of DAB COFDM channel decoder framework.Do not do bit reversal in the framework of the fft processor here, the result of the current and symbol before of fft processor just directly stays in two operational data buffers (RAM 3, and RAM 4) of FFT, as Fig. 6.Because the result of FFT stays in two operational data buffers, so be used for depositing FFT result's data buffer, the RAM 3 among Fig. 3 has just given up in the FFT framework that the present invention shown in Figure 6 uses.The bit reversal of the fft processor here, frequency deinterleaving and DQPSK demodulator read data three programs combine, number being finished by the process of reading the address by modulator-demodulator by equivalence in the process that modulator-demodulator transmits.Square frame 8 produces the required program that this merging is carried out in the address of reading.The RAM that always needs in this framework further is reduced, and table 1 has provided the required memory of DAB decoder method of the present invention and traditional DAB decoder method and the comparison details of processor.
Can see that from table 1 the traditional required RAM volume of method of the required RAM volumetric ratio of method of the present invention has reduced greatly.The hypothesis soft decision sign indicating number of 4 bits in this table, the output of fft processor is the data of 16 bits.
Except the volume of memory reduced, the method for this invention had also reduced the processing demands of DQPSK demodulator.Except the less modulation of needs was handled, after an independent frequency deinterleaving process no longer independently existed, all processing procedures relevant with the frequency deinterleaving had also all been given up, as read/write data and address generator.
The time de-interweaving device, FEC or Viterbi decoder and energy descrambler are also contained in the framework of COFDM decoder, have formed based on one of the inventive method complete COFDM decoder framework.
Claims (9)
1.COFDM the method for designing of channel decoder is characterized in that: in the flow chart of data processing of COFDM channel-decoding the frequency deinterleaving or symbolic solution interweaves or bit deinterleaving processing procedure is placed on method before any type of modulator-demodulator of DQPSK or QAM or other.
2. the method for designing of COFDM channel decoder according to claim 1 is characterized in that: described frequency deinterleaving or the method that symbolic solution interweaves or the bit deinterleaving is handled and the merging of FFT bit reversal is handled.
3. according to claim 1, the method for designing of 2 described COFDM channel decoders, it is characterized in that: described frequency deinterleaving or symbolic solution interweaves or the bit deinterleaving is handled, processing of FFT bit reversal and DQPSK or QAM or other any type of modulator-demodulator reading sequence threes close the read data address sequence of 11 single preface, realize from the data readout of FFT data storage at modulator-demodulator.
4. the method for designing of COFDM decoder according to claim 1 is characterized in that: described flow chart of data processing comprises:
-at least one fft processor, the symbol that it advances the COFDM decoder to input is transformed into frequency domain from time-domain;
Invalid frequency subcarriers in the FFT output symbol has been removed in-at least one frequency deinterleaving or symbolic solution interweaves or the bit deinterlacing processor, only exports effective frequency subcarriers data;
-frequency deinterleaving output state is used for storing the effective frequency number of sub certificate of required symbol;
-at least one DQPSK or QAM or other any type of modulator-demodulators, it obtains redundant soft decision sign indicating number from effective frequency subcarriers data;
-at least one time de-interweaving device before error correcting processor or Viterbi decoder forward recovers the code stream that is disturbed at coding side in time domain;
-at least one error correcting processor or Viterbi decoder forward, it carries out error correcting computing forward, recovers binary bit stream from the soft decision sign indicating number of redundancy;
-at least one energy descrambler, it carries out the inverse operation of the energy scrambler of coding side, removes the energy scrambling in the binary bit stream.
5. according to the design of claim 1,4 described COFDM decoders, it is characterized in that: described frequency deinterleaving/symbolic solution interleaver/bit deinterleaving was finished before DQPSK or QAM or other any type of modulator-demodulators.
6. according to claim 1, the method for designing of 2 described COFDM decoders is characterized in that: described flow chart of data processing comprises:
The processor of-at least one FFT+ frequency deinterleaving merging, the symbol that it advances the COFDM decoder to input is transformed into frequency domain from time-domain, and has removed invalid frequency subcarriers in the FFT output symbol, only exports effective frequency subcarriers data;
-FFT output state is used for storing the effective frequency number of sub certificate of required symbol;
-at least one DQPSK or QAM or other any type of modulator-demodulators, it obtains redundant soft decision sign indicating number from effective frequency subcarriers data;
-at least one time de-interweaving device before error correcting processor or Viterbi decoder forward recovers the code stream that is disturbed at coding side in time domain;
-at least one error correcting processor or Viterbi decoder forward, it carries out error correcting computing forward, recovers binary bit stream from the soft decision sign indicating number of redundancy;
-at least one energy descrambler, it carries out the inverse operation of the energy scrambler of coding side, removes the energy scrambling in the binary bit stream.
7. according to the design of claim 1,2,6 described COFDM decoders, it is characterized in that: the bit reversal of the FFT of described merging and frequency deinterleaving/symbolic solution interleaver/bit deinterleaving was finished before DQPSK or QAM or other any type of modulator-demodulators, when FFT output operation result, realize, only export effective frequency subcarriers data with the write data sequence of the bit reversal of a FFT and frequency deinterleaving/symbolic solution interleaver/bit deinterleaving merging.
8. according to the method for designing of claim 1,2,3 described COFDM decoders, it is characterized in that: described flow chart of data processing comprises:
The fft processor of-at least one no bit counter-rotating level, the symbol that it advances the COFDM decoder to input is transformed into frequency domain from time-domain, and the data that are transformed into the symbol of frequency domain have just been stayed the operational data memory of FFT;
-at least one FFT bit reversal, the address generator of reading address three unification of frequency/symbol/bit deinterleaving and modulator-demodulator is only selected effective frequency subcarriers data;
-at least one DQPSK or QAM or other any type of modulator-demodulators, it obtains redundant soft decision sign indicating number from effective frequency subcarriers data;
-at least one time de-interweaving device before error correcting processor or Viterbi decoder forward recovers the code stream that is disturbed at coding side in time domain;
-at least one error correcting processor or Viterbi decoder forward, it carries out error correcting computing forward, recovers binary bit stream from the soft decision sign indicating number of redundancy;
-at least one energy descrambler, it carries out the inverse operation of the energy scrambler of coding side, removes the energy scrambling in the binary bit stream.
9. according to claim 1,2,3, the method for designing of 8 described COFDM decoders, it is characterized in that: the fft processor of described no bit counter-rotating level is stayed the FFT result its working storage, the FFT bit reversal, frequency/symbol/bit deinterleaving is finishing to FFT working storage reading data course at modulator-demodulator, it is the FFT bit reversal with one, the read data sequence that the address generator of reading address three unification of frequency/symbol/bit deinterleaving and modulator-demodulator produces realizes, only selects effective frequency subcarriers data.
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| CN101777962A (en) * | 2009-12-22 | 2010-07-14 | 华为技术有限公司 | Method and device for processing uplink data and base station |
| CN102316056A (en) * | 2010-07-08 | 2012-01-11 | 中兴通讯股份有限公司 | Method and device for processing baseband data |
| CN102611522A (en) * | 2011-01-25 | 2012-07-25 | 中兴通讯股份有限公司 | Data reconstruction method and device |
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| CN105721929A (en) * | 2014-12-02 | 2016-06-29 | 晨星半导体股份有限公司 | Frequency de-interleaving and time de-interleaving circuit, frequency de-interleaving and time de-interleaving method, and receiving circuit of digital television |
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| CN101777962A (en) * | 2009-12-22 | 2010-07-14 | 华为技术有限公司 | Method and device for processing uplink data and base station |
| CN102316056A (en) * | 2010-07-08 | 2012-01-11 | 中兴通讯股份有限公司 | Method and device for processing baseband data |
| CN102316056B (en) * | 2010-07-08 | 2014-11-05 | 中兴通讯股份有限公司 | Method and device for processing baseband data |
| CN102611522A (en) * | 2011-01-25 | 2012-07-25 | 中兴通讯股份有限公司 | Data reconstruction method and device |
| CN102611522B (en) * | 2011-01-25 | 2014-12-31 | 中兴通讯股份有限公司 | Data reconstruction method and device |
| CN102843592A (en) * | 2012-01-12 | 2012-12-26 | 北京乾图方园软件技术有限公司 | Method and device for receiving and applying China mobile multimedia broadcasting (CMMB) data |
| CN103718490A (en) * | 2013-04-26 | 2014-04-09 | 华为技术有限公司 | De-interleaver method and communication system |
| WO2014172895A1 (en) * | 2013-04-26 | 2014-10-30 | 华为技术有限公司 | Deinterleaving method and communications system |
| CN105721929A (en) * | 2014-12-02 | 2016-06-29 | 晨星半导体股份有限公司 | Frequency de-interleaving and time de-interleaving circuit, frequency de-interleaving and time de-interleaving method, and receiving circuit of digital television |
| CN105721929B (en) * | 2014-12-02 | 2018-08-21 | 晨星半导体股份有限公司 | Frequency release of an interleave and time release of an interleave circuit and method and the receiving circuit of DTV |
| CN109086225A (en) * | 2018-07-23 | 2018-12-25 | 广州慧睿思通信息科技有限公司 | The data processing method of FFTC output removal direct current carrier and output segment shift based on PKTDMA |
| CN109086225B (en) * | 2018-07-23 | 2021-06-04 | 广州慧睿思通信息科技有限公司 | Data processing method for removing direct current carrier and outputting segmented shift by FFTC (frequency filter time division multiple access) output based on PKTDMA (public key time division multiple access) |
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Application publication date: 20080723 |