CN101222422A - Just expandable network scheduling method - Google Patents
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- CN101222422A CN101222422A CNA2007101333223A CN200710133322A CN101222422A CN 101222422 A CN101222422 A CN 101222422A CN A2007101333223 A CNA2007101333223 A CN A2007101333223A CN 200710133322 A CN200710133322 A CN 200710133322A CN 101222422 A CN101222422 A CN 101222422A
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Abstract
The invention provides a fair expansible network scheduling method. A router adopts the way of input queue switch. Each input interface stores one group of virtual output queue. Each data packet received by each line card is respectively stored in the corresponding virtual output queue according to different output destinations. Under the control of a scheduler, data packets are switched to different output interfaces by an exchange mechanism. The invention is characterized in that on the one hand, a plurality of schedulers with smaller capacity (sub schedulers for shorten) are arranged to work cooperatively so as to complete the switching scheduling task of a plurality of interfaces with large capacity, which is high in speed and has expansible scope; in the practical application, the schedulers can be configured into schedulers with different capacities and numbers of interfaces according to need, which radically solves the problems of limited single scheduler capacity and limited interface; on the other hand, the reasonable distribution of the priority level of each sub scheduler ensures that the scheduling is fair and improves the efficiency of the whole scheduler.
Description
Technical field
The present invention relates to be used for the scheduler of the network switching equipment, be specifically related to a kind of fair a scalable network dispatching method from a plurality of input port data dispatching bags at least one output port.
Background technology
The core technology of network exchange is exactly the high performance network switching equipment.Development along with network exchange, next generation network not only needs bigger capacity and more port, and the performances such as delay, throughput and fairness of exchange are also had higher requirement: the one, to handle more port, the 2nd, can realize higher port speed, the 3rd, can support more senior method of service.
At present, the exchanged form of router employing mainly contains three kinds: input rank exchange, output queue exchange and input and output combined exchange.Traditional router adopts the output queue structure mostly, and promptly bag is buffered in the output of switch.Though the exchange based on output queue has optimum performance, because the necessary N of the operating rate of buffer is difficult to adapt to the occasion that exchanges at a high speed doubly to the speed of input link.Another program is to adopt input rank to exchange, and in this exchange, in fact switching fabric is exactly one group of physical switch, realizes any n connection and disconnection that is input to any n output, and the He Guanze that opens of switch is controlled by the control signal that scheduler produces.Usually in a cell time, an input can only link to each other with an output, goes to the phenomenon of same destination owing to usually have a plurality of bags from different inputs, thereby causes the end of a thread obstructing problem of input rank.It is exactly to be positioned at the bag of formation head owing to must various reasons fail in time to transmit and it has blocked processing to bread after it that so-called the end of a thread blocks, even the bag of back can be transmitted.The end of a thread choking phenomenon can cause the throughput of whole input rank exchange limited.
For this reason, in the input rank exchanged form, need preserve one group of VOQ VOQ for each input port.Input port 1～n from ply-yarn drill among Fig. 1 links to each other with n input of exchange mechanism respectively, the packet that each ply-yarn drill received is left in respectively in the corresponding VOQ according to the difference of its output destination, under the control of scheduler, be switched to n different output port by exchange mechanism.Compare with traditional scheduling structure, this VOQ mechanism has solved the end of a thread obstructing problem of puzzlement input rank exchanged form, can make the maximum throughput rate of system reach 100%.Along with the continuous proposition that input rank is exchanged deepening continuously of research and new algorithm, the input rank exchange realizes the characteristics that limited by memory access rate because of its hardware becomes the main mode of network switch fabric gradually.
But, being subjected to the restriction of integrated circuit technology factors such as single chip-scale, I/O number of pins, power consumption, the exchange capacity that can realize on the monolithic IC and scheduling capacity all are limited, can only realize 32 exchange or scheduling between the port usually.Want on monolithic integrated circuit, to realize that more massive exchange and scheduling feature (as 256 * 256) are just very difficult.Therefore, need work out a kind of new scheduling structure to satisfy multiport, the jumbo requirement that the next generation network clearing house needs.
Summary of the invention
At above-mentioned defective, the invention provides a kind of fair a scalable network dispatching method and device thereof, finish the jumbo exchange scheduler task of multiport by the less scheduler of a plurality of capacity (abbreviating sub-scheduler as) collaborative work on the one hand, not only speed height, and scale can be expanded.In actual applications, can be configured to the scheduler of different capabilities and port number as required, fundamentally solve the problem of single scheduler capacity and port restricted.On the other hand, by the priority of each sub-scheduler of reasonable distribution, guaranteed that this scheduling is fair, has improved the efficient of whole scheduler.
Above-mentioned target of the present invention is realized by following technical proposals: a kind of fair a scalable network dispatching method, router adopts the input rank exchanged form, each input port is preserved one group of VOQ, the packet that each ply-yarn drill received is according to the difference of its output destination, leave in respectively in the corresponding VOQ, under the control of scheduler, be switched to different output ports by exchange mechanism, it is characterized in that, be provided with:
Some identical input port processors: indicate according to the input interface signal, the packet that is received is left in corresponding VOQ respectively according to its difference of exporting the destination, packet header is input in the scheduler, and scheduler is exported to exchange mechanism to the control signal that scheduling produces simultaneously;
The sub-scheduler that some functions are identical: finish k * nk scheduler function, k the input that links to each other with this scheduler all can be filed a request to whole nk output port, finishes the coupling that can realize k input port and k output port after the sub-scheduler task at most; Each sub-scheduler connects according to belt mode, each sub-scheduler concurrent working, and the AOP signal that sub-scheduler schedules is finished generation sends the sub-scheduler of next stage to, and the AOP signal has indicated scheduling to finish the seizure condition of output port.This signal bits is the n position, if the k position is 1, represents that then k output port is occupied, and the sub-scheduler of next stage can not take this port;
Central controller: take turns scheduling and finish the back and send the signal that begins to exchange when one, notify the preparation of input port processor and exchange mechanism to carry out the exchange and the forwarding of data simultaneously to each sub-scheduler.
The present invention improves the performance of scheduler by the priority of adjusting each sub-scheduler, as: the zero clearing of AOP signal is realized the distribution of each sub-dispatcher priority by what control each sub-scheduler in the different moment.
The concrete grammar of realizing the distribution of each sub-dispatcher priority is: with n cell is a dispatching cycle, when first cell of each dispatching cycle begins, and the AOP zero clearing of sub-scheduler 1 and sub-scheduler n; When second cell begins, the AOP zero clearing of sub-scheduler 3; When the 3rd cell begins, the AOP zero clearing of sub-scheduler 5 ..., when (n/2-1) individual cell begins, the AOP zero clearing of sub-scheduler n-1; When n/2+1 cell begins, the AOP zero clearing of sub-scheduler 2; When n/2+2 cell begins, the AOP zero clearing of sub-scheduler 5; When n cell begins, the AOP zero clearing of sub-scheduler n-2.
Advantage of the present invention and beneficial effect:
The invention provides a kind of fair a scalable network exchange dispatching device,, can realize the requirement of big capacity, multiport by a plurality of sub-schedulers are contacted according to circular pattern based on the input rank exchange; The present invention proposes a kind of method of distributing each sub-dispatcher priority simultaneously, by the priority of reasonable each sub-scheduler of arrangement, it is identical to have guaranteed that each sub-scheduler is taken turns the chance of obtaining dispatching priority in dispatching cycle one, thereby is a kind of equity dispatching.
Description of drawings
Fig. 1 is input rank exchange (IQ) structure;
Fig. 2 is the fair a scalable network exchange dispatching method that the present invention proposes;
Fig. 3 is the schematic diagram that distributes each sub-dispatcher priority method;
Fig. 4 is a scheduler fundamental diagram of not adjusting priority assignment;
Fig. 5 is the concrete zero clearing time diagram of each sub-scheduler;
Fig. 6 is the distribution principle figure of a seed dispatcher priority.
Embodiment
Fig. 1 has described the switch architecture based on input rank, specifically comprises:
Some identical input ports (101-10n): input port is accepted the packet from the outside, according to the difference of packet rs destination address, is stored respectively in corresponding VOQ;
VOQ (111-11n ..., 121-12n): be used to deposit the packet of going to same destination address.
Exchange mechanism (131): be actually one group of physical switch, realize any n connection and disconnection that is input to any n output, the He Guanze that opens of switch is controlled by the control signal that scheduler (141) produces.
Scheduler (141): determine the pairing of input port and output port according to the destination of dispatching algorithm and packet, produce control signal and send switching fabric to.
Output port (151-15n): accept to send external agency simultaneously to from the packet transmission of exchange mechanism.
Fig. 2 has provided a kind of multiport and extendible network exchange dispatching patcher of scale of being used for provided by the invention, specifically comprises:
Some identical input ports (200-20n): indicate according to the input interface signal, the packet that is received is left in corresponding VOQ respectively according to its difference of exporting the destination, packet header is input in the scheduler, and scheduler is input to scheduling result in the port simultaneously.
Some identical sub-schedulers (210-211n): finish k * nk scheduler function, k the input that links to each other with this scheduler all can be filed a request to whole nk output port, finishes the coupling that can realize k input port and k output port after the sub-scheduler task at most.The AOP signal that sub-scheduler schedules is finished generation sends the sub-scheduler of next stage to, and the AOP signal has indicated scheduling to finish the seizure condition of output port.This signal bits is the n position, if the k position is 1, represents that then k output port is occupied, and the sub-scheduler of next stage can not take this port.
In order to improve the performance of scheduler, the present invention proposes the method for each sub-dispatcher priority of reasonable distribution.The scheduler operation principle of not adjusting priority assignment following (referring to Fig. 4, constituting scheduler with 8 sub-schedulers is example):
In first cell time, sub-scheduler 1, sub-scheduler 2 ..., sub-scheduler n begins their the 1st respectively to take turns, and the 2nd takes turns ..., the 8th takes turns scheduling, is limit priority (output port does not take).The 2nd cell time, sub-scheduler 1 receives the AOPn signal of sub-scheduler n, continues the scheduling of n wheel, and simultaneously sub-scheduler 2 receives the AOP1 signal of sub-scheduler 1, carries out its 1st and takes turns traffic control.Similarly, after sub-scheduler 8 receives the AOP signal of sub-scheduler 7, begin the 7th and take turns scheduling, this moment, each scheduler all was in time high priority.In 6 cell times subsequently, the operation principle of each sub-scheduler is all identical, and just the priority of scheduling reduces gradually.Like this, after 8 cell times, each sub-scheduler has all been finished 8 respectively and has been taken turns traffic control, and at this moment each input has 8 bags to finish scheduling wait exchange at most.
In each cell time, relevant scheduling result information need be preserved, after 8 cell times, have 8 and take turns scheduling result, at this moment master controller send Switch enable signal begin the exchange, in 8 cell times subsequently, each cell time all has and belongs to same bag of taking turns scheduling result and read from different porthandler PP and be sent to Crossbar and participate in exchange.If belonging to the 1st bag of taking turns is read out at first, then belonging to the 2nd bag of taking turns scheduling result will be read out the participation exchange in next cell time, according to said method handle, and belonging to the 8th bag of taking turns scheduling result will participate in exchange the 8th cell time.
Adjust the several different methods that is assigned of sub-dispatcher priority, the application provided wherein a kind of by introduce the AOP status signal control each sub-scheduler in the different moment with the zero clearing of AOP signal to realize the distribution of each sub-dispatcher priority, Fig. 3 has provided the flow path switch of AOP status signal, and concrete operation principle is as follows:
Whether with n cell is a dispatching cycle, be n-1 at AOP status signal of each cell cycle judgement, if, then control the AOP status signal and add 1, control the AOP signal zero clearing of corresponding sub-scheduler (specifically seeing Fig. 5) simultaneously; If not, then with the zero setting of AOP status signal, control the AOP signal zero clearing of corresponding sub-scheduler simultaneously.
AOP status signal (310): show the current state of AOP status signal, send the judging module judgement to.
Judging module (320): the value of AOP status signal is compared with n-1.This module can realize with comparator.
Executive Module (330,340): control the zero clearing of sub-scheduler AOP signal; That carries out the AOP status signal simultaneously adds 1 and zero-setting operation.This module can be used realizations such as single-chip microcomputer, FPGA and accumulator.
Fig. 5 is seen in a kind of concrete zero clearing arrangement of time of each sub-scheduler.At the AOP status signal is 0 o'clock, the input AOP zero clearing of sub-scheduler 1 and sub-scheduler n; At the AOP status signal is 1 o'clock, the input AOP zero clearing of sub-scheduler 3; At the AOP status signal is 2 o'clock, the input AOP zero clearing of sub-scheduler 5 ..., when the AOP status signal is (n/2-2), the input AOP zero clearing of sub-scheduler n-1; When the AOP status signal is n/2, the input AOP zero clearing of sub-scheduler 2; When the AOP status signal is n/2+1, the input AOP zero clearing of sub-scheduler 5; When the AOP status signal is n-1, the input AOP zero clearing of sub-scheduler n-2.
Constituting scheduler with 8 sub-schedulers is example, and a kind of scheme of adjusting each sub-dispatcher priority is seen Fig. 6
As can be seen, at 1 scheduler in the cycle, except the 1st and the 5th cell time, remaining cell time all has 1 sub-scheduler to be in limit priority, the result of this arrangement is that the priority sum of 8 sub-schedulers is 40 in preceding 4 cell times, and back 4 cell times are 32.And in the 1st cell time of Fig. 7, it is 56 that the priority sum of 8 sub-schedulers is 64, the 2 cell times to the maximum, has only 8 and the priority sum of the 8th cell time is minimum, differs bigger.
In first cell time, scheduler 1, scheduler 2 ..., scheduler 8 begins their the 1st respectively takes turns, and the 2nd takes turns ..., the 8th takes turns scheduling, is limit priority.The 2nd cell time, sub-scheduler 1 receives the AOP8 signal of sub-scheduler 8, continues the 8th and takes turns scheduling, and simultaneously sub-scheduler 2 receives the AOP1 signal of sub-scheduler 1, carries out its 1st and takes turns traffic control.Similarly, after sub-scheduler 8 receives the AOP signal of sub-scheduler 7, begin the 7th and take turns scheduling, this moment, each scheduler all was in time high priority.In 6 cell times subsequently, the operation principle of each sub-scheduler is all identical, and just the priority of scheduling reduces gradually.Like this, after 8 cell times, each sub-scheduler has all been finished 8 respectively and has been taken turns traffic control, and at this moment each input has 8 bags to finish scheduling wait exchange at most.
Suppose that we define 1 time of taking turns scheduling of whenever finishing is 1 dispatching cycle, then is made up of 8 cell times the dispatching cycle among Fig. 4.From Fig. 4 we as can be seen, in the different cell time of dispatching cycle,, thereby make that the matching efficiency of each cell time is different because each scheduler is in different priority (priority reduces gradually).For example, in the 1st cell time of dispatching cycle, all schedulers all are in limit priority, can select from all output ports and the port that is complementary of input, thereby efficient are also the highest.The 2nd cell time, each scheduler all is in time high priority, the corresponding minimizing of selectable output port, thereby the efficient of coupling also can correspondingly reduce.To last cell time of dispatching cycle, all schedulers all are in lowest priority, at this moment can be seldom for the output port of dispatching, and dispatching efficiency is in general also minimum.Because the data flow of input is imported according to Bernoulli i.i.d mode, the distribution of each cell time packet arrival is balanced, and therefore, this scheduling mode can increase the delay of scheduler.
The present invention proposes a kind of method of improving this defective, its basic thought is a priority of adjusting each sub-scheduler between each cell time of a dispatching cycle, to improve the efficient of whole scheduler.Figure 5 shows that the adjustment scheme of a seed dispatcher priority.As can be seen from Figure 5, at 1 scheduler in the cycle, except the 1st and the 5th cell time, remaining cell time all has 1 sub-scheduler to be in limit priority, the result of this arrangement is in preceding 4 cell times, the priority sum of 8 sub-schedulers is 40, and back 4 cell times are 32.And in the 1st cell time of Fig. 7, it is 56 that the priority sum of 8 sub-schedulers is 64, the 2 cell times to the maximum, has only 8 and the priority sum of the 8th cell time is minimum, differs bigger.
Claims (4)
1. fair a scalable network dispatching method, router adopts the input rank exchanged form, each input port is preserved one group of VOQ, the packet that each ply-yarn drill received is according to the difference of its output destination, leave in respectively in the corresponding VOQ, under the control of scheduler, be switched to different output ports by exchange mechanism, it is characterized in that, be provided with
Some identical input port processors: indicate according to the input interface signal, the packet that is received is left in corresponding VOQ respectively according to its difference of exporting the destination, packet header is input in the scheduler, and scheduler is exported to exchange mechanism to the control signal that scheduling produces simultaneously;
The sub-scheduler that some functions are identical: finish k * nk scheduler function, k the input that links to each other with this sub-scheduler all can be filed a request to whole nk output port, finishes the coupling that can realize k input port and k output port after the sub-scheduler task at most; Each sub-scheduler connects according to belt mode, each sub-scheduler concurrent working, the AOP signal that sub-scheduler schedules is finished generation sends the sub-scheduler of next stage to, the AOP signal has indicated scheduling to finish the seizure condition of output port, this signal bits is the n position, if the k position is 1, represent that then k output port is occupied, the sub-scheduler of next stage can not take this port;
Central controller: take turns scheduling and finish the back and send the signal that begins to exchange when one, notify the preparation of input port processor and exchange mechanism to carry out the exchange and the forwarding of data simultaneously to each sub-scheduler.
2. fair a scalable network dispatching method according to claim 1 is characterized in that: the performance that improves scheduler by the priority of adjusting each sub-scheduler.
3. fair a scalable network dispatching method according to claim 2 is characterized in that: the zero clearing of AOP signal is realized the distribution of each sub-dispatcher priority by what control each sub-scheduler in the different moment.
4. fair a scalable network dispatching method according to claim 3, it is characterized in that: the concrete grammar of realizing the distribution of each sub-dispatcher priority is: with n cell is a dispatching cycle, when first cell of each dispatching cycle begins, the AOP zero clearing of sub-scheduler 1 and sub-scheduler n; When second cell begins, the AOP zero clearing of sub-scheduler 3; When the 3rd cell begins, the AOP zero clearing of sub-scheduler 5 ..., when (n/2-1) individual cell begins, the AOP zero clearing of sub-scheduler n-1; When n/2+1 cell begins, the AOP zero clearing of sub-scheduler 2; When n/2+2 cell begins, the AOP zero clearing of sub-scheduler 5; When n cell begins, the AOP zero clearing of sub-scheduler n-2.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102594670A (en) * | 2012-02-06 | 2012-07-18 | 北京星网锐捷网络技术有限公司 | Multiport multi-flow scheduling method, device and equipment |
| CN101572673B (en) * | 2009-06-19 | 2013-03-20 | 杭州华三通信技术有限公司 | Distributed packet switching system and distributed packet switching method of expanded switching bandwidth |
| CN103812792A (en) * | 2012-11-15 | 2014-05-21 | 上海斐讯数据通信技术有限公司 | System and method for collaboration of multiple ports of exchanger |
| CN104618266A (en) * | 2015-02-09 | 2015-05-13 | 浪潮集团有限公司 | Method and device for transferring messages among a plurality of ports |
| CN106330782A (en) * | 2015-06-30 | 2017-01-11 | 中兴通讯股份有限公司 | Port capacity distribution method and device, and switch service board |
| CN107005489A (en) * | 2014-12-29 | 2017-08-01 | 甲骨文国际公司 | For supporting the efficient VOQ in networked devices（VOQ）The system and method that scheme is washed away in packet |
| CN111522643A (en) * | 2020-04-22 | 2020-08-11 | 杭州迪普科技股份有限公司 | Multi-queue scheduling method and device based on FPGA, computer equipment and storage medium |
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- 2007-09-28 CN CNA2007101333223A patent/CN101222422A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101572673B (en) * | 2009-06-19 | 2013-03-20 | 杭州华三通信技术有限公司 | Distributed packet switching system and distributed packet switching method of expanded switching bandwidth |
| CN102594670A (en) * | 2012-02-06 | 2012-07-18 | 北京星网锐捷网络技术有限公司 | Multiport multi-flow scheduling method, device and equipment |
| CN102594670B (en) * | 2012-02-06 | 2014-11-26 | 北京星网锐捷网络技术有限公司 | Multiport multi-flow scheduling method, device and equipment |
| CN103812792A (en) * | 2012-11-15 | 2014-05-21 | 上海斐讯数据通信技术有限公司 | System and method for collaboration of multiple ports of exchanger |
| CN103812792B (en) * | 2012-11-15 | 2018-01-02 | 上海斐讯数据通信技术有限公司 | The cooperative system and Synergistic method of interchanger multiport |
| CN107005489A (en) * | 2014-12-29 | 2017-08-01 | 甲骨文国际公司 | For supporting the efficient VOQ in networked devices（VOQ）The system and method that scheme is washed away in packet |
| CN107005489B (en) * | 2014-12-29 | 2021-02-02 | 甲骨文国际公司 | System, method, medium, and apparatus for supporting packet switching |
| CN104618266A (en) * | 2015-02-09 | 2015-05-13 | 浪潮集团有限公司 | Method and device for transferring messages among a plurality of ports |
| CN106330782A (en) * | 2015-06-30 | 2017-01-11 | 中兴通讯股份有限公司 | Port capacity distribution method and device, and switch service board |
| CN111522643A (en) * | 2020-04-22 | 2020-08-11 | 杭州迪普科技股份有限公司 | Multi-queue scheduling method and device based on FPGA, computer equipment and storage medium |
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