CN101221909A - Cooling type packaging member production method and its applied cooling structure - Google Patents
Cooling type packaging member production method and its applied cooling structure Download PDFInfo
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- CN101221909A CN101221909A CNA2007100013393A CN200710001339A CN101221909A CN 101221909 A CN101221909 A CN 101221909A CN A2007100013393 A CNA2007100013393 A CN A2007100013393A CN 200710001339 A CN200710001339 A CN 200710001339A CN 101221909 A CN101221909 A CN 101221909A
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- radiator structure
- cover layer
- chip
- making
- cooling type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses a preparation method for a radiation package and a radiation structure used by the radiation package, wherein the method mainly comprises the steps of connecting a semi-conductor chip to and electrically on a chip carrier, and connecting a radiation structure to the semi-conductor chip; and the radiation structure is provided with a covering layer on the surface and convexly provided with a supporting part on the edge, wherein, the plan view size of the radiation structure is larger than that of the completed package, so the chip carrier connected with the semi-conductor chip and the radiation structure are arranged in a mould cavity of a packaging mould which is filled with packaging materials so as to form a package colloid covering the radiation structure and the semi-conductor chip, wherein, when the mould flowing velocity of the lower part of the radiation structure is higher than that of the upper part of the radiation structure for pushing and pressing the radiation structure upwards, the supporting part is pressed against the top surface of the mould cavity, thereby preventing the radiation structure from warping; then the package colloid on the covering layer can be cut and removed according to the preset plan view size of the package, thereby forming the radiation package.
Description
Technical field
The present invention relates to a kind of method for making of semiconductor package part, refer to a kind of method for making and applied radiator structure thereof of cooling type packaging member especially.
Background technology
Along with requirement to compactization of electronic product, integrate the semiconductor package part of the semiconductor chip of high density electronic component and electronic circuit, become the main flow of encapsulating products gradually.Yet because this kind semiconductor package part is higher in the heat that operation the time is produced, if in real time the heat of semiconductor chip is not allayed fast, the heat that accumulates can have a strong impact on the electrical functionality and the product stability of semiconductor chip.On the other hand, pollute for avoiding the packaging part internal circuit to be subjected to extraneous water dust, semiconductor chip surface must outer be covered a packing colloid and be completely cut off, but the potting resin that constitutes this packing colloid but is the very poor material of a heat conductivity, its thermal conductivity coefficient is 0.8w/m ° of K only, be with, semiconductor chip is laid the heat that produces on the active surface of a plurality of circuit and can't effectively be delivered to outside the atmosphere by this packing colloid, produce, make and enjoy test in chip performance and useful life and often cause heat to accumulate phenomenon.Therefore, for improving the radiating efficiency of semiconductor package part, there is the conception of in packaging part, setting up heat sink to arise at the historic moment then.
But when also coating fully for packing colloid as if heat sink, the heat radiation approach of the heat that semiconductor chip produces still must pass through packing colloid, the lifting of radiating effect is still limited, even can't meet the demand of heat radiation, thereby, be effective loss chip heat, promptly heat sink fully must be manifested the heat that is produced when packing colloid moves with direct loss semiconductor chip.
See also shown in Figure 1ly, be United States Patent (USP) the 5th, 726, No. 079 disclosed semiconductor package part.This kind conventional semiconductor packages part 1 its directly glutinous fin 11 that is provided with on chip 10, the end face 11a of this fin 11 is exposed outside in order to the packing colloid 12 that coats this chip 10 directly to be contacted with atmosphere, use the heat that provides chip 10 to produce must be passed to fin 11 and loss to atmosphere, and needn't be through the packing colloid 12 of poor thermal conductivity.
Yet this kind semiconductor package part 1 has some shortcomings on making.At first, behind this fin 11 and chip 10 gluings, when inserting in the die cavity of encapsulating mould with the molding operation (Molding) that forms this packing colloid 12, the necessary contact of the end face 11a of this fin 11 is to the roof of die cavity, otherwise promptly can make packing colloid overflow glue on the end face 11a of fin 11, like this except that meeting influences the radiating efficiency of this fin 11, and can cause manufactured goods apparent bad, so the processing of often must remove photoresist (Deflash); Yet the processing of removing photoresist is not only consuming time, increases packaging cost, and also can cause the impaired of manufactured goods.Relatively, excessive if fin 11 contacts are lived the strength of roof of die cavity, then tend to make matter crisp chip 10 because of excessive pressure rhegma.
In addition, can just equal the degree of depth of the die cavity of mould to the distance of the upper surface of substrate 13 for the end face 11a that makes fin 11, fin 11 is precisely control and making with gluing, the chip 10 of chip 10 with the gluing of substrate 13 and the thickness of fin 11, requirement on right this kind precision, packaging cost is increased and the raising process complexity, so the difficulty of its enforcement is arranged on practice.
See also Fig. 2 A and Fig. 2 B, defective in view of preceding prior art, United States Patent (USP) the 6th, 458, No. 626 (patentee is same as the applicant of the application's case) discloses a kind of fin and can directly stick and place on the chip and can not produce the semiconductor package part that crushing chip or excessive glue are formed at the problem on the fin exposed surface.This semiconductor package part its fin 21 desire to expose to form on the surface in the atmosphere one with the cover layer 25 (for example being Gold plated Layer) of the cohesiveness difference of 24 of packing colloids, place one to connect and put on the chip 20 of substrate 23 with this fin 21 is directly glutinous again, thereby carry out the mold pressing processing procedure then and coat this fin 21 and chip 20 fully with packing colloid 24, and packing colloid 24 is covered on the cover layer 25 of fin 21 (shown in Fig. 2 A), so, the degree of depth of the die cavity of the employed mould of mold pressing processing procedure greater than the thickness of chip 20 and fin 21 and, so behind the mould matched moulds, mould can not touch fin 21 and make chip 20 no pressurizeds cause the anxiety of rhegma; Then, carry out cutting step, and the packing colloid 24 of fin 21 tops removed, when wherein the cohesiveness of 21 of cover layer on being formed at fin 21 25 and fin is greater than the cohesiveness of 24 of itself and packing colloids, after packing colloid 24 divested, this cover layer 25 still retains on the fin 21, but because of the cohesiveness of 24 of cover layer 25 and packing colloids poor, packing colloid 24 unlikely residual (shown in Fig. 2 B), the heat that is produced during for chip 20 operation can the loss by this fin 21 and cover layer 25, and does not have the glue problem of overflowing.Relevant technology contents can be consulted United States Patent (USP) the 6th, 844 again, and 622 and 6,444, No. 498 etc.
See also Fig. 3 again, the fin area of aforesaid semiconductor package part is very big, in the time will connecing die cavity 360 that the substrate 33 that is equipped with chip 30 and fin 31 places encapsulating mould 36 and encapsulate molding operation, because of the space that can pass through for potting resin mould stream on the fin 31 far beyond next little in below, be with the mould stream flow velocity of the mould of these fin 31 belows stream flow velocity much larger than the top, cause on this fin 31, the mould stream flow velocity imbalance of below, and then cause fin 31 to produce warpage upwards, thereby cause bad order, even destroy fin 31 and delamination takes place, or influence the electric connection quality (for example crystal covered chip is electrically connected to the employed welding block generation of this substrate rhegma problem) of chip 30 and substrate 33 with sticking together of chip 30.
Increase the space that can supply mould stream to pass through on the fin though can adjust, yet so will increase the consumption of fin top packing colloid, moreover this fin top packing colloid promptly must remove in successive process, is with the waste that will cause the processing procedure material and the increase of cost.
Therefore, how a kind of method for making and applied radiator structure thereof of cooling type packaging member are provided, thereby can avoid when the encapsulation molding operation, weighing semiconductor chip wounded and producing the glue problem of overflowing, more can avoid simultaneously taking place in the encapsulation procedure fin warpage, even destroy the electric connection of the sticking together of fin and chip, chip and substrate, and problems such as the waste of processing procedure material and cost increase, real problem for needing to be resolved hurrily at present.
Summary of the invention
The shortcoming of prior art in view of the above, main purpose of the present invention is to provide a kind of method for making and applied radiator structure thereof of cooling type packaging member, avoiding in the encapsulation procedure taking place the fin warpage, even destroy sticking together and the problems such as electric connection of chip and chip bearing member of fin and chip.
A further object of the present invention is to provide a kind of method for making and applied radiator structure thereof of cooling type packaging member, with problems such as the waste of avoiding the processing procedure material and cost increases.
Another object of the present invention is to provide a kind of method for making and applied radiator structure thereof of cooling type packaging member, be unlikely weighing semiconductor chip in the encapsulation mold process wounded or the glue problem of overflowing takes place, and then promote the yield of manufactured goods.
For reaching above-mentioned and other purpose, the method for making of cooling type packaging member of the present invention, comprise: semiconductor chip is connect put and be electrically connected on the chip bearing member, and on this semiconductor chip, connect and put a radiator structure, this radiator structure includes the body of relative first surface of a tool and second surface and is convexly set in the supporting part of this body edges towards this first surface direction, wherein this first surface is provided with a cover layer, this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing, and connects by its second surface for this radiator structure and places this semiconductor chip; Carry out packaging operation, this is connect the chip bearing member that is equipped with semiconductor chip and radiator structure place the die cavity of an encapsulating mould and fill encapsulating material, remove this encapsulating mould afterwards, use forming the packing colloid that coats this radiator structure and semiconductor chip; Carry out cutting operation, cut according to the predetermined packaging part planar dimension of finishing; And remove operation, be positioned at this supratectal packing colloid to remove.
This tectal material may be selected to be and the engaging force of the radiator structure engaging force greater than itself and packing colloid, for example be metal levels such as gold or nickel, thereby when removing operation, on this cover layer, remove and be positioned at this supratectal packing colloid and expose outside this cover layer, use the heat that semiconductor chip is produced and be able to by radiator structure and cover layer loss to extraneous.Moreover, this tectal material also may be selected to be and the engaging force of the packing colloid engaging force greater than itself and radiator structure, for example be film, epoxy resin or organic layer, thereby when removing operation, remove this cover layer simultaneously and be positioned at this supratectal packing colloid, use and directly expose outside this radiator structure upper surface, to derive the semiconductor chip heat.
In addition, the present invention also discloses a kind of radiator structure, places on the semiconductor chip in order to connect, and is integrated with the cooling type packaging member of radiator structure with formation, and this radiator structure comprises: one has the body of relative first surface and second surface; And the supporting part that is convexly set in this body edges towards this first surface direction.This radiator structure includes the cover layer of being located on this first surface again, and this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing.
That is the method for making of cooling type packaging member of the present invention and applied radiator structure thereof, mainly promptly on semiconductor chip, connect and put a surface and be provided with tectal radiator structure, the edge of this radiator structure is formed with a plurality of supporting parts that are convexly equipped with towards this cover layer direction, and this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing, thereby will connect the die cavity that the chip bearing member that is equipped with semiconductor chip and this radiator structure places encapsulating mould in carrying out packaging operation, in this die cavity, to fill encapsulating material, wherein the mould when the radiator structure below flows the mould stream flow velocity of flow velocity greater than the top, and then when upwards pushing radiator structure, owing to be formed with a plurality of supporting parts that are convexly equipped with towards this cover layer direction at this radiator structure edge, therefore utilized this supporting part to touch and be butted on this die cavity end face, to avoid radiator structure generation warpage, even fin and chip produce delamination and influence chip problems such as electrically connecting quality with chip bearing member, also needn't cause encapsulating material waste and cost increase because of strengthening the die cavity space simultaneously.Be removable this encapsulating mould afterwards, to form the packing colloid that coats this radiator structure and semiconductor chip, and cut according to the predetermined packaging part planar dimension of finishing, and remove and be positioned at supratectal packing colloid, be integrated with the cooling type packaging member of radiator structure with formation.
Description of drawings
Fig. 1 is a United States Patent (USP) the 5th, 726, No. 079 disclosed radiating semiconductor packer schematic diagram;
Fig. 2 A and Fig. 2 B are United States Patent (USP) the 6th, 458, No. 626 disclosed radiating semiconductor packer schematic diagrames;
Fig. 3 is for having radiating semiconductor packer now in encapsulation molding operation generation fin warpage issues schematic diagram;
Fig. 4 A to Fig. 4 F is the method for making of cooling type packaging member of the present invention and the schematic diagram of applied radiator structure first embodiment thereof;
Fig. 5 is the schematic diagram of radiator structure second embodiment of the present invention;
Fig. 6 is the schematic diagram of method for making second embodiment of cooling type packaging member of the present invention; And
Fig. 7 is the schematic diagram of method for making the 3rd embodiment of cooling type packaging member of the present invention.
Symbol description
1 semiconductor package part
10 chips
11 fin
The 11a end face
12 packing colloids
13 substrates
20 chips
21 fin
23 substrates
24 packing colloids
25 cover layers
30 chips
31 fin
33 substrates
36 encapsulating moulds
360 die cavitys
40 semiconductor chips
400 conductive projections
41 radiator structures
The 41a first surface
The 41b second surface
410 bodies
411 supporting parts
43 chip bearing members
44 packing colloids
440 encapsulating materials
45 cover layers
46 encapsulating moulds
460 die cavitys
The H distance
The h height
51 radiator structures
511 supporting parts
60 semiconductor chips
61 radiator structures
64 packing colloids
65 cover layers
70 semiconductor chips
700 bonding wires
73 chip bearing members
78 walls
Embodiment
Below be that those skilled in the art can understand other advantage of the present invention and effect easily by the content that this specification disclosed by particular specific embodiment explanation embodiments of the present invention.
First embodiment
See also Fig. 4 A to Fig. 4 F, be the schematic diagram of method for making first embodiment of cooling type packaging member of the present invention.The method for making of cooling type packaging member of the present invention can be used on the one chip bearing part in response to demand or adopt batch mode and carry out processing procedure on the module sheet of a plurality of chip bearing members of tool.
Shown in Fig. 4 A and Fig. 4 B, wherein this Fig. 4 B is the vertical view corresponding to Fig. 4 A, at first semiconductor chip is connect and puts and be electrically connected on the chip bearing member 43, and a radiator structure 41 connect place on this semiconductor chip 40.
This radiator structure 41 includes one to have the body 410 of relative first surface 41a and second surface 41b and is convexly set in the supporting part 411 at these body 410 edges towards this first surface 41a direction, and on this radiator structure 41 first surface 41a, be coated with a cover layer 45, wherein these radiator structure 41 planar dimensions are greater than the predetermined packaging part planar dimension of finishing (shown in dotted line), even also this supporting part 411 is positioned at beyond the predetermined packaging part planar dimension of finishing,, this radiator structure 41 places on this semiconductor chip 40 so that being connect by its second surface 41b interval heat-conducting glue.
This chip bearing plate 43 for example is ball grid array (BGA) substrate, planar lattice array (LGA) substrate or lead frame, and this semiconductor chip 40 for example is the crystal covering type semiconductor chip, to be electrically connected to this chip bearing member 43 by a plurality of conductive projections 400.
The material of this cover layer 45 may be selected to be and the engaging force of radiator structure 41 engaging force greater than itself and packing colloid, for example is metal levels such as gold or nickel.
Shown in Fig. 4 C and Fig. 4 D, encapsulate molding operation, this is connect the die cavity 460 that the chip bearing member 43 that is equipped with semiconductor chip 40 and radiator structure 41 places an encapsulating mould 46, and in this die cavity 460, fill encapsulating material 440, wherein the supporting part 411 height h systems of this radiator structure 41 to the about 0.03 ~ 0.1mm of these die cavity 460 end face distance H, are good with 0.05mm less than this radiator structure 41 wherein.In the encapsulation molding operation, when the mould stream flow velocity of the encapsulating material of radiator structure 41 belows mould stream flow velocity greater than the top, and then when upwards pushing this radiator structure 41, owing to be formed with a plurality of supporting parts 411 that are convexly equipped with towards these cover layer 45 directions at these radiator structure 41 edges, thereby can touch by this supporting part 411 and be butted on this die cavity 460 end faces, and avoid radiator structure 41 that warpage issues takes place.
Then be removable this encapsulating mould 46, use and on this chip bearing member 43, form the packing colloid 44 that coats this radiator structure 41 and semiconductor chip 40.
Shown in Fig. 4 E and Fig. 4 F, carry out cutting operation, cut this chip bearing member 43, packing colloid 44 and radiator structure 41 peripheries according to the predetermined packaging part planar dimension of finishing, wherein because the planar dimension of this radiator structure 41 greater than the predetermined packaging part planar dimension of finishing, is the removable supporting part 411 that is convexly set in these radiator structure 41 edges behind cutting operation therefore.
Promptly remove operation afterwards, to remove the packing colloid 44 that is positioned on the cover layer 45, wherein, because the material (for example be metal levels such as gold or nickel) of this cover layer 45 is and the engaging force of radiator structure 41 engaging force greater than itself and packing colloid 44, therefore be removablely to be positioned at the packing colloid 44 on this cover layer 45 and to expose outside this cover layer 45, use the heat that semiconductor chip 40 is produced and be able to by radiator structure 41 and cover layer 45 loss to extraneous.
In addition, the present invention also discloses a kind of radiator structure 41, comprising: one has the body 410 of relative first surface 41a and second surface 41b; And the supporting part 411 that is convexly set in these body 410 edges towards this first surface 41a direction.This radiator structure 41 includes the cover layer of being located on this first surface 41a 45 again in addition, wherein this radiator structure places on the semiconductor chip in order to connect, be integrated with the cooling type packaging member of radiator structure with formation, and this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing.
See also Fig. 5 again, schematic diagram for radiator structure second embodiment of the present invention, in the radiator structure 51 of this enforcement than previous embodiment except that the supporting part that is convexly set in the edge being located at the corner of this radiator structure, supporting part 511 can be located at place in the middle of each limit again, in the encapsulation molding operation, this radiator structure 51 can touch the die cavity end face that is butted on encapsulating mould by this supporting part 511, to prevent the radiator structure warpage issues.
Second embodiment
See also Fig. 6, be the schematic diagram of method for making second embodiment of cooling type packaging member of the present invention.The method for making and the previous embodiment of the cooling type packaging member of present embodiment are roughly the same, main difference is to be formed on cover layer 65 materials on this radiator structure 61 for example for film, epoxy resin (epoxy) or as the organic layer of wax (wax), the engaging force of itself and packing colloid 64 is greater than the engaging force of itself and radiator structure 61, therefore when removing operation, this cover layer 65 and the packing colloid 64 that is positioned on this cover layer 65 will be removed simultaneously, use and directly expose outside this radiator structure 61 upper surfaces, and then derive semiconductor chip 60 heats.
The 3rd embodiment
See also Fig. 7, be the schematic diagram of method for making the 3rd embodiment of cooling type packaging member of the present invention.As shown in the figure, the method for making and the previous embodiment of the cooling type packaging member of present embodiment are roughly the same, its main difference is a routing type semiconductor chip 70 connect and places on the chip bearing member 73, and be electrically connected to this chip bearing member 73 by a plurality of bonding wires 700, and on this semiconductor chip 70, can connect the wall 78 that is equipped with as useless chip or heat sink earlier, place on this semiconductor chip 70 so that radiator structure 71 is connect by this wall 78, avoid these radiator structure 71 touchings to this bonding wire 700.
Therefore, the method for making of cooling type packaging member of the present invention and applied radiator structure thereof, mainly promptly on semiconductor chip, connect and put a surface and be provided with tectal radiator structure, the edge of this radiator structure is formed with a plurality of supporting parts that are convexly equipped with towards this cover layer direction, and this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing, thereby will connect the die cavity that the chip bearing member that is equipped with semiconductor chip and this radiator structure places encapsulating mould in carrying out packaging operation, in this die cavity, to fill encapsulating material, wherein the mould when the radiator structure below flows the mould stream flow velocity of flow velocity greater than the top, and then when upwards pushing radiator structure, owing to be formed with a plurality of supporting parts that are convexly equipped with towards this cover layer direction at this radiator structure edge, therefore utilized this supporting part to touch and be butted on this die cavity end face, to avoid radiator structure generation warpage, even fin and chip produce delamination and influence chip problems such as electrically connecting quality with chip bearing member, also needn't cause encapsulating material waste and cost increase because of strengthening the die cavity space simultaneously.Be removable this encapsulating mould afterwards, to form the packing colloid that coats this radiator structure and semiconductor chip, and cut according to the predetermined packaging part planar dimension of finishing, and remove and be positioned at supratectal packing colloid, be integrated with the cooling type packaging member of radiator structure with formation.
The foregoing description is illustrative principle of the present invention and effect thereof only, but not is used to limit the present invention.Especially should be specifically noted that, the selection of this chip bearing member, and the employing of the electric connection mode of chip and chip bearing member, any those skilled in the art all can be under spirit of the present invention and category, and the foregoing description is modified and changed.Therefore, the scope of the present invention should be foundation with the scope of claims.
Claims (20)
1. the method for making of a cooling type packaging member comprises:
Semiconductor chip connect put and be electrically connected on the chip bearing member, and on this semiconductor chip, connect and put a radiator structure, this radiator structure includes the body of relative first surface of a tool and second surface and is convexly set in the supporting part of this body edges towards this first surface direction, wherein this first surface is provided with a cover layer, and this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing, and connects by its second surface for this radiator structure and places this semiconductor chip;
Carry out packaging operation, this is connect the chip bearing member that is equipped with semiconductor chip and radiator structure place the die cavity of an encapsulating mould and fill encapsulating material, remove this encapsulating mould afterwards again, use forming the packing colloid that coats this radiator structure and semiconductor chip;
Carry out cutting operation, cut according to the predetermined packaging part planar dimension of finishing; And
Remove operation, be positioned at this supratectal packing colloid to remove.
2. the method for making of cooling type packaging member according to claim 1, wherein, this chip bearing member is wherein one of substrate and a lead frame, and this semiconductor chip can cover a wherein mode of crystalline substance and routing and be electrically connected to this chip bearing member.
3. the method for making of cooling type packaging member according to claim 1, wherein, this supporting part is positioned at beyond the predetermined packaging part planar dimension of finishing.
4. the method for making of cooling type packaging member according to claim 1, wherein, the supporting part height of this radiator structure to the about 0.03 ~ 0.1mm of this die cavity end face distance, is good with 0.05mm less than this radiator structure wherein.
5. the method for making of cooling type packaging member according to claim 1, wherein, in packaging operation, the mould of the encapsulating material below radiator structure stream flow velocity is greater than the mould stream flow velocity of top, and then when upwards pushing this radiator structure, the supporting part of this radiator structure touches and is butted on this die cavity end face.
6. the method for making of cooling type packaging member according to claim 1, wherein, this supporting part selects to be convexly set in place in the middle of the corner at radiator structure edge and each limit.
7. the method for making of cooling type packaging member according to claim 1, wherein, the engaging force of this cover layer and radiator structure is greater than the engaging force of itself and packing colloid, with when removing operation, removes and is positioned at this supratectal packing colloid and exposes outside this cover layer.
8. the method for making of cooling type packaging member according to claim 7, wherein, this cover layer is a metal level.
9. the method for making of cooling type packaging member according to claim 1, wherein, the engaging force of this cover layer and packing colloid, removes this cover layer simultaneously and is positioned at this supratectal packing colloid with when removing operation greater than the engaging force of itself and radiator structure.
10. the method for making of cooling type packaging member according to claim 9, wherein, this cover layer be film, epoxy resin, and organic layer wherein one.
11. the method for making of cooling type packaging member according to claim 1, wherein, this semiconductor chip is the routing type semiconductor chip, being electrically connected to this chip bearing member by a plurality of bonding wires, and this radiator structure connect by a wall placing on this semiconductor chip.
12. heat-radiation type package structure method for making according to claim 11, wherein, this wall is wherein one of useless chip and heat sink.
13. a radiator structure comprises:
One has the body of relative first surface and second surface; And
Be convexly set in the supporting part of this body edges towards this first surface direction.
14. radiator structure according to claim 13, wherein, this supporting part selects to be convexly set in the middle place of corner and each limit at radiator structure edge.
15. radiator structure according to claim 13 includes the cover layer of being located on this radiator structure first surface again.
16. radiator structure according to claim 15, wherein, this radiator structure places on the semiconductor chip in order to connect, and coats packing colloid, be integrated with the cooling type packaging member of radiator structure with formation, and this radiator structure planar dimension is greater than the predetermined packaging part planar dimension of finishing.
17. radiator structure according to claim 16, wherein, the engaging force of this cover layer and radiator structure is greater than the engaging force of itself and packing colloid.
18. radiator structure according to claim 17, wherein, this cover layer is a metal level.
19. radiator structure according to claim 16, wherein, the engaging force of this cover layer and packing colloid is greater than the engaging force of itself and radiator structure.
20. radiator structure according to claim 19, wherein, this cover layer be film, epoxy resin, and organic layer wherein one.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100013393A CN101221909A (en) | 2007-01-10 | 2007-01-10 | Cooling type packaging member production method and its applied cooling structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100013393A CN101221909A (en) | 2007-01-10 | 2007-01-10 | Cooling type packaging member production method and its applied cooling structure |
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| Publication Number | Publication Date |
|---|---|
| CN101221909A true CN101221909A (en) | 2008-07-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2007100013393A Pending CN101221909A (en) | 2007-01-10 | 2007-01-10 | Cooling type packaging member production method and its applied cooling structure |
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| CN (1) | CN101221909A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259463A (en) * | 2020-09-04 | 2021-01-22 | 深圳市安捷芯源半导体有限公司 | Packaging method of fan-out chip and fan-out chip packaging structure |
| CN116454041A (en) * | 2023-04-20 | 2023-07-18 | 天芯电子科技(江阴)有限公司 | Chip packaging structure adopting wire bonding process and preparation method thereof |
-
2007
- 2007-01-10 CN CNA2007100013393A patent/CN101221909A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112259463A (en) * | 2020-09-04 | 2021-01-22 | 深圳市安捷芯源半导体有限公司 | Packaging method of fan-out chip and fan-out chip packaging structure |
| CN116454041A (en) * | 2023-04-20 | 2023-07-18 | 天芯电子科技(江阴)有限公司 | Chip packaging structure adopting wire bonding process and preparation method thereof |
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