CN1011084B - Testing-measuring system and method for variant electronic device - Google Patents
Testing-measuring system and method for variant electronic deviceInfo
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- CN1011084B CN1011084B CN 85101959 CN85101959A CN1011084B CN 1011084 B CN1011084 B CN 1011084B CN 85101959 CN85101959 CN 85101959 CN 85101959 A CN85101959 A CN 85101959A CN 1011084 B CN1011084 B CN 1011084B
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Abstract
The present invention relates to a system and a method for regulating various electronic devices. Every electronic device is provided with a built-in bus bar, and when the electronic device in which a plurality of software packages are arranged is maintained after installation or transportation, command data relevant to the test and the adjustment of every specific electronic device is stored in every software package. Usually, various electronic devices are connected with a computer through the built-in bus bar, and the testing is carried out for the electronic devices according to the information stored in the software packages.
Description
The present invention relates generally to a kind of test macro and method that is applicable to electronic installation, and the self-contained circuit of these electronic installations is numerically controlled, such as televisor, and tape photographic recorder, and blattnerphone.Be actually and relate to test macro and method, its adjusting is to carry out from the outside by bus intrinsic in the machine in these electronic installations by computing machine.
Picture recording equipment or sound pick-up outfit such as digital television, the commercialization recently of tape photographic recorder (VTR) and blattnerphone.Most of such digital electronic devices are connected CPU (central processing unit) (CPU) simultaneously with bus in the machine, on memory and other the control circuit.CPU takes out the control signal of each circuit that is stored in every kind of electronic installation in the picture read-only memory (ROM) in operate as normal, and the data of taking out are delivered in the corresponding circuit by bus in the machine, controls the work of self-contained circuit.In addition, CPU also can be by the circuit of external keyboard of manual control or the direct control device of remote controller input signal.
Bus generally can be that the two-wire type also can be three line styles in the above-mentioned machine.Bus is made up of data line and clock transfer line in the two-wire type machine.Two-wire type bus also can adopt Japan special permission disclose disclosed communication system among clear and the 57-106262.On the other hand, in the three line style machines bus by data line, clock transfer line and be used for the so-called identification signal of each data set character that the recognition data transmission line uploads to.
If can make testing standardization, centralization and the simplification of the self-contained circuit of those electronic installations that have bus in the machine in installation and maintenance process, then realization be comprised the reduction of total achievement of manufacturing cost.
Task of the present invention provides the test macro and the method that are fit to have the digitalized electron device of bus in the machine.
Above-mentioned invention task can enough test macros of the present invention and method realize, it is characterized in that computing machine is connected on every kind of electronic installation that has a bus in the machine simultaneously.Computing machine is each circuit of testing electronic devices then, and these electronic installations all have the software service of storage test signal amount, and the test result of every kind of electronic installation is estimated.
The electronic installation of bus can be tested with the multi-purpose computer that connects outward in the band machine.Therefore the test macro of various electronic installations can centralization and standardization, thereby obtains a kind of integrated test system.
Can there be one more comprehensively to understand to invention by the explanation of carrying out below in conjunction with accompanying drawing.Reference number in the accompanying drawing has been indicated corresponding ingredient.
Fig. 1 is a simplified block diagram of using an electronic installation of the present invention.
Fig. 2 represents the simplified block diagram of the most preferred embodiment of a test televisor.
Fig. 3 is the simplification connection layout of another most preferred embodiment of various electronic installations being tested according to the present invention.
Fig. 4 is the graphic extension of two-wire serial bus rules.
Fig. 5 is the graphic extension to three-way serial bus rules.
Fig. 6 is the simplified block diagram of bus converter.
The graphic extension of the time diagram when Fig. 7 is a circuit working shown in Figure 6.
Describe with reference to accompanying drawing for ease of understanding the present invention.
Fig. 1 is the circuit block diagram that is applied to a kind of electronic installation of the present invention.
In Fig. 1, electronic installation 1 is equipped with first integrated circuit (IC), 2, the second integrated circuit of device (IC) device 3, CPU (central processing unit) (CPU) 4, and memory 5, these circuit blocks are by bus 6 interconnection.Bus 6 stops at leading-out connector 7 places of electronic installation 1.Outer computer 8 in order to proving installation 1 is connected to connector 7 by another bus 22.Computing machine 8 is connected with display device 9, shows test results such as a CRT monitor.
Above-mentioned first IC device 2 be by bus interface 10, digital-to-analogue (D/A) converter 11, mimic channel A-E, and change-over circuit 12, conversion control circuit 13, mould-number (A/D) converter 14 is formed.Bus interface 10 sends from CPU4 and passes through the digital controlled signal of bus 6 receptions to D/A converter 11 and conversion control circuit 13.Whether controlled control signal both discerned the work of also determining a specified circuit in the A-E circuit of A-E circuit.D/A converter 11 becomes simulating signal with the conversion of signals that receives, and comes a specified circuit among the control circuit A-E with the latter.Conversion control circuit 13 is received A/D converter 14 with the output terminal in the specified circuit among the circuit A-E, the relevant position of driving switch 12 to contact position a-e.A/D converter 14 converts analog output signal to digital signal corresponding, and this digital signal turns back to bus 6 again by bus interface 10.Above said A is controlled by CPU4 to the E circuit, and tests with computing machine 8.In this embodiment, 5 different controlled circuit are housed in IC device 2.
Each following section illustrated the working condition of electronic installation this system in installation and maintenance process.The computing machine 8 that will be appreciated that separation will be used for installing the test with maintenance process.
Test in the installation process is with the manual input device of a keyboard as computing machine 8 operations, to produce the numerical data of representing control signal.These data are sent in first and the second IC device 2,3 by bus 22, connector 7 and bus 6.
Data are deposited with in first IC device 2 by bus interface 10.The data of depositing are converted to corresponding analog control signal and are sent into circuit A to E by D/A converter 11.Circuit A is subjected to the control of the control signal relevant with output signal characteristics to E, and output signal characteristics will be regulated with the control signal amount according to task.The output signal of receiving converts digital signal to, turns back to computing machine 8 by bus interface 10 and bus 6,22 then.Display device 9 demonstrates the test result of circuit A to E on video screen.These results can be compared with operator's known design characteristic, if necessary, the operator can regulate input control signal by keyboard, so that obtain required output.
After confirming that by situation about showing circuit A-E is working properly, the operator can operation keyboard, and the input controlled quentity controlled variable of circuit A-E is stored in the memory 5 as the reference value of using in the operate as normal.When electronic installation 1 work, CPU4 reads the reference value that is write down in the memory 5, and each A-E circuit is carried out according to the desired operation of sense data.
On the other hand, external device circuitry F, G, H must be subjected to external control, and demonstrate the variation of output signals of these duties.These output signals are received by second IC device 3, are exactly to receive by corresponding contact f, g, the h of input end 19,20,21 by change-over circuit 17.
In maintenance process, to differentiate the situation of fault, a kind of maintenance adjustment is connected with bus 22 with computing machine 8, the operator squeezes into the specific address of each circuit of circuit A-E with keyboard, the circuit that selection will be tested, after corresponding circuit is selected, computing machine 8 takes out the suitable input controlled quentity controlled variable that deposits in when installing from memory 5, export a control signal and give the circuit of appointment, with regard to circuit A-E, export a control signal exactly and give conversion control circuit 13 or 18, order computing machine 8 by bus 22 by keyboard operation person then, the output current sampling of 6 pairs of specified circuits.Off-the-shelf output level pattern existed in the corresponding software package before computing machine 8 kept, the correct work of indication related circuit A-H.The flat-die type powdered comparison of respective electrical that computing machine 8 stores the circuit output that receives on the bus 22 together, thereby the duty of judgement specified circuit, comparative result is presented on the display device 9.Suppose that work discussed above all carries out all circuit, so any faulted circuit all can be found.
Although used computing machine 8 test circuit A-H in installation and maintenance process in the embodiment that is given, the test procedure that memory stored and whole required reference datas can be input in the operating means with remote control mode goes.Storer 5 and circuit A-H pass through bus 6 accesses with this special remote-controlled test device by above-mentioned method simultaneously.
Fig. 2 is the circuit block diagram that can be applied to the televisor of bus in the band machine of the present invention.CPU4 among Fig. 2, memory 5, the numbering of bus 6,22 and computing machine 8 is identical with the numbering among Fig. 1.
Among the embodiment shown in Fig. 2, corresponding with the control circuit A-E shown in Fig. 1 is an audio frequency processing circuit 25, video control circuit 26, video processing circuits 27 and deflection control circuit 28.CUP4 control PLL(phase-locked loop in the operate as normal) circuit is synchronous with each circuit of above-mentioned 25 to 28, and the instruction that tuner 31 usefulness keyboards 29 or telepilot send is carried out tuning.Manually frequency tuning value, volume adjustment, figure adjustment and the similar parameter of selecting may be displayed on the display device 33.Numeral 34 among Fig. 2 is represented remote signal receiver, numeral 35 is represented intermediate frequency amplifier, numeral 36, on behalf of the deflection coil of CRT40, numeral 38,37 represent audio-frequency power amplifier, and numeral 39 is represented the video power amplifier, and numeral 40 is represented cathode ray tube (CRT).
In addition, can be recorded in the memory by the various data that obtained of test in the maintenance process, be recorded on the external recording medium or the like, or deliver to central authorities by telephone wire and collect in the control computer and go.Preparation data on the data basis that central computer can obtain from each maintenance station, and this data is distributed to design department, developing department, manufacturing sector, material department and maintenance department.
Fig. 3 shows and is applied to layout of equipment of the present invention, televisor 45 among this figure, tape photographic recorder (VTR) 46 and blattnerphone 47,1 internal bus shown in Fig. 1 is all arranged separately, and they are connected on the computing machine 8 that can test and adjust usefulness simultaneously.Used this moment the personal computer that can buy on the market as computing machine 8.According to the device 45,46,47 of various needs test with the tv test box of selecting for use 48, tape photographic recorder testing cassete 49, and/or blattnerphone testing cassete 50 is connected with computing machine 8.Testing cassete 48,49,50 each have picture tape flexible plastic disc, or the such data storage media storage batch processing of ROM, and stored data are exclusively used in the test and the adjustment of relevant device.In addition, isolated plant keyboard cover plate 52,53,54 can be to prepare for the keyboard of computing machine 8.Do not draw among computing machine 8 bus 6(Fig. 3 by bus 22 and web member 7 and each device) be connected.
Because common computer 8 can be used in the many different electronic installations of test in this embodiment, just can use and only need to change software package rightly, test and adjustment work standardization fully as relevant computer hardware and interconnection according to various devices.
Test job has been discussed now, the data-switching between two-wire type bus standard and the three-way bus standard will be discussed below.Recently, two-wire and three-way bus are quite at large as bus in the above-mentioned machine.
Fig. 4 has provided the signal data packets for transmission form on the two-wire bus.First transmission line serial data (bit serial) D of two-wire bus
2, second transmission line clock signal C L
2Each packet comprises: first signal a) pointing out the packet starting; B) 7 bit address signals of an address of controlled circuit are distributed in indication; C) data below the indication are input to the controlled circuit of appointment or a R/W(read/write of taking out from the controlled circuit of appointment) signal; D) the notice computing machine specifies controlled circuit to receive an ACK(answer of these data) signal; E) represent the eight bit data of adjustment amount; F) desired n follow-up data bag, per eight digit pulses have an ack signal; And g) one stop signal.
Fig. 5 has provided the signal form by three-way bus transmission.
Its first transmission line serial data D
3, second transmission line clock signal C L
3, identification signal ID, address or the data of the 3rd transmission line identifying information type often are coded in serial data D
3In.
Each packet is along with an initiating signal starts, and initiating signal drives identification signal ID to electronegative potential, and on behalf of the eight bit data of address, indication enter D
3On.And then eight bit address by two octet of data appear.Identification signal is high level all the time in the whole transmission course of 16 bit data of back, and turns back at last before its higher level according to D
3An of short duration low level will appear in the stop signal on the line, and this expression data packet signal is through with.
Fig. 6 has provided and has converted the transmission signals on the two-wire bus to the bus converter of the compatible signal of three-way standard a most preferred embodiment.Fig. 7 is the time diagram of the bus converter shown in Fig. 6.
Among Fig. 6 and Fig. 7, serial data line D
2Be connected on the input end 61 the clock line CL among Fig. 4
2, be connected on another input end 62.At first, when an initiating signal at data D
2In when starting/stopping testing circuit 63 and detect, the Q output of trigger (F/F) circuit 64 rises to " H " (height) level.The reset terminal of shift register 65 (R) sum counter 66 is connected in the Q output of trigger 64, and resets according to the rising edge of Q output, and after these circuit 65,66 resetted, shift register 65 began to read through gate circuit 67 at its data terminal D and clock CL
2The data D that synchronous mode receives
2Serial bit, unison counter 66 beginning counting clock pulse CL
2The parallel count value that code translator 68 receives by 5 bit widths that come on the counter 66, and output pulse designation data bag D
2Middle significant bits-counting position, particularly respectively corresponding to the R/W position, the 8th, the 9th, the 17th and the 18th digit pulse of an ACK position, the 2nd ACK position and position of rest.These four output lines are connected in the various logic circuitry in the bus converter.Particularly, control circuit 69 directly receives the 8th digit pulse and receives the 9th digit pulse and the 18th digit pulse by public OR-circuit 70.Control circuit 69 produces a gate signal S
0, make its ordering " door " 67 conducting when the 9th digit pulse or the 18th digit pulse, not conducting when the 8th digit pulse.This is used to identify packet D
2The R/W position and the output of 1ACK position.
Be sent to AND gate circuit 72 by the 17th digit pulse of coming on the code translator 68, it also receives the inversion clock pulse CL that the phase inverter 71 on the clock terminal C that is connected shift register 65 produces
2What the AND gate output signal was sent to latch 73 puts end as asserts signal S
1Latch 73 pins 15 of significant serial datas under this asserts signal, that is to say 7 bit address data and 8 bit data that are deposited with in the shift register 65.Then this 15 bit data is converted to 16 forms of three-way bus with data-switching rom memory (read-only memory) 74.
18 digit pulses by code translator 68 also are added on another AND gate 75, and it also receives the inversion clock pulse CL by phase inverter 71
2By AND gate 75 AND output signals, with the clock signal C L of generator 77
3With the identification id signal together as one group of signal S
2Deliver to the set end S of another shift register 76, shift register 76 is according to asserts signal S
2Latch the data of coming by the ROM74 conversion.
When starting/stopping testing circuit 63 and detect stop signal, the Q of flip-flop circuit 64 output is reduced to " L " (low) level.Above said signal generator 77 time clock CL take place
3Identification signal ID with three-way bus.Time clock CL
3Under the frequency that requires, export from output terminal 79, and the content of sequentially reading shift register 76.Identification signal ID is by directly being connected another output terminal 80 outputs on the signal generator 77.At last, the content of shift register 76, promptly 8 bit address and 8 bit data are by another output terminal 78 serials output.
Except converting the bus converter example of three-wire system data mode to, the data mode that two-wire system is come discussed above also have a kind of data mode that three-wire system is come to convert the bus converter of the data mode of three-wire system to; The two can select to use.To notice that also the bus 22 of connection outer computer 8 and the interior bus 6 of machine of various electronic installations must be a kind of two-wire system or a kind of three-wire system.In addition, utilizing between the electronic installation that utilizes the three-wire system signal generator can be configured in computing machine 8 and will use shown in two-wire system signal generator and Fig. 5 shown in Fig. 4.High level computer alternately uses arbitrarily in two-wire or three-way signal system and other signal systems.A kind of signal converter for two-wire/three-wire system shift design is operable.Bus converter discussed above can be contained in the electronic installation.
Claims (5)
1, in order to the device of the various parts of testing apparatus in the installation of digital electronic device and maintenance process, the described parts of electronic equipment are multiple classes, and the described parts of each of electronic equipment comprise a plurality of circuit to be tested, it is characterized in that, described device comprises:
Bus in a plurality of machines that in each described parts of electronic equipment, connect respectively;
Respectively described circuit to be tested in each described parts of electronic equipment selectively is connected to a plurality of conversion equipments of bus in the machine wherein;
Storage is exclusively used in a plurality of software packages of the instruction and data of described multiple class of electronic devices respectively:
And
Computing machine can be connected to the described various parts of electronic equipment in order to according to some selected circuit in the various parts of the content test electronic equipment of described conversion equipment and software package simultaneously by bus in some relevant described machines, and each parts of electronic equipment comprise a storer corresponding to the instruction and data of operate as normal that is connected to bus in its machine and storage from described computing machine;
Thereby described computing machine is used to set up the initial conditions of the operate as normal of each the described parts that is enough to satisfy electronic equipment at the beginning, be included in the described condition of memory stores in each described parts of electronic equipment, and the condition of described storage after this is cancelled from relevant storer.
2, according to the device of claim 1, it is characterized in that this device also comprises the CRT monitor that is connected on the described computing machine, in order to the test result of display electronics assemblies, the operator can be compared test result and known design characteristic.
3,, it is characterized in that bus is a bus in the two-wire type machine in the machine according to the device of claim 1.
4,, it is characterized in that bus in the machine has one two-wire type conversion of signals become the converter of three line style signals according to the device of claim 1.
5, a kind of method of using the various parts of the described equipment of the described device to test of claim 1, the described parts of electronic equipment are multiple classes, the described parts of each of electronic equipment comprise a plurality of circuit to be tested, and respectively have bus in the machine and will circuit to be tested selectively be connected to the conversion equipment of the interior bus of machine; It is characterized in that this method comprises the following steps:
Bus in the machine separately of the various parts of computing machine by electronic equipment is connected with various parts simultaneously and is connected with the circuit of selecting to be tested by the conversion equipment in each described parts of electronic equipment;
But make the described computing machine of a plurality of characteristic software package accesses;
With described computer programming with by bus in the described machine of appointment to the output of the appearance of the circuit of appointment in described electronic equipment sampling;
The output of the described appearance of described specified circuit and particular data in the described software package that is stored in appointment are compared;
Regulate the input of described specified circuit by this way, so that the output of the described appearance of described specified circuit is consistent with the described particular data in the described software package that is stored in described appointment;
To be stored in the storer that is connected to bus in the described appointment machine for the described input of using in the future.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 85101959 CN1011084B (en) | 1985-04-01 | 1985-04-01 | Testing-measuring system and method for variant electronic device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 85101959 CN1011084B (en) | 1985-04-01 | 1985-04-01 | Testing-measuring system and method for variant electronic device |
Publications (2)
Publication Number | Publication Date |
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CN85101959A CN85101959A (en) | 1987-01-24 |
CN1011084B true CN1011084B (en) | 1991-01-02 |
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Family Applications (1)
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CN 85101959 Expired CN1011084B (en) | 1985-04-01 | 1985-04-01 | Testing-measuring system and method for variant electronic device |
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CN (1) | CN1011084B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100334431C (en) * | 2003-02-20 | 2007-08-29 | 华为技术有限公司 | An environmental stress experiment automatic test method |
-
1985
- 1985-04-01 CN CN 85101959 patent/CN1011084B/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100334431C (en) * | 2003-02-20 | 2007-08-29 | 华为技术有限公司 | An environmental stress experiment automatic test method |
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Publication number | Publication date |
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CN85101959A (en) | 1987-01-24 |
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