CN101091250A - 半导体器件及其安装结构 - Google Patents

半导体器件及其安装结构 Download PDF

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Publication number
CN101091250A
CN101091250A CNA2006800014794A CN200680001479A CN101091250A CN 101091250 A CN101091250 A CN 101091250A CN A2006800014794 A CNA2006800014794 A CN A2006800014794A CN 200680001479 A CN200680001479 A CN 200680001479A CN 101091250 A CN101091250 A CN 101091250A
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wiring
dielectric film
semiconductor device
internal wiring
pad portion
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CN100514627C (zh
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若林猛
三原一郎
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Zhao Tan Jing Co ltd
Aoi Electronics Co Ltd
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Casio Computer Co Ltd
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Abstract

一种半导体器件，包括具有集成电路的半导体基板，形成于所述半导体基板上的第一绝缘膜，形成于所述第一绝缘膜上的至少一个电源内部布线，和形成于所述第一绝缘膜上和所述内部布线上并且具有暴露出部分所述内部布线的多个开口的第二绝缘膜。至少一条布线被形成于所述第二绝缘膜的上侧上以与所述内部布线对应，并经由所述第二绝缘膜的多个开口电连接到所述内部布线。该布线具有至少一个外部电极焊盘部分，其数量小于在所述第二绝缘膜中的开口的数量。

Description

半导体器件及其安装结构
技术领域
本发明涉及一种半导体器件及其安装结构。
背景技术
目前，在如个人计算机和移动装置等设备中，经常有这样一种情况，即为了减小设备尺寸，将半导体器件倒装在基板上。在这种情况下，采用这样一种方法，在该方法中，其中形成有集成电路的裸半导体基板直接设置有连接到该集成电路的外部电极焊盘，且焊料球被形成于该外部电极焊盘上，并且随后将焊料球键合到外部电路板的连接端子，从而最小化安装面积(例如，参考日本专利申请KOKAI公开No.2001-196374)。
在上述半导体器件中，氧化硅膜被形成于硅基板上，以及多个通孔被形成于该氧化硅膜中，并且金属层被设置在该通孔中。然后，薄硅层被形成于该氧化硅膜上，以及包括P型和/或N型MOS晶体管的集成电路被形成于硅层中，并且随后，集成电路的上表面用层间绝缘膜覆盖。之后，硅基板在其厚度方向上从其下部侧开始被抛光，以使其完全去除以暴露出氧化硅膜的下表面。然后，在将焊料球设置于外部电极焊盘部分上之前，将外部电极焊盘部分形成于与设置在氧化硅膜中的通孔对应的位置处。按照这种方式，设置外部电极焊盘部分和焊料球以在通过通孔连接到集成电路的金属层中相互对应。
目前，已经出现了用于控制在几千兆赫高速时钟下驱动的使用的半导体器件。必须从外部电源提供几十A的电流到这种半导体器件。在这种情况下，如果设置于外部电极焊盘部分上的焊料球直径约为100μm，则一个焊料球仅容通过约为30mA的电流，以防止由于产生热而导致焊料球熔断。因此，当需要几十A的大电流电源时，经由几千个焊料球通过几千个外部电极焊盘部分的电流在内部汇聚。
例如为了经由如此设置到大量外部电极焊盘部分上的焊料球正面向下安装到外部电路板的连接端子部分，明显增加了半导体器件的尺寸，这需要大的安装面积。而且，由于大量的焊球，在键合步骤中发生短路，且在焊料球尺寸上发生大的变化，使得不能获得连接的可靠性。
发明内容
因此，本发明旨在提供一种半导体器件以及其安装结构，其中，外部电极焊盘部分的数量可被减少，以实现尺寸减小和连接可靠性的提高。
为了实现上述目标，本发明提供了一种半导体器件，其包括：
具有集成电路的半导体基板；
形成于该半导体基板上的第一绝缘膜；
形成于该第一绝缘膜上的至少一个电源内部布线；
形成于该第一绝缘膜上和内部布线上并且具有多个暴露出部分内部布线的开口的第二绝缘膜；和
形成于该第二绝缘膜上侧上以与内部布线对应并且经由该第二绝缘膜的多个开口被电连接到该内部布线的至少一条布线，
其中所述至少一条布线具有至少一个外部电极焊盘部分，其数量小于在该第二绝缘膜中的开口数量。
根据本发明，用于外部连接的布线通过在第二绝缘膜中形成的多个开口被连接到内部布线。由此，布线的数目与现有技术相比会减少，以允许半导体器件变得越来越小且连接可靠性越来越高。
本发明的其他目的和优点将在以下的说明书中被列举出来，且根据该说明书其一部分是显而易见的，或者可通过实施本发明来学习。借助于尤其在以下指出的手段和组合能实现和获得本发明的目的和优点。
附图说明
结合到说明书中并构成说明书一部分的附图示出了本发明的实施例，并且和上面给出的一般说明和以下给出的实施例具体描述一起用于解释本发明的原理。
图1是作为本发明第一实施例的半导体器件的截面图；
图2是作为本发明第二实施例的半导体器件的截面图；
图3是示出一个将本发明的半导体器件连接至其的电路板实施例的平面图。
具体实施方式
(第一实施例)
图1示出了作为本发明第一实施例的半导体器件的截面图。该半导体器件包括硅基板(半导体基板)1。具有预定功能的集成电路(未示出)被设置于硅基板1上部侧的中心，且由如铝基金属之类的金属制成的多个内部连接焊盘2以电连接到集成电路的方式被设置于上表面的外周部分中。
由氧化硅、氮化硅等制成的第一绝缘膜3被设置于内部连接焊盘2和硅基板1的上表面上。例如以矩阵形式排列在与内部连接焊盘2上表面中心对应的部分中的第一绝缘膜3中形成多个开口4。厚度为约1μm的、由铜或铜合金制成的内部布线以经由第一绝缘膜3的开口4电连接到内部连接焊盘2的方式被设置于第一绝缘膜3的上表面上。
在此，图1中示出的内部布线5是用于接地或用于接VDD(一般称作“用于电源”)的内部布线，以及平行于且相互间隔地垂直于图1中的图形的表面地设置几个或几十个内部布线。在图1中，省略了用于控制信号和用于数据的内部布线。
由氧化硅、氮化硅等制成的第二绝缘膜6被设置于第一绝缘膜3和内部布线5的上表面上。开口7被形成于与每一条内部布线5对应的多个(例如六个)连接焊盘部分的部分中的第二绝缘膜6中。
由铜、铜合金等制成的连接焊盘8以电连接到内部布线5的连接焊盘部分的方式被设置于第二绝缘膜6的开口7中和在开口7附近或周围的第二绝缘膜6的上表面上。由氧化硅、氮化硅等制成的第三绝缘膜9被设置于第二绝缘膜6和连接焊盘8的上表面上。开口10被形成于在与连接焊盘8的上表面中心对应的部分中的第三绝缘膜9中。
由聚酰亚胺基树脂等制成的保护膜(绝缘膜)11被设置于第三绝缘膜9上表面上。开口12被形成于与第三绝缘膜9的开口10对应的部分中的保护膜11中。由铜等制成的基础金属或下层13被设置于保护膜11的上表面上。由铜制成的布线或上层14被设置于基础金属层13的整个上表面上。在这种情况下，布线14的厚度大于内部布线5的厚度，且优选为2至10μm。每一个基础金属层13和每一个布线14都经由保护膜11和第三绝缘膜9的多个开口12、10连接到多个(例如三个)内部连接焊盘2。在此，在图1中，部分基础金属层13仅被设置于在第三绝缘膜9中形成的开口10内部，和在保护膜11中形成的开口12内部，但是这是为了方便图示，且实际上，部分布线14也被设置于其中。而且，跨过三个相应的开口10和12设置每一个基础金属层14和每一个布线14，但是，这也是为了方便图示，且实际上，跨过几个或几十个相应的开口10和12形成其。每个布线14的宽度都根据稍后描述的来自被提供到焊料球的外部电源的电流来决定。
由焊料阻蚀剂等制成的涂层(overcoat)15被设置于布线14和保护膜11的上表面上。在每个布线14中，在其纵向和宽度方向上基本上为中心的部分用作外部电极焊盘部分，且开口16被形成于与外部电极焊盘部分对应的部分中的涂层15中。焊料球17以电连接到布线14的外部电极焊盘部分的方式被设置于开口16内部和上方。
如上所述，在半导体器件中，设置了一个到几十个内部布线5，且其每一个都电连接到多个内部连接焊盘2。在每条内部布线5中都设置了多个连接焊盘8。一条布线14被连接到几个或几十个连接焊盘8。每个焊料球17都被形成于设置在每条布线14中的一个外部电极焊盘部分中。
因此，在该半导体器件中，用于接地或用于接电源的焊料球17的数目对应于用于接电源的多个连接焊盘8的百分之几到百分之几十，以使焊料球17的总数小于连接焊盘8的总数，由此可以实现半导体器件尺寸减小和连接可靠性提高。
在此，布置多个第二布线14以在内部或第一布线5的纵向方向上延伸，并且如果两个布线5和14都具有相同宽度，则在布局方面不浪费空间，从而减小了半导体器件尺寸。在此，由于经由电极焊盘部分提供到第一布线5和第二布线14的电源电流总量是相等的，因此推荐满足：
Ni/(To/Ti)≤No≤Ni((To/Ti)-1)
其中Ni是对应于一个第二布线的开口10或12的数目，No是设置于一个第二布线中的外部电极焊盘部分的数目(或者开口16的数目)，Ti是第一布线5的厚度，和To是包括基础金属层13的第二布线14的厚度。
(第二实施例)
图2示出了作为本发明第二实施例的半导体器件的截面图。该半导体器件与图1中所示半导体器件的不同在于由铜制成的柱形电极18被设置于第二布线14的外部电极焊盘部分的上表面上，且由环氧基树脂等制成的密封膜19被设置于包括布线14的保护膜11的上表面上，以使密封膜19的上表面可形成具有柱形电极18的上表面的一个表面，且之后焊料球17被设置于柱形电极18的上表面上。
在该半导体器件中，当所谓的低k被用作第一和第二绝缘膜(层间绝缘膜)3和6的材料时，第一和第二绝缘膜3和6的指定电感电容和弹性模量之间是折衷关系。如果降低指定电感电容，则使用具有弹性模量为5Gpa或更小的非常脆的材料。总之，在这种情况下，当包括柱形电极18的半导体器件被安装在电路板(未示出)上时，在第一和第二绝缘膜3和6中，通过由于硅基板1和电路板之间热膨胀系数的差别导致的应力容易产生龟裂。
然而，在第二实施例中，由于焊料球17的总数量小于连接焊盘8的总数量以增加焊料球17的尺寸，因此可以减少由于硅基板1和电路板之间热膨胀系数差别导致的应力。因此即使具有弹性模量为5Gpa或更小且由此非常脆的所谓低k用作第一和第二绝缘膜3和6的材料，也可以防止第一和第二绝缘膜3和6中容易产生的龟裂。
在上述实施例中，一个外部电极焊盘部分被设置于提供给几个至几十个连接焊盘8的每个第二布线14中，但是设置于每个布线14中的外部电极焊盘部分的数目不限于此，而是只要其数目小于连接焊盘数目，就可设置多个外部电极焊盘部分。一个焊料球17被形成于布线14下方。
图3是将前述半导体器件正面向下安装至其的外部电路板20的平面图。电源布线图案22被设置于电路板20的一个表面上。电源布线图案22是互联多个馈送线21的图案，该馈送线21被平行布置以与内部布线5对应，且每一个馈送线21都设置有与半导体器件布线14的外部电极焊盘部分对应的连接端子部分23。被设置在外部电极焊盘部分上的焊料球17与电路板20的连接端子部分23对准，以通过键合而正面向下安装半导体器件。尽管在图中未示出，但是，除了连接端子部分之外，电路板20的电源布线图案22根据需要涂覆有阻蚀剂。
对本领域技术人员而言，容易想到其他优点和改进。因此，在其更宽范围内的本发明不限于该具体细节，和在此示出了描述的示意性实施例。因此，可进行各种修改而不超出如由附属的权利要求及其等价物限定的本发明一般概念的精神和范围。

Claims (23)

1、一种半导体器件，包括：
半导体基板，其具有集成电路；
第一绝缘膜，其形成于所述半导体基板上；
至少一个电源内部布线，其形成于所述第一绝缘膜上；
第二绝缘膜，其形成于所述第一绝缘膜上和所述内部布线上，并且具有暴露出部分所述内部布线的多个开口；和
至少一个布线，其形成于所述第二绝缘膜的上侧上以对应于所述内部布线，并经由所述第二绝缘膜的多个开口电连接到所述内部布线，
其中所述至少一个布线具有至少一个外部电极焊盘部分，其数量小于在所述第二绝缘膜中的开口的数量。
2、如权利要求1的半导体器件，其中，焊料球被设置在所述布线的外部电极焊盘部分上。
3、如权利要求1的半导体器件，其中，柱形电极被设置在所述布线的外部电极焊盘部分上。
4、如权利要求3的半导体器件，其中，焊料球被设置于所述柱形电极上。
5、如权利要求1的半导体器件，其还包括被设置在覆盖所述电源内部布线上表面的所述第二绝缘膜的开口中的连接焊盘。
6、如权利要求5的半导体器件，其中，所述布线被形成为与所述连接焊盘接触。
7、如权利要求6的半导体器件，其中，所述第二绝缘膜包括在所述连接焊盘之间形成的第一层，和被设置于所述第一层上并具有在与所述连接焊盘对应的位置处形成的开口的第二层。
8、如权利要求7的半导体器件，其中，所述第二层具有由多个层构成的层结构。
9、如权利要求1的半导体器件，其中，所述布线和所述内部布线由铜或铜合金制成。
10、如权利要求1的半导体器件，其中，所述布线的厚度大于所述内部布线的厚度。
11、如权利要求1的半导体器件，其中，所述第一和第二绝缘膜中至少一个的弹性模量为5Gpa或更少。
12、如权利要求1的半导体器件，其中，所述布线和所述内部布线具有相同的宽度。
13、如权利要求1的半导体器件，其中，多条布线经由所述第二绝缘膜的多个开口连接。
14、如权利要求13的半导体器件，其中，所述多条布线沿着所述内部布线布置。
15、如权利要求14的半导体器件，其中，满足：
Ni/(To/Ti)≤No≤Ni((To/Ti)-1)
其中Ni是对应于所述布线的开口的数目，No是设置于所述布线中的外部电极焊盘部分的数目，Ti是所述内部布线的厚度，和To是所述布线的厚度。
16、一种安装结构，包括：
半导体器件，其包括：半导体基板，其具有集成电路；第一绝缘膜，其形成于所述半导体基板上；至少一条电源内部布线，其形成于所述第一绝缘膜上；第二绝缘膜，其形成于所述第一绝缘膜上和所述内部布线上，并且具有多个暴露出部分所述内部布线的开口；和至少一条布线，其形成于所述第二绝缘膜的上侧上以与所述内部布线对应，并经由所述第二绝缘膜的多个开口电连接到所述内部布线，其中所述布线具有至少一个外部电极焊盘部分，该至少一个外部电极焊盘部分的数量小于在所述第二绝缘膜中形成的开口的数量，该安装结构包括：
基板，其具有电源图案，该电源图案的至少一个电源端子部分与所述半导体器件的外部电极焊盘部分对应；和
焊料层，其将所述外部电极焊盘部分键合到所述电源图案的电源端子部分。
17、如权利要求16的安装结构，其中，多条布线经由所述第二绝缘膜的多个开口连接。
18、如权利要求17的安装结构，其中，所述多条布线沿着所述内部布线布置。
19、如权利要求18的安装结构，其中
满足Ni/(To/Ti)≤No≤Ni((To/Ti)-1)
其中Ni是与所述布线对应的开口的数目，No是所述布线中的外部电极焊盘部分的数目，Ti是所述内部布线的厚度，和To是所述布线的厚度。
20、如权利要求19的安装结构，其中，所述布线的厚度大于所述内部布线的厚度。
21、如权利要求16的安装结构，具有在所述布线的外部电极焊盘部分上形成的柱形电极。
22、如权利要求21的安装结构，其中，在所述绝缘膜上，密封膜被设置于所述柱形电极周围。
23、如权利要求16的安装结构，其中，所述布线的厚度大于所述内部布线的厚度。
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KR100877018B1 (ko) 2009-01-07
EP1897138A1 (en) 2008-03-12
DE602006012674D1 (de) 2010-04-15
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