CN101089642A - Method of accelerating hot carrier injection investigating - Google Patents
Method of accelerating hot carrier injection investigating Download PDFInfo
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- CN101089642A CN101089642A CN 200610027696 CN200610027696A CN101089642A CN 101089642 A CN101089642 A CN 101089642A CN 200610027696 CN200610027696 CN 200610027696 CN 200610027696 A CN200610027696 A CN 200610027696A CN 101089642 A CN101089642 A CN 101089642A
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Abstract
A method for speeding up test of hot carrier injection includes separately measuring curve of drain electrode current and substrate current to time under different temperature and different bias voltage, setting failure condition and naming time realizing said failure condition to be failure time (FT), plotting out product of FT and drain electrode saturated current (DESC) and quotient of substrate current and DESC to obtain their relation, plotting out FT and temperature to obtain their relation and making low temperature failure test to derive out FT at the other temperature according to said relation of FT and temperature.
Description
Affiliated technical field
The present invention relates to the semiconductor test technical field, particularly about a kind of accelerating hot carrier injection investigating with the life prediction of prediction hot carrier MOS (metal-oxide semiconductor (MOS)) direct current.
Background technology
At present, for the VLSI (very large scale integrated circuit) manufacturing industry, along with constantly reducing of MOSFET (mos field effect transistor) plant bulk, sub-micron and deep-submicron have been narrowed down to now, and develop to sub-micro, but in MOS device size scaled down, the device operating voltage not thereupon equal proportion reduce, the formation probability of channel hot carrier is increased greatly, and in silicon-silicon dioxide interface generation interface state, or captured by the charge trap in the grid oxic horizon, cause device property, as threshold voltage, the degeneration of mutual conductance and linear zone and saturation region leakage current increases.
In sub-micron and deep submicron process, hot carrier injection effect has become one of main reliability factor of restriction VLSI (very large scale integrated circuit) maximum device density.There are some researches show, when the deep sub-micron MOS device is lower than 1.8V at drain bias voltage, still the hot carrier degradation phenomenon can occur.Even therefore the operating voltage of device is significantly reduced to 2V, still be not enough to the device damage that prevents that effectively hot carrier from injecting.
Based on the above hot carrier injection effect of introducing is one of topmost factor of sub-micron and deep submicron process MOS component failure, and the device degradation that hot carrier's effect causes is a kind of cumulative effect, becomes certain relation service time with device.Therefore, can adopt hot carrier injection into test with the life prediction of prediction hot carrier MOS direct current.Promptly the MOS device of being tested is carried out hot carrier and inject until its device parameters inefficacy, required consumed time is exactly the out-of-service time of device.Device at present commonly used with drain saturation current Δ Idsat=10% as failure criteria.
The life-span of the MOS device of general technology processing at present reaches more than 10 year even decades.Therefore, adopt and to inject with the similar hot carrier of actual working state that to carry out failure testing be infeasible.Way commonly used is to quicken the component failure experiment that hot carrier is injected under the stress condition.At room temperature with certain bias condition device is applied the acceleration stress voltage, the beginning Cyclic Stress is degenerated above the experiment end condition until parameter.
Quickening the component failure experiment that hot carrier is injected under the stress condition, stress voltage need change in a big way, and in order to determine the bias condition of experiment, need determine that at first leakage-source end stress voltage is breakdown to prevent transistor.
As seen quickening the component failure experiment that hot carrier is injected under the stress condition, because its pick up speed that limits that leakage-source end stress voltage is selected still is subject to certain restrictions the experiment of can not losing efficacy expeditiously.
Present hot carrier injection into test is always at room temperature tested with bimetry, and this tests to obtain the result the MOS field effect device with regard to the needs cost is very long.And this can waste machine test duration and delayed data analysis time, has therefore increased cost.In order to address this problem, need develop a kind of new technology to quicken the MOS hot carrier injection into test time to save time and cost.
Summary of the invention
Purpose of the present invention is for solving above-mentioned prior art problem, and accelerating hot carrier injection investigating is with the life prediction of prediction hot carrier MOS direct current.
The invention provides a kind of accelerating hot carrier injection investigating method, may further comprise the steps: a. measures the curve of drain current, substrate current relative time under different bias voltages under the different temperatures respectively; B. set failure condition, the time that will reach this failure condition is called the out-of-service time; C. the merchant of the long-pending and substrate current of out-of-service time and drain saturation current and drain saturation current is drawn on coordinate and draw their relational expressions each other; D. out-of-service time and temperature are drawn mutual relationship between them drawing on the coordinate; E. carry out failure test at low temperatures, release out-of-service time under other temperature according to the relation of out-of-service time and temperature.
Wherein, the described out-of-service time is to be that standard obtains stress time with 10% drain saturation current decline.The merchant's of long-pending and the substrate current and the drain saturation current of out-of-service time and drain saturation current relation is: TTF*Id=A* (Isub/Id) ^m, wherein TTF is out-of-service time unit's second, Id is drain current unit's ampere, Isub is substrate current unit's ampere, and A and m are the coefficients that draws according to figure.The pass of described out-of-service time and temperature is: TTF=[A* (Isub/Id) ^m]/Id*EXP[B* (1/T-1/Tnom)].Wherein, T is a Kelvin temperature, and Tnom is 298K, and B is the coefficient that draws according to figure.Described low temperature is 40 degrees below zero Celsius.The scope of described other temperature is that 40 degrees below zero is to 150 degree above freezing.
The invention has the beneficial effects as follows that because Isub under the low temperature and Idsat be greater than the metal-oxide-semiconductor field effect transistor thermal characteristics that measures under the room temperature, so we can be according to test MOS field effect transistor at low temperatures, with can be than obtaining test data under the room temperature quickly.We are according to the prediction equation life-span then.Its advantage is that the measurement under the low temperature can be accelerated Measuring Time and promptly obtains the bimetry result.
Save time and to save the utilization factor of machine, therefore can more measure and save time simultaneously.In addition, another advantage is that we can predict that at high temperature hot carrier is injected the life-span, because most devices is at high temperature worked.
Description of drawings
Fig. 1 is that NMOS pipe of the present invention is at room temperature for different drain-source voltage drain saturation current declines and time relationship coordinate diagram;
Fig. 2 is that NMOS pipe of the present invention fails and the time relationship coordinate diagram for different drain-source voltage drain saturation currents at 40 degrees below zero Celsius;
Fig. 3 is that hot carrier of the present invention is injected life-span coordinate diagram that concerns for the merchant of substrate current and drain current under different temperatures and drain-source voltage;
Fig. 4 is hot carrier life-span of the present invention coordinate diagram that concerns for 1/T-1/Tnom under different drain voltages.
Embodiment
Below in conjunction with accompanying drawing and specific embodiments, the present invention is further illustrated.
In one embodiment of the invention, be the present invention of example brief explanation with the NMOS pipe.At first measure MOS hot carrier injection data under the different temperatures, in this process, measure drain current Id and substrate current Isub corresponding stress time under different drain-source voltage Vds and gate source voltage Vgs (maximum Isub biasing) according to classic method.And to set with 10% drain saturation current Idsat decline be that standard obtains stress time and is referred to as the out-of-service time.
See also Fig. 1, Fig. 1 is that NMOS pipe of the present invention is at room temperature for different drain-source voltage drain saturation current declines and time relationship coordinate diagram.What use in the present embodiment is a typical device, and its breadth length ratio is 10/0.35.Drain-source voltage Vds gets four class values, is respectively the four groups of drain saturation currents decline number percent and the corresponding relation of time of drain-source voltage Vds=4.7V, Vds=4.5V, Vds=4.3V, Vds=4.1V in Fig. 1 from top to bottom, and wherein chronomere is second.
See also Fig. 2 again, Fig. 2 is that NMOS pipe of the present invention fails and the time relationship coordinate diagram for different drain-source voltage drain saturation currents at 40 degrees below zero Celsius.In Fig. 2, other conditions are consistent with Fig. 1, but temperature is made as 40 degrees below zero Celsius, and as can be seen from the figure four groups of drain saturation current decline number percents arrive default 10% drain saturation current Idsat decline standard all than shifting to an earlier date to some extent under the room temperature.And lead is basic identical.
Next, the out-of-service time can be found out in the relation of different temperatures with the long-pending relative substrate current of TTF*Idsat of saturation current and the merchant Isub/Idsat of drain saturation current, to obtain slope A and index coefficient m.Its relation equation can be written as:
TTF*Id＝A*(Isub/Id)^m (1)
See also Fig. 3, Fig. 3 is that hot carrier of the present invention is injected life-span coordinate diagram that concerns for the merchant of substrate current and drain current under different temperatures and drain-source voltage.In Fig. 3, there are four groups of temperature graph peaks to be respectively from top to bottom: 25 degree Celsius, subzero 15 degree, 40 degrees below zero, 85 degree.Drain voltage is respectively 4.1V, 4.3V, 4.5V, 4.7V from top to bottom.Experimental subjects is the nmos device of a 3.3.V.
At last, can obtain the relation of out-of-service time with respect to temperature, its equation is as follows:
TTF＝EXP[B*(1/T-1/Tnom)+C] (2)
TTF＝EXP[B*(1/T-1/Tnom)]*EXP(C)＝[A*(Isub/Id)^m]/Id*EXP[B*(1/T-1/Tnom)] (3)
Wherein, EXP (C)=[A* (Isub/Id) ^m]/Id, T is a Kelvin temperature, Tnom is 298K.
See also Fig. 4, Fig. 4 is hot carrier life-span of the present invention coordinate diagram that concerns for 1/T-1/Tnom under different drain voltages.
If employing equation (1) predicts the life-span under the room temperature as classic method, also can predict as the life-span under the different situations in equation (2), (3).That is to say, can be under subzero temperature the test MOS pipe with the accelerated test time.Calculate life-span under the room temperature with dependent equation then.So just can predict the direct current hot carrier life-span at room temperature.In the present embodiment, we can see that the 40 degrees below zero life-span is half under the 25 degree temperature.
Because Isub under the low temperature and Idsat be greater than the metal-oxide-semiconductor field effect transistor thermal characteristics that measures under the room temperature, so we can be according to test MOS field effect transistor at low temperatures, with can be than obtaining test data under the room temperature quickly.We are according to the prediction equation life-span then.Its advantage is that the measurement under the low temperature can be accelerated Measuring Time and promptly obtains the bimetry result.
Save time and to save the utilization factor of machine, therefore can more measure and save time simultaneously.In addition, another advantage is that we can predict that at high temperature hot carrier is injected the life-span, because most devices is at high temperature worked.Evidence, the relation of out-of-service time above-mentioned and temperature can be suitable for to the temperature range of 150 degree above freezing at 40 degrees below zero.
That more than introduces only is based on several preferred embodiment of the present invention, can not limit scope of the present invention with this.Any device of the present invention is done replacement, the combination, discrete of parts well know in the art, and the invention process step is done well know in the art being equal to change or replace and all do not exceed exposure of the present invention and protection domain.
Claims (6)
1, a kind of accelerating hot carrier injection investigating method is characterized in that may further comprise the steps:
A. measure the curve of drain current, substrate current relative time under different bias voltages under the different temperatures respectively;
B. set failure condition, the time that will reach this failure condition is called the out-of-service time;
C. the merchant of the long-pending and substrate current of out-of-service time and drain saturation current and drain saturation current is drawn on coordinate and draw their relational expressions each other;
D. out-of-service time and temperature are drawn mutual relationship between them drawing on the coordinate;
E. carry out failure test at low temperatures, release out-of-service time under other temperature according to the relation of out-of-service time and temperature.
2, accelerating hot carrier injection investigating method as claimed in claim 1 is characterized in that the described out-of-service time is is that standard obtains stress time with 10% drain saturation current decline.
3, accelerating hot carrier injection investigating method as claimed in claim 1, the relation that it is characterized in that the merchant of the long-pending and substrate current of out-of-service time and drain saturation current and drain saturation current is: TTF*Id=A* (Isub/Id) ^m, wherein TTF is out-of-service time unit's second, Id is drain current unit's ampere, Isub is substrate current unit's ampere, and A and m are the coefficients that draws according to figure.
4, accelerating hot carrier injection investigating method as claimed in claim 1 is characterized in that the pass of described out-of-service time and temperature is:
TTF＝[A*(Isub/Id)^m]/Id*EXP[B*(1/T-1/Tnom)]
Wherein, T is a Kelvin temperature, and Tnom is 298K, and B is the coefficient that draws according to figure.
5, accelerating hot carrier injection investigating method as claimed in claim 1 is characterized in that described low temperature is 40 degrees below zero Celsius.
6, accelerating hot carrier injection investigating method as claimed in claim 1, the scope that it is characterized in that described other temperature are that 40 degrees below zero is to 150 degree above freezing.
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| US7784965B2 (en) | 2007-12-25 | 2010-08-31 | Foxsemicon Integrated Technology, Inc. | Solid state light illuminator |
| CN101587162B (en) * | 2008-05-23 | 2011-08-24 | 中芯国际集成电路制造(北京)有限公司 | Method for detecting hot carrier effect of semiconductor device |
| CN102236063A (en) * | 2010-04-21 | 2011-11-09 | 中国科学院微电子研究所 | Method for predicting service life of hot carrier of silicon on insulator (SOI) device |
| CN101726695B (en) * | 2008-10-17 | 2011-12-28 | 和舰科技(苏州)有限公司 | Method for testing service life of NMOS hot carrier injection |
| CN102495345A (en) * | 2011-12-06 | 2012-06-13 | 上海集成电路研发中心有限公司 | Method for determining service life of hot carrier injection device |
| CN101271143B (en) * | 2008-03-25 | 2012-12-05 | 上海集成电路研发中心有限公司 | Method for testing hot carrier injection into MOS device |
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| CN103063995A (en) * | 2011-10-21 | 2013-04-24 | 北京大学 | Method for predicating reliability service life of silicon on insulator (SOI) metal-oxide -semiconductor field effect transistor (MOSFET) device |
| CN103852700A (en) * | 2012-11-29 | 2014-06-11 | 无锡华润上华半导体有限公司 | Test method for hot carrier inject of LDMOS device |
| CN103941172A (en) * | 2013-01-22 | 2014-07-23 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor test apparatus and test method |
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| CN101587162B (en) * | 2008-05-23 | 2011-08-24 | 中芯国际集成电路制造(北京)有限公司 | Method for detecting hot carrier effect of semiconductor device |
| CN101303390B (en) * | 2008-06-23 | 2013-03-06 | 上海集成电路研发中心有限公司 | Method for judging MOS device performance degeneration |
| CN101726695B (en) * | 2008-10-17 | 2011-12-28 | 和舰科技(苏州)有限公司 | Method for testing service life of NMOS hot carrier injection |
| CN102236063A (en) * | 2010-04-21 | 2011-11-09 | 中国科学院微电子研究所 | Method for predicting service life of hot carrier of silicon on insulator (SOI) device |
| CN102236063B (en) * | 2010-04-21 | 2013-08-07 | 中国科学院微电子研究所 | Method for predicting service life of hot carrier of silicon on insulator (SOI) device |
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| CN102495345A (en) * | 2011-12-06 | 2012-06-13 | 上海集成电路研发中心有限公司 | Method for determining service life of hot carrier injection device |
| CN103852700A (en) * | 2012-11-29 | 2014-06-11 | 无锡华润上华半导体有限公司 | Test method for hot carrier inject of LDMOS device |
| CN103852700B (en) * | 2012-11-29 | 2016-08-03 | 无锡华润上华半导体有限公司 | A kind of method of testing of LDMOS device hot carrier injection effect |
| CN103941172A (en) * | 2013-01-22 | 2014-07-23 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor test apparatus and test method |
| CN103941172B (en) * | 2013-01-22 | 2016-12-28 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor test apparatus and method of testing |
| CN104977519A (en) * | 2014-04-11 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | Device hot carrier injection effect test method |
| CN106533406A (en) * | 2016-11-10 | 2017-03-22 | 中国电子产品可靠性与环境试验研究所 | MOS tube parameter degradation circuit, test circuit and early warning circuit |
| CN106533406B (en) * | 2016-11-10 | 2019-06-07 | 中国电子产品可靠性与环境试验研究所 | Metal-oxide-semiconductor parameter degradation circuit, test circuit and early warning circuit |
| US11860220B2 (en) | 2020-03-13 | 2024-01-02 | Changxin Memory Technologies, Inc | Method for evaluating hot carrier injection effect of device |
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