CN101079227A - Pixel level multi-task architecture driving method and device using the method - Google Patents

Pixel level multi-task architecture driving method and device using the method Download PDF

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Publication number
CN101079227A
CN101079227A CN 200610087864 CN200610087864A CN101079227A CN 101079227 A CN101079227 A CN 101079227A CN 200610087864 CN200610087864 CN 200610087864 CN 200610087864 A CN200610087864 A CN 200610087864A CN 101079227 A CN101079227 A CN 101079227A
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pixel
bar
data
data circuit
trace wiring
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林丽年
纪佳宏
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Chi Mei Optoelectronics Corp
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Chi Mei Optoelectronics Corp
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Abstract

The invention discloses a driving method of pixel level multi-task (PLM) frame with each dataline of PLM frame connecting two pixel A and pixel B at two ends of dataline, which comprises the following steps: transmitting the driving signal through scanning circuit sequently; precharging pixel B at jth pixel during charging the j-2nd pixel A; precharging pixel A at jth during charging the jth pixel B (j is more than 2, which is positive integral).

Description

The driving method of pixel level multi-task architecture and use the device of this method
Technical field
The present invention relates to a kind of pixel level multi-task (pixel level multiplexing, be called for short PLM) framework, particularly relate to and a kind ofly can and use the device of this method the driving method of the pixel pre-charge (precharge) in the pixel level multi-task architecture.
Background technology
(FPD) is of a great variety for present flat-panel screens, as LCD (LCD), organic electro-luminescent display (OLED) and plasma scope (PDP) etc.Yet, no matter be which kind of flat-panel screens, the framework all similar of its display panel, promptly on substrate (substrate), dispose crisscross trace wiring (scan line) and data circuit (data line), and each trace wiring and data circuit infall promptly dispose a pixel (pixel).Whether pixel receives the scanning signal via trace wiring and is enabled or conducting with decision, and receives data signals with show image via data circuit when it is switched on.
In order to reduce cost, known a kind of practice is arranged is the pixel that each bar data circuit is connected to simultaneously this data circuit left and right sides, and data circuit is reduced by half, and this is so-called pixel level multi-task (PLM) framework.Is example at this with LCD (LCD), and it comprises two substrates opposite each other and be disposed at the wherein backlight module of substrate one side, and this pixel level multi-task (PLM) framework promptly is configured in wherein on the substrate.Please refer to Fig. 1, it shows the circuit diagram of pixel level multi-task (PLM) framework, and this PLM framework 100 comprises the trace wiring SL that is driven by scanner driver 110 N-3~SL N+2, the data circuit DL that drives by data driver 120 1~DL 2, and the pixel that is configured in the data circuit left and right sides, wherein n-3, n-1 ..., n+2 is all positive integer.In order to simplify accompanying drawing, partial pixel is (for example with data circuit DL 2The pixel that couples) only represents with the square and the relevant I/O relation of coupling thereof of dotted line.
Generally in the framework of pixel level multi-task (PLM), comprise two kinds of different pixels.For simplicity, be called " pixel A " and " pixel B " in the present invention.Wherein a kind of pixel " pixel A " be for example with data circuit DL 1The pixel A that couples 1, n-3~A 1, n+2, and with data circuit DL 2The pixel A that couples 2, n-3~A 2, n+2, it all has identical structure.With data circuit DL 1The pixel A in left side 1, nBe example, it comprises the switch M that is made of thin film transistor (TFT) 1,Storage capacitors C 1And liquid crystal capacitance C LC1Wherein, gauge tap M 1Conducting whether control end is coupled to trace wiring SL n, and switch M 1An end be coupled to storage capacitors C 1With liquid crystal capacitance C LC1, its other end is coupled to data circuit DL 1As switch M 1During conducting, pixel A 1, nVia data circuit DL 1Receive data signals and be stored in storage capacitors C 1With liquid crystal capacitance C LC1In (be that data signals is to storage capacitors C 1With liquid crystal capacitance C LC1Charging), by data signals and share voltage V ComBoth pressure reduction drives liquid crystal with show image.As switch M 1During disconnection, then by storage capacitors C 1Continue to provide the data signals that is kept to continue to show this image.
Another kind of pixel " pixel B " be for example with data circuit DL 1The pixel B that couples 1, n-3~B 1, n+2, and with data circuit DL 2The pixel B that couples 2, n-3~B 2, n+2, it all has identical structure.With data circuit DL 1The pixel B on right side 1, nBe example, it comprises switch M 2, switch M 3, storage capacitors C 2And liquid crystal capacitance C LC2Wherein, gauge tap M 3Conducting whether control end is coupled to trace wiring SL n, and switch M 3An end be coupled to trace wiring SL N+1, its other end then is coupled to switch M 2Control end.In addition, switch M 2An end be coupled to storage capacitors C 2With liquid crystal capacitance C LC2, the other end then is coupled to data circuit DL 1Allocation position that it should be noted that pixel A and pixel B in addition can exchange.
Fig. 2 shows the known driving method of PLM framework shown in Figure 1, and it shows the sequential chart of signal on each trace wiring.Please refer to Fig. 2, from top to bottom six sequential charts are represented trace wiring SL respectively N-3, SL N-2, SL N-1, SL n, SL N+1With SL N+2On the scanning signal.
To illustrate below to be couple to data circuit DL 1For the pixel of example is subjected to the situation that the control of the scanning signal on the trace wiring is switched on.With trace wiring SL nTime be benchmark, T between the first phase 1, the trace wiring SL in the activation PLM framework 100 nWith SL N+1At this moment, switch M 2With M 3To be switched on simultaneously, so data signals can be by data circuit DL 1The input pixel B 1, nAt second phase T 2, the trace wiring SL in the activation PLM framework 100 only nAt this moment, switch M 1Be switched on, so data signals can be by data circuit DL 1The input pixel A 1, n
In addition, it should be noted that as T between the first phase 1The time, pixel A 1, nSwitch M 1Also can conducting.So pixel B of desire input originally 1, nData signals also can input to pixel A 1, nIn.But immediately at second phase T 2The time, can be with correct data signals input pixel A 1, nIn.Remarked pixel A 1, nT between the first phase 1The action of Shi Jinhang pre-charge.
Yet, for being couple to trace wiring SL nPixel B 1, n, it is at trace wiring SL nT between the first phase of last scanning signal 1Be switched on and accept data circuit DL 1Data signals, not by pre-charge, so will reduce the response speed that LCD picture shows.
In addition, because the cause of PLM framework, pixel (particularly pixel B) is recharged finishes the also long of the non-PLM framework of required time ratio, can't be charged to predetermined voltage level so may have, and causes the LCD picture display quality not good; Or increase the duration of charging, so also can reduce the response speed that LCD picture shows.
Summary of the invention
In view of this, the driving method that the purpose of this invention is to provide a kind of pixel level multi-task (PLM) framework, it can make pixel B do the action of pre-charge, moreover still have and pixel A is made the advantage of pre-charge in known, make the usefulness of the flat-panel screens (such as LCD) that adopts the PLM framework be improved.
Based on above-mentioned and other purpose, the present invention proposes the driving method of a kind of pixel level multi-task (PLM) framework, this PLM framework comprises multi-strip scanning circuit and many data circuits of cross-over configuration, and wherein each bar data circuit is coupled to a plurality of pixel A and a plurality of pixel B.In same data circuit, i pixel A determines according to the scanning signal on the i bar trace wiring whether conducting is to receive the data signals on the data circuit, and i pixel B determines according to the scanning signal on i bar and the i+1 bar trace wiring whether conducting is to receive the data signals on the data circuit, and wherein i is a positive integer.
The driving method of this PLM framework is included in during the charging of j-2 pixel A, and j pixel B done the action of pre-charge, and wherein j is the positive integer greater than 2.And this driving method also is included in during j the pixel B charging, and j pixel A carried out pre-charge.
The present invention also proposes a kind of driving method of PLM framework, and this PLM framework is identical with above-mentioned PLM framework.With trace wiring SL nThe scanning signal be example, at data circuit DL 1In, the driving method of this PLM framework was included between the first phase, n-2 pixel A of conducting and n pixel B of conducting in advance, and this moment, data signals can input to n-2 pixel A and n pixel B via data circuit.In the second phase, n-1 pixel B of conducting and n-1 pixel A of conducting in advance, this moment, data signals can input to n-1 pixel A and n-1 pixel B via data circuit.Between the third phase, n-1 pixel A of conducting and n+1 pixel B of conducting in advance, this moment, data signals can input to n-1 pixel A and n+1 pixel B via data circuit.Between the fourth phase, n pixel B of conducting and n pixel A of conducting in advance, this moment, data signals can input to n pixel A and n pixel B via data circuit.Between the fifth phase, n pixel A of conducting and n+2 pixel B of conducting in advance, this moment, data signals can input to n pixel A and n+2 pixel B via data circuit.Wherein, n is the positive integer greater than 2.
It should be noted that, in driving method of the present invention, in the time of between the first phase, can n pixel B of conducting in advance and n pixel B done the action of pre-charge with the data signals that the script desire is imported n-2 pixel A, and between the fourth phase time, again at n the correct data signals of pixel B input.In addition, in the time of between the fourth phase, the data signals of also can be earlier importing n pixel B with the script desire is done the action of pre-charge to n pixel A, in the time of then between the fifth phase, to n the correct data signals of pixel A input.So will change the response speed that LCD picture shows, reach preferable picture display quality.
But the present invention is because of the pixel B in the pre-charge PLM framework, moreover still have known in the advantage of pre-charge pixel A, therefore not only can increase the response speed that LCD picture shows, can also avoid to be charged to predetermined voltage level and reduce the response speed that LCD picture shows.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Fig. 1 shows the circuit diagram of pixel level multi-task (PLM) framework.
Fig. 2 shows the known driving method of PLM framework shown in Figure 1, and it shows the sequential chart of signal on each trace wiring.
Fig. 3 shows the driving method according to preferred embodiment of the present invention of PLM framework shown in Figure 1, and it shows the sequential chart of signal on each trace wiring.
The reference numeral explanation
100: pixel level multi-task (PLM) framework
110: scanner driver
120: data driver
SL N-3~SL N+2: trace wiring
DL 1~DL 2: data circuit
A 1, n-3~A 1, n+2, A 2, n-3~A 2, n+2: pixel A
B 1, n-3~B 1, n+2, B 2, n-3~B 2, n+2: pixel B
C 1, C 2: storage capacitors
C LC1, C LC2: liquid crystal capacitance
M 1, M 2, M 3: switch
V Com: share voltage
T 1~T 5: during
Embodiment
Fig. 3 shows on pixel level multi-task shown in Figure 1 (PLM) framework according to the driving method of preferred embodiment of the present invention, and it has shown the sequential chart of signal on each trace wiring.Please earlier with reference to Fig. 1, PLM framework 100 comprises the trace wiring SL that is driven by scanner driver 110 N-3~SL N+2, the data circuit DL that drives by data driver 120 1~DL 2, and " pixel A " that be configured in the data circuit both sides and " pixel B ", wherein n-3, n-1 ..., n+2 is all positive integer.
Wherein, " pixel A " comprises pixel A 1, n-3~A 1, n+2With A 2, n-3~A 2, n+2Deng.For example, pixel A 1, n-3Promptly be coupled to data circuit DL 1With trace wiring SL N-3Pixel A, or be called and be coupled to data circuit DL 1N-3 pixel A.And pixel A 2, nPromptly be coupled to data circuit DL 2With trace wiring SL nPixel A, or be called and be coupled to data circuit DL 2N pixel A.Similarly, " pixel B " comprises pixel B 1, n-3~B 1, n+2With B 2, n-3~B 2, n+2Deng.For example, pixel B 1, n+3Promptly be coupled to data circuit DL 1With trace wiring SL N+3Pixel B, or be called and be coupled to data circuit DL 1N+3 pixel B.
Scanner driver 110 is by trace wiring SL N-3~SL N+2Send the scanning signal to drive pixel A N-3~A N+2With pixel B N-3~B N+2Conducting whether.For example, as trace wiring SL nOn scanning signal when being logic high potential, then be coupled to trace wiring SL nAll pixel A be switched on, receiving the data signals on the data circuit, this be because in the pixel A with the switch M that thin film transistor (TFT) was constituted of N type 1Be switched on.Certainly, if the switch M of pixel A 1When being constituted with the thin film transistor (TFT) of P type, when then the scanning signal of trace wiring is required to be logic low potential, could be with the pixel A conducting.In addition, as trace wiring SL nWith SL N+1On scanning signal when being all logic high potential, then be coupled to trace wiring SL nAll pixel B will be switched on receiving the data signals on the data circuit, this be because in the pixel B with the switch M that thin film transistor (TFT) was constituted of N type 2With M 3All be switched on.Similarly, as switch M 2With M 3When being constituted with the thin film transistor (TFT) of P type, trace wiring SL then nWith SL N+1Scanning signal need be all logic low potential the time, could be with the pixel B conducting.120 of data drivers are by data circuit DL 1~DL 2Send the data signals of desiring to be shown on the LCD.
To illustrate below to be couple to data circuit DL 1For the pixel of example is subjected to the situation that the control of the scanning signal on the trace wiring is switched on, and the data signals that the pixel that is couple to other data circuit is received during except that conducting can difference, it is subjected to the control of the scanning signal on the trace wiring and the situation and the data circuit DL that are switched on 1Identical.
With trace wiring SL nTime be benchmark, T during this drives signal and comprises 1~T 5In this embodiment, suppose that switch in each pixel is that thin film transistor (TFT) with the N type is constituted, thus when driving signal and be logic high potential the corresponding switch conduction of may command, and the corresponding switch of may command disconnects during logic low potential.
Please be simultaneously with reference to Fig. 1 and Fig. 3, with trace wiring SL nBe example, T between the first phase of its driving signal 1, activation trace wiring SL N-2, SL nWith SL N+1, so pixel A 1, n-2, A 1, n, A 1, n+1With B 1, nTo be switched on, at this moment, data signals will be by data circuit DL 1The input pixel A 1, n-2, A 1, n, A 1, n+1With B 1, n, wherein this data signals is a desire input pixel A 1, n-2Data signals.At second phase T 2, activation trace wiring SL N-1With SL n, so pixel A 1, n-1, A 1, nWith B 1, n-1Be switched on, at this moment, data signals will be by data circuit DL 1The input pixel A 1, n-1, A 1, nWith B 1, n-1, wherein this data signals is a desire input pixel B 1, n-1Data signals.T between the third phase 3, activation trace wiring SL N-1, SL N+1With SL N+2, so pixel A 1, n-1, A 1, n+1, A 1, n+2With B 1, n+1Be switched on, at this moment, data signals will be by data circuit DL 1The input pixel A 1, n-1, A 1, n+1, A 1, n+2With B 1, n+1, wherein this data signals is a desire input pixel A 1, n-1Data signals.T between the fourth phase 4, activation trace wiring SL nWith SL N+1, so pixel A 1, n, A 1, n+1With B 1, nBe switched on, at this moment, data signals will be by data circuit DL 1The input pixel A 1, n, A 1, n+1With B 1, n, wherein this data signals is a desire input pixel B 1, nData signals.T between the fifth phase 5, activation trace wiring SL n, SL N+2With SL N+3, so pixel A 1, n, A 1, n+2, A 1, n+3With B N+2Be switched on, at this moment, data signals will be by data circuit DL 1The input pixel A 1, n, A 1, n+2, A 1, n+3With B 1, n+2, wherein this data signals is a desire input pixel A 1, nData signals.Wherein, trace wiring SL N+3With A 1, n+3Be not shown among Fig. 1 and Fig. 3.
It should be noted that pixel A 1, nRespectively during T 1, T 2, T 4With T 5Be switched on, and data signals is also via data circuit DL 1The input pixel A 1, nYet, T between the fifth phase only 5The data signals of being imported is only pixel A 1, nThe correct data signal of institute's desire input.Wherein, input pixel A 1, nData signals during T 4With T 5For example be same polarity best, so more can improve pixel A 1, nResponse speed.So, T between the fourth phase 4To pixel A 1, nThe input data signals can be considered pixel A 1, nDo the action of pre-charge.Similarly, pixel B 1, nRespectively during T 1, T 4Be switched on, and data signals is also via data circuit DL 1The input pixel B 1, nYet, T between the fourth phase only 4The data signals of being imported is only pixel B 1, nThe correct data signal of institute's desire input.Wherein, input pixel B 1, nData signals during T 1With T 4For example be same polarity best, so more can improve pixel B 1, nResponse speed.So, T between the first phase 1To pixel B 1, nThe data signals of being imported is for to pixel B 1, nDo the action of pre-charge.
As mentioned above, can learn being characterized as between of driving method of the present invention, j pixel B done the action of pre-charge j-2 pixel A charge period, and in to j pixel B charging, j pixel A done the action of pre-charge, and wherein j is the positive integer greater than 2.
For example, with j=n and be couple to data circuit DL 1Pixel be example, T between the first phase 1, (be pixel A to n-2 pixel A 1, n-2) charging, and (be pixel B with the data signals that is input to n~2 pixel A to n pixel B 1, n) make the action of pre-charge, T between the fourth phase then 4, (be pixel B to n pixel B again 1, n) the correct data signals of input.In addition, T between the fourth phase 4, (be pixel B to n pixel B 1, n) charging, and (be pixel A with the data signals that is input to n pixel B to n pixel A 1, n) make the action of pre-charge, T between the fifth phase then 5, again to n the correct data signals of pixel A input.Like this reason of design driven signal is in order to make pixel A and the pixel B all can be by pre-charge, to increase the response speed of LCD picture demonstration.In addition, the present invention can also be applicable to the type of drive of pixel counter-rotating (dot inversion).
Here, the present invention proposes a kind of dot structure, and its framework as shown in Figure 1.This dot structure comprises trace wiring SL N-3~SL N+2, data circuit DL 1~DL 2, first pixel cell and second pixel cell, wherein first pixel cell such as pixel A 1, n, then second pixel cell such as pixel B 1, n+2Wherein, trace wiring SL N-3~SL N+2System is arranged in parallel data circuit DL each other in regular turn 1~DL 2Be arranged in parallel in regular turn each other, and data circuit SL N-3~SL N+2With trace wiring DL 1~DL 2Cross arrangement each other.
In addition, if first pixel cell with pixel A 1, nBe example, then second pixel cell then is a pixel B 1, n+2, pixel A wherein 1, nCoupling the 1st data circuit (is data circuit DL 1) with n bar trace wiring (be trace wiring SL n), and pixel B 1, n+2Coupling the 1st data circuit (is data circuit DL 1), n+2 bar and n+3 bar trace wiring (be trace wiring SL N+2With SL N+3).Therefore, the first pixel cell A 1, nAccording to trace wiring SL nOn scanning signal decision whether receive data circuit DL 1On data signals, and the second pixel cell B 1, n+2System is according to trace wiring SL N+2With SL N+3On scanning signal decision whether receive data circuit DL 1On data signals.Wherein, the first pixel cell A 1, nWith the second pixel cell B 1, n+2Can receive data circuit DL simultaneously 1The data signals of being carried is for example at trace wiring SL N-2, SL nWith SL N+1In the time of by activation simultaneously.
The present invention also proposes a kind of LCD, and it comprises first substrate, second substrate and backlight module.Wherein, first substrate is relative with second substrate to be disposed, and backlight module is disposed at first substrate opposite side relative with second substrate, and configuration of the side on first substrate as above-mentioned dot structure.
In sum, the driving method of PLM framework of the present invention is because of doing the action of pre-charge to pixel B, moreover still has an advantage of in the known technology pixel A being done pre-charge, therefore not only can increase the response speed that LCD picture shows, can also avoid to be charged to predetermined voltage level and reduce the response speed that LCD picture shows.And use devices such as the dot structure of this driving method or LCD, its usefulness also can improve.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; those skilled in the art can do some changes and retouching under the future that does not break away from the spirit and scope of the present invention, so protection scope of the present invention is as the criterion with claim of the present invention.

Claims (13)

1. the driving method of a pixel level multi-task architecture, this pixel level multi-task architecture comprises multi-strip scanning circuit and many data circuits of cross-over configuration, wherein each described data circuit is coupled to a plurality of pixel A and a plurality of pixel B, and this i pixel A determines according to the scanning signal on this i bar trace wiring whether conducting is to receive the data signals on this data circuit, this i pixel B determines according to the scanning signal on this i bar and this i+1 bar trace wiring whether conducting is to receive the data signals on this data circuit, and i is a positive integer, and the driving method of this pixel level multi-task architecture comprises:
Between to this j-2 pixel A charge period, this j pixel B carried out pre-charge, wherein j is the positive integer greater than 2.
2. the driving method of pixel level multi-task architecture according to claim 1 more comprises:
During to this j pixel B charging, this j pixel A carried out pre-charge.
3. the driving method of pixel level multi-task architecture according to claim 1, wherein this pixel level multi-task architecture is applicable to flat-panel screens.
4. the driving method of a pixel level multi-task architecture, this pixel level multi-task architecture comprises multi-strip scanning circuit and many data circuits of cross-over configuration, wherein each described data circuit is coupled to a plurality of pixel A and a plurality of pixel B, and this i pixel A determines according to the scanning signal on this i bar trace wiring whether conducting is to receive the data signals on this data circuit, this i pixel B determines according to the scanning signal on this i bar and this i+1 bar trace wiring whether conducting is to receive the data signals on this data circuit, and i is a positive integer, and the driving method of this pixel level multi-task architecture comprises:
This n-2 pixel A of conducting, and this n pixel B of conducting in advance;
The input data signals is to this n-2 pixel A and this n pixel B;
This n-1 pixel A of conducting and this n-1 pixel B;
The input data signals is to this n-1 pixel A and this n-1 pixel B;
This n-1 pixel A of conducting, and this n+1 pixel B of conducting in advance;
The input data signals is to this n-1 pixel A and this n+1 pixel B;
This n pixel A of conducting and this n pixel B;
The input data signals is to this n pixel A and this n pixel B;
This n pixel A of conducting, and this n+2 pixel B of conducting in advance; And
The input data signals is to this n pixel A and this n+2 pixel B;
Wherein, n is the positive integer greater than 2.
5. as the driving method of pixel level multi-task architecture as described in the claim 4, wherein this pixel level multi-task architecture is applicable to flat-panel screens.
6. dot structure comprises:
The multi-strip scanning circuit, wherein said trace wiring is arranged in parallel each other in regular turn;
Many data circuits, wherein said data circuit is arranged in parallel each other in regular turn, and described data circuit and the cross arrangement each other of described trace wiring;
One first pixel cell has one first switch element, and wherein this first switch element is coupled to this n bar trace wiring and this m bar data circuit; And
One second pixel cell has the second switch unit and one the 3rd switch element that couple mutually, and wherein this second switch unit is coupled to this m bar data circuit, and the 3rd switch element is coupled to this n+2 bar trace wiring;
Wherein, this first pixel cell and this second pixel cell can receive the data signals that this m bar data circuit is carried simultaneously, and wherein m, n are all positive integer.
7. dot structure as claimed in claim 6, wherein this first switch element, this second switch unit and the 3rd switch element are constituted with the thin film transistor (TFT) of N type or the thin film transistor (TFT) of P type.
8. dot structure comprises:
The multi-strip scanning circuit, wherein said trace wiring is arranged in parallel each other in regular turn;
Many data circuits, wherein said data circuit is arranged in parallel each other in regular turn, and described data circuit and the cross arrangement each other of described trace wiring;
One first pixel cell has one first switch element, and wherein this first pixel cell determines according to the scanning signal on this n bar trace wiring whether conducting is to receive the data signals on this m bar data circuit; And
One second pixel cell, have a second switch unit and one the 3rd switch element, wherein this second pixel cell determines whether conducting to receive the data signals on this this m bar data circuit according to the scanning signal on this n+2 bar and this n+3 bar trace wiring;
Wherein, this first pixel cell and this second pixel cell can receive the data signals that this m bar data circuit is carried simultaneously, and wherein m, n are all positive integer.
9. dot structure as claimed in claim 8, wherein this first switch element, this second switch unit and the 3rd switch element are constituted with the thin film transistor (TFT) of N type or the thin film transistor (TFT) of P type.
10. LCD comprises:
One first substrate;
One second substrate, first substrate is relative disposes with this; And
One backlight module is disposed at a side of this first substrate;
Wherein, have a kind of dot structure on this first substrate, comprising:
The multi-strip scanning circuit, wherein said trace wiring is arranged in parallel each other in regular turn;
Many data circuits, wherein said data circuit is arranged in parallel each other in regular turn, and described data circuit and the cross arrangement each other of described trace wiring;
One first pixel cell has one first switch element, and wherein this first switch element is coupled to this n bar trace wiring and this m bar data circuit; And
One second pixel cell has the second switch unit and one the 3rd switch element that couple mutually, and wherein this second switch unit is coupled to this m bar data circuit, and the 3rd switch element is coupled to this n+2 bar trace wiring;
Wherein, this first pixel cell and this second pixel cell can receive the data signals that this m bar data circuit is carried simultaneously, and wherein m, n are all positive integer.
11. LCD as claimed in claim 10, wherein this first switch element, this second switch unit and the 3rd switch element are constituted with the thin film transistor (TFT) of N type or the thin film transistor (TFT) of P type.
12. a LCD comprises:
One first substrate;
One second substrate, first substrate is relative disposes with this; And
One backlight module is disposed at this first substrate opposite side relative with this second substrate;
Wherein, have a kind of dot structure on this first substrate, comprising:
The multi-strip scanning circuit, wherein said trace wiring is arranged in parallel each other in regular turn;
Many data circuits, wherein said data circuit is arranged in parallel each other in regular turn, and described data circuit and the cross arrangement each other of described trace wiring;
One first pixel cell has one first switch element, and wherein this first pixel cell determines according to the scanning signal on this n bar trace wiring whether conducting is to receive the data signals on this m bar data circuit; And
One second pixel cell has a second switch unit and one the 3rd switch element, and wherein this second pixel cell determines according to the scanning signal on this n+2 bar and this n+3 bar trace wiring whether conducting is to receive the data signals on this m bar data circuit;
Wherein, this first pixel cell and this second pixel cell can receive the data signals that this m bar data circuit is carried simultaneously, and wherein m, n are all positive integer.
13. LCD as claimed in claim 12, wherein this first switch element, this second switch unit and the 3rd switch element are constituted with the thin film transistor (TFT) of N type or the thin film transistor (TFT) of P type.
CN 200610087864 2006-05-26 2006-05-26 Pixel level multi-task architecture driving method and device using the method Pending CN101079227A (en)

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CN102163417A (en) * 2010-02-24 2011-08-24 卡西欧计算机株式会社 Liquid crystal display device
CN102446497A (en) * 2010-09-30 2012-05-09 北京京东方光电科技有限公司 Array substrate and driving method therefor
CN103413532A (en) * 2013-07-26 2013-11-27 京东方科技集团股份有限公司 Pixel drive circuit, pixel drive method, array substrate and liquid display device
CN101630498B (en) * 2008-07-14 2014-09-10 株式会社日本显示器西 Display apparatus, method of driving display apparatus, drive-use integrated circuit, and signal processing method
CN109523971A (en) * 2018-12-24 2019-03-26 惠科股份有限公司 display panel drive circuit and display device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101630498B (en) * 2008-07-14 2014-09-10 株式会社日本显示器西 Display apparatus, method of driving display apparatus, drive-use integrated circuit, and signal processing method
CN101751841A (en) * 2008-12-10 2010-06-23 奇美电子股份有限公司 Pixel driving framework, display panel, display device and pixel driving method
CN102163417A (en) * 2010-02-24 2011-08-24 卡西欧计算机株式会社 Liquid crystal display device
CN102163417B (en) * 2010-02-24 2014-05-14 卡西欧计算机株式会社 Liquid crystal display device
CN102446497A (en) * 2010-09-30 2012-05-09 北京京东方光电科技有限公司 Array substrate and driving method therefor
US8767022B2 (en) 2010-09-30 2014-07-01 Beijing Boe Optoelectronics Technology Co., Ltd. Array substrate and driving method thereof
US9412325B2 (en) 2010-09-30 2016-08-09 Boe Technology Group Co., Ltd. Array substrate and driving method thereof
CN103413532A (en) * 2013-07-26 2013-11-27 京东方科技集团股份有限公司 Pixel drive circuit, pixel drive method, array substrate and liquid display device
CN103413532B (en) * 2013-07-26 2015-07-01 京东方科技集团股份有限公司 Pixel drive circuit, pixel drive method, array substrate and liquid display device
CN109523971A (en) * 2018-12-24 2019-03-26 惠科股份有限公司 display panel drive circuit and display device
CN109523971B (en) * 2018-12-24 2021-02-26 惠科股份有限公司 Display panel drive circuit and display device

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