CN101075637A - Field effect transistor based on borate-carbon-nitrogen nano-material and its production - Google Patents
Field effect transistor based on borate-carbon-nitrogen nano-material and its production Download PDFInfo
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- CN101075637A CN101075637A CN 200710099322 CN200710099322A CN101075637A CN 101075637 A CN101075637 A CN 101075637A CN 200710099322 CN200710099322 CN 200710099322 CN 200710099322 A CN200710099322 A CN 200710099322A CN 101075637 A CN101075637 A CN 101075637A
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Abstract
This is a transistor applying one direction B/C/Ni nano material and its process method. The transistor is composed by a silicon underlay, insulation layer on the underlay, source area, leaking area and a conducting channel between the source and leaking area, which is made by one direction B/C/N nano material. The source and leaking area is a metal layer of good contacting property to the nano material. The one direction B/C/N nano materials are evenly dispersed on the underlay before source and leaking area making. The silicon underlay is made by heavy mixed silicon slices. The insulation layer is made by SiO2 getting from dry oxidation.
Description
Technical field
The present invention relates to a kind of field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material and preparation method thereof.
Background technology
Carbon nano-tube is because its unique electricity and mechanical characteristic become basic scientific research that has potentiality and the active material of making nano electron device.Utilize carbon nano-tube to prepare various electronic devices and components at present, comprise diode, field-effect transistor, oscillator and some basic logic gates.(V.Derycke，R.Martel，J.Appenzeller，and?Ph.Avouris，Nano?Lett.1，453(2001)；Adrian?Bachtold，Peter?Hadley，Takeshi?Nakanishi，Cees?Dekker，Science?294，1317(2001)；SanderJ.Tans，Alwin?R.M.Verschueren?&?Cees?Dekker，Nature?393，49(1998)；Zhihong?Chen，Joerg?Appenzeller，Yu-Ming?Lin，JenniferSippel-Oakley，Andrew?G.Rinzler，Jinyao?Tang，Shalom?J.Wind，PaulM.Solomon，Phaedon?Avouris，Science?311，1735(2006))。But carbon nano-tube is made a very big difficult problem of nano-device and is, carbon nano-tube on conduction property, be divided into semiconductive with metallic two kinds.The synthetic carbon nano-tube of conventional method all is that the nanotube and the metallic nanotube of semiconductive mixes, and has only the nanotube of semiconductive just can be used for making device, and metallic pipe is mingled in the middle of the semiconductor pipe, can cause component failure.Therefore nanometer tube device can't be made on a large scale, more can not be integrated.
In order to solve this difficult problem, several representational ways are arranged at present: (1) thus use heavy metallic salt and metallic tube reaction makes it become function (the Lei An that the non-conductive nanotube that makes semiconductive is exercised device, Qiang Fu, Chenguang Lu, and Jie Liu, JACS, 126,10520 (2006)); (2) dispersion soln of the centrifugal nanotube of use ultrahigh speed centrifuge, the pipe of semiconductive is different with metallic pipe density and separate (MICHAEL S.ARNOLD, ALEXANDER A.GREEN, JAMES F.HULVAT, SAMUEL I.STUPP AND MARK C.HERSAM Nature Nanotechnology, 1,60 (2006)); (3) use the method for plasma etching, be etched away thereby metallic reactivity is high, semiconductive stay (Guangyu Zhang, Pengfei Qi, Xinran Wang, Yuerui Lu, Xiaolin Li, Ryan Tu, Sarunya Bangsaruntip, David Mann, Li Zhang, Hongjie Dai, Science 314,974 (2006)).This several method all is the method for reprocessing, the step complexity, and operating difficulties is big, and cost is very high, and scale is difficulty relatively.
Summary of the invention
The objective of the invention is to propose a kind of with pure semiconductor nano material preparation field-effect transistor, thereby greatly improve the success rate of making carbon nano tube device, for extensive the making with the system integration lays the foundation.Simultaneously, because the present invention adopts shorter littler monodimension nanometer material, and the nano parts preparation method of " from bottom to top ", so will produce far-reaching influence to the simplification of technological process and the lifting of device integrated level.The present invention also further provides the concrete grammar of a kind of preparation based on the field-effect transistor memory of one dimension borate-carbon-nitrogen nano-material, and the method technology is succinct, with the semiconductor integrated circuit technique compatibility.
For achieving the above object, the invention provides a kind of field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material, it is by silicon substrate (1) (simultaneously as the grid region), insulating barrier on it (2), and source region (3), drain region (5) and be positioned at source region (3) and drain region (5) between one dimension borate-carbon-nitrogen nano-material conductive channel (4) form; Wherein source region (3) and drain region (5) are making source region (3) and drain region (5) before by having the metal film of good contact performance to constitute with borate-carbon-nitrogen nano-material, and one dimension borate-carbon-nitrogen nano-material quilt cloth equably is dispersed on the grid region (2).Wherein silicon substrate (1) is made by heavy mixed silicon slices; Described insulating barrier is made by the silicon dioxide that obtains by dry oxidation.Wherein the one dimension borate-carbon-nitrogen nano-material can be the nano material of boron-carbon nanotube or linear shape such as nano wire or nanofiber.
The metal film of further described source region (3) and drain region (5) is preferably all the duplicature that constitutes for the gold metal layer by the titanium of 2 nanometer thickness and 20 nanometer thickness.
The preparation method of above-mentioned effect transistor based on the one dimension borate-carbon-nitrogen nano-material may further comprise the steps successively
(1) earlier with the silicon chip surface oxidation forming insulating barrier, and cleaning silicon chip is with as substrate;
(2) purification one dimension borate-carbon-nitrogen nano-material, and disperse the one dimension borate-carbon-nitrogen nano-material, obtain single dispersion soln;
(3) the single dispersion soln of one dimension borate-carbon-nitrogen nano-material is coated on the required part of insulating barrier;
(4) on insulating barrier and borate-carbon-nitrogen nano-material, be coated with photoresist, formed the litho pattern in source/drain region by photoetching,
(5) plate the metal film that good contact performance is arranged with borate-carbon-nitrogen nano-material on the litho pattern surface, wash photoresist again, obtain source/drain electrode array pattern;
(6) under nitrogen or argon shield, anneal.
The present invention has successfully made field-effect transistor with the one dimension borate-carbon-nitrogen nano-material of the semiconductive conducting channel as device, and the success rate of device surpasses 95%, considerably beyond the level of pure Single Walled Carbon Nanotube.The present invention is the method that a kind of thorough solution single-wall carbon nanotube metal and semiconductive mix this difficult problem; And, be convenient to the simplification of following device preparing process and the lifting of integrated level more owing to adopt the shorter littler one-dimensional nano line (specifically referring to " single wall boron-carbon nanotube " material) and the nano parts preparation method of " from bottom to top ".Simultaneously, this technology and conventional semiconductor IC technology are compatible fully, and succinct manufacture craft can improve the rate of finished products of device effectively.The present invention will open up wide space for extensive making and integrated application based on one dimension borate-carbon-nitrogen nano-material field-effect transistor.
Description of drawings
Fig. 1 a is a FET unit schematic cross-section of the present invention;
Fig. 1 b is a field-effect transistor vertical view shown in Figure 1;
Fig. 2 is a field effect transistor tube preparation method flow chart of the present invention;
Fig. 3 is a field-effect transistor preparation process schematic diagram of the present invention;
Fig. 4 a is the atomic force microscope photo of the field effect transistor material object of structure;
Fig. 4 b is the channel current-grid voltage I of field-effect transistor of the present invention
DS-V
gCharacteristic curve;
Fig. 4 c is the channel current-grid voltage I of field-effect transistor of the present invention under different bias voltages
DS-V
DSCurve.
Embodiment
The present invention is described in further detail below in conjunction with accompanying drawing.
Shown in Fig. 1 a, Fig. 1 b, a kind of field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material of the present invention is by silicon substrate 1, (simultaneously as the grid region) insulating barrier 2 on it, and source region 3, drain region 5 and the single wall boron-carbon nanotube conductive channel between source region 3 and drain region 54 are formed.Source region 3 and drain region 5 are for to have the titanium of good contact performance, golden double-level-metal film with boron-carbon nanotube, and before making source region 3 and drain region 5, single wall boron-carbon nanotube quilt cloth equably is dispersed on the grid region 2.
The present invention is because the replacement silicon materials are as conductive channel, and the nano parts preparation method of employing " from bottom to top ", make technological process greatly simplify with monodimension nanometer material (specifically referring to " single wall boron-carbon nanotube " material).
According to repetition test, the inventor has designed as Fig. 2, technological process shown in Figure 3, is specially:
1. preparation substrate
Earlier with the silicon chip surface oxidation forming insulating barrier, and clean this heavy doping silicon chip with as base substrate, base substrate is put into acetone, alcohol and deionized water successively carried out ultrasonic waves for cleaning 5 minutes.
2. purification single wall boron-carbon nanotube disperses the single wall boron-carbon nanotube, obtains single dispersion soln
The single wall boron-carbon nanotube is soaked with concentrated hydrochloric acid earlier, remove catalyst granules.Centrifugal being deposited in of obtaining is heated to 450 degrees centigrade in the air, removes amorphous carbon and obtain the higher nanotube powder of purity.
Powder with above-mentioned purifying obtains adds dichloroethanes, and carries out ultrasonic Treatment, and centrifugal removal precipitation obtains finely dispersed nanotube solution.
3. be coated with the single dispersion soln of boron-carbon nanotube
The single dispersion soln of one dimension borate-carbon-nitrogen nano-material, by being spin-coated on the glue spreader on the required part of insulating barrier, after solution had been done, the dimension boron-carbon nanotube just was adsorbed on the silicon chip substrate.
4. coating photoresist has formed the litho pattern in source/drain region by photoetching
On insulating barrier and borate-carbon-nitrogen nano-material, be coated with photoresist, formed the litho pattern in source/drain region, electric lithography glue PMMA950 spin coating 4500RPM by electron beam lithography.
5. metal-coated membrane obtains source/drain electrode to the array electrode pattern
On litho pattern, plate the metal film that good contact performance is arranged with borate-carbon-nitrogen nano-material, can be preferably 2nm titanium metal film and 20nm gold metal film, slice, thin piece behind the plated film is soaked in acetone soln, wash photoresist again, obtain source/drain electrode to the array electrode pattern with peeling off (lift-off) technology.
6. under nitrogen or argon shield, anneal
Under nitrogen or argon shield, carry out after annealing in 350-400 degree centigrade at last,, improve device performance with contacting between improvement source/drain electrode and the single-walled nanotube conductive channel.
So far, the preparation of single wall boron-carbon nanotube field-effect transistor finishes, and its device architecture and whole technical process are respectively as shown in figs. 1 and 3.
Fig. 4 a-4c is depicted as the measurement result of individual devices.
General with channel current-grid voltage I
DS-V
gCharacteristic curve is weighed the performance of a field-effect transistor.Fig. 4 a is the atomic force microscope photo of a device, and a nanotube link is arranged between source-drain electrode.Fig. 4 b is the I of this device
DS-V
gTransfer characteristic curve.Keep source-drain voltage V during test
DS=0.1V is constant, and grid voltage progressively increases to+6V from-20V, the whenever long step by step 2V that is.Fig. 4 c is the I under the different grid voltages
DS-V
DSCurve.The fixed railing pole tension, the I-V curve between scan source is leaked.The source drain bias drops to-1V from 0V, and grid voltage drops to-20V from 0V, step-length 5V.Can see that when negative grid voltage, source-drain current is big, device is in conducting state, and under positive grid voltage, and suitable low of electric current was in by state between leaked in the source.Voltage by grid like this, just can control device open and, become a field-effect transistor by state.And in negative gate turn-on, so this field effect transistor is the P type.Under the situation of zero grid voltage, the source does not have electric current between leaking yet, and belongs to the field-effect transistor of enhancement mode, and power consumption is lower.This transistorized current on/off ratio reaches 5 orders of magnitude from B figure as can be seen.
Measured 200 individual devices in the experiment, wherein 191 can be cut off (that is, can be used as field-effect transistor), and success rate has reached more than 95%.In sum, field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material of the present invention, utilize the conductive channel of one dimension borate-carbon-nitrogen nano-material as field-effect transistor, improve the success rate of nanometer tube device greatly, reached the level of general carbon nanotube field-effect transistor on the performance.The present invention is a kind of more efficient, and technology is simpler, and the nano-device that has higher success rate has been avoided a common single-wall carbon nanotube metal and a semiconductive pipe difficult problem mixed in together.The device scale make and integrated aspect have extremely strong using value.
Claims (9)
1, a kind of field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material, it is characterized in that, this field-effect transistor is by silicon substrate (1), insulating barrier on it (2), and source region (3), drain region (5) and be positioned at source region (3) and drain region (5) between one dimension borate-carbon-nitrogen nano-material conductive channel (4) form; Wherein source region (3) and drain region (5) are by having the metal film of good contact performance to make with borate-carbon-nitrogen nano-material, making source region (3) and drain region (5) before, one dimension borate-carbon-nitrogen nano-material quilt cloth equably is dispersed on the grid region (2), and described silicon substrate is simultaneously as grid.
2, the field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material as claimed in claim 1 is characterized in that, described one dimension borate-carbon-nitrogen nano-material is meant the nano material of boron-carbon nanotube or linear shape such as nano wire or nanofiber.
3, the field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material as claimed in claim 1 is characterized in that, described silicon substrate (1) is made by heavy mixed silicon slices; Described insulating barrier is made by the silicon dioxide that obtains by dry oxidation.
4, the ferro-electric field effect transistor based on the one dimension borate-carbon-nitrogen nano-material as claimed in claim 1 is characterized in that, the duplicature that the metal film of described source region (3) and drain region (5) all constitutes for the gold metal layer by the titanium of 2 nanometer thickness and 20 nanometer thickness.
5, the preparation method of any described field-effect transistor based on the one dimension borate-carbon-nitrogen nano-material in the claim 1, its concrete steps are as follows:
(1) earlier with the silicon chip surface oxidation forming insulating barrier, and cleaning silicon chip is with as substrate;
(2) purification one dimension borate-carbon-nitrogen nano-material, and disperse the one dimension borate-carbon-nitrogen nano-material, obtain single dispersion soln;
(3) the single dispersion soln of one dimension borate-carbon-nitrogen nano-material is coated on the required part of insulating barrier;
(4) on insulating barrier and borate-carbon-nitrogen nano-material, be coated with photoresist, formed the litho pattern in source/drain region by photoetching;
(5) plate the metal film that good contact performance is arranged with borate-carbon-nitrogen nano-material on the litho pattern surface, wash photoresist again, obtain source/drain electrode array pattern;
(6) under nitrogen or argon shield, anneal.
6, preparation method as claimed in claim 4 is characterized in that, wherein being used in the step (2) disperseing the liquid of one dimension borate-carbon-nitrogen nano-material is dichloroethanes.
7, preparation method as claimed in claim 3 is characterized in that, wherein the coating process in the step (3) is spin coating, and the one dimension borate-carbon-nitrogen nano-material is controlled with the number of times of spin coating in the density of substrate.
8, preparation method as claimed in claim 3 is characterized in that, source/drain electrode is at a distance of 300 nanometers to 2 micron during step (4) photoetching.
9, preparation method as claimed in claim 3 is characterized in that, the temperature of step (6) annealing is 350-400 ℃.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103496689A (en) * | 2013-09-23 | 2014-01-08 | 同济大学 | Preparation method of boron-doped p type carbon nanotube with high seebeck coefficient |
| CN106847701A (en) * | 2017-03-20 | 2017-06-13 | 青岛大学 | A kind of preparation method of metal doped zinc oxide nanofiber field-effect transistor |
| WO2018215892A1 (en) * | 2017-05-23 | 2018-11-29 | International Business Machines Corporation | Semiconductor device |
-
2007
- 2007-05-16 CN CN 200710099322 patent/CN101075637A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103496689A (en) * | 2013-09-23 | 2014-01-08 | 同济大学 | Preparation method of boron-doped p type carbon nanotube with high seebeck coefficient |
| CN103496689B (en) * | 2013-09-23 | 2015-04-15 | 同济大学 | Preparation method of boron-doped p type carbon nanotube with high seebeck coefficient |
| CN106847701A (en) * | 2017-03-20 | 2017-06-13 | 青岛大学 | A kind of preparation method of metal doped zinc oxide nanofiber field-effect transistor |
| WO2018215892A1 (en) * | 2017-05-23 | 2018-11-29 | International Business Machines Corporation | Semiconductor device |
| GB2577208A (en) * | 2017-05-23 | 2020-03-18 | Ibm | Semiconductor device |
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