CN101044727B - 使用直插式信用扩充器与主机总线适配器的方法及*** - Google Patents
使用直插式信用扩充器与主机总线适配器的方法及*** Download PDFInfo
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Abstract
本发明提供一种存储区域网络(“SAN”)及一种***。所述SAN包括与信用扩充器在操作上耦接的主机总线适配器,其中所述信用扩充器自光纤信道网络接收帧并根据所述HBA中的可用缓冲器空间来将所接收到的帧发送至所述HBA。所述HBA将所述信用扩充器中的可用缓冲器空间通知其他光纤信道端口。所述HBA向所述信用扩充器发送信号,以将所述HBA中的可用缓冲器空间通知所述信用扩充器。所述HBA包括一用于将所述HBA与所述信用扩充器介接的管理端口。
Description
技术领域
本发明涉及联网***,且更具体而言涉及将主机总线适配器与直插式信用扩充器相耦接。
背景技术
存储区域网络(“SAN”)通常在有多个存储器存储装置可供用于各种主机计算***时使用。SAN中的数据通常通过各种控制器/适配器自多个主机***移至存储***。
主机***通常包括数个功能组件。这些组件可包含中央处理器(CPU)、主存储器、输入/输出(“I/O”)装置及流式存储装置(例如磁带驱动器)。在常规***中,主存储器经由***总线或局部存储器总线耦接至CPU。主存储器用于使CPU在执行时能够存取存储于主存储器中的数据及/或程序信息。通常,主存储器由随机存取存储器(RAM)电路构成。具有CPU及主存储器的计算机***通常称作主机***。
主机***通常使用“PCI”总线接口经由主机总线适配器(“HBA”,亦可称作“控制器”及/“适配器”)来与存储***通信。PCI代表***组件互连(Peripheral ComponentInterconnect),其是一种由Intel Corporation开发的局部总线标准。PCI标准以引用方式全文并入本文中。
PCI-X为与使用PCI总线的现有PCI卡兼容的另一标准总线。PCI-X提高了PCI的数据传送速率。
还使用各种其他标准接口来将数据自主机***移至存储装置。光纤信道(FiberChannel)即为一种这样的标准。光纤信道(其以引用方式全文并入本文中)为一组美国国家标准协会(ANSI)标准,其为存储及网络协议(例如HIPPI、SCSI、IP、ATM及其他协议)提供串行传输协议。光纤信道提供输入/输出接口来满足信道及网络用户二者的要求。
光纤信道支持三种不同的拓扑:点对点、仲裁环路及光纤信道结构。点对点拓扑直接附接两个装置。仲裁环路拓扑以环路形式附接各装置。光纤信道结构拓扑则将主机***直接附接至结构上,然后将各主机***连接至多个装置。光纤信道结构拓扑允许互连多个媒体类型。
光纤信道是一种封闭***,其依靠多个端口来交换关于属性及特性的信息,以确定各端口是否可一起运行。如果各端口可一起工作,则所述端口规定其用以进行通信的标准。在光纤信道中,在两个节点之间建立路径,其中路径的主要任务是将数据自一个点输送至另一个点。
光纤信道结构装置包括用于管理结构连接的节点端口或“N_端口”。N_端口建立接至具有结构端口或F_端口的结构元件(例如开关)的连接。
在光纤信道中,使用缓冲器-缓冲器信用机制来控制光纤信道链路上的帧流。此种机制需要发射机在发送帧前以R_RDY基元形式接收信用。目的地只有在其具有足以接受完整帧的缓冲器空间时才发送R_RDY。
一旦发射机针对其所接收到的每一R_RDY发送出帧,其便停止传输,直至另一R_RDY自目的地到达为止。除非发射机接收到足以覆盖使帧通过链路传播至目的地及R_RDY通过所述链路自目的地返回所需的时间的R_RDY,否则发射机会停止并等待R_RDY。
数据通量随着光纤信道链路的长度在距离上的增加而受到阻碍。在传统***中,使用附加数据缓冲来允许发送更多的R_RDY并使空闲周期最小化。此解决方式具有缺点。例如,当用于只使用短链路的环境中时,具有大缓冲器的装置会浪费存储资源。此外,使用外部存储器缓冲器代价高昂且需要附加的引脚及数据端口。
因此,需要一种能实现有效数据传送而不永久地使用附加存储器缓冲器的***。
发明内容
在本发明的一个方面中,提供一种存储区域网络(“SAN”)。所述SAN包括与信用扩充器在操作上耦接的主机总线适配器,其中所述信用扩充器自光纤信道网络接收帧并根据HBA中的可用缓冲器空间将所接收到的帧发送至HBA。所述HBA将所述信用扩充器中的可用缓冲器空间通知其他光纤信道端口。所述HBA向所述信用扩充器发送信号,以将所述HBA中的可用缓冲器空间通知所述信用扩充器。
在本发明的另一个方面中,提供一种用于在光纤信道网络中传送数据的***。所述***包括与信用扩充器在操作上耦接的HBA,其中所述信用扩充器自光纤信道网络接收帧并根据所述HBA中的可用缓冲器空间来将所接收到的帧发送至所述HBA。
在本发明的再一个方面中,提供一种HBA。所述HBA包括用于将所述HBA与信用扩充器介接的管理端口,其中所述信用扩充器自光纤信道网络接收帧并根据所述HBA中的可用缓冲器空间将所接收到的帧发送至所述HBA。
提供此简要说明旨在使人们可更快地理解本发明的性质。结合附图参阅下文对本发明较佳实施例的详细说明,可实现对本发明的更全面理解。
附图说明
现将参考较佳实施例的图式来阐述本发明的上述特征及其他特征。在图式中,相同组件具有相同参考编号。所显示的实施例仅旨在图解说明而非限定本发明。所述图式包含下列各图:
图1A显示一使用SAN的网络的顶层方块图;
图1B显示一根据本发明一个方面与信用扩充器介接的HBA的顶层图;
图2显示一根据本发明一个方面在信用扩充器与HBA之间具有介接信号的方块图;及
图3显示一根据本发明一个方面用于介接信用扩充器与HBA的过程流程图。
具体实施方式
定义:
提供下述定义,因为其通常(但不具有排他性)在构建本发明各个自适应性方面的光纤信道环境中使用。
“光纤信道ANSI标准”:该标准(其以引用方式全文并入本文中)描述用于支持与IPI、SCSI、IP、ATM及其他标准相关联的其他高级协议的高性能串行链路的物理接口、传输及信令协议。
“N_端口”:直接光纤附接端口,例如磁盘驱动器或HBA。
“SAN”:存储区域网络
为便于理解所述较佳实施例,将阐述SAN及HBA的通用架构及操作。然后,将参照主机***及HBA的通用架构来阐述所述较佳实施例的具体架构及操作。
图1A显示SAN***100,SAN***100使用HBA 106(亦称作“适配器106”),以用于使用光纤信道存储区域网络114及115在具有主机存储器101的主机***(例如图2中的200)与各种装置/***(例如存储子***116及121、磁带库118及120及服务器117及119)之间进行通信。主机***200使用驱动器102,驱动器102使用输入/输出控制块(“IOCB”)经由适配器106来协调数据传送。
请求队列103及响应队列104保持在主机存储器101中,以便使用适配器106来传送信息。如图1B中所示,主机***200通过PCI核心模块(接口)137经由PCI总线105来与适配器106进行通信。
在传统***中,使用附加缓冲器108A来提高远距离情况下的链路通量,而此会造成浪费。
HRA 106:
图1B显示一根据本发明一个方面所使用的适配器106的方块图。适配器106包括分别用于在传输及接收路径中处理数据的传输及接收侧处理器(其亦可称作“序列发生器”)112及109。传输路径在此上下文中是指自主机存储器101经由适配器106至存储***的数据路径。接收路径是指经由适配器106来自存储子***的数据路径。值得注意的是,对接收及传输路径使用仅一个处理器,且本发明并不仅限于任一特定的处理器数量/类型。缓冲器111A及111B分别用来在接收及传输路径中存储信息。
HBA 106在接收路径中在操作上耦接至光纤信道信用扩充器146。来自光纤信道网络的帧流量146A进入信用扩充器146并随后发送至HBA 106的接收路径(其显示成146B)。
信用扩充器146及其各种组件阐述于2002年6月10日提出申请的第10/166570号及2003年9月9日提出申请的第10/664,548号美国专利申请案中;这两个申请案的揭示内容以引用方式全文并入本文中。下面的图2详细阐述HBA 106与信用扩充器146之间的交互作用。
除接收及传输路径上的专用处理器外,适配器106还包括处理器106A,处理器106A可为用于在适配器106中实施各种功能的简化指令集计算机(“RISC”)。
适配器106还包括光纤信道接口(亦称作光纤信道协议管理器“FPM”)113A,光纤信道接口113A包括分别位于接收及传输路径中的FPM 113B及113(其在图1B中显示为FC RCV及FC XMT)。FPM 113A及FPM 113使数据能够移至/来自其他装置(未显示)。
适配器106还通过局部存储器接口122(分别经由连接线116A及116B(图1A))耦接至外部存储器108及110(其在下文中可互换地加以指代)。局部存储器接口122提供用来管理局部存储器108及110。局部DMA模块137A用于获取存取权以自局部存储器(108/110)移动数据。
适配器106还包括用于将数据从10位串行格式变换至8位并行格式及进行相反变换的串行/反串行器(“SERDES”)。
适配器106进一步包括:与请求队列103及响应队列104介接的请求队列DMA信道(0)130、响应队列DMA信道131、请求队列(1)DMA信道132;及用于管理命令信息的命令DMA信道133。
接收及传输路径二者分别具有DMA模块129及135。传输路径还具有耦接至处理器112并对传输操作进行调度的调度器134。仲裁器107在多个DMA信道请求之间进行仲裁。
图2显示一在HBA 106与信用扩充器146之间具有各种接口信号的方块图,其中将来自HBA 106的传输路径显示成146C。HBA 106可存取静态随机访问存储器(“SRAM”)108B、闪速存储器108C及电可擦可编程只读存储器(“EEPROM”)108D,以执行各种可编程指令/代码。
HBA 106使用最少数量的管理端口来连接至信用扩充器146。在本发明的一个方面中,使用为一种标准协议的管理数据输入输出(“MDIO”)协议。所述MDIO协议/标准以引用方式全文并入本文中。管理端口201用于使用信号202及203来与信用扩充器146介接。
信用扩充器146接收入局帧146A。信用_调整(Credit_Adjust)信号204自HBA106发送至信用扩充器146,以传达HBA 106具有可供用于帧的缓冲器(即准许信用扩充器146在接收路径中传输帧)。信用扩充器146接收信号204,使信号204与其本身的参考时钟同步并随后验证信号204。信号204对时间敏感且每当在HBA 106中腾出帧缓冲器时其便在低至高与高至低跃迁之间双态切换。信号204双态切换的速率决定帧可如何快地自信用扩充器移至HBA 106。
信用扩充器146向HBA 106发送ATTN信号205。信号205指示已出现需要HBA106进行管理干预的例外情况。在本发明的一个方面中,信号205保持为高,直至被来自HBA 106的响应(其是经由信号203接收到)清除为止。由于信号205保持为高,因此其使HBA 106能够使信号205同步、识别并响应于信号205。由于信号205只有在例外情况下才得到确定,因此此机制不影响HBA 106在有利于数据传送方面的总体性能。
在初始化期间,由固件(RISC 106A及其他模块所使用的软件)来设置HBA 106。所述设置指示在信用扩充器146中可供使用的缓冲器空间量。当HBA 106与另一个光纤信道端口连接时,HBA 106根据信用扩充器146的缓冲容量,使用R_RDY基元来传输可用信用的数量。
图3显示一用于将信用扩充器146与HBA 106一起使用的过程流程图。在步骤300中,由固件设置HBA 106。在设置期间,HBA 106确定(或知道)信用扩充器146中可供使用的缓冲器空间量。
在步骤S302中,HBA 106将可用缓冲器空间通知其他光纤信道端口(使用R_RDY基元)。此使其他端口能够根据信用扩充器146的缓冲器容量将数据发送至HBA 106。
在步骤S304中,HBA 106将可供用于接收/处理帧的缓冲器空间通知信用扩充器146。
在步骤S306中,信用扩充器146将帧发送到HBA 106。在步骤S308中,RSEQ 109处理所述帧。
在本发明的一个方面中,使用信用扩充器146会消除对附加数据端口/缓冲器的需要并减小光纤信道传输中的总等待时间。
尽管已参考特定实施例阐述了本发明,然而这些实施例仅为例示性而非限定性实施例。根据此揭示内容及上文权利要求书,本发明的诸多其他应用及实施例将显而易见。例如,除SAN及光纤信道标准外,也可使用自动DMA选择。上述自适应性方面适用于其中在链路传送速率之间存在不一致性的任何联网环境。
Claims (17)
1.一种存储区域网络SAN,其包括:
与信用扩充器在操作上耦接的主机计算***的主机总线适配器HBA,其中当HBA初始化时,所述HBA确定所述信用扩充器的缓冲器存储容量并且所述HBA向至少一个存储区域网络装置的光纤信道端口传输某一数目的R_RDY,其中R_RDY的所述数目基于所述信用扩充器的所述缓冲器存储容量;并且所述信用扩充器直接自光纤信道网络接收帧;并且所述信用扩充器在所述HBA向所述信用扩充器发送信号指示所述HBA的接收路径中有可用缓冲器空间之后将所接收到的帧发送至所述HBA。
2.如权利要求1所述的SAN,其中自所述HBA向所述信用扩充器的信号指示所述HBA中可用缓冲器空间从第一值到第二值跃迁,并且从所述第一值到所述第二值的所述信号跃迁的速率确定所述所接收到的帧自所述信用扩充器移至所述HBA的速率。
3.如权利要求1所述的SAN,其中所述HBA通过使用管理数据输入输出协议的管理端口与所述信用扩充器通信。
4.如权利要求1所述的SAN,其中所述信用扩充器通过向所述HBA发送ATTN信号将例外情况通知所述HBA,并且在所述HBA向所述例外情况作出响应后清除所述ATTN信号。
5.一种用于在光纤信道网络中传送数据的***,其包括:
与信用扩充器在操作上耦接的主机计算***的主机总线适配器HBA,其中当HBA初始化时,所述HBA确定所述信用扩充器的缓冲器存储容量并且所述HBA向至少一个存储区域网络装置的光纤信道端口传输某一数目的R_RDY,其中R_RDY的所述数目基于所述信用扩充器的所述缓冲器存储容量;并且所述信用扩充器直接自光纤信道网络接收帧;并且所述信用扩充器在所述HBA向所述信用扩充器发送信号指示所述HBA的接收路径中有可用缓冲器空间之后将所接收到的帧发送至所述HBA。
6.如权利要求5所述的***,其中自所述HBA向所述信用扩充器的信号指示所述HBA中可用缓冲器空间从第一值到第二值跃迁,并且从所述第一值到所述第二值的所述信号跃迁的速率确定所述所接收到的帧自所述信用扩充器移至所述HBA的速率。
7.如权利要求5所述的***,其中所述HBA通过使用管理数据输入输出协议的管理端口与所述信用扩充器通信。
8.如权利要求5所述的***,其中所述信用扩充器通过向所述HBA发送ATTN信号将例外情况通知所述HBA,并且在所述HBA向所述例外情况作出响应后清除所述ATTN信号。
9.一种主机计算***的主机总线适配器HBA,其包括:
用于将所述HBA与信用扩充器介接的管理端口,其中当HBA初始化时,所述HBA确定所述信用扩充器的缓冲器存储容量并且所述HBA向至少一个存储区域网络装置的光纤信道端口传输某一数目的R_RDY,其中R_RDY的所述数目基于所述信用扩充器的所述缓冲器存储容量;并且所述信用扩充器直接自光纤信道网络接收帧;并且所述信用扩充器在所述HBA向所述信用扩充器发送信号指示所述HBA的接收路径中有可用缓冲器空间之后将所接收到的帧发送至所述HBA。
10.如权利要求9所述的HBA,其中自所述HBA向所述信用扩充器的信号指示所述HBA中可用缓冲器空间从第一值到第二值跃迁,并且从所述第一值到所述第二值的所述信号跃迁的速率确定所述所接收到的帧自所述信用扩充器移至所述HBA的速率。
11.如权利要求9所述的HBA,其中所述HBA通过使用管理数据输入输出协议的管理端口与所述信用扩充器通信。
12.如权利要求9所述的HBA,其中所述信用扩充器通过向所述HBA发送ATTN信号将例外情况通知所述HBA,并且在所述HBA向所述例外情况作出响应后清除所述ATTN信号。
13.一种用于在存储区域网络中接收光纤信道网络信息的方法,其包括:
确定耦合至主机总线适配器HBA的信用扩充器的缓冲器容量;
向至少一个存储区域网络装置的光纤信道端口发送R_RDY基元,所述存储区域网络装置与所述HBA通信,所述HBA向所述存储区域网络装置指示可用缓冲器空间,并且发送的R_RDY基元的数目是基于所述信用扩充器的缓冲器存储容量;
将所述HBA的接收路径中的可用缓冲器空间通知所述信用扩充器;
自存储区域网络装置接收网络帧,且所述网络帧由所述信用扩充器直接接收;
向所述HBA发送所述网络帧,且所述网络帧由接收路径处理器而非所述HBA的处理器处理。
14.如权利要求13所述的方法,其中自所述HBA向所述信用扩充器的信号指示所述HBA中可用缓冲器空间从第一值到第二值跃迁,并且从所述第一值到所述第二值的所述信号跃迁的速率确定所述所接收到的帧自所述信用扩充器移至所述HBA的速率。
15.如权利要求13所述的方法,其中所述HBA通过使用管理数据输入输出协议的管理端口与所述信用扩充器通信。
16.如权利要求13所述的方法,其中所述信用扩充器通过向所述HBA发送ATTN信号将例外情况通知所述HBA,并且在所述HBA向所述例外情况作出响应后清除所述ATTN信号。
17.如权利要求13所述的方法,其中所述网络帧是光纤信道帧。
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US10/956,718 US7380030B2 (en) | 2004-10-01 | 2004-10-01 | Method and system for using an in-line credit extender with a host bus adapter |
US10/956,718 | 2004-10-01 | ||
PCT/US2005/035064 WO2006039422A1 (en) | 2004-10-01 | 2005-09-27 | Method and system for using an in-line credit extender with a host bus adapter |
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- 2005-09-27 CN CN2005800329484A patent/CN101044727B/zh not_active Expired - Fee Related
- 2005-09-27 EP EP05802057A patent/EP1794953B1/en not_active Not-in-force
- 2005-09-27 AT AT05802057T patent/ATE537635T1/de active
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Also Published As
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ATE537635T1 (de) | 2011-12-15 |
US20060075161A1 (en) | 2006-04-06 |
WO2006039422A1 (en) | 2006-04-13 |
US7380030B2 (en) | 2008-05-27 |
EP1794953B1 (en) | 2011-12-14 |
EP1794953A1 (en) | 2007-06-13 |
CN101044727A (zh) | 2007-09-26 |
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