CN1008588B - Digital signal amplitude control apparatus - Google Patents
Digital signal amplitude control apparatusInfo
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- CN1008588B CN1008588B CN 85104989 CN85104989A CN1008588B CN 1008588 B CN1008588 B CN 1008588B CN 85104989 CN85104989 CN 85104989 CN 85104989 A CN85104989 A CN 85104989A CN 1008588 B CN1008588 B CN 1008588B
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Abstract
A kind of digital video signal amplitude control unit is provided.A multiplier, it has one and digital video signal source port coupled and a control input end.A detector, it produces a control signal with the difference of digital video signal amplitude.This detector comprises a piecewise linearity weighting device.This device provides two sensitivity levels for different signal amplitudes, and a sensitivity level is used for the situation that signal amplitude is lower than predetermined value, and another sensitivity level is used for the situation that signal amplitude is higher than predetermined value.And also be useful on control signal is coupled to the device of the control input end of multiplier.
Description
The present invention relates to handle the device of vision signal, particularly the device that the amplitude of handling signal is controlled.
The present invention relates to the processing of carrier chrominance signal in the television receiver, yet, be not limited to this application.In television receiver, the vision signal that receives is separated into luminance component and chromatic component.Luminance component and chromatic component are handled respectively, and the signal after will handling again reconfigures, and produces R, G, B(promptly: red, green, orchid) tristimulus signals, de-energisation image display again.
On time sequencing, chromatic component comprises synchronizing signal and the chromatic diagram image information of following thereafter.By convention, the ratio of the amplitude of burst signal and it and pictorial information amplitude is normally changeless.But, usually make the amplitude of the burst signal (and pictorial information) of received signal depart from the normal level value because broadcasting equipment or communication media etc. break down or obstacle.In common receiver, autochroma control (ACC) circuit is arranged, be used for correcting action and carrier chrominance signal is returned to normal level.The ACC circuit is made comparisons the amplitude of burst signal with the reference level that presets, and amplifies or the decay carrier chrominance signal, so that the amplitude of burst signal remains on the numerical value of hope.
Because the deviation of error of ACC circuit working or differential colour burst pictorial information, the ACC circuit can promote the burst signal amplitude too high.Its result makes the image of reproduction have too bright color.For above-mentioned situation is proofreaied and correct, a colourity overload circuit is provided, be used to monitor carrier chrominance signal by the output of ACC circuit, when the amplitude of carrier chrominance signal surpassed the amplitude that presets, this circuit was decayed to carrier chrominance signal.In common analog receiver, an available simple controllable gain amplifier, diode and low pass filter are realized the function of colourity overload circuit, wherein, controllable gain amplifier is used for deamplification, and diode and low pass filter are used for signal monitoring.
With digital form, promptly to handle in the receiver of vision signal with binary arithmetic operation, amplification means multiplying, and the binary multiplier volume is big, price is more expensive, therefore should avoid using.Secondly, existing binary device can't realize being equivalent to the Nonlinear Processing function of diode detector.At last, to obtain carrier chrominance signal on a bit be impossible to certain that is suitable for realizing colourity overload protection in signalling channel most.
According to principle of the present invention, the digital video signal amplitude control apparatus comprises a multiplier, and it has one and digital video signal source port coupled and a control input end.A wave detector, it produces a control signal relevant with the digital video signal amplitude.Wave detector comprises a piecewise linearity weighting device, and this device provides two sensitivity levels, promptly is used for signal amplitude and is lower than first sensitivity level of predetermined value and is used for second sensitivity level that signal amplitude is higher than predetermined value.The device that control signal is coupled to the control input end of multiplier also is provided.
One embodiment of the invention are digital signal overloading correcting circuits.This circuit has piecewise linearity detection function, finishes average to signal in a field duration, and produces a control signal.This control signal is used to change the gain factor of the signal multiplier circuit that is pre-existing in, and this multiplier circuit works to the signal of handling.In one embodiment, multiplier circuit is a saturated multiplier of carrier chrominance signal.In the present embodiment, the output signal of wave detector monitoring colour saturation multiplier, the output signal of wave detector changes the colour saturation gain factor simultaneously.Wave detector is programme controlled, with the variation of the colour saturation factor that adapts to user control.
Colourity overload wave detector comprises a signal weighting circuit and a signal averaging circuit.Average circuit produces a signal, and this signal is corresponding to the mean value of weighted signal in a field duration.Then, with this mean value as the overload control signal.Weighting circuit is also different to the signal institute weighted of different amplitudes, the signal that amplitude is big, and weight is also big, the signal that amplitude is little, weight is little.This circuit comprises a reference level generator, and it provides a signal value X
RThe size that is used for the distinguishing signal amplitude.Deduct X with employed sample of signal Xn
R, and positive difference sent into first Calibration Circuit to produce sample value (S
2-S
1) (Xn-X
R)
PWherein, (S
2-S
1) be calibration factor, (Xn-X
R)
POnly represent (Xn-X
R) on the occasion of.The signal Xn that sends into also is admitted to second Calibration Circuit, and the generation sample of signal is S
1Xn, wherein, S
1It is second calibration factor.Then, the sample summation after the Comparative Examples processing generates the sample of signal Yn by the following formula definition
Yn=S
1Xn+(S
2-S
1)(Xn-X
R)
P
These samples are admitted to average circuit.By changing reference values X
RAnd program control weighting circuit.
In the accompanying drawings:
Fig. 1 is the block diagram of digital receiver middle part subdivision, comprises a signal overloading control circuit that is positioned on the carrier chrominance signal treatment channel.
Fig. 2 and Fig. 5 are the block diagrams that can be used for the signal overloading control circuit in Fig. 1 circuit.
Fig. 3 is the logic diagram of piecewise linearity weighting circuit, can replace the signal overloading control circuit of Fig. 2.
Fig. 4 is the figure of the transfer characteristic of Fig. 3 circuit.
In the following description, suppose that digital signal represents with the parallel position of a complement of two's two's complement form.In the accompanying drawing, wide on line is a parallel position bus between each unit, and in order to adapting to the transmission of parallel every sampled value, and thin on line is represented the single line connecting relation between each unit.The unit that indicates same numbers among the different figure has identical functions.
Fig. 1 illustrates the block diagram of baseband signal processing procedure in the digital television receiver.In receiver, receive common anolog TV signals by antenna 10, and be sent in the conventional analog tuner and put detecting circuit 12.Circuit 12 provides an Analog Baseband composite video signal, and is input in the analog digital converter (ADC) 20.ADC20 generates a Serial No. such as the sample rate that is four times in color subcarrier analog video signal is sampled.The digital video sample is input in the comb filter 22, tells the luminance component and the chromatic component of composite video signal.Luminance component is admitted to luminance signal processing unit 26, and this unit can comprise such as low pass filter, signal peak circuit, contrast control etc.Be admitted to matrix circuit 30 by the luminance signal after unit 26 processing,, produce red (R), green (G) that is used to encourage picture tube, blue (B) three kinds of signals in this and the carrier chrominance signal combination of handling.
Chromatic component by comb filter 22 outputs is admitted to band pass filter 24, filtering low frequency noise and colour contamination carrier chrominance signal.Carrier chrominance signal through bandpass filtering sends the colored suppressor circuit 28 of ACC to, and the amplitude of this circuit adjustment carrier chrominance signal is to keep the constant amplitude of burst signal.And when the carrier chrominance signal amplitude be lower than one preset allow level the time, null value carrier chrominance signal of circuit 28 output.
The chromatic component of ACC circuit 28 outputs joins in the saturated multiplier 34, and at this, numeral sample is demarcated, thereby regulates the color intensity of reproduced image according to spectators' hobby.Sample by multiplier 34 output is sent to again in the color demodulation circuit 32, finishes the demodulation to carrier chrominance signal, for example, chrominance demodulation is become two with the color difference signal (R-Y) of its quadrature and (B-Y).Two color difference signals are admitted to matrix circuit 30.Notice that the relative position of saturated multiplier 34 and demodulator 32 can exchange.
In digital receiver, most of signal processing unit is worked under the control of central control unit.For convenience's sake, the control unit among Fig. 1 only links with saturated multiplier.In this case, control unit receives the saturation control signal by user's input, and it is converted to multiplier 34 receivable forms.
Also has a signal level control unit or a colourity overload detection (COD) 36 that links with multiplier 34 outputs among Fig. 1.COD36 produce one with one or an image duration the interior relevant signal of carrier chrominance signal mean value, this average signal is imported into control unit 38.According to this mean value, control circuit 38 is adjusted the saturation scale factor that imposes on multiplier 34 once more, so that average image color saturation or color intensity remain on the adjusting position that spectators like.
The block diagram 40 that is represented by dotted lines is another kind arrangements of COD unit, and wherein, carrier chrominance signal was monitored before the saturation multiplier.In this combination, countervail is not regulated to the given saturation of user in the COD unit.In the compound mode of two kinds of COD unit, the signal overloading system comprises an existing in advance signal multiplier (for example, unit 34), makes to reduce to minimum for finishing the required accessory of described function.
Preferably the COD unit is linked to before the multiplier,, does not have program-controlled function the COD36 and do not resemble because this wave detector can be designed to have fixing measuring ability like this.Yet the input of the sharp have more than is needed saturation multiplier of television design Shi Keneng connects.For example, if television receiver designs according to the ultra-large Digital Television treatment circuit of DIGIT2000 of the ITT Intermetall production of West Germany Freiburg (Freiburg), the designer only can obtain the output signal of saturation multiplier, obtains the input signal of multiplier calibration factor indirectly by control unit.In this case, the designer is forced to realize according to the arrangement mode of unit 36 function of COD.
Fig. 2 illustrate in more detail overload detection 36 ' structure.The input signal of supposing saturated multiplier 34 is not by the carrier chrominance signal of demodulation.This signal is the sinusoidal signal of an amplitude modulation phase modulation, and therefore, the amplitude of its numeral will change according to the phase place of instantaneous sampling.Suppose that again sample rate is four times of color subcarrier, then generation has the orthogonality relation sample of alternation one by one.Regulating useful amount for overload is the amplitude or peak one peak value of carrier chrominance signal, rather than the value of sample one by one.Therefore, should at first detect the amplitude of carrier chrominance signal.This function is finished by unit 45, and unit 45 links with the output line of multiplier 34.By unit 45, can calculate by square root sum square adjacent sample, determine amplitude thus.Another kind of situation, it also can be the device of an estimation amplitude etc., simultaneously, briefly says, because its total function is the maximum of restriction carrier chrominance signal, therefore, when the amplitude of carrying out is calculated, can ignore the lower significance bit of sample.
The amplitude sample is admitted to signal weighting unit 47, and unit 47 has a piecewise linearity transfer function.This function has two slopes, and signal is significantly applied heavily power, and also less to the less power that signal applied of amplitude.Be equivalent to the shape approximation of transfer function be used in simulation in the overload detection the diode transfer characteristic or the transfer characteristic between transistor base-emitter.
Amplitude after the weighting is 47 outputs from the unit, send into accumulator 49, preset time at interval in (for example a field duration or a frame period), accumulator 49 range value after the weighting that adds up, or calculate amplitude after the weighting above the number of times of preset value.The value that adds up or gather that unit 49 produces is sent into comparator 53 as an input signal.Send into comparator 53 by the overload fiducial value that memory cell 51 provides as another input signal.If accumulated value surpasses fiducial value, comparator produces a signal, inputs to control unit 38, and indication should reduce to put on the multiplication factor of multiplier 34.Comparator can be arranged to only indicate the polarity of difference, and in this case, thereby control unit is programmed and make multiplication factor increase or reduce a fixing amount when comparator is confessed signal at every turn according to this indicated polarity.Perhaps, also can make comparator indication difference the spoke degree (thereby, provide an indication of representing the required percentage of multiplication factor to change) and the polarity of difference, in the case, thereby control unit is programmed by a selectable amount and revises multiplication factor, this its numerical value of selectable amount and the indication of difference amplitude adapt, and its symbol and polarity indication adapt.
For example, if control unit 38 is microprocessors,, unit 51 and unit 53 are merged then by the appropriate software program.
Consider to run under the stable state when system, the user attempts to increase the color saturation of image, that is, the user has increased saturation multiplication factor role by regulating the controlled saturation knob of user.If other does not change, the amplitude output signal of multiplier 34 and detector 45 will increase thereupon, and will be same, and the accumulated value of accumulator 49 outputs also will increase.The value of the increase in back will try hard to make control unit 38 to balance out the saturation increase that the user directly causes, and saturation be regulated lose efficacy.(front is mentioned, if the end of going into of detector is connected to before the multiplier, then can not occur in this case).In order to overcome self counteracting situation of overload protection-saturated multiplier, the transfer function of weighted units 47 is along with the controlled saturation of user changes and changes simultaneously.For bigger saturation setting, weighting circuit gives most input signal with less response sensitivity according to program control design, and vice versa.
The weighting circuit of detector is shown in Fig. 3, and its response curve is shown in Fig. 4.Response curve has two slopes, and from zero to flex point (that is, the crosspoint of two slopes), the slope of high value is positioned at more than the flex point than the slope of low value.For example, less and bigger slope can respectively be 1/2 and 4 1/2, and the abscissa of flex point is positioned at X
R45(sees Fig. 2 by the unit) output less than X
RThe carrier chrominance signal amplitude multiply by the factor 1/2, and greater than X
RSignal amplitude multiply by the factor 4 1/2.Therefore, whole detector presents higher sensitivity for signal significantly.The result has prevented factitious heavy colour or the brightness that small size high saturation image is presented.
The position by changing flex point or the value of flex point provide the program control ability (this variation changes when being accompanied by the overload benchmark usually) of weighted units.When flex point moves on to a low value X
RLThe time, then most input signal is moved right to X and work as flex point by bigger slope value weighting
RHThe time, have only the enough big sample of a small amount of amplitude to be subjected to the effect of big slope value in the input signal.
Make Xn be n the input weighting circuit the amplitude sample, Yn sees Fig. 2 for weighting circuit 47() output n weighting after sample.The value of Yn can be described as
Yn=S
1Xn+(S
2-S
1)(Xn-X
R)
P(1)
Wherein, S
1And S
2Two slope value of expression unit 47 transfer functions, S
1Less than S
2, (Xn-X
R)
POnly as difference Xn-X
RBe the timing non-zero.Therefore, difference (Xn-X
R) be zero or when negative, (S
2-S
1) (Xn-X
R)
PItem equals zero.Suppose R
RBe to be X corresponding to the flex point value
RThe time the overload reference level.The output valve O of accumulator 49
ACan be expressed as a field duration and, promptly
O
A=
Y
n(2)
And the output Co of comparator 53 is
Co=O
A-R
R(3)
Below, consider that the user has improved M doubly with the saturation gain, makes for identical picture intelligence its amplitude X
' nBe former amplitude M doubly, promptly
X
′ n=MX
n(4)
When the user regulated saturation gain and makes it to improve M times, control unit had changed the flex point value of transfer function, makes it to be X
RThe M of the former flex point value at place doubly.Control unit 38(sees Fig. 2) also will transship reference level and change a new value R into
' R, R
' REqual former overload reference level R
RM doubly.Suppose that multiplier gain changes, produce new output valve Y by unit 47
' nBe shown below
Y
′ n=S
1X
′ n+(S
2-S
1)(X
′ n-X
′ R)
P(5)
=S
1MX
n+(S
2-S
1)(MX
n-MX
R)
P(6)
Perhaps
Y
′ n=MY
n(7)
The value O of accumulator 49 outputs
' AEqual
O
′ A=∑Y
′ n=M∑Y
n(8)
And comparator 53 provides a new output numerical value C
' o
C
′ o=O′
′ A-R′
R(9)
=∑Y′
n-R′
R(10)
=M(∑Y
n-R
R) (11)
=MC
o(12)
Therefore, whole loop is doubly located the M that range value is stable at former amplitude, and former range value refers to the stable range value before the saturation factor increases.
Fig. 3 illustrates a typical program control weighting circuit, the transfer characteristic that Fig. 4 has for this circuit.In circuit, the range value of range detector 45 outputs is admitted to input port 60.These values are as in the minuend input subtraction circuit 61.The flex point value that control unit 38 is sent is sent into subtracter 61 as subtrahend, and subtracter produces difference (Xn-X
R).The highest significant position of difference or sign bit are admitted to a reverse input end with door 62, and other is input to the input in the same way with door 62.Owing to once supposing the sample standard deviation that participates in processing procedure, we represented with the complement of two's two's complement, therefore, and difference (X
n-X
R) for timing, its highest significant position equals zero or logic low, when negative, highest order is 1 or logic high.Like this, only can pass through with door 62 greater than zero difference (X
n-X
R)
P, and for less than zero or null difference, equal zero with the output of door 62.Can respectively be used for each data bit of difference by the realizing with door of a plurality of two inputs with door 62, each and Men Youyi reverse input end connect with the sign bit of difference, and the other end is input in the same way, joins with each data bit of difference respectively.
Be input to mlultiplying circuit 64 from difference signal, finish the poor (S of difference and two slopes with door 62 outputs
2-S
1) computing of multiplying each other.If S
1Equal 1/2, S
2Equal 4 1/2, then (S
2-S
1) equaling 4, it is 2 multiple.In this example, but multiplier 64 abbreviations are online lt parts, and do not need other circuit element.The output valve of multiplier 64 is delivered to an input port of add circuit 65.
60 place's amplitude samples also are admitted to second mlultiplying circuit 63 in the input port.Mlultiplying circuit 63 is according to slope S
1To amplitude sample X
nDemarcate.Select S
1Equal 1/2, make and to realize circuit 63, and need not other element with the online gt parts of hardware.
The output valve of multiplier 63 is sent to second inlet of adder 65.The output valve of adder is Y
n(obviously, definition Y
nEquation (1) transfer function of Fig. 4 has been described).
When programming, only need change the flex point value of input subtractor unit 61 in mobile flex point or to the device of Fig. 3.Control unit is tackled the programming of one group of parameter, and this group parameter is corresponding to flex point value, saturation with for presetting the overload fiducial value of establishing the working point.After the user adjusted saturation, control circuit calculated and is proportional to new flex point value and the overload fiducial value that saturation changes, and the new value of this group is sent into corresponding circuit according to the one group of parameter value that keeps in advance.After in case the saturation level of wishing is set up, then be input to saturation value one width of cloth picture, a width of cloth picture ground or one, place change of saturated multiplier according to the output response of comparator, if comparator just is being output as or it is negative to be, under the control of control unit, the gain of saturated multiplier reduces automatically respectively or increases, and finally makes the output of comparator trend towards zero.
Fig. 5 illustrates another embodiment of COD system.Do not imported from the inlet 75 of saturated multiplier 76 by the carrier chrominance signal of demodulation or a color difference signal after demodulation.Saturated-COD the gain control signal of combination is input to the gain control input of multiplier 76 by signal bus 88.Gain controlled carrier chrominance signal outputs to bus 89 from multiplier 76.The saturation control signal that the user provides is sent into the circuit of Fig. 5 by bus 83.
The saturation controlling value is admitted to first and second Calibration Circuit 80 and 81.Calibration Circuit 80 generates a flex point value by the need of piecewise linearity weighting circuit 77, and finishes factor K
1The computing that/Maxsat and saturation signal multiply each other, wherein, K
1Be available maximum flex point value, Maxsat is maximum available saturation value.Therefore, when the given saturation value value of equaling Maxsat, the flex point value that inputs to circuit 77 equals K
1All other flex point value will be proportional to the saturation value of current input.
Output carrier chrominance signal on the bus 89 is admitted to the signal input part of weighting circuit 77.Circuit 77 can be a type shown in Figure 3.Chroma sample after the weighting outputs to first input port of comparator 78 from circuit 77.
Calibration Circuit 81 produces an overload reference level, is input to another inlet of comparator 78.Calibration Circuit 81 is finished saturation value and factor K
2The computing that/MaxSat multiplies each other, wherein, when saturation value equals MaxSat, and used flex point value equals K
1The time, K
2Corresponding to a suitable overload fiducial value MaxRef.Circuit 81 produces the overload fiducial value that is proportional to current saturation value according to saturation value.
Send into counting circuit 79 from the pulse signal of comparator 78 outputs, record is such as the pulse number that occurs in the frame period.The pulse sum is deposited in latch 90 according to clock signal Vsync/2 in the existing frame period, and wherein clock signal and vertical sync pulse are synchronous.Simultaneously, counter 79 is by zero setting, for the overload pulse of record next frame is prepared.
Saturation value on the bus 83 in unit 82 by factor K
3Demarcate, wherein, K
3Equal the loop gain constant.In subtracter 84, from the saturation value of handling through ratio, deduct the overload counter value that is stored in the latch 90, difference is subjected to the filtering of low pass filter in unit 85.The time constant of low pass filter 85 reaches the length in a frame period at least.With filtered signal in unit 86 divided by loop gain K
3After, send into amplitude limiter 87, maximum sample of signal value is limited in MaxSat.The output of amplitude limiter 87 is sent into multiplier 76 as the gain input signal by bus 88, notices that the unit of all frames in frame line 100 all can be contained in the microprocessor.
Claims (9)
1, be used for the apparatus for processing of video signals of control figure video amplitude, comprise:
A digital video signal source;
A multiplier, it have one with the signal input of above-mentioned signal source coupling, be applicable to a delivery outlet and the control input end that can obtain the amplitude control signal.It is characterized in that:
Detector (36 ') produces control signal according to the amplitude of above-mentioned digital video signal, above-mentioned detector comprises a piecewise linearity weighting device (47), it provides two sensitivity levels for detector, a sensitivity level is used for the situation that signal amplitude is lower than predetermined value, and another sensitivity level is used for the situation that signal amplitude is higher than above-mentioned predetermined value; Device (38) is used for above-mentioned control signal is coupled to above-mentioned control input end.
According to the device of claim 1, it is characterized in that 2, above-mentioned weighting device (47) has the transfer function of two slopes, the intersection point of above-mentioned two slopes is defined as flex point, and above-mentioned weighting device comprises:
A source (38) that produces above-mentioned flex point value;
Be used to produce the device (61) of the difference of above-mentioned digital video signal amplitude and above-mentioned flex point value;
The device (62) by the positive difference in the above-mentioned difference only;
Be used for above-mentioned positive difference and the device (64) that multiplies each other corresponding to the factor of an above-mentioned slope;
Be used for above-mentioned digital video signal amplitude and the device (63) that multiplies each other corresponding to the factor of above-mentioned another slope;
Difference after being used for multiplying each other with multiply each other after amplitude combine, with the device (65) of the digital video signal range value that produces weighting.
According to the device of claim 2, it is characterized in that 3, above-mentioned detector (36) also comprises the device (38) of the flex point value that is used to provide other.
According to the device of claim 2, it is characterized in that 4, detector (36) also comprises:
In one period scheduled time, produce accumulator (49) corresponding to the signal of its summation according to above-mentioned weight number video amplitude value;
Produce the source (51) of overload fiducial value;
Be used for the comparator (53) that output signal and above-mentioned overload fiducial value with above-mentioned accumulator compare, comparative result is corresponding to above-mentioned control signal.
According to the device of claim 2, it is characterized in that 5, detector (36) also comprises:
Produce the source (81) of overload fiducial value;
Be used for comparator (78) that overload fiducial value and above-mentioned weight number vision signal value are compared, above-mentioned comparator produces one for each the weight number vision signal sample that exceeds above-mentioned overload fiducial value and exports pulse;
Be used to be recorded in the device (79) of the output pulse number that occurs in the above-mentioned scheduled time, pulse number is corresponding to above-mentioned control signal.
According to the device of claim 4 or 5, it is characterized in that 6, the device (38) that above-mentioned control signal is coupled to the control input end comprising:
Control unit (38), it comprises a user input signal source that is used for the yield value that the user determines is delivered to above-mentioned control input end, above-mentioned control unit can be according to the control signal that is provided and the yield value that the above-mentioned user of program control change determines.
7, according to the device of claim 6, it is characterized in that, above-mentioned detector (36 ') is coupled with the delivery outlet of above-mentioned multiplier (34), the variation of the user input signal that above-mentioned control unit (38) is sent according to the user input signal source changes flex point value and above-mentioned overload fiducial value (51).
According to the device of claim 7, it is characterized in that 8, above-mentioned control unit (38) makes these values be proportional to the variation of user input signal by program control flex point value and the overload fiducial value (51) of changing.
According to the device of claim 1, it is characterized in that 9, above-mentioned multiplier (34) is a carrier chrominance signal saturation gain multiplier.
Priority Applications (1)
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CN 85104989 CN1008588B (en) | 1985-07-01 | 1985-07-01 | Digital signal amplitude control apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 85104989 CN1008588B (en) | 1985-07-01 | 1985-07-01 | Digital signal amplitude control apparatus |
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CN85104989A CN85104989A (en) | 1986-12-31 |
CN1008588B true CN1008588B (en) | 1990-06-27 |
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CN 85104989 Expired CN1008588B (en) | 1985-07-01 | 1985-07-01 | Digital signal amplitude control apparatus |
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CN102684620A (en) * | 2011-03-16 | 2012-09-19 | 十速科技股份有限公司 | Piecewise linear gain method |
US11327058B2 (en) * | 2016-03-31 | 2022-05-10 | Shimadzu Corporation | Peak detection method and data processing device |
EP3709623B1 (en) * | 2019-03-15 | 2024-08-07 | Aptiv Technologies AG | Method for simulating a digital imaging device |
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