CN100583666C - Quick synchronous device for space based spread-spectrum communications - Google Patents
Quick synchronous device for space based spread-spectrum communications Download PDFInfo
- Publication number
- CN100583666C CN100583666C CN200810104679A CN200810104679A CN100583666C CN 100583666 C CN100583666 C CN 100583666C CN 200810104679 A CN200810104679 A CN 200810104679A CN 200810104679 A CN200810104679 A CN 200810104679A CN 100583666 C CN100583666 C CN 100583666C
- Authority
- CN
- China
- Prior art keywords
- leading
- branch
- sequence
- output
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The invention relates to a quick synchronizing device which is applicable to the spread spectrum communication of the direct sequence of a sky-based platform. The quick synchronizing device comprises analog-digital conversion devices, a divider which separates leading sampling information and lagging sampling information, a PN sequence generator which is used for generating the local PN sequence, a leading correlator for processing a leading sampling signal coming from the divider, a lagging correlator for processing a lagging sampling signal coming from the divider, a summator which adds up all leading correlative values including the leading correlative values of a circuit I and a circuit Q, the summator which adds up all lagging correlative values including the lagging correlative values of the circuit I and the circuit Q, a subtracter which compares the leading correlative values and the lagging correlative values and a sampling clock controller which controls a sampling clock in the analog-digital conversion devices of the circuit I and the circuit Q to achieve the synchrony of the sampling result and the PN sequence generator. The synchronizing device of the invention ensures the quick and reliable synchronization of spread spectrum signals under the conditions of the loading of the sky-based platform, limited energy, and the quick moving and great mobility of an object.
Description
Technical field
The present invention relates to the fast synchronization device of a kind of quick synchronization of spread spectrum communication, particularly a kind of space based spread-spectrum communications, belong to the air communications field.
Background technology
Spread spectrum communication system is the communication system of transmitting again after the digital baseband signal frequency spectrum is greatly expanded.Spread spectrum communication is compared with the traditional communication mode, has that the error rate is low, anti-multipath disturbs, secret ability is strong, be easy to advantage such as digitlization, in the application in air communications field more and more widely.
Typically spread spectrum technique is, baseband signal is modulated with the Walsh sign indicating number earlier, and (Pseudo Noise, PN) sequence is modulated to use pseudo noise again.It is T that information code element is modulated into a plurality of cycles
cChip, effectively baseband signal is carried out spread spectrum.It is described further to be discussed below the face document: An Introduction to Spread Spectrum, IEEECommunications Magazine, March nineteen eighty-three, author Charles E.Cook and Howard S.Marsh..Each transmitter of broadcasting on similar frequency bands is distinguished by its unique phase deviation, and each transmitter comprises a plurality of channels, by different Walsh sign indicating number coded modulation and differentiation.After receiver is removed carrier signal, utilize the PN sign indicating number sequence and the Walsh sign indicating number that mate with transmitter that spread-spectrum signal is carried out demodulation, final recovered information symbols.In order to make the demodulation success, in receiving course, the local PN code phase of receiver must be followed the tracks of transmitter PN code phase, guarantees reception and send the PN code phase synchronous.
At United States Patent (USP) " two-forty-low rate PN code tracking system " (High rate-Low rate PN code trackingsystem, patent number:5299229) in, a kind of PN code tracking system is disclosed, wherein mainly use two kinds of PN sign indicating numbers, a kind of is two-forty PN sign indicating number, and another kind is a low rate PN sign indicating number.This patent provides the method for following the tracks of different rates PN sign indicating number according to the different pieces of information ratio.This patent is used the PN code generator of two different rates at receiver end, the PN code generator of two-forty is by a plurality of delay phase-locked loops (Delay locked loop, DLL) producing the different backs that postpone carries out relevant with acceptance sign indicating number sequence, cumulative errors result is as the enable signal of inversion device, the output of inversion device is as voltage-controlled oscillator (voltagecontrolled oscillator, control signal VCO).
At United States Patent (USP) " the phase-locked code tracking system of delay that is used for the spread communication system receiver " (Delay-locked loopcode tracking system for receiver of a code spread communication system, patentnumber:5737362) in, a kind of pair of delay phase-locked loop code tracking system disclosed by producing the local code (± 0.5T that has the different time differences relatively with the timing reference point
cWith ± T
c), strengthened the linearity of tracking loop surveyed area.This patent is according to shifting to an earlier date 0.5T
cAnd T
cThe relevant gained of sign indicating number in advance signal energy and delay 0.5T is arranged
cAnd T
cThe energy of the relevant gained of delay sign indicating number, the use error detecting unit calculates, result of calculation through behind the loop filter to VCO output control signal.
But above patent all uses a plurality of delay phase-locked loops to increase the complexity and the power consumption of system, is not suitable for the situation of load, finite energy, and differently postpones the correlated results linear operation, and speed is relatively slow, is not suitable for the airborne vehicle communication of high-speed mobile.
Summary of the invention
The objective of the invention is to guarantee that for a kind of fast synchronization device that is applicable to the communication of space base platform direct sequence spread spectrum is provided at space base platform load, energy constraint, the target translational speed is fast, under the big situation of mobility, the fast and reliable of spread-spectrum signal is synchronous.
For achieving the above object, technical solution of the present invention is: quick synchronous device for space based spread-spectrum communications, and its characteristics are to comprise: the analog-digital conversion equipment that is used for homophase I and quadrature Q component are converted to digital signal; Be used for splitter that the leading sample information of analog-digital conversion equipment output signal is separated with late samples information; Be used to produce the PN sequencer of local PN sequence; According to the PN sequential value that the PN sequencer produces, be used to handle leading correlator from the next leading sampled signal of splitter; According to the PN sequential value that the PN sequencer produces, be used to handle lag correlation device from the next late samples signal of splitter; Be used for all leading correlations, comprise the adder that the leading correlation in I road and Q road carries out addition; Be used for all lag correlation values, comprise the adder that I road and Q road lag correlation value are carried out addition; Be used for subtracter that leading correlation and lag correlation value are compared; Be used for comparative result,, finally reach sampled result and the PN sequencer is synchronous the sampling clock controller that the sampling clock in I and the Q analog-digital conversion equipment is controlled according to described subtracter.
Described analogue-to-digital converters use 2 times of sample rates to spread-spectrum code chip speed that signal is sampled, and are converted to digital signal.
Described leading correlator comprises multiplier, squarer and accumulator, the local PN sequence that the I branch road of splitter output or the leading sampled result of Q branch road and PN sequencer produce multiplies each other in multiplier, multiplied result is in squarer square, and the multiplied result after square is deposited in accumulator and added up.
Described lag correlation device comprises multiplier, squarer and accumulator, the local PN sequence that the I branch road of splitter output or the late samples result of Q branch road and PN sequencer produce multiplies each other in multiplier, multiplied result is in squarer square, and the multiplied result after square is deposited in accumulator and added up.
The described sampling clock controller that sampling clock in I and the Q road analog-digital conversion equipment is controlled, high-frequency clock is carried out counting operation, after reaching the counting thresholding, the upset of control sampling clock, comparative result control clock count number of times according to described subtracter increases or reduces, and corresponding sampling clock upset shifts to an earlier date or lags behind.
The present invention's advantage compared with prior art is: the present invention can demonstrate obvious superiority when being used for air communications receiving terminal synchronizer.Every branch road only uses two correlators of lead and lag, and is simple in structure, is applicable to the air communications environment that energy, load is had strict demand; The lead and lag information of comprehensive utilization in-phase branch and quadrature branch is adjusted clock, a shared cover synchronizer when quadrature modulation, and under the constant substantially situation of structure, but transmitting two paths information has increased the rate of information throughput; In correlator, add up, the lead and lag correlated error is had amplification, improved synchronozing sensitivity and no-load speed after the multiplied result square.
Description of drawings
Fig. 1 is the Receiver of Direct-sequence Spread Spectrum block diagram;
Fig. 2 is a space base band spread receiver fast synchronization device block diagram of the present invention;
Fig. 3 is the leading correlated results of receiver and lag correlation comparison value and sampling instant graph of a relation as a result.
Embodiment
With reference to Fig. 1, demonstrated typical Receiver of Direct-sequence Spread Spectrum block diagram.Receiver mainly comprises antenna 102, low noise amplifier 104, band pass filter 106, in-phase branch frequency mixer 108, quadrature branch frequency mixer 110, synchronizer 112, in-phase branch despreading equipment 114, quadrature branch despreading equipment 116.The signal that antenna 102 receives from spread spectrum transmitter.Received signal obtains amplifying through low noise amplifier 104.Band pass filter 106 is connected to low noise amplifier 104, and signal is carried out filtering, the filtering out-of-band noise.In-phase branch frequency mixer 108, quadrature branch frequency mixer 110 all are connected to band pass filter 106.The local homophase carrier wave that produces in frequency mixer 108 with filtering after signal mixing, from signal, remove the homophase carrier wave; Quadrature carrier in frequency mixer 110 with filtering after signal mixing, from signal, remove quadrature carrier.Synchronizer 112 links to each other with in-phase branch frequency mixer 108 by holding wire 118, links to each other with quadrature branch frequency mixer 110 by holding wire 120.Synchronizer 112 makes local PN sequence and transmitter PN sequence phase synchronous by adjusting, the PN sequence after the output synchronously.In-phase branch despreading device 114 links to each other with frequency mixer 108 by holding wire 118, links to each other with synchronizer 112 by holding wire 122.In-phase branch despreading device 114 utilizes the synchronous back PN sequence of synchronizer 112 outputs, and mixer output signal is carried out despreading, obtains the in-phase branch data.Quadrature branch despreading device 116 links to each other with frequency mixer 110 by holding wire 120, links to each other with synchronizer 112 by holding wire 122.Quadrature branch despreading device 116 utilizes the synchronous back PN sequence of synchronizer 112 outputs, and mixer output signal is carried out despreading, obtains the quadrature branch data.
With reference to Fig. 2, demonstrated space base band spread receiver fast synchronization device of the present invention, synchronizer 112 in the corresponding diagram 1.Holding wire 118 sends in-phase branch frequency converter output signal to in-phase branch analogue-to-digital converters 202, and analogue-to-digital converters 202 use 2 times of sample rates to spread-spectrum code chip speed that signal is sampled, and are converted to digital signal.This digital signal is divided into the two-way output as a result of leading sampled result of in-phase branch and late samples through behind the splitter 206.The leading sampled result of in-phase branch of splitter 206 output multiplies each other in multiplier 230 with the local PN sequence of PN sequencer 210 generations, and multiplied result is in squarer 232 square, and the multiplied result after square is deposited in accumulator 234 and added up.Multiplier 230, squarer 232 and accumulator 234 have been formed the leading correlator 212 of in-phase branch jointly.In-phase branch late samples result's processing procedure is similar, be that the in-phase branch late samples result of splitter 206 outputs and the local PN sequence of PN sequencer 210 generations multiply each other in multiplier 236, multiplied result is in squarer 238 square, and the multiplied result after square is deposited in accumulator 240 and added up.Multiplier 236, squarer 238 and accumulator 240 have been formed in-phase branch lag correlation device 214 jointly.
In the operation of quadrature branch, holding wire 120 sends quadrature branch frequency converter output signal to quadrature branch analogue-to-digital converters 204 and uses 2 times of sample rates to spread-spectrum code chip speed that signal is sampled, and is converted to digital signal.This digital signal is divided into the two-way output as a result of leading sampled result of quadrature branch and late samples through behind the splitter 208.The leading sampled result of quadrature branch of splitter 208 output multiplies each other in multiplier 242 with the local PN sequence of PN sequencer 210 generations, and multiplied result is in squarer 244 square, and the multiplied result after square is deposited in accumulator 246 and added up.Multiplier 242, squarer 244 and accumulator 246 have been formed the leading correlator 216 of quadrature branch jointly.Quadrature branch late samples result's processing procedure is similar, be that the quadrature branch late samples result of splitter 208 outputs and the local PN sequence of PN sequencer 210 generations multiply each other in multiplier 248, multiplied result is in squarer 250 square, and the multiplied result after square is deposited in accumulator 252 and added up.Multiplier 248, squarer 250 and accumulator 252 have been formed quadrature branch lag correlation device 218 jointly.
The leading correlator 216 output result additions in adder 220 of leading correlator 212 output results of in-phase branch and quadrature branch obtain leading correlated results.In-phase branch lag correlation 214 output results and the 218 output result additions in adder 222 of quadrature branch lag correlation device obtain the lag correlation result.Leading correlated results and lag correlation result subtract each other comparison in subtracter 224, subtract each other the input of result as sampling clock controller 226.Leading correlated results of sampling clock controller 226 bases and lag correlation is comparison value as a result, in-phase branch analogue-to- digital converters 202 and 204 sampling instants of quadrature branch analogue-to-digital converters are adjusted, finally reached sampled result and the PN sequencer is synchronous.The local PN sequence that PN sequencer 210 produces sends the despreading module to by holding wire 122, and receiving sequence is carried out despreading.
With reference to Fig. 3, demonstrated the relation that subtracter 224 correlated results comparison values and sampling clock controller 226 clocks are adjusted, wherein the sampling clock adjusted value is for just, and the expression sampling clock is adjusted in advance, and the sampling clock adjusted value is for negative, and the expression sampling clock postpones adjustment.When comparison value less than-1.3 * 10
7The time, sampling clock postpones 4T
c/ 16; When comparison value less than-9.3 * 10
6, more than or equal to-1.3 * 10
7The time, sampling clock postpones 3T
c/ 16; When comparison value less than in-5.6 * 10
6, more than or equal to-9.3 * 10
6, sampling clock postpones 2T
c/ 16; When comparison value less than-1.9 * 10
6, more than or equal to-5.6 * 10
6, sampling clock postpones T
c/ 16; When comparison value less than 1.9 * 10
6, more than or equal to-1.9 * 10
6, sampling clock is constant; When comparison value less than 5.6 * 10
6, more than or equal to 1.9 * 10
6, the leading T of sampling clock
c/ 16; When comparison value less than 9.3 * 10
6, more than or equal to 5.6 * 10
6, the leading 2T of sampling clock
c/ 16; When comparison value less than 1.3 * 10
7, more than or equal to 9.3 * 10
6, the leading 3T of sampling clock
c/ 16; When comparison value more than or equal to 1.3 * 10
7, the leading 4T of sampling clock
c/ 16.
Claims (5)
1, quick synchronous device for space based spread-spectrum communications is characterized in that comprising: two analogue-to-digital converters are used for in-phase branch and quadrature branch component are converted to digital signal; Two splitters are respectively applied for and isolate leading sample information and late samples information and isolate leading sample information and late samples information from in-phase branch analogue-to-digital converters output signal from quadrature branch analogue-to-digital converters output signal; A PN sequencer is used to produce local PN sequence; Two leading correlators, be respectively applied for and the leading sampled signal of in-phase branch of splitter output and the PN sequence that local PN sequencer produces carried out relevant, carry out relevant with the PN sequence of local PN sequencer generation with the leading sampled signal of quadrature branch to splitter output; Two lag correlation devices, be respectively applied for and the in-phase branch late samples signal of splitter output and the PN sequence that local PN sequencer produces carried out relevant, carry out relevant with the PN sequence of local PN sequencer generation with quadrature branch late samples signal to splitter output; A leading adder is used for all leading correlator output numerical value, comprises that the leading correlator output of in-phase branch and quadrature branch numerical value carries out addition; A hysteresis adder is used for all lag correlation device output numerical value, comprises that in-phase branch and quadrature branch lag correlation device output numerical value carries out addition; A subtracter is used for leading correlator output numerical value and lag correlation device output numerical value are compared, and calculates and sends sign indicating number sequence and local code sequence phase difference; A sampling clock controller is used for the phase difference according to the output of described subtracter, and the sampling clock in in-phase branch and the quadrature branch analogue-to-digital converters is controlled, and finally reaches sampled result and the PN sequencer is synchronous.
2, quick synchronous device for space based spread-spectrum communications according to claim 1 is characterized in that comprising: described analogue-to-digital converters use 2 times of sample rates to spread-spectrum code chip speed that signal is sampled, and are converted to digital signal.
3, quick synchronous device for space based spread-spectrum communications according to claim 1, it is characterized in that comprising: described leading correlator comprises multiplier, squarer and accumulator, the local PN sequence that the in-phase branch of splitter output or the leading sampled result of quadrature branch and PN sequencer produce multiplies each other in multiplier, multiplied result is in squarer square, and the multiplied result after square is deposited in accumulator and added up.
4, quick synchronous device for space based spread-spectrum communications according to claim 1, it is characterized in that comprising: described lag correlation device comprises multiplier, squarer and accumulator, the local PN sequence that the in-phase branch of splitter output or the late samples result of quadrature branch and PN sequencer produce multiplies each other in multiplier, multiplied result is in squarer square, and the multiplied result after square is deposited in accumulator and added up.
5, quick synchronous device for space based spread-spectrum communications according to claim 1, it is characterized in that comprising: the described sampling clock controller that sampling clock in two analogue-to-digital converters is controlled, high-frequency clock is carried out counting operation, after reaching the counting thresholding, the upset of control sampling clock, comparative result control clock count number of times according to described subtracter increases or reduces, and corresponding sampling clock overturns in advance or lags behind upset.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200810104679A CN100583666C (en) | 2008-04-22 | 2008-04-22 | Quick synchronous device for space based spread-spectrum communications |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200810104679A CN100583666C (en) | 2008-04-22 | 2008-04-22 | Quick synchronous device for space based spread-spectrum communications |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101286759A CN101286759A (en) | 2008-10-15 |
CN100583666C true CN100583666C (en) | 2010-01-20 |
Family
ID=40058755
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200810104679A Expired - Fee Related CN100583666C (en) | 2008-04-22 | 2008-04-22 | Quick synchronous device for space based spread-spectrum communications |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN100583666C (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101494506B (en) * | 2009-03-10 | 2012-05-23 | 北京科技大学 | Circuit for capturing running water structure underwater sound spread-spectrum communication bandpass signal |
CN102244527B (en) * | 2011-08-17 | 2014-12-17 | 航天恒星科技有限公司 | Accurate synchronizing method for wireless SPSP (spread spectrum) receiver |
CN110336582B (en) * | 2019-07-23 | 2021-01-22 | 中国电子科技集团公司第五十四研究所 | Despreading and demodulating algorithm for broadband signaling transmission system direct-spread OQPSK |
-
2008
- 2008-04-22 CN CN200810104679A patent/CN100583666C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101286759A (en) | 2008-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1075089B1 (en) | Correlation detector and communication apparatus | |
US6154487A (en) | Spread-spectrum signal receiving method and spread-spectrum signal receiving apparatus | |
JP3581448B2 (en) | Spread spectrum communication equipment | |
EP1404032B1 (en) | Direct sequence code division multiple access receiver and method of synchronisation therefor | |
JP3280141B2 (en) | Spread spectrum receiver | |
US20090232197A1 (en) | Pulse modulated wireless communication device | |
JP2001504311A (en) | Orthogonal code synchronization system and method for spread spectrum CDMA communication | |
JP2001016138A (en) | Cdma receiver | |
CN100583666C (en) | Quick synchronous device for space based spread-spectrum communications | |
US7336693B2 (en) | Communication system using ultra wideband signals | |
CN108494438A (en) | A kind of generation method, generating means and the sending device of hybrid spread spectrum signal | |
US6522684B2 (en) | Delay lock loop, receiver, and spectrum spreading communication system | |
US6810071B2 (en) | Code division multiple access (CDMA) code timing tracking apparatus | |
JP2003032225A (en) | Transmission equipment, reception equipment, transmitting method and receiving method | |
KR100627141B1 (en) | Apparatus and Method for Generating Dummy Pilot Signal in Hard Hand-over of Mobile Telecommunication | |
EP0698971A2 (en) | Synchronization for DSSS transmission system using jittered pilot code | |
US20030118085A1 (en) | Post-correlation interpolation for delay locked loops | |
RU2733261C1 (en) | Multichannel receiver with coherent frequency-code division of channels for reception of quadrature-modulated signals of higher structural security | |
JP2000091911A (en) | Delay phase locked loop circuit for spread spectrum communication device | |
RU2246181C2 (en) | Receiver for quadratic-modified signals with displacement for multichannel communications system with coded channel separation | |
JPH07297757A (en) | Spread spectrum receiver | |
KR100196427B1 (en) | Pn-code tracking method | |
JP4521600B2 (en) | Receiving device for receiving code-spread pulse signal and communication device using the same | |
RU2254679C1 (en) | Coherent receiver of modulated signals with a shift of multi-channel communication system (oqpsk) with code separation of channels | |
KR100199189B1 (en) | Digital receiving device of dss |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100120 Termination date: 20160422 |