CN100570589C

CN100570589C - HDD and SDRAM Data Transmission Control Unit and data transmission method

Info

Publication number: CN100570589C
Application number: CNB200610037514XA
Authority: CN
Inventors: 李永斌; 谢成兴
Original assignee: Actions Semiconductor Co Ltd
Current assignee: Actions Semiconductor Co Ltd
Priority date: 2006-09-01
Filing date: 2006-09-01
Publication date: 2009-12-16
Anticipated expiration: 2026-09-01
Also published as: CN101021824A

Abstract

The present invention relates to a kind of HDD and SDRAM Data Transmission Control Unit and data transmission method, described Data Transmission Control Unit comprises multiplexing chip pins controller, ATA controller, sdram controller and bridge controller, comprise data buffer and bridge controller state machine in the bridge controller, described HDD and SDRAM data transmission method are by the bridge controller state machine control chip pin multiplexing controller in the bridge controller, have realized that data are directly transmitted between HDD and the SDRAM.HDD involved in the present invention and SDRAM Data Transmission Control Unit and data transmission method have improved data transmission efficiency, reduced the external pin number of HDD and SDRAM Data Transmission Control Unit simultaneously, effectively dwindled area of chip, in addition, in the process of data transmission, substantially do not need the participation of software, saved software and hardware system resource.

Description

HDD and SDRAM Data Transmission Control Unit and data transmission method

Technical field

The present invention relates to field of data transmission, relate in particular to a kind of control HDD (HardDisk Driver, hard disk drive) with SDRAM (Synchronous DynamicRandom Access Memory, synchronous DRAM) between the Data Transmission Control Unit of data transmission and the data transmission method that adopts of this Data Transmission Control Unit.

Background technology

Along with the development of portable broadcast unit with popularize, little, the capacious player of volume becomes the main flow in market gradually, the vast capacity player of a lot of shapes such as hard disk formula MP3 and so on occurred.The data storage capacity of this type of player can reach gigabit, even more.Because data quantity stored is huge, often need carry out great amount of data transmission between HDD and SDRAM.The line construction of data transmission can be referring to shown in Fig. 1 between existing HDD and the SDRAM, wherein, HDD and SDRAM be the interface bus 12,13 by separately and the ATA (ATattachment in the Data Transmission Control Unit 1 respectively, optional equipment on the AT computing machine) controller 10 is connected with sdram controller 11, ATA controller 10 and sdram controller 11 are connected to SRAM (Static Random Access Memory, static RAM) 14 by data bus 100,110 respectively.

In the process of data transmission, earlier from a side (HDD or SDRAM) reading of data, write SRAM14, and then data are read out from SRAM write an other side (SDRAM or HDD).Like this, not only increased software cost, special SRAM14 need be set, and greatly reduced the speed of data transmission as buffering.In addition, from the design point of view of chip, Data Transmission Control Unit 1 need be provided with two groups of external terminals and be connected with SDRAM with HDD respectively and could satisfy the requirement of data transmission, has so also just increased chip area and packaging cost.

Summary of the invention

First goal of the invention of the present invention provides a kind of HDD and SDRAM Data Transmission Control Unit, it can realize that the data between HDD and the SDRAM directly transmit, not only improved the efficient of data transmission greatly, and, saved the cost of hardware and software development, reduced the chip exterior pin and dwindle chip area, saving system resource.

Second goal of the invention of the present invention provides a kind of HDD and SDRAM data transmission method, and it realizes that the data between HDD and the SDRAM directly transmit, and has not only improved the efficient of data transmission greatly, and, saved the cost of hardware and software development.

For realizing above-mentioned first goal of the invention, HDD provided by the invention and SDRAM Data Transmission Control Unit comprise: the multiplexing chip pins controller, and it connects above-mentioned HDD and SDRAM by interface bus; The ATA controller, it is connected with the multiplexing chip pins controller by the HDD interface bus; Sdram controller, it is connected with the multiplexing chip pins controller by the sdram interface bus;

Bridge controller, it comprises: data buffer, it is connected with sdram controller with the ATA controller respectively by data bus; The bridge controller state machine, it is connected with the ATA controller with control signal wire by status signal lines, also be connected with sdram controller with control signal wire, be connected with data buffer and the read-write of control data impact damper by read-write control line by status signal lines; Be used to judge whether HDD is ready for data transmission, if HDD is ready for data transmission, then control chip pin multiplexing controller points to the data source end, and is written to the data buffer from the data source reading of data; Further whether the judgment data impact damper is full, if less than, then continue to be written to the data buffer, if full from the data source reading of data, then control chip pin multiplexing controller points to data receiver, and the data in the data buffer are write data receiver, wherein, the data source end is HDD or SDRAM, and when the data source end is HDD, data receiver is SDRAM, and the data source end is when being SDRAM, and data receiver is HDD.

HDD provided by the present invention and SDRAM Data Transmission Control Unit are by the bridge controller state machine control chip pin multiplexing controller in the bridge controller, pin to HDD and SDRAM is realized multiplexing, reduced the external pin number of HDD and SDRAM Data Transmission Control Unit, effectively dwindled area of chip, simultaneously, in the process of data transmission, substantially do not need the participation of software, realized that the data between HDD and the SDRAM directly transmit, improved the efficient of data transmission, the system resource of saving.

For realizing above-mentioned second goal of the invention, HDD of the present invention and SDRAM data transmission method may further comprise the steps:

Step 1 judges whether HDD is ready for data transmission;

Step 2 if HDD is ready for data transmission, is then pointed to the data source end by bridge controller state machine control chip pin multiplexing controller;

Step 3 is written to the data buffer from the data source reading of data;

Step 4, whether the judgment data impact damper is full, if less than, continue execution in step three;

Step 5 if data are full in the data buffer, is then pointed to data receiver by bridge controller state machine control chip pin multiplexing controller.

HDD provided by the present invention and SDRAM data transmission method are by the bridge controller state machine control chip pin multiplexing controller in the bridge controller, pin to HDD and SDRAM is realized multiplexing, realized that the data between HDD and the SDRAM directly transmit, improve the efficient of data transmission, saved the cost of hardware and software development.

Detailed content will be done clearer introduction in specific embodiment.

Description of drawings

Fig. 1 is the line assumption diagram of data transmission between existing HDD and the SDRAM;

Fig. 2 is the structural drawing of HDD of the present invention and SDRAM Data Transmission Control Unit;

Fig. 3 is the structural drawing of bridge controller involved in the present invention;

Fig. 4 is with the process flow diagram of the data transmission among the HDD to SDRAM;

Fig. 5 is with the process flow diagram of the data transmission among the SDRAM to HDD.

Be described in further detail below in conjunction with embodiment and accompanying drawing thereof.

Embodiment

Referring to Fig. 2, HDD and SDRAM Data Transmission Control Unit 2 comprise multiplexing chip pins controller 21, ATA controller 22, sdram controller 23 and bridge controller 24.Wherein, multiplexing chip pins controller 21 is connected with SDRAM by the HDD of interface bus 25 with the outside.

Multiplexing chip pins controller 21 is connected with ATA controller 22 by HDD interface bus 210, and simultaneously, multiplexing chip pins controller 21 is connected with sdram controller 23 by sdram interface bus 211.ATA controller 22 is connected with bridge controller 24 by data bus 220, control signal wire 221, status signal lines 222 respectively, similarly, sdram controller 23 is connected with bridge controller 24 by data bus 230, control signal wire 231, status signal lines 232 respectively.

Above-mentioned HDD interface bus 210 and sdram interface bus 211 include data bus, address bus, control bus, are respectively applied for transmission of data signals, address signal and control signal, meet the relevant interface standard in the computer realm; Data bus 220,230 is used for transmission of data signals; Control signal wire 221,231 is according to direction of arrow transmission of control signals, and 222,232 of status signal lines are according to direction of arrow transmission state signal.

Referring to Fig. 3, Fig. 3 is the structural drawing of bridge controller 24.Bridge controller 24 comprises data buffer 241 and bridge controller state machine 242, and bridge controller state machine 242 is by the read-write of read-write control line 243 control data impact dampers 241.

Data buffer 241 is connected with sdram controller 23 with ATA controller 22 respectively by data bus 220,230; Bridge controller state machine 242 is connected with ATA controller 22 with control signal wire 221 by status signal lines 222, and simultaneously, bridge controller state machine 242 is connected with sdram controller 23 with control signal wire 231 by status signal lines 232.Bridge controller state machine 242 reads the status information of HDD automatically by corresponding status signal lines, and by the control signal corresponding line control information is sent to ATA controller 22 or sdram controller 23.

In conjunction with reference to Fig. 4, Fig. 5, Fig. 4, Fig. 5 have disclosed HDD of the present invention and SDRAM data transmission method jointly, wherein Fig. 4 is with the process flow diagram of the data transmission among the HDD to SDRAM, Fig. 5 is with the process flow diagram of the data transmission among the SDRAM to HDD, two data transmission procedures are basic identical, just the direction of data transmission and main body, the object of transmission change, below in conjunction with the architectural feature of HDD of the present invention and SDRAM Data Transmission Control Unit 2, describe HDD of the present invention and SDRAM data transmission method in detail.

Emphasis is referring to shown in Figure 4, when not having data transfer task, ATA controller 22 is in separately independently mode of operation with sdram controller 23, bridge controller 24 is in waiting status simultaneously, as needs with bridge controller 24 with the data transmission among the HDD during to SDRAM, send control signal by bridge controller state machine 242 by control signal wire 221 and give ATA controller 22, ATA controller 22 reads the HDD current state by multiplexing chip pins controller 21, execution in step 41 then, judge whether HDD is ready for data transmission, promptly, ATA controller 22 sends the status information in the status register (Fig. 4 does not show) of HDD to bridge controller state machine 242 by status signal lines 222, bridge controller state machine 242 judges according to the HDD status information that reads whether HDD is ready to data transmission, if it is unripe, then repeat this step, if the status information in the status register of HDD shows HDD and has been ready to data output, then execution in step 42 is pointed to HDD by bridge controller state machine 242 control chip pin multiplexing controllers 21, execution in step 421 then, write data buffer 241 from the HDD sense data.

Whether the data in step 43 in the judgment data impact damper 241 are full, if less than, then continue to write data; If data are full, then stop to wherein writing data, execution in step 431, send control signal by bridge controller state machine 242 by control signal wire 231, make multiplexing chip pins controller 21 point to SDRAM, execution in step 44 then, and the data in the data buffer 241 are written to SDRAM.After the execution of step 44, in step 45, judge whether the transmission of HDD finishes, if do not finish, then return once more execution in step 42, if the transmission of HDD finishes, then execution in step 46, and whether the judgment data transmission is all over, if data transmission is not all over, then return once more execution in step 41, if data transmission is all over, termination routine then.

Disclosed among Fig. 5 the process flow diagram of the data transmission among the SDRAM to HDD, its process is consistent with said process, is by bridge controller state machine 242 control chip pin multiplexing controllers 21 equally, realizes the direct transmission of data.Concrete steps among Fig. 5 repeat no more.In Fig. 4 and Fig. 5, can conclude and sum up HDD of the present invention and the SDRAM data transmission method comprises following key step:

Step 1 judges whether HDD is ready for data transmission;

Step 2 if HDD is ready for data transmission, is then pointed to data source end (HDD or SDRAM) by bridge controller state machine 242 control chip pin multiplexing controllers 21;

Step 3 is written to the data buffer 241 from the data source reading of data;

Step 4, whether judgment data impact damper 241 is full, if less than, continue execution in step three;

Step 5 if data are full in the data buffer, is then pointed to data receiver (SDRAM or HDD) by bridge controller state machine 242 control chip pin multiplexing controllers 21.

It is emphasized that, the data source end is relative with the data receiving terminal, as data when HDD transfers to SDRAM (shown in Fig. 4), SDD is the data source end, and SDRAM is a data receiver, otherwise, as data when SDRAM transfers to HDD (shown in Fig. 5), SDRAM is the data source end, and SDD is a data receiver.

Certainly, above-mentioned 5 steps only are to have finished data transmission once, HDD of the present invention and SDRAM data transmission method can also increase step 6 after step 5, judge whether the HDD transmission finishes, if do not finish, then return execution in step two, if the HDD data transmission finishes, then further whether the judgment data transmission is all over, if be not all over then return execution in step one, if data transmission is all over, termination routine then.

By foregoing description as can be known, HDD of the present invention and SDRAM Data Transmission Control Unit 2 and data transmission method thereof are by 24 bridge controller state machine 242 control chip pin multiplexing controllers 21 in the bridge controller, realized the direct transmission of data between HDD and the SDRAM, not only reduced the external pin number of HDD and SDRAM Data Transmission Control Unit 2, effectively dwindled area of chip, simultaneously, in the process of data transmission, substantially do not need the participation of software, realized that the data between HDD and the SDRAM directly transmit, improve data transmission efficiency greatly, saved system resource.

The foregoing description only is preferred embodiment of the present invention, and the present invention is not limited to above-mentioned embodiment with regard to its more wide form.In addition, just as above-mentioned embodiment and equivalent limit, many distortion can also be arranged and do not depart from the aim of total invention.

Claims

1, HDD and SDRAM Data Transmission Control Unit comprise: the ATA controller; Sdram controller; It is characterized in that,

The multiplexing chip pins controller, it connects above-mentioned HDD and SDRAM by interface bus, is connected with the ATA controller by the HDD interface bus, is connected with sdram controller by the sdram interface bus;

Bridge controller, this bridge controller comprises:

Data buffer, it is connected with sdram controller with the ATA controller respectively by data bus;

The bridge controller state machine, it is connected with the ATA controller with control signal wire by status signal lines, also be connected with sdram controller with control signal wire, be connected with data buffer and the read-write of control data impact damper by read-write control line by status signal lines; Be used to judge whether HDD is ready for data transmission, if HDD is ready for data transmission, then control chip pin multiplexing controller points to the data source end, and is written to the data buffer from the data source reading of data; Further whether the judgment data impact damper is full, if less than, then continue to be written to the data buffer, if full from the data source reading of data, then control chip pin multiplexing controller points to data receiver, and the data in the data buffer are write data receiver, wherein, the data source end is HDD or SDRAM, and when the data source end is HDD, data receiver is SDRAM, and the data source end is when being SDRAM, and data receiver is HDD.

2, HDD according to claim 1 and SDRAM Data Transmission Control Unit, it is characterized in that: described HDD interface bus and sdram interface bus, include data bus, address bus, control bus, be respectively applied for transmission of data signals, address signal and control signal.

3, the data transmission method of HDD according to claim 1 and SDRAM Data Transmission Control Unit, it may further comprise the steps:

Step 1 judges whether HDD is ready for data transmission;

Step 3 is written to the data buffer from the data source reading of data;

4, the data transmission method of HDD according to claim 3 and SDRAM Data Transmission Control Unit is characterized in that:

After execution in step five, judge whether the HDD transmission finishes, if do not finish, then return execution in step two, if the HDD data transmission finishes, then further whether the judgment data transmission is all over, if be not all over then return execution in step one, if data transmission is all over, termination routine then.