CN1005657B - Information processing apparatus - Google Patents

Information processing apparatus Download PDF

Info

Publication number
CN1005657B
CN1005657B CN87104991.0A CN87104991A CN1005657B CN 1005657 B CN1005657 B CN 1005657B CN 87104991 A CN87104991 A CN 87104991A CN 1005657 B CN1005657 B CN 1005657B
Authority
CN
China
Prior art keywords
register
workspace
mentioned
instruction
district
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CN87104991.0A
Other languages
Chinese (zh)
Other versions
CN1030986A (en
Inventor
渡边担
仓员桂一
柏木有吾
十山圭介
野尻徹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to CN87104991.0A priority Critical patent/CN1005657B/en
Publication of CN1030986A publication Critical patent/CN1030986A/en
Publication of CN1005657B publication Critical patent/CN1005657B/en
Expired legal-status Critical Current

Links

Images

Landscapes

  • Executing Machine-Instructions (AREA)

Abstract

In a computer system provided with a plurality of registers, and the access time of the registers is much shorter than that of a main memory, each instruction has a register indicating an address portion in which an assignment of a register address area having a register area is combined with an assignment of a register shift indicating a relative register address of the register area, so that even if the number of actual registers increases, the register saving and restoring required along with task switching and the like can be reduced, whereby the speed of program execution and processing can be increased. Also, in the same instruction. There is also an address portion for indicating the main memory.

Description

Signal conditioning package
The present invention relates to a kind of signal conditioning package, more particularly, relate to adopt a kind of method for organizing of register and signal conditioning package of access method of being used for, the access time that this method is specially adapted to register far is shorter than the situation of main memory access time.
Till now, for the computer system that comprises a large amount of registers, a kind of method to single register assignment had been discussed, for example see that D.A.Patterson and C.H.Sequin1982 September are at IEEE(pp8-21) on a kind of VLSI (very large scale integrated circuit) RISC computing machine (A VISI RISC of delivering, COMPUTER), this method normally realizes with the form of RISC I-microprocessor (below abbreviate RISC I as).
In RISC I, have 32 can by the instruction assignment logic register and 138 physical registers.By L 10, L 1... and L 31Expression is by the logic register of instruction assignment, R 0, R 1... and R 137The expression physical register.Register L 0, L 1... and L 9Always correspond respectively to register R at any time 0, R 1... R 9Register L 10, L 11L 31Just when initialization, correspond respectively to register R 116, R 117R 137But, after calling first subroutine, they just respectively with register R 100, R 101... R 121Correspondence, after calling the subroutine that only is lower than the first subroutine grade, they again respectively with register R 84, R 85... R 105Corresponding.According to this mode, the correspondence between the register is one group according to the nesting level of subroutine call with per 16 registers and moves down.When subroutine is returned, its corresponding situation be with per 16 registers be one group and on move.In the front and back of call subroutine, logic register L 26, L 27... L 31Refer to respectively corresponding to register L 10, L 11... L 15Physical register.
According to this mode, according to the nesting level of subroutine call utilizing the different register set of part, thereby wish to reduce register (preserve " and " recovery " operate.When the nesting level of subroutine call is a lot, and physical register will produce interruption when having run out.
In aforesaid prior art, there is following point: (a) have only when when subroutine is returned or be called, employed register area is just to move on the some or to move down, it does not have to consider therefore can not effectively utilize register by changing characteristics or the programming form that register position adapts to program fully.(b) when switching task, a large amount of physical registers need be preserved and recover, and the further raising of physical register quantity can not cause the raising of speed.(c) when physical register runs out, operations such as register storage are finished by an interrupt handling routine.Therefore, need long time during processing.
Wherein, (b) item is a very serious problem, and it makes the large scale integrated circuit high-density integration technology not to be fully utilized.
The objective of the invention is to improve the problems referred to above, and provide a kind of signal conditioning package, wherein, increase along with physical register quantity, when subroutine reference and task switching, the preservation of register and recovery operation can reduce greatly, thereby simplify its registers to a program, improve processing speed.
Realize the signal conditioning package of the present invention of this purpose, it is characterized in that, comprise such device, it is by utilizing same instruction address space zone and block of registers while assignment to main memory, assign representation by every employed register of instruction is the combination of the assignment of the assignment of a regional register and a register displacement, the former has the register address as the register area of a value, and the latter is illustrated in a relative register address in this register area.
Introduce ultimate principle of the present invention below.
On each time point that computer run is handled, situation about being used according to register by software is to the regional register value of putting.Generally speaking, although have only a regional register probably, a plurality of regional registers are set also are fine.The register field of every instruction partly is made of a regional register part and a register displacement, and the former indicates the regional register that will use, and the latter represents a relative register address in the appointed area.In some cases, regional register is realized by a special register, in other cases, it is realized by the register (being designated hereinafter simply as " particular register ") of its specific region in the block of registers scope, is made up of general-purpose register in this block of registers.Under the situation of using special register, provide the instruction of packing into the storage register value.On the contrary, under the situation of using particular register, omitted the assignment corresponding to the regional register of specific region, the address of employed regional register is only by register displacement assignment.
Device as the regional register value and the register displacement value of a synthetic assignment becomes register address uses the totalizer that two values are carried out the arithmetic addition in some cases, uses a high speed " OR " circuit in other cases.
Register constitutes with annular, for each register, all will determine it at preceding register and follow-up register, can handle the reach and the recovery of used register position equally like this.
In addition, the program disturb that produces for the arrangement of eliminating in each program owing to used register, be the configuration of using register effectively and simplifying register, be provided with the register workspace, each register workspace comprises the register of some, and any employed register workspace all can be determined by the value of inserting regional register.
In addition, register storage and rejuvenation during for shortening subroutine call and task switching, block of registers is divided into a plurality of registers district (register workspace), this district is further divided into an annular working district and a plurality of overall work district that comprises a plurality of workspaces again, this annular working district moves forward with ring form when calling with backspace subroutine and recovers position, a workspace, therefore and the overall work district can change their assignment along with task switching, and the workspace steering order and the workspace steering needle of the use that is used to control them are provided.
Furthermore, if an annular working district is made up of the individual workspace of 10 registers that comprises of m, and one group of overall work district is individual respectively by l by n 1, l 2... l nThe workspace that individual register is formed constitutes, and then register adds up to l 0* m+l 1+ l 2+ ... + l nIn this case, register l 0, l 1L nMaximum number can by the instruction register displacement part assignment.The form of one of nesting level that call with corresponding nested subroutine each workspace in the annular working district is distributed, and each overall work district distributes with the form of one of operation of the asynchronous execution of correspondence.Particularly, about the annular working district, when the nesting level of subroutine call increased one-level, as existing workspace, that workspace as existing workspace till at that time was changed to workspace formerly in the next locational workspace of annular location.When owing to returning from subroutine when reducing nesting level, annular location is recovered one, thereby formerly the workspace is changed to existing workspace, is changed to new workspace formerly in previous locational that workspace of annular location.The distribution in overall work district can change along with task switching, but when calling with backspace subroutine in same task, its distribution remains unchanged and its content can not automatically be saved and recover.One of overall work district is fixed for handling interrupt etc. by system task, thereby this overall work district is called as " system work area ".
The information of only using in a subroutine is placed into the annular working district, and exceeds the Global Information outside the subroutine call part and do not need to be saved when subroutine call and the temporary transient information recovered is put into the overall work district.When the information that is provided for low one-level subroutine remained in the register of existing workspace, invoked subroutine can be considered as it register of workspace formerly.When get back to from the subroutine of calling high one-level subroutine as functional value and when similarly information is deposited the register of workspace formerly, it can be regarded as the register of an existing workspace when returning.
The workspace steering needle comprises, the existing workspace pointer of the position, existing workspace that indication is being used, indicate the pointer of workspace formerly of position, workspace formerly for one, the overall work district pointer of an indication overall work zone position, in addition, also have the effective workspace pointer on an indication effective information item border and the workspace pointer of the annular workspace of an indication stored position.
As the workspace steering order, a control annular workspace reach and the reach annular working district instruction that recovers and recovery annular working district's instruction are arranged, and they are preserved it get up automatically before effective information disappears and before needs are quoted the information of storing are recovered automatically; Carry out pack into a workspace status command and a storage workspace status command that the overall work district distributes, be used to insert the control information of annular working district and be annular working district storage area assignment; An and piece transfer instruction concentrating transfer workspace content.
In order to carry out assignment to the register in the existing workspace register (its its content of maintenance in follow-up annular working district reach or recovery is constant), be provided with an indication vector, when correspondingly register is i, the i position of this vector is 1, otherwise this be 0 and this vector be placed in the specific memory of existing workspace.
As a kind of instruction figure, the register area of nearly all instruction all is allowed to distribute to the register in overall work district, makes also can produce the program of only using the overall work district.
And then, also be provided with a kind of overall work district pattern, in this pattern, the register in the register in annular working district and overall work district is handled on an equal basis, thereby can improve the quantity in overall work district, can carry out conversion by programmed control between the annular working district pattern in employing annular working district and the overall work pattern
For avoiding or the storage operation in annular working district when eliminating Task Switching, be provided with a plurality of annular working district, an annular working district and overall work are distinguished a task in a plurality of tasks of dispensing.Do not need annular working district or overall work district are carried out preservation and recover processing, just can exchange task with assigned work district.
If the position of register is represented as the register address of a binary number, the register quantity in each register district is represented as 2 power, and the value of a regional register is the integral multiple of 2 power, the position of the then actual register that uses, can determine to the value of a register displacement part according to the value and the tax of this regional register by an OR circuit, can improve processing speed like this.If register position is represented as binary number 0~2 P-1, then can calculate at an easy rate at register address is the register of the register front and back of i, and the mould of their register address is respectively (i-1,2) and (i+1,2).When an annular working district comprises 2 rIndividual register workspace, and each register workspace comprises 2 gDuring individual register, the value of workspace steering needle is changed to 2 gIntegral multiple, can calculate one at an easy rate with i * 2 gFor the workspace of start address formerly with the follow-up work district, the mould of their preceding register address is respectively ((i-1) * 2 g, 2 P+g) and ((i+1) * 2 g., 2 P+g).
Register number as if each the overall work district in one group of overall work district all is l 1, the workspace number in each annular working district all is m, and the register number that each workspace comprised in the annular working district all is l 0, then in program run, can select arbitrary overall work district or annular working district for use.
Owing to block of registers and register-stored mechanism are integrated on the same semi-conductor chip as arithmetic one logical block, therefore can reduce the message exchange frequency between semi-conductor chip and the outside greatly, thereby improve processing speed.
In signal conditioning package of the present invention, be provided with the value of a regional register as the stem of a program or subroutine in the instruction previous section of carrying out a use general-purpose register.If when employed register district changes according to handled information type,, can use different regional registers for the information of each type.When an instruction, its regional register part partly is d for the displacement of i register, arrives when the value of a regional register i is changed to Ai, is then become Ai+d by the address of the actual register that uses of instruction.If by an OR circuit value and synthetic register address of register displacement value according to a regional register, then program is drafted like this, register displacement value can be defined as a numerical value that is expressed as l ' position at most, wherein one of l ' expression is less than the long number in register displacement part position, and the value of regional register can be defined as one and is 0 numerical value at l ' below the position.Like this, the composite value in the OR circuit is just identical with additive value in the totalizer, thereby can not cause misoperation.
Moment of wanting of can in officely what is the need for is inserted the value of regional register, and the stem that needn't be only limited to subroutine is graded.Therefore, when program run, can change the assignment of employed register according to the user mode in register past and the state that requires in the future.
Figure * is the piece Pareto diagram according to first embodiment of signal conditioning package of the present invention;
Fig. 2 (a)-2(e) is the format chart that is used for according to the essential part of the instruction of signal conditioning package of the present invention;
Figure * is the Pareto diagram of essential part of the signal conditioning package of expression second embodiment of the invention;
Figure * is the Pareto diagram of the essential part of third embodiment of the invention;
Fig. 5 is the structural drawing of a block of registers in the presentation graphs 4;
Figure * is the register indicating section of an instruction in the fourth embodiment of the invention;
Fig. 7 is a kind of form of a workspace State Control instruction among Fig. 6;
Fig. 8 explains the preservation of register workspace among the present invention and the details of recovery;
Figure * is the Pareto diagram of the essential part of fifth embodiment of the invention;
Figure 10 is the situation of the instruction processing unit among Fig. 4 when being integrated on the semi-conductor chip.
Describe the present invention below in conjunction with accompanying drawing.
At first, describe an example of register workspace using method in the signal conditioning package of the present invention in detail, if l represents that m represents the number of annular workspace by the register number of the register displacement part assignment of an instruction that is used for signal conditioning package, n represents the number in overall work district.
When start-up routine, with a workspace status input instruction value of existing workspace pointer is changed to 0, the value of prerequisite activity district pointer is changed to l(m-1), the value of overall work district pointer is changed to the workspace address of distributing to this program, effectively the value of workspace pointer is changed to l(m-1), the value of workspace stack pointer is changed to the position as the workspace storage area in the program.
When call subroutine, the item of information that sends subroutine as independent variable to is placed in the register of existing workspace, preserves the particular register that the indication vector is placed into existing workspace, carries out the instruction sequence that is used for startup subroutine subsequently.To such an extent as to when the register of the too big existing workspace of the number of independent variable can not be arranged any more, then transmit and overflow part by memory.
In the subroutine of calling, at first carry out reach annular working district's instruction.In this instruction, before calling, just the value of existing workspace pointer is changed to the value of the new pointer of workspace formerly, and be changed to the value of new existing workspace pointer (if before calling by the direct follow-up work regional address that annular address is represented, the value i of existing workspace pointer is less than l(m-1), then the workspace address is i+1, if it equals l(m-1), then the workspace address is 0).In this case, the new pointer of workspace formerly deposits the content of a block of registers in by the indication of workspace stack pointer position.(and this block of registers is indicated by a preservation indication vector in the workspace of effective workspace pointer indication), and it also is advanced to the next workspace address of representing with annular address with the value of effective workspace pointer, and according to the value of the amount reach workspace stack pointer of institute's stored data.Unless the new pointer of workspace formerly will surpass effective workspace pointer, do not store otherwise do not carry out by the workspace of reach workspace instruction control.
When the item of information of utilization transmission is as independent variable in subroutine, will provide one about the instruction of memory content formerly by program.Insert information in the actual register of register displacement part i calling end, the content of the register formerly of the end register displacement part i that can be considered to be called.Insert the information in overall work district and can use calling end with the end that is called is same.
When subroutine is returned, if necessary, give back the information (as functional value) of calling end and at first be placed into register formerly.Then, carry out one and recover the instruction of annular working district.The function of this instruction is before returning, the value of workspace pointer formerly is changed to the value of a new existing workspace pointer, and the annular address of inciting somebody to action formerly is changed to the value of the new pointer of workspace formerly (if the address i of the new pointer of workspace formerly is greater than 0, then be i-1, if equal 0, then be l(m-1)).In this case, when the value of new existing workspace pointer and the effective value of workspace pointer become when equating, the workspace regional content of storage by the new pointer indication of workspace formerly is transferred, thereby recovery raw content, and the value of the new pointer of workspace formerly is changed to the value of new effective workspace pointer, and the workspace stack pointer recovers according to the amount that shifts.Preserve register to its transfer content of indication vector indication for one, this vector is comprised among the stem of the data of workspace storage zone-transfer.
When taking place, utilize the stack pointer of a system work area to push in the stack in the instruction address of carrying out this moment as abnormal conditions (as interrupting), then, performed transition of operation is to the exception processing unit corresponding to this situation type.In exception processing unit, the value of the existing workspace pointer when taking place according to storage workspace status command storage abnormal conditions, formerly the value of the value of workspace pointer and workspace stack pointer is instructed according to the input service zone state, and the value that exception processing unit is used is inserted each pointer.
When with the software of operating system or and when similarly software carries out task switching, preserve the value of the existing workspace pointer that is used for current task according to saving workspace status command, the formerly value of the value of workspace pointer, overall work district pointer, the effectively value of workspace pointer and the value of workspace stack pointer, then, according to the workspace status command of packing into, insert the value of each pointer that is used for next task.At that time, if an annular working district by another task sharing, then also preserves and recovers the content in annular working district according to the piece transfer instruction.
Utilize this mode, when subroutine reference, will seldom produce register holds and recovery operation, thereby can improve operating speed.
Can also only use the overall work district, and not use the annular working district to move a program.Therefore, when such program during, do not need to carry out the preservation in annular working district and recover to handle as task run.If a such task has own independent overall work district, and does not need and another task competition, then it does not just need the preservation of register fully and recovers to handle.Constitute by this way as if an Interrupt Process unit or similar units, then its processing speed can improve.By utilizing overall work district pattern, can finish a large amount of this tasks, wherein, the annular working district can handle on an equal basis by the overall work district.
Both made under the situation of using the annular working district, in only using an interlude of small number of registers, always do not need the reach annular working district instruction of subroutine stem and be positioned at the recovery annular working district instruction of its afterbody, they can be omitted, to realize the high speed subroutine reference.As for a task of distributing with this form, it neither shares the overall work district with another task, also not shared with it annular working district had then both made when task is exchanged, and the content in overall work district and annular working district is all got up without any the storage that changes.Therefore, when restarting task, can restart to handle from breakpoint at once.
Fig. 1 is the Pareto diagram of essential part of the signal conditioning package of expression first embodiment of the invention.
Signal conditioning package among first embodiment is made of instruction processing unit 1 and main memory 2 basically.Instruction processing unit 1 comprises: by a plurality of operation note R 0, R 1, R 2R NThe block of registers of forming 3, arithmetic-logical block 4, register access mechanism 5, main memory access mechanism 6 and command decoder 10.The core address space of main memory 2 limits different address spaces respectively with the register address space of block of registers 3.In the present embodiment, register address is represented as L position bigit 0,1,2 ... 2 -1 and keep N=2 -1.In register access mechanism 5, there is a regional register to select circuit 20, register area pointer 22, the OR circuit 30 and the register that are used for synthetic register address are selected circuit 31.In main memory access mechanism 6, branch register 41 and core address register 42 are arranged.
Command decoder 10 or from the instruction column that the user directly provides extraction instruction, as the instruction sequence that is used to carry out information processing, perhaps extraction instruction from the instruction sequence that language processor produces, also can be from the predetermined sequence the main memory 2 extraction instruction, and according to the effect of each component part in the instruction, command decoder is handled every instruction.Typical instruction comprises the operational code part 11 of indicating action type, register indicating section 12 and main memory indication part 15.The register indication comprises further that partly regional register part 13 and length are the register displacement part 14 of L position.If i represents the value of the regional register part 13 of certain specific instruction, then be worth i and be admitted in the regional register selection circuit 20 of register access mechanism 5, be arranged in the register Ri(21 of block of registers 3) just selected as regional register.If bi represents the content in the Ri register 21, will be worth bi and send into register area indicator 22.Represent with l if the position of register displacement part 14 is long, then the content of low 1 part 24 in the L bit register address and register displacement partly 14 content input OR circuit 30 carry out the logical OR computing, and the logic that will obtain thus and send into register selection circuit 31.In addition, the height of register address (L-1) position is according to the value setting of high (L-1) position 23 in the regional register pointer 22.
When the value of regional register 21 represent with bi and certain low 1 be 0 binary number when being provided with in advance, then according to above-mentioned by the arithmetic sum bi+d between the value d of the synthetic register address value of equaling bi of OR circuit 30 and register displacement part 14.Low l position in regional register 21 contents need not always to be set to 0, article one, in the instruction, make 1 ' expression be equal to or less than partly 14 the long L in position of register displacement, the content of certain regional register is that zero number is provided with according to its low l ' position, and the address of regional register is used in regional register part 13; If the value of register displacement part is limited in the number by l ' bit representation, and is then similar with it, by the synthetic register number of OR circuit 30 with identical by the represented value of the arithmetic sum between regional register value and the register displacement value partly.Being used to limit 1 ' value of inserting register displacement part 14 can be selected by software.Therefore, value 1 ' can be different and different according to each used regional register.Further, even for a regional register, it can become according to the time of using.
Now, when according to the method described above, instruct the value bi of selected regional register and the value d of register displacement part to synthesize memory bi+d according to certain, and when it was sent into register and select circuit 31, the register (Rbi+d) 32 of register address bi+d correspondence was selected as the used register of instruction.If the content representation operational order of instruction operation code part 11, and operand is the content of selected register, then the content among the register Rbi+d is sent into ALU unit 4, and computing is carried out from here on.In other words, if the content representation operating result register of operation part 11 is registers of choosing, then among the operating result load register Rbi+d of ALU4 output.If the content of operation part 11 is loads, then among the content load register Rbi+d by the main memory address of main memory indicating section 15 appointments, if the storage instruction, then the content among the register Rbi+d deposits the corresponding unit by the main memory address of main memory storage indicating section 15 appointments in.The branch register 41 that is arranged in main memory access mechanism 6 is the registers that are used for temporarily depositing information, these information are transmitted between main memory 2 and instruction processors 1, and main memory address register 42 is used for the address of the selected at that time main memory 2 of temporary transient storage.
In the present embodiment, with regard to the instruction that the content of its regional register part 13 is zero, the content d of register displacement part 14 is sent into register without distortion and is selected in the circuit 31, and the address is that the register of d is selected as the used register of this instruction.That is, zero-based this register area of register address is changed to a particular register zone of regional register.Therefore, be zero instruction by using its regional register part 13, can be provided with or relate to the value of regional register.
Fig. 2 (a)-2(e) is the order format figure that is used for signal conditioning package of the present invention.This figure provides different order format, and it relates to main memory address mark, register address and the operation code of every instruction in the signal conditioning package.As the ingredient of instruction, except the various piece shown in the figure, represent the part of additional information in addition, represent part of used constant or the like.
Fig. 2 (a) illustrates a kind of order format, and it comprises operation part 101, register indicating section 102 and main memory indicating section 103.In register indicating section 102, inclusion region register section 105 and register displacement part 106, and select used register in the mode identical with Fig. 1.Equally, in main memory indicator part 103, be useful on the register indicating section 104 of indication base register, main memory displaced portion 109 is used to indicate the relative address with respect to the value of base register.In this instruction, the register address of used register just in the manner described above, obtain according to register indicating section 107 and register displacement part 108, and, B+D is set to instruct the address of used main memory, B+D are by obtaining after the value D addition with the content B of the register Rb of above-mentioned register address correspondence and main memory displaced portion 109.
Fig. 2 (b) illustrates a kind of instruction, and the main memory indicating section 112 of this instruction comprises: represent the register indicating section of base register, be used to indicate the register indicating section 114 and the main memory displaced portion 121 of modifier register.In this instruction, be according to above-mentioned form, obtain as the register Rb of base register according to the regional register part 117 and the register displacement part 118 of a side, and the register Rx that is used as modifier register is according to above-mentioned form, obtain according to the regional register part 119 of opposite side and register displacement part 120, address as the main memory 2 that uses in the instruction, three partial contents are: the content of base register Rb, the value of the content of modifier register Rx and main memory displaced portion 12.
Fig. 2 (c) illustrates the order format figure that uses two registers.In this instruction, with above-mentioned form and the address determined according to the register displacement part 125 of a regional register part 124 and a register indicating section 122, it is address as first register, and according to the register displacement part of regional register part 126 and another register indicating section 123, and with the definite register address of above-mentioned form, as the address of second register, and carry out to handle with first and second registers.
Fig. 2 (d) shows another instruction, and according to this instruction, if use the special register zone as regional register, then the value of reserved area register is stored in the main memory.This instruction comprises special register part 130 and the main memory indicating section 131 that is used to indicate the reserved area register address.
Fig. 2 (e) show use a reserved area register and a general-purpose register instruction.In instruction, comprise reserved area register section 133 and general storage part 134, by use regional register part 135 and register displacement part 136, and by the aforementioned manner mask register.
Fig. 3 is the Pareto diagram of signal conditioning package element, is used to illustrate second embodiment of the present invention.In this embodiment, regional register piece 207 is one group of reserved area register, in instruction processing unit 201, and it and general-purpose register piece 203 spaced apart.General-purpose register piece 203 is by general-purpose register R 0, R 1R NForm, and the regional register piece is by regional register Q 0, Q 1... Q KConstitute.When the content i of the regional register part 213 that comprises in the register indicating section 212 of an instruction is admitted to regional register in the register access mechanism 205 when selecting circuit 220, the content bi of the regional register in the regional register piece 207 (Qi) 221 is placed in the regional register pointer 222.The content d of register displacement part 214 is by 230 additions of register address computing circuit in the content bi and instruction of regional register Qi, and itself and bi+d are admitted to register and select circuit 231.As a result, it is selected as the used register of this instruction to be arranged in the register (Rbi+d) 232 of general-purpose register piece 203.Identical such as other parts such as ALU204, main memory access mechanisms 206 with first embodiment described in Fig. 1.
Fig. 4 is the structural drawing of the signal conditioning package element of third embodiment of the invention.In this embodiment, the major part of signal conditioning package is instruction processor 301 and main memory 302.The instruction processing unit 301 here comprises: operation note piece 303, ALU306, regional register piece 310, register access mechanism 320, main memory access mechanism 330, command decoder 340, operation note block pointer 323(BMR) and workspace stack pointer 324(Bsup).Wherein, operation note piece 303 comprises an annular working district 304 and an overall work district collection 305.The regional register piece comprises four regional registers, is respectively: workspace pointer 311(PBNR formerly), existing workspace pointer 312(CBNR), effective workspace pointer 313(VBNR) and overall work district pointer 314(GBNR).For the function of the content that realizes preserving annular working district 304, arranged workspace stack pointer 324(Bsup) and be arranged in the workspace storehouse 325 of main memory 302.Further, be provided with the workspace mode register 323(BMR of indication " workspace purposes pattern ").The target that dotted line demonstration ground declare area register among Fig. 4 and workspace stack pointer point to.
Fig. 5 (a) and 5(b) be used for the arrangement in the register district of key diagram 4.Shown in Fig. 5 (a), annular working district 304 is by m workspace RB 0, RB 1... RBm 1Constitute, each workspace is by l register, that is: R 0, R 1, R 2... Re 1Constitute.Here, the RBx of several 351 indications has pointed out that the workspace 352 of arbitrary needs points out the block of registers in the workspace.
Shown in Fig. 5 (b), overall work district collection 305 is by n overall work district GB 0, GB 1, GB 1... GBn 1Constitute, each workspace is by k register R 0', R 1', R 2' ... R ' k -1Constitute.Wherein, the workspace GBy of 353 indications represents the workspace of arbitrary needs, and several 354 expressions are arranged in the block of registers in overall work district.
As this signal conditioning package of the 3rd embodiment, the workspace quantity n in the workspace quantity m in its annular working district 304 and the overall work district collection 305 can change at the information processing run duration.That is: be useful on the workspace quantity m that changes annular working district 304 and change the instruction of the workspace quantity n of overall work district collection, for example: m can be changed into 0,4,8, and n can be changed into 2,4,8 and 16.The workspace number in annular working district 304 is called " annular working district pattern " greater than 1 situation, and the workspace quantity in annular working district 304 equals zero and only can use the situation of overall work district collection to be called " overall work district pattern ".When relating to the workspace quantity of the workspace quantity in annular working district 304 and overall work district collection 305, the state of signal conditioning package is given by workspace mode register 323.The back will be described, and have a class that the instruction of control register can be set, and use these instructions can change workspace mode, and like this, workspace mode register 323 changes, thus the moment that the indication workspace mode changes.
In the description of back,, explain the operation of overall work district pattern then with at first explaining the operation of annular working district pattern.
Fig. 6 is the block diagram of register section of the instruction of four embodiment of the invention.Many instructions of this signal conditioning package are except having operation part 416 as shown in Figure 6, also has register indicating section 417, this register indicating section 417 comprises: regional register part 418 and register displacement part 419, regional register partly is used to indicate any overall work district of containing the used register of instruction, existing workspace or workspace formerly, displaced portion 419 indications are arranged in the relative address of workspace.In register displacement part 419, its numerical value can be 0 to (l-1).In some instruction, used register is fixed in overall work district, existing workspace and formerly one of in the workspace.In this case, regional register part 418 can save from the indicating section of instruction usually.
Consider such a case, the content of register displacement part 419 is the round values i from 0~(l-1) in promptly instructing, if regional register part 418 indication overall work districts then are used by the register i in the workspace of overall work district pointer (Fig. 4) indication; If the existing workspace of regional register part 418 indication is then selected by the register i in the indicated workspace of actual register pointer 312; If it is regional register part 418 is indicated workspace formerly, then selected by the register i in the workspace of workspace pointer 311 indications formerly.
In annular working district pattern, if the quantity of register is greater than 1 in the annular working district, then the value of workspace steering needle (as existing workspace pointer) must initialization.For this reason, need to use workspace state load BSL or control register load MTCR.
Fig. 7 provides a kind of format chart of State Control instruction in workspace among Fig. 6.As shown in Figure 7, workspace state load 421 has an operand indicating section 422.When using it, five fields are provided in memory, they are respectively: 423,424,425,426 and 427.The work area code of sending in the overall work district pointer 314 is existed in the field 423 in advance, the work area code of workspace pointer 311 exists in the field 424 with sending into formerly, the work area code of sending into existing workspace pointer 312 is arranged in field 425, send into effective workspace pointer 313 in be received within the field 426, the positional value of sending into workspace stack pointer 324 is arranged in field 427.Put by 422 indications of operand indicating section the first place of field sequence.When under this state, during execution work zone state load, then according to above-mentioned corresponding relation, the value of field 422 to 427 is used as the value of workspace control register.When execution work zone state storage instruction, five pointers are stored in the core position of being indicated by instruction operands indicating section 422, and its form is shown in numerical value among Fig. 7 423,424,425,426 and 477.
Fig. 8 is the further explanatory drawings of saving/restoring operation in register workspace among the present invention.
As the instruction relevant with subroutine call, except call instruction and link order, instruction of the annular working that moves forward in addition district and the district's instruction of recovery annular working.When subroutine is called, the information of being transmitted as variable is placed in the register of existing workspace, afterwards, be called the 0th register 440 that this information of preserving indication vector (as Fig. 8 numeral 429 indications) places existing workspace 439, promptly by the indicated workspace of existing workspace pointer 312.Preserving indication vector 429 is the information with l bit length, and wherein l represents the quantity of each contained register in workspace.If i represents round values 0-(l-1), keep the content of i register Ri of 443 indications in the existing workspace 439 if desired, the value of then preserving the i position bi of 433 indications in the indication vector 429 is assumed to be " 1 "; Equally, if its content need not keep, suppose that then bi is zero.The 0th b of several 430 indications
Figure 87104991_IMG2
Always remain " 1 ".As the 0th the register R that sets up existing workspace 0(440) preservation in indication vector and when carrying out call instruction, the next address of this instruction is admitted to the stack that is used for subroutine reference, and begin to carry out the instruction sequence of the subroutine of appointment.
At the section start of subroutine instruction sequence, at first carry out the district's instruction of reach annular working.When carrying out the instruction of reach annular working district, existing workspace pointer 312(CBNR shown in Figure 4) and formerly value reach workspace pointer 311(PBNR), and effective workspace pointer 313(VBNR if necessary) and workspace stack pointer 324(Bsup) value also change.Below, with quotation mark CBNR 1, CNB 1, VBNR 1, Bsup 1With symbol CBNR 2, PBNR 2, VBNR 2And Bsup 2The function of reach annular working district instruction is described, first class symbol is represented to move forward before the instruction of annular working district carries out, four pointers value separately, and after second class symbol represents that the reach instruction is carried out, four pointers value separately.In carrying out reach annular working district instruction process, at first, presentation directives is carried out the value CBNR of preceding existing workspace 1Insert expression carry out with bar instruction after the value PBNR of workspace pointer formerly 2In, the value value of being updated to m(CBNR of existing then workspace pointer 1+ 1, m).Here, (m represents the quantity of register in the workspace to mould for a, b) the expression remainder of integer b except that gained behind the integer a.Like this, if keep CBNR 1=VBNR 1If the existing workspace pointer value before promptly upgrading equates with effective workspace, renewal back pointer value, then by the value CMNR that upgrades existing workspace, back pointer 2Between the register in the indicated workspace, postponed selectively to be kept at by workspace pointer Bsup by the content that is contained in the indicated workspace the indicated register of preservation indication vector in the 0th register 1In the indicated position.
Below, will further describe this workspace storage configuration with reference to figure 8.After the renewal, by existing workspace pointer CBNR 2L register arranged in the indicated workspace 439; The 0th register R 0Be 440, the 1 register R 1Be 441, the 2 register R 3Be 442 ..., (l-1) individual register Re 1Be 444.In preserving indication vector 429, the l position is arranged also; The 0th b 0Be 430, the 1 b 1Be 431, the 2 b 2Be 432 ... (l-1) position b L-1Be 434.If keep the content of i register 443(0≤i≤l-1), then will be in advance with preserving the i position bi433 amount " 1 " of indication vector, if this content need not keep, then bi position reset.This preserves the 0th the register R that indication vector 429 is stored in workspace 439 0In 440.If the existing workspace pointer value CBNR before upgrading 1(the value PBNR of workspace pointer formerly after promptly upgrading 2) effective workspace pointer value VBNR before equaling to upgrade 1, the preservation indication vector 429 after then will upgrading is from b L-1Position 434 is to b 0The direction sequential scanning of position 430, this vector 429 is stored in by existing workspace pointer value CBNR 2The 0th register R of indicated new existing workspace 439 0In 440.If the bi position be " 1 " (0≤i≤l-1), the value of workspace stack pointer (Bsup) 324 register that moves forward then, and the content of register Ri is stored in the indicated position of new value by the workspace stack pointer in the workspace storehouse 325.If the bi position is " 0 ", then workspace stack pointer 324 does not move forward, and does not also carry out the storage of register Ri.When preservation indication vector 429 is scanned and changes i is l-1, l-2 ... 2,1, and 0, and when having repeated needed register holds operation, the value of workspace stack pointer 324 is the value Bsup that upgraded by the district's instruction of reach annular working 2Because preserve the 0th b of indication vector 0Always be changed to " 1 ", so the register R of the workspace of after renewal, preserving 0Value be stored in by in the indicated position of workspace stack pointer i.e. the top of workspace stack 325.
When this workspace storage EO, according to the VBNR before upgrading 1Value, the effectively new value VBNR of workspace pointer 313 2Be changed to VBNR 2=mod(CBNR 1+ 1, m).
Unless the pointer value PBNR of workspace formerly after upgrading 2Effective workspace pointer value VBNR before equaling to upgrade 1Otherwise do not carry out the storage operation of above-mentioned workspace, and the value of workspace stack pointer 324 and effective workspace pointer 313 does not change all.
From being the function of reach annular working district's instruction.
When subroutine is returned, as required, place the register of existing workspace with waiting to send back to the function value that calls end, carry out then and recover the instruction of annular working district, then carry out link order.When carry out recovering the instruction of annular working district, recover existing workspace pointer CBNR312 and the value of workspace pointer PBNR311 formerly, and change the value of effective workspace pointer VBNR313 and workspace pointer Bsup324 as required.Below, use symbol CBNR 3, PBNR 3, VBNR 3And Bsup 3With symbol CBNR 4, PBWP 4, VBNR 4And Bsup 4The function of recovering the instruction of annular working district is described, last class symbol represents to carry out the value of four pointers before this instruction, and afterwards a class symbol represents to carry out the value of four pointers after this instruction.
In carrying out the process of recovering the instruction of annular working district, at first, with the value BPNR of the pointer of workspace formerly 311 before upgrading 3Be changed to the new value CBNR of existing workspace pointer 312 4, and upgrade the value of workspace pointer formerly, with opening relationships: PBNR 4=mod(PBNR 3L, m).If the value CBNR of the existing workspace pointer after upgrading 4With the value VBNR that upgrades preceding effective workspace pointer 313 3Identical, the pointer value BBNR of workspace formerly after then upgrading 3The content of indicated workspace is resumed selectively according to the indicated information of workspace stack pointer in the workspace storehouse 325.
This workspace is recovered structure and will be described with reference to figure 8.At first, value Bsup by the workspace stack pointer 324 before upgrading 3Receive into value PBNR in the top of indicated workspace storehouse 325 by the pointer of workspace formerly 311 before upgrading 4The 0th register R in the indicated workspace 0In, the value of workspace pointer 324 is recovered with the amount of a register then.In the top of workspace storehouse 325, preserve the indication vector and when subroutine call, be placed into.Therefore, along with aforesaid operations, preserve indication vector 429 and enter register R 3(440) in.Subsequently, will preserve the content edge of indication vector from b 1Position 431 is to b L-1The direction of position 434 scans successively.If (1≤i≤l-1) 433 is " 1 " to the value of bi position, the data that then are arranged in the indicated position of the new value of workspace storehouse 325 workspace stack pointers 324 are transferred into register Ri(443), and with the resume work value of district's stack pointer 324 of the amount of a register.If the value of bi position is " 0 ", then do not carry out to register Ri(443) transfer operation, and do not resume work yet the district stack pointer 324.When i from 1,2,3, when (l-1) changes, promptly serve as reasons by the value that repeats the inferior resulting workspace of aforesaid operations (l-1) stack pointer 324 and to recover Bsup before the instruction of annular working district is upgraded 4Value.Afterwards, effectively the value of workspace pointer 313 is recovered a unit.That is: VBNR 4=mod(VBNR 3-1, m).This value is identical with the value of the pointer of workspace formerly after the renewal.
Unless the existing workspace pointer value CBNR after upgrading 4With effective workspace pointer value VBNR before the renewal 3Identical, otherwise do not carry out the recovery operation of above-mentioned workspace, and the value of the value of workspace stack pointer 324 and effective workspace pointer 313 does not change yet.
It is top that what introduce is the function of recovering the instruction of annular working district.
When carrying out link order, the return address extrudes from the subroutine reference stack, and indicated position begins execution command from the return address then.
When switching task, need to preserve and recover the content in annular working district usually.For this reason, provide that storage instruction of work block and workspace are packaged to be gone into to instruct, instructed as block transfer.
When execution work block storage instruction, by preserving the identical processing of operation with the workspace of reach annular working district's instruction,, all be stored in the storehouse of workspace to content from the next workspace of the indicated workspace of effective workspace pointer VBNR by these workspaces the indicated workspace of existing workspace pointer CBNR.Details are as follows in operating process.
When execution work block storage instruction, whether the value VBNR that at first verifies effective workspace pointer 313 equals the value CBNR of existing workspace pointer 312.If they do not wait, then by the content of the next workspace of the indicated workspace of value VBNR (promptly by mod(VBNR+1, m) indicated workspace) be stored in the storehouse of workspace, it is identical that operating process is preserved in the workspace when its operating process is instructed with description reach annular working district.Like this, the value Bsup of workspace stack pointer 324 reach, and effectively the value Bsup of workspace pointer 313 moves forward to next workspace.For the new value of VBNR, to verify also whether it identical with the value CBNR of existing workspace pointer.If equate, then repeat above-mentioned workspace and preserve operation.When the value of existing workspace pointer when effectively the value of workspace pointer equates, or just identical with regard to them during beginning, then not execution work district preserves operation and just finishes the storage of execution work block and instruct.
The packaged function of going into to instruct in workspace is: the workspace formerly of storage and the content of existing workspace are taken out from workspace separately during execution work block storage instruction.When carrying out this instruction, effectively the workspace pointer has identical value with existing workspace pointer.In execution work block load process, performed workspace recovery operation is the same with the operation that instruction is recovered in the workspace of description, its function is the content of at first recovering by the indicated workspace of existing workspace pointer 312, then recovers the content by the indicated workspace of workspace pointer formerly 311.As a result, effectively the value of workspace pointer is identical with the value of workspace pointer formerly.
As the instruction that changes the workspace state, control register load MTCR and control register storage command M FCR is arranged, they can change the control information of annular workspace of indication or overall work zone state, and also can be used.By these two fingers, can be provided with separately or visit separately existing workspace pointer 312, formerly workspace pointer 311, effectively workspace pointer 313, overall work district pointer 314, workspace stack pointer 324 and workspace mode register 323(be with reference to figure 4) separately value.When the content of workspace mode register 323 changed, the quantity of register quantity in the annular working district and overall work district centralized register also can change.When the workspace number in the annular working district is set to 0, then determined overall work district pattern, like this, all workspaces is workspace use as a whole all.That is, when overall work district pattern, the workspace of using as the annular working district in another kind of pattern is workspace use as a whole also.When executing instruction under overall work district pattern, address pattern part wherein can not be indicated formerly workspace or existing workspace.In addition, under overall work district pattern, can not use the district's instruction of reach annular working and recover the instruction of annular working district.
Fig. 9 is the Pareto diagram of the element of the 4th embodiment of descriptive information treating apparatus.In this embodiment, the block of registers 503 in the instruction processing unit 501 is by n overall work district GB 0(510), GB 1(511) ..., GB(513) and n annular working district R 0(520), R 1(521) ..., R N-1(523) constitute.Each overall work district (GB 0, GB 1... GB N-1) constitute by the individual register of the K ' shown in Fig. 5 (b).Shown in Fig. 5 (a), each annular working district (R ether, R 1..., R N-1) constitute by m workspace, and each workspace comprises l register.
In the embodiment of Fig. 9, an overall work district and an annular working are distinguished one of program of dispensing asynchronous operation.In this manner, the expense that is used for the preservation and the recovery of block of registers in the time of can eliminating task switching.
Example shown in Figure 10 is that instruction processing unit is made on a semi-conductor chip at the embodiment of Fig. 4.This example realizes with such form, wherein, and single semiconductor chip bag bag: arithmetic register piece 610, register access mechanism 620, ALU630, main memory access mechanism 640, command decoder 650 and control circuit.
According to this mode of present embodiment, can be determined by the figure place of regional register by the register number of assignment, and greater than the figure place of order register indicating section.Therefore, both made when the register indicating section of every instruction more in short-term, also can use a large amount of registers.Like this, by using this fact of register in enormous quantities, block of registers is used as one or more stacks.Therefore, both made under the situation that contains a high capacity block of registers, and need not to preserve and recover register, or by only preserving and recovering the small number of regions register, just can call or task switching by execution subroutine, and a large amount of use high-speed registers that can not have an expense are to realize high speed processing.Especially, use the 3rd embodiment, under annular working district pattern, except when existing workspace pointer forward surpasses the instruction of effective workspace, and return to when exceeding effective workspace pointer when workspace pointer formerly, with regard to need not to follow subroutine call and returning and preserve and recover register, therefore, can improve the speed of subroutine reference.In addition, when considering only to use the program of small number of registers, different overall work can be distinguished each program of dispensing asynchronous operation, and can design the program that the overall work district that is distributed by given way is only arranged.Therefore, in this case, register displacement in the time of can avoiding the program conversion, and the speed of program conversion (as task switching) also can improve, when subroutine reference, be counted as up to the execution work district under the situation of next workspace formerly, variable and functional value can needn't duplicate by register transfer, therefore improve the speed of subroutine reference.Both made the annular working district and need to preserve and situation about recovering under, preserve indicator register and be kept in each workspace in annular working district, thus, wait to preserve and register to be recovered is restricted to one that needs really.Therefore, improved processing speed.
The difficulty of prior art is: when physical register quantity increased, the required register holds and the expense of recovery also increased thereupon in subroutine reference task switching operation.On the contrary, according to present embodiment, the increase of register quantity has reduced the number of times of preserving and recovering, and therefore, has reduced expense.In addition, use overall work district pattern, this treating apparatus can move not having under the condition of preserving and not having recovery, and make to provide exchanging with at a high speed of task increment.
In the 4th embodiment, when some annular working district is provided, even under the situation of using the annular working district,, can not have the preservation and the recovery operation of register, thereby realized high speed task switching operation along with the exchange of task.
As mentioned above, according to the present invention, every used register of instruction can be in program operation process, rather than definite when program generates.Therefore, at any time, according to register use earlier and this one constantly to the request for utilization of register, can carry out optimal allocation to register.In addition, the register number of energy assignment is determined by the figure place of regional register, and the figure place of regional register is greater than the figure place of the register indicating section of an instruction, therefore, both made when the register indicating section of every instruction more in short-term, also can use a large amount of registers.

Claims (35)

1, a kind of signal conditioning package comprises: the main memory device with main memory address space; The main memory access device that is used for the above-mentioned main memory of access; Have register address space and have the block of registers of a general-purpose register and a regional register; The code translator that is used to instruct; And according to the output of above-mentioned instruction decoding device, the register access device that the register that is positioned at relative register position place is carried out access; With arithmetic device to handling from the data of the register of above-mentioned main memory device and institute's access,
It is characterized in that:
Described instruction has a register designator part, it comprises that one is used to regional indicating device assignment so that the regional register part of position of the register area of indication in described region unit, and register displacement part and the main memory designator part of the relative register position assignment in register area that is used to described appointment; Thereby according to same instruction is described host memory device and the register assigned address that is positioned at relative register position place.
According to the signal conditioning package of claim 1, it is characterized in that 2, a plurality of regional registers that carry out assignment are in the manner described above arranged.
According to the signal conditioning package of claim 1, it is characterized in that 3, the state of above-mentioned zone indicating device is set so that be the register assignment of arbitrary needs in the described block of registers.
According to the signal conditioning package of claim 1, it is characterized in that 4, the above-mentioned zone register setting comprises a regional register as special register, it is provided by above-mentioned block of registers separately and the position in indicator register zone.
5, signal conditioning package according to claim 1, it is characterized in that, described regional indicating device is a regional register, it is by providing in above-mentioned particular register district of posting in the device piece, be used in reference to the relative position that is shown in the above-mentioned special register district, described regional register is by the register section assignment to the instruction of general-purpose register assignment, above-mentioned special register district is by the described register section of an instruction (these instructions are composed expectation value in the above-mentioned zone register) and to relate to the instruction of the value of putting indicated, and the relative position in above-mentioned special register zone is by the register displacement part assignment of an above-mentioned corresponding instruction.
6, a kind of signal conditioning package comprises, has the main memory device of main memory address space, is used for the main memory access device of the above-mentioned main memory of access; Has the block of registers that register address Kong Jian And has a general-purpose register and a regional register; The code translator that is used to instruct, and according to the output of above-mentioned instruction decoding device, the register access device that the register that is positioned at relative register position place is carried out access; With arithmetic device to handling from the data of the register of above-mentioned main memory and access,
It is characterized in that:
Described instruction has a register designator part, and it comprises a relative displacement part that is used to regional indicating device assignment with the relative register position assignment in the register section of the position of specifying a register area in the described block of registers and the register area that is used to described appointment; Also has a main memory designator part; So that according to same instruction is described main memory device and the register assigned address that is positioned at relative register position place, described register access device comprises " OR " circuit, the value addition that this circuit partly provides the value in the region appointment device of the address assignment of described register section storage and above-mentioned register displacement.
7, according to the signal conditioning package of claim 1, it is characterized in that, be included in a plurality of registers in the above-mentioned block of registers, according to respect to the next register of a current register and the relation of previous register, be provided as a sequence, and the next register of the afterbody register in above-mentioned sequence becomes the stem register, and the previous register of stem register promptly becomes the afterbody register.
8, a kind of signal conditioning package comprises: the main memory storage apparatus with main memory address space; Have register address space and have the block of registers of regional register; Instruction decoding device, the register access device, it carries out access according to the output of above-mentioned instruction decoding device to the register that is positioned at relative register position place; The main memory access device, it carries out access according to another output of above-mentioned instruction decoding device to above-mentioned main memory device; With the arithmetic device that the data of above-mentioned main memory device and block of registers are handled,
It is characterized in that:
Described instruction has a register designator part, it comprises a regional register part, be used to a regional indicating device assignment so that specify the position of a register workspace of some groups that is used for a plurality of registers workspace, these register workspaces have formed the register area that is arranged in block of registers, and each workspace is made up of the identical register of scheduled volume, it also comprises a register displacement part, is used to a relative register position assignment in the register workspace of described appointment; This instruction also has a main memory designator part, so that be described main memory device and the register assigned address that is positioned at relative register position place according to same instruction.
9, signal conditioning package according to Claim 8, it is characterized in that, arrange with the form of workspace row in described a plurality of registers workspace, in the row of above-mentioned workspace, according to a sequence being lined up in each workspace with respect to the workspace of register formerly of a current register workspace and the relation of next register workspace, and, in these workspace row, be positioned at the next register workspace of afterbody register workspace as stem register workspace, and the previous register workspace that is positioned at stem register workspace is as afterbody register workspace, and above-mentioned thus register workspace is connected to the annular working district of a ring-type.
10, according to the signal conditioning package of claim 9, it is characterized in that, above-mentioned many group registers workspace is made of at least one annular working district and at least one overall work district, in the annular working district, each the register workspace that comprises the predetermined quantity register connects by ring-type, and overall work district collection comprises that distinguishing at least one register worker district And and this register workspace that you can well imagine confession by above-mentioned annular working is made up of the register of predetermined quantity.
11, signal conditioning package according to claim 10, it is characterized in that, described regional indicating device comprises a current register workspace indicating device, one formerly between register workspace indicating device and overall work area indication device And and a plurality of registers workspace in above-mentioned annular working district, at a time main register workspace of using is specified by described current register workspace specified device, the register workspace that a certain moment before the used state exchange in above-mentioned annular working district uses as current register workspace is specified by described register formerly workspace specified device, and the register workspace of concentrating a certain moment to use in above-mentioned overall work district is specified by described overall work area indication device.
12, signal conditioning package according to claim 11, it is characterized in that, described instruction comprises function command, so that upgrade the instruction of the use location of above-mentioned current register workspace and above-mentioned register formerly workspace in above-mentioned annular working district, it comprises a reach ring register workspace function command, according to this instruction, the value of the above-mentioned current register workspace indicating device before upgrading is changed to the value of upgrading above-mentioned register formerly workspace, back indicating device, and the value of the above-mentioned current register workspace indicating device after upgrading is changed to the position of upgrading the register workspace of anteposition below current register workspace, also be provided with a recovery ring register workspace function command, according to this instruction, the value of the above-mentioned register formerly workspace indicating device before upgrading is changed to the above-mentioned current register workspace indicating device before upgrading, and the value of upgrading above-mentioned register formerly workspace, back indicating device is changed to and is positioned at before the renewal position of last workspace, register workspace formerly.
13, signal conditioning package according to claim 12, it is characterized in that, be provided with effective workspace indicating device and a workspace stack indicating device, effectively the workspace indicating device is used for indicating the border that is positioned at above-mentioned annular working district effective information item, workspace stack indicating device is used to indicate and is positioned at the workspace stack position of above-mentioned main memory as the storage area, workspace, and, when the use location in the above-mentioned annular working of reach district, according to the relation between the value of the value of above-mentioned existing workspace pointer and above-mentioned effective workspace pointer, determine the necessity that preserve the workspace; Carry out the workspace preservation if define necessity, then before destruction, save workspace automatically immediately, thereby Geng Xin Hou And is stored by in the stack of above-mentioned workspace stack indicating device sensing workspace by the content of the indicated register workspace of the shared the earliest above-mentioned current register workspace indicating device in described annular working district; According to storage capability, it is consistent that the above-mentioned workspace stack indicating device that moves forward makes it; And upgrade the value of above-mentioned effective workspace indicating device, to point to next workspace in the annular working district; When recovering the use location in above-mentioned annular working district, by the value of register workspace indicating device formerly and effectively the relation between the value of workspace indicating device determine to carry out the necessity that recover the workspace; Carry out the workspace and recover if define necessity, then save workspace automatically immediately before use so that will upgrade the content of preceding workspace stack indicating device workspace storehouse pointed and be transferred to by the work at present area indication device Suo before upgrading and Zhi And by in the workspace of register formerly shared the earliest in the annular working district; Above-mentioned workspace stack indicating device recovers by the amount that transmits; And, upgrade the state of above-mentioned effective workspace indicating device, make its point to last register workspace in above-mentioned annular working district.
14, signal conditioning package according to claim 13, it is characterized in that, described annular working district comprises a register workspace, preserve the indication information item with prior Ji Lu And, the indication of this item of information needs the register preserving and recover in advance in each or register workspace, and, described instruction comprises selects to postpone hold function instruction and restore funcitons instruction, when being necessary to preserve one of above-mentioned register district or register workspace, only postpone the hold function instruction by described selection selectively and will preserve the indicated register delay storage of indication information accordingly, when needs recovered the content of the register district preserved or register workspace, then the register that points to of the preservation indication information that is only instructed before this to be extracted by described restore funcitons recovered to get final product.
15, according to the signal conditioning package of claim 11, it is characterized in that, described instruction comprises a workspace state load function instruction and a workspace status saving function instruction, for above-mentioned work at present area indication device, above-mentioned indicating device of workspace formerly and above-mentioned overall work area indication device and effective workspace indicating device and workspace stack indicating device can use workspace state load function instruction that the indicating device state is set and the workspace status saving function instruction of preserving the indicating device state.
16, signal conditioning package according to claim 12, it is characterized in that, consider current register workspace and register workspace formerly, in a subroutine, the variable information that sends from the last layer subroutine of calling this subroutine and the information that foldback returns the last layer subroutine is assigned to above-mentioned register formerly workspace, the information that transmits from the downward one deck subroutine of above-mentioned subroutine as variable and receiving by above-mentioned next straton program, information as functional value is assigned to above-mentioned current register workspace, and, be used for being performed, thereby make variable and functional value between subroutine, transmit by register from the described retrieval annular working district function command in subroutine is returned time retrieval annular working district.
According to the signal conditioning package of claim 10, it is characterized in that 17, the distribution of the register workspace that the employed register of program workspace and another program are used is different, and another program and said procedure are asynchronous operations.
18, according to the signal conditioning package of claim 10, it is characterized in that, an overall work district and an annular working district match, thereby and provide a plurality of this workspaces to constituting a workspace to being assigned to one of program of a plurality of asynchronous operations by an above-mentioned overall work district and an annular working district.
19, signal conditioning package according to Claim 8 is characterized in that, the register quantity that constitutes above-mentioned each register work is 2 power.
20, according to the signal conditioning package of claim 9, it is characterized in that, the position of above-mentioned each register is represented as the address of numerical value, in above-mentioned annular working district, the register district of this address is represented in next workspace that is positioned at any other workspace of non-afterbody workspace, so-called this address promptly is the address in abutting connection with the register address of above-mentioned any other workspace, and the register district of header addresses is represented in next workspace that is positioned at the afterbody workspace.
21, according to the signal conditioning package of claim 9, it is characterized in that, formerly being provided with during at executive routine with next relation of described annular working district, it has utilized next workspace indicating device of next position, workspace of sensing that is used for above-mentioned each register workspace and has pointed to the workspace of the register formerly indicating device of position, last workspace.
22, according to the signal conditioning package of claim 17, it is characterized in that, it is consistent that the number of the register that each overall work of concentrating in above-mentioned overall work district is contained is arranged to, and, with regard to above-mentioned one or more annular working district, the contained register quantity in each workspace of looping workspace also is set to identical.
23, signal conditioning package according to Claim 8, it is characterized in that, above-mentioned main memory access device and instruction code translator is arranged in instruction processing unit together, use above-mentioned access device, then provide, and the instruction sequence that is stored in the main memory carries out in above-mentioned instruction processing unit by the signal conditioning package outside.
24, signal conditioning package according to Claim 8 is characterized in that, above-mentioned block of registers, register access device and arithmetic device are manufactured in the same semi-conductor chip as a microprocessor.
25, according to the signal conditioning package of claim 10, feature is that the register quantity in each overall work district is identical with the register quantity of described each register workspace.
26, according to the signal conditioning package of claim 11, feature is, described regional indicating device also comprises a setting device, be used for described register formerly workspace indicating device and be set to a state, it pointed to a register indicating device before current register work indicating device under described current register indicating device state.
27, a kind of signal conditioning package comprises: the main memory device with main memory address space; Block of registers and a regional register with register address space; The instruction decoding device that is used to instruct; To the register access device that the register that is positioned at relative register position place carries out access, be used for the main memory access device that described main memory is carried out access according to another output of described instruction decoding device according to the output of described instruction decoding device; And arithmetic device to handling from the data of above-mentioned main memory device and block of registers;
It is characterized in that:
Described instruction has a register designator part, it comprises that one is used to regional indicating device assignment to specify the position of some groups a register workspace that will be used for a plurality of registers workspace, these workspaces have constituted the register area that is arranged in block of registers, and the register number of each workspace is identical; This instruction also has a register displacement part, is used to the relative register position assignment in the register workspace of appointment; A main memory designator part; So that according to same instruction is described main memory device and the register assigned address that is positioned at relative register position place; Described register access device comprises " OR " circuit, the value addition that this circuit partly provides the value in the address assignment region appointment device that is stored in described register section and above-mentioned register displacement.
CN87104991.0A 1987-07-20 1987-07-20 Information processing apparatus Expired CN1005657B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN87104991.0A CN1005657B (en) 1987-07-20 1987-07-20 Information processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN87104991.0A CN1005657B (en) 1987-07-20 1987-07-20 Information processing apparatus

Publications (2)

Publication Number Publication Date
CN1030986A CN1030986A (en) 1989-02-08
CN1005657B true CN1005657B (en) 1989-11-01

Family

ID=4815100

Family Applications (1)

Application Number Title Priority Date Filing Date
CN87104991.0A Expired CN1005657B (en) 1987-07-20 1987-07-20 Information processing apparatus

Country Status (1)

Country Link
CN (1) CN1005657B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8898436B2 (en) * 2009-04-20 2014-11-25 Oracle America, Inc. Method and structure for solving the evil-twin problem
CN106909343B (en) * 2017-02-23 2019-01-29 北京中科睿芯科技有限公司 A kind of instruction dispatching method and device based on data flow

Also Published As

Publication number Publication date
CN1030986A (en) 1989-02-08

Similar Documents

Publication Publication Date Title
US4819151A (en) Microcomputer
US3373408A (en) Computer capable of switching between programs without storage and retrieval of the contents of operation registers
US5243698A (en) Microcomputer
US3614742A (en) Automatic context switching in a multiprogrammed multiprocessor system
NO750339L (en)
US4005391A (en) Peripheral interrupt priority resolution in a micro program data processor having plural levels of subinstruction sets
US3210733A (en) Data processing system
EP0125044B1 (en) Microcomputer with interprocess communication
US3270324A (en) Means of address distribution
US20030034544A1 (en) Microcomputer
US5297255A (en) Parallel computer comprised of processor elements having a local memory and an enhanced data transfer mechanism
US3546680A (en) Parallel storage control system
EP0077619B1 (en) Data-packet driven digital computer
CN1005657B (en) Information processing apparatus
US3716838A (en) Data processing system with selective character addressing of system store
US3315234A (en) Data editing apparatus
GB968546A (en) Electronic data processing apparatus
Leiner et al. PILOT—a new multiple computer system
CN1004306B (en) Information processing unit
US3689893A (en) Accounting machine processor
EP0326164B1 (en) Parallel computer comprised of processor elements having a local memory and an enhanced data transfer mechanism
US3259886A (en) Data transfer apparatus
JP2667806B2 (en) Vector processor
EP0107447B1 (en) Computer data distributor
GB938949A (en)

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
C13 Decision
C14 Grant of patent or utility model
C15 Extension of patent right duration from 15 to 20 years for appl. with date before 31.12.1992 and still valid on 11.12.2001 (patent law change 1993)
C19 Lapse of patent right due to non-payment of the annual fee