CN100563239C - A kind of method and apparatus of realizing that Flow Control is handled in the high band wide data transmission - Google Patents

Abstract

The invention discloses a kind of method that realizes that Flow Control is handled in the high band wide data transmission, it is characterized in that, employing is carried out transfer of data more than four passages, this method comprises the steps: that receiving terminal is according to receiving data conditions, flow-control information is set, and the flow-control information that sets is sent to transmitting terminal by described passage; Transmitting terminal receives described flow-control information, and read opcode learns that the Flow Control kind is the channel level Flow Control; If time out is 0, described Flow Control state information is for sending packet, and transmitting terminal after format conversion, is mapped to the data in the Media Independent Interface XGMII specific bus to transmit in the passage corresponding with described channel parameters; If time out is non-0 number, described Flow Control state information is for stopping to send packet, and then transmitting terminal stops the data map among the XGMII in the passage of described channel parameters correspondence.The invention also discloses a kind of device of realizing that Flow Control is handled in the high band wide data transmission.

Description

A kind of method and apparatus of realizing that Flow Control is handled in the high band wide data transmission

Technical field

The present invention relates to data communication field, particularly a kind of method and apparatus of realizing that Flow Control is handled in the high band wide data transmission.

Background technology

The high speed development of data communication field proposes higher requirement to the interconnect bandwidth between the chip, lot of data can be sent to an other chips from a chips, thereby produced the high bandwidth protocols that interconnects between the chip, the 4th layer of packet interface Phase of system (System Packet Interface Level 4Phase II, SPI4.2) and 10,000,000,000 adhesion unit interfaces (10Gigabite Attachment Unit Interface XAUI) is exactly wherein two kinds of agreements.

SPI4II is by light interconnection forum (Optical InterworkingForum, the interconnection agreement between the chip that OIF) puts forward for suitable ten thousand megabits transmit.The SPI4II interface has been realized the physical layer (Physics Device) of chip and the data interconnect between the link layer (Link Layer Device).Data/address bus (data) by the low-voltage differential signal of 16 pairs of high speeds (Low Voltage Differential Signal, LVDS) transmission line is realized, Flow Control (Flow Control) is separated transmission with data.

The SPI4II agreement has realized the high-speed interconnect between the chip, and its bandwidth capacity can reach 14.4Gbps.But because its number of buses is a lot, its data transmission level is LVDS simultaneously, and therefore, the SPI4II interface is not suitable for carrying out remote backboard and transmits, so the application scenario of SPI4II agreement is generally the interconnection between the chip of this plate, and is not applied to usually interconnect between plate.In addition, the SPI4II agreement is only supported the port level Flow Control and is not supported the link level Flow Control.

XAUI is the standard interface of formulating along with the development of ten thousand mbit ethernets.The ground floor of Ethernet and the hierarchical model of the second layer as shown in Figure 1, being positioned at ground floor and being the physical layer and the second layer is that (Media Access Control, MAC) interface between the layer is Media Independent Interface (XGMII) in the medium access control.The XGMII interface is made up of parallel bus and 4 control buss of 32, and its bus number is a lot, is not suitable for the long-distance transmissions of backboard.The XAUI interface has solved this problem, and (Serializer/Deserializer, SERDES) bus is formed, and can carry out remote data and transmit by the serializer/de-serializers of the 3.125G of four pairs of high speeds for it.Transmitting terminal at first becomes the data transaction of XGMII interface format the data of XAUI interface format, and receiving terminal becomes the data transaction of XAUI interface format the data of XGMII interface format again.Fig. 2 is the conversion schematic diagram of XGMII interface and XAUI interface, and left end is the XGMII interface of standard, and right-hand member is the XAUI interface, the respectively corresponding SERDES bus of each bar passage (lane) shown in Fig. 2; Specifically, in source channels, be SLn＜P corresponding to label in the XAUI interface 〉, SLn＜N〉the bus label of XGMII interface of passage of (n=0,1,2,3) is TXD[8n+7:8n], TXC[n]; In the purpose passage, be DLn＜P corresponding to label in the XAUI interface 〉, DLn＜N〉the bus label of XGMII interface of passage of (n=0,1,2,3) is RXD[8n+7:8n], RXC[n].

The maximum transmission distance that the XAUI interface can be realized is 50cm, is fit to stride the communication between plates of backboard.But its bandwidth has only 10Gbps, excludes inner expense, and the actual payload bandwidth does not reach 10G.XAUI is that (what essence was transmitted is mac frame, so its Flow Control has only the link level Flow Control and do not support the port level Flow Control for XAUI Extender Sublayer, XGXS) layer interface in XAUI interface extension sublayer.

The high speed development of data communication field needs more than a kind of actual bandwidth 10G, can realize long-distance transmissions and support the high band wide data transmission agreement of multiple Flow Control mode.And the above two kinds of high speed data transfer agreement respectively has its pluses and minuses, all can not satisfy the needs of present data communication field development well.

Summary of the invention

In view of this, embodiments of the invention propose a kind of method that realizes that Flow Control is handled in the high band wide data transmission, and actual bandwidth can reach more than the 10G, and can realize long-distance transmissions.This method adopts carries out transfer of data more than four passages, and comprises the steps:

Receiving terminal is provided with flow-control information according to receiving data conditions, and described flow-control information comprises: be set to the command code of channel level Flow Control, the channel parameters that need carry out Flow Control, time out and Flow Control state information; And the flow-control information that sets is sent to transmitting terminal by described passage;

Transmitting terminal receives described flow-control information, and read opcode learns that the Flow Control kind is the channel level Flow Control; If described time out is 0, described Flow Control state information is for sending packet, and transmitting terminal after format conversion, is mapped to the data in the Media Independent Interface XGMII specific bus to transmit in the passage corresponding with described channel parameters; If described time out is non-0 number, described Flow Control state information is for stopping to send packet, and then transmitting terminal stops the data map among the XGMII in the passage of described channel parameters correspondence.

The invention also discloses a kind of device of realizing high band wide data transmission, comprising:

First modular converter, be used to receive the data more than 4 buses of an XGMII_E interface, will be wherein any bus TXD[8n+7:8n] in data be converted to a passage lane[n] data, and the data of each bar passage are sent to transport module, n is a nonnegative integer;

Transport module is used for the data from each bar passage of first modular converter are sent to second modular converter;

Second modular converter, be used to receive data from each bar passage of transport module, with described any passage lane[n] data be converted to a bus RXD[8n+7:8n] data, and the data of described each bar bus are sent to the corresponding bus of the 2nd XGMII_E interface respectively;

Described second modular converter comprises second flow control unit, is used for receiving data conditions according to second modular converter, generates corresponding flow-control information; Described flow-control information comprises: be set to the command code of channel level Flow Control, the channel parameters that need carry out Flow Control, time out and Flow Control state information;

Described transport module is used for the flow-control information from second modular converter is sent to first modular converter;

Described first modular converter comprises the first-class control unit, is used to receive described flow-control information, and read opcode learns that the Flow Control kind is the channel level Flow Control; Select specific port/channel to send data according to flow-control information, and stop the data transmission of other port/channel.

As can be seen from the above technical solutions, owing to adopt more than 4 channel transfer, XAUI_E interface of the present invention can still keep the XAUI interface to support the characteristics of long-distance transmissions when realizing that transmission bandwidth is greater than 10G, maximum transmission distance can be supported communication between plates between 45～50cm.

Description of drawings

Fig. 1 is the illustraton of model of the Ethernet ground floor and the second layer;

Fig. 2 is existing XAUI interface data transition diagram;

Fig. 3 is an XAUI_E interface data transition diagram of the present invention;

Fig. 4 is XGMII_E data time sequence figure of the present invention;

Fig. 5 is XAUI_E data time sequence figure of the present invention;

Fig. 6 be in the embodiment of the invention data by the process chart of XGMII_E interface to the XAUI_E interface conversion;

Fig. 7 be in the embodiment of the invention data by the process chart of XAUI_E interface to the XGMII_E interface conversion;

Fig. 8 is Flow Control frame format figure in the embodiment of the invention band;

Fig. 9 is the schematic diagram of the system of application the inventive method;

Figure 10 is an embodiment of the invention structure drawing of device.

Embodiment

For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is further elaborated below in conjunction with accompanying drawing.

Embodiments of the invention expand to N bar passage with four passages of XAUI interface, and every passage still adopts the SERDES bus mode, and under the constant situation of every channel rate, the present invention program can realize than the higher speed of existing XAUI interface like this.

With regard to present technology, the speed of SERDES bus is 3.125GHz, adopts 8B/10B coding, valid data to add that total speed of coding expense just reaches 3.125GHz on existing every passage of XAUI interface, and after the 8B/10B decoding, the essence bandwidth capacity is 2.5G; And the present invention program's interface bandwidth capacity can reach 2.5 * N G, and the value that needs only N is greater than 4, even then peel off inner expense, the essence bandwidth still will be greater than 10G.For ease of describing, below with the present invention program's interface be called enhancement mode XAUI (XAUI_Extension, XAUI_E).

Because the number of active lanes of XAUI_E increases, be attached thereto the XGMII interface that connects and also will expand, XAUI_E need increase the DDR data and the 1 bit ID LE indication control line of 8 bits at the XGMII interface with respect to passage of the every increase of XAUI.For ease of describing, the XGMII interface of this expansion is called XGMII_E.Fig. 3 is the connection diagram of XAUI_E interface of the present invention and XGMII_E interface, as can be seen from Figure 3, compares with existing XAUI interface shown in Figure 2, and the XAUI_E interface expands to N bar passage with original 4 passages of XAUI interface.

Figure 4 shows that the data time sequence structure of XGMII_E, wherein TX_CLK represents the clock cycle; The data of XGMII_E are made up of packet (packet) and unloaded (IDLE), insert unloaded between packet.If it is segmented again, can be divided into: non-S/TIDLE+Start+PACKET+Terminate, wherein initial indication of frame (Start) and postamble indication (Terminate) is zero load; Non-S/T IDLE refers to other zero load except that initial indication of frame or postamble indication.

Figure 5 shows that the data time sequence structure of XAUI_E, wherein CLK represents the clock cycle.The data of XAUI_E are made up of packet and spcial character collection (char), insert the spcial character collection with specific meanings and function between packet, and so-called spcial character collection can be understood as the zero load that has specific meanings.Spcial character concentrates the meaning of each symbol as follows:

S: initial zero load, be used to represent the initial of packet, adopt the K27.7 coding;

T: finish zero load, be used to represent the end of packet, adopt the K29.7 coding;

K: synchronous idle, be used to realize the byte of sync of every passage, adopt the K28.5 coding;

A: the phase alignment zero load, be used to realize the alignment between many passages, adopt the K28.0 coding;

R: the clock compensation zero load, be used to realize the clock compensation between the different clock-domains, adopt the K28.0 coding.

Data comprise by the XGMII_E interface to the handling process of XAUI_E interface conversion as shown in Figure 6 in the embodiment of the invention:

Step 601: judge XGMII_E interface bus TXD[8n+7:8n] in current time transmits data packets whether, if execution in step 602 then, otherwise execution in step 603.

Step 602: with the bus TXD[8n+7:8n of XGMII_E interface] packet in (n is a nonnegative integer) directly is mapped as the lane[n of XAUI_E] in packet, and go to step 601.

The mapping of this step is exactly with parallel bus TXD[8n+7:8n] in 8 Bit datas of packet correspondence, by parallel-to-serial converter, convert lane[n to] in serial data, be about to the data that 8 parallel Bit datas convert 1 parallel bit to.

Step 603: judge XGMII_E interface bus TXD[8n+7:8n] the zero load of current time transmission whether be initial zero load or finish unloaded, if execution in step 604 then, otherwise execution in step 605

Step 604: the initial zero load of packet (Start) is mapped as S character among the XAUI_E; Perhaps, packet is finished the unloaded T character that is mapped as among the XAUI_E, and go to step 601.

In fact the mapping of this step is exactly that original Start place data (fixed value is 0xFB) are converted to S spcial character (corresponding to K27.7); Originally Terminate place data (fixed value is 0xFD) have become it T spcial character (corresponding to K29.7) now.So, data format has just become: non-S/TIDLE+S+PACKET+T.

Step 605: the zero load of current time is mapped as K, A, R character at random, makes the packet of every passage evenly arrange, and go to step 601.Reality converts non-S/T IDLE to the K/A/R spcial character exactly.What these IDLE were corresponding on earth is K spcial character or A spcial character or R spcial character, then is at random.As long as they follow a principle: after non-S/T IDLE converted the K/A/R character to, the distribution of K, A, R character was uniform.So, data format has just become: K/A/R+S+PACKET+T, the just data format of XAUI_E.

For n=0,1,2,3 ... each bar bus TXD[8n+7:8n] the above-mentioned flow process of executed in parallel respectively, then realized data by the XGMII_E interface to the XAUI_E interface conversion.

In the embodiment of the invention data by the XAUI_E interface to the handling process of XGMII_E interface conversion for as shown in Figure 7, comprising:

Step 701: the n bar passage lane[n that judges the XAUI_E interface] in current time transmits data packets whether, if execution in step 702 then, otherwise execution in step 703;

Step 702: with the n bar passage lane[n of XAUI_E interface] in packet map directly to the bus RXD[8n+7:8n of XGMII_E] in packet in, and go to step 701.

Step 703: with n bar passage lane[n among the XAUI_E] in a spcial character collection of current transmission be mapped as XGMII_E interface bus RXD[8n+7:8n] in a zero load, and go to step 701.

Be easy to find out that flow process shown in Figure 7 is exactly the reverse conversion process of flow process shown in Figure 6.

Wherein, being provided with of R character need be followed following rule:

1, the R byte must be after each packet finishes;

2, when receiving packet, can not insert the R byte;

3, when deletion R byte, still need to possess the length of minimum parlor distance.

The definition of the above spcial character collection is a kind of example only, can take other definition in the practical application, and perhaps the data to the spcial character collection increase and decrease.

Owing to adopt the SERDES mode, adopt the even distribution mode of K, A, R byte simultaneously, electrical standard is followed the XAUI standard, when therefore XAUI_E interface of the present invention can be realized transmission bandwidth greater than 10G, still kept the XAUI interface can support the characteristics of long-distance transmissions, maximum transmission distance can be supported communication between plates between 45～50cm.Then the XAUI agreement with present was consistent when lane4～laneN did not use when keeping for enhancement mode XAUI of the present invention, so the present invention can compatible existing XAUI interface.

XAUI_E interface of the present invention not only can be supported the 10G business, and can support 20G, 40G, even the more data service of high bandwidth.When increasing service bandwidth, owing to the expansion of capacity, can adopt the administrative message of other form in interface inside, realize channel level, subchannel level, queue level, the management of stream level.

Below how to realize port level and link level Flow Control with specific embodiment explanation.Flow Control frame format in a kind of band of present embodiment definition, this Flow Control frame format is shown in Figure 8, and each control word definition of Flow Control frame sees table 1 for details in this band.

Control word	Implication
		Preamble	Lead code is fixed as 0x55
SFD	The frame head indication is fixed as 0xD5
		DA	Destination address is fixed as 0x0180C2000001

SA	Source address, meaningless, can arbitrarily define.
		Type	Type definition is fixed as 0x8808
Opcode	Command code.0x0000: keep the 0x0001:pause frame, link level Flow Control 0x0002～0x1100: keep 0x1101: channel level Flow Control 0x1102～0xffff: keep
		Qutanum	The time out coefficient.Be used to indicate link level Flow Control time out.Chronomere is 512bit.Wherein, 0x0000 represents XON, represents that promptly link is normal.Other numerical value all is expression XOFF, promptly represents the link level back-pressure, stops to send data.Dwell time is by this numerical value decision.
Offset	Passage number side-play amount.Be used to indicate the channel number of Port place indication.0x0000：port0～15 0x0001：port16～31 0x0002：port32～47 0x0003：port48～63 0x0004：port64～79 0x0005：port80～95 0x0006：port96～111 0x0007：port112～127 0x0008：port128～143 0x0009：port144～159 0x000a：port160～175 0x000b：port176～191 0x000c：port192～207 0x000d：port208～223 0x000e：port224～239 0x000f：port240～255 0x0010～0xffff：
		Port	The passage flow-control information.In every frame 4byte is arranged, each passage takies 2bit, so every frame can transmit the state information of 16 passages.The corresponding situation indication that sees the following form among the concrete port.The state information of 2bit is defined as follows: " 00 ": the upper reaches buffer memory sends sky data and does not limit." 01 ": the upper reaches buffer memory is normal, can only send normal data packet.

	" 10 ": the upper reaches buffer memory will be expired, send current bag after, stop to send." 11 ": keep.
		PAD	Fill, be fixed as 0x00
CRC32	CRC check

Table 1

Port when wherein, Offset is 0x0000 (port) is as shown in table 2 with the corresponding relation of channel number:

Table 2

Certainly, Offset also has the corresponding relation of corresponding ports number and channel number during for other values, just differs one here for example.By the definition of Flow Control frame in the described band, can realize the Flow Control of link level and channel level very easily.The receiving terminal of data needs only in band and in the Flow Control frame control corresponding word is set, and set Flow Control frame is sent to the transmitting terminal of data by the XAUI_E interface; Then the transmitting terminal of data just can be carried out corresponding flow-control operation according to described control word.For example, the receiving terminal of data only need command code be set to 0x0001, and the pause time coefficient is set to non-0 number, and then the control word in the transmitting terminal of the data detection Flow Control frame is above-mentioned value, just can realize the link level back-pressure; In case the pause time coefficient is set to 0x0000, even command code is set to 0x0001 and thinks that also this link-recovery is normal so, link can the normal transmission data; When needs channel level back-pressure, only need command code be set to 0x1101, offset need to be set to the corresponding parameter value of back-pressure passage, and respective channel is set to the respective channel state information and gets final product among the port.

Illustrate with system shown in Figure 9 how the present invention realizes Flow Control below.Here provide the concrete implication of Flow Control.So-called channel level Flow Control, or be called the port level Flow Control, pointer is to the Flow Control treatment mechanism of certain or some passages or port.When certain passage needs Flow Control, will no longer send the data of this passage or port on the link, but the data of other available channel or port can send over still by link; So-called link level Flow Control, pointer is to the Flow Control treatment mechanism of whole link.When sending the link level Flow Control, represent in the time of usually that all corresponding passages are all congested, can not send data on the link.

Adopt the XAUI_E interface between device A shown in Figure 9 and the equipment B, equipment B receives the data from device A from XAUI_E, and the data that received are put into two formation FIFO1, FIFO2 respectively.In this case, we can think and taken two passages on the equipment B, respectively corresponding FIFO1 and FIFO2.

FIFO1 on equipment B congested (content that the so-called congested meaning is exactly this formation buffer memory reaches its inner waterline), and the state of FIFO2 is just often, equipment B can be given device A by the flow-control information of XAUI_E interface sendaisle level.At this moment, Opcode is set to 0x1101, and Qutanum is set to 0xffff, and Offset is set to 0x0, and port is set to 0x02000000.Device A is received this flow-control information, after CRC check is errorless, reads the value of Opcode, and the kind of learning Flow Control is the channel level Flow Control; Device A continues to read the value of Qutanum, and the time span of learning Flow Control is 0xffff * 512 bits; Device A reads the value of Offset and Port again, learns the port numbers respective channel 1 of carrying out Flow Control, and the Flow Control state information is for stopping to send packet.Then device A is according to above flow-control information, stop to send packet to FIFO1, and to keep the duration of this halted state is 0xffff * 512bit; Transmission for other passages remains unchanged.

If 0xffff * 512bit in the time congestion situation of FIFO1 taken a turn for the better, the state of FIFO1 becomes normally, then equipment B Opcode is set to 0x1101, Qutanum is set to 0x0, Offset is set to 0x0, and port is set to 0x00000000, sends Flow Control frame in the band once more; Device A is received this flow-control information, after CRC check is errorless, reads the value of Opcode, and the kind of learning Flow Control is channel level Flow Control still; Read the value of Qutanum again, the duration of learning Flow Control is 0; Device A reads the value of Offset and Port again, learns the port numbers respective channel 1 of carrying out Flow Control, and the Flow Control state information is that the transmission of packet is unrestricted.Then device A sends packet to FIFO1.

If at the congestion situation of 0xffff * 512bit FIFO1 after the time still, then equipment B Opcode is set to 0x1101, Qutanum is set to 0xffff, and Offset is set to 0x0, and port is set to 0x02000000, sends Flow Control frame in the band once more.Device A is received this flow-control information, after CRC check is errorless, reads the value of Opcode, and the kind of learning Flow Control is the channel level Flow Control; Device A continues to read the value of Qutanum, and the time span of learning Flow Control is 0xffff * 512 bits; Device A reads the value of Offset and Port again, learns the port numbers respective channel 1 of carrying out Flow Control, and the Flow Control state information is for stopping to send packet.Then device A is according to above flow-control information, continue to stop to send packet to FIFO1, and to keep the duration of this halted state is 0xffff * 512 bits; Transmission for other passages remains unchanged.

If after FIFO1 was congested, FIFO2 was also congested, can send the interior Flow Control frame of band of a link level this moment.Opcode is set to 0x0001, and Qutanum is set to 0xffff, and Offset and port are provided with arbitrarily.Device A is received this flow-control information, after CRC check is errorless, reads the value of Opcode, and the kind of learning Flow Control is the link level Flow Control; Device A continues to read the value of Qutanum, and the time span of learning Flow Control is 0xffff * 512 bits; Device A no longer reads the control word of back, and directly stops to send data to the link of connection device B, and to keep the duration of this halted state be 0xffff * 512 bits.

In time, have the congestion situation of a FIFO to cancel at 0xffff * 512bit, equipment B then sends once corresponding channel level flow-control information; If in the time, the congestion situation of all passages has all been cancelled at 0xffff * 512bit, then send the interior Flow Control frame of band of a link level once more, Opcode is set to 0x0001, and Qutanum is set to 0x0, and Offset and port are provided with arbitrarily; If after the time, the congestion situation of all passages still then sends the interior Flow Control frame of band of a link level once more at 0xffff * 512bit, Opcode is set to 0x0001, and Qutanum is set to 0xffff, and Offset and port are provided with arbitrarily.

The Flow Control frame only is an example in the defined band of present embodiment, is used to illustrate that the XAUI_E interface after bandwidth capacity is expanded, can realize link level Flow Control and channel level Flow Control; In the practical application, XAUI_E can also carry other any useful information or adopt other flow control methods.

The high band wide data transmission device of the embodiment of the invention comprises as shown in figure 10 as lower module:

First modular converter 1010, be used to receive the data more than 4 buses of an XGMII_E interface, will be wherein any bus TXD[8n+7:8n] in data be converted to a passage lane[n] data, and the data of each bar passage all are sent to transport module 1030.First modular converter 1010 also is used to receive the flow-control information from transport module, carries out corresponding flow-control operation according to described flow-control information.

Second modular converter 1020, be used to receive from transport module 1030 more than 4 channel data, with described any passage lane[n] data be converted to a bus RXD[8n+7:8n] data, and the data of described each bar bus are sent to the corresponding bus of the 2nd XGMII_E interface respectively.Second modular converter 1020 also is used to generate flow-control information, and the flow-control information that is generated is sent to transport module 1030.

Transport module 1030 comprises the SERDES bus more than 4, and every SERDES bus is transferred to 1020 with the data of a passage from first modular converter 1010 respectively.Transport module 1030 also is used for the flow-control information from second modular converter 1020 is transferred to first modular converter 1010.

Wherein, first modular converter 1010 also comprises:

First-class control unit 1011 is used for carrying out corresponding flow-control operation according to flow-control information.Described flow-control information can be the information of carrying in the Flow Control frame shown in the table 1; Described flow-control operation can be to select specific port/channel to send data according to flow-control information, and stops the data transmission of other port/channel, also can be the data transmission that the high band wide data transmission device is stopped or carrying out.

First judging unit 1012, being used for any one bus TXD[8n+7:8n] content of current time transmission judges, if packet, 1013 pairs of these packets of the first packet map unit are handled, if unloaded, 1014 pairs of these zero loads of the first unloaded map unit are handled.

The first packet map unit 1013 is used for any one bus TXD[8n+7:8n] the current time data packets for transmission is mapped as passage lane[n] packet.

The first unloaded map unit 1014, be used for any one bus TXD[8n+7:8n] zero load of current time transmission is mapped as passage lane[n] spcial character, wherein initial zero load is mapped as the S character, to finish zero load and be mapped as the T character, other zero load is mapped as K, A, R character at random, and to keep the distribution of K, A, R character be uniform.

Second modular converter 1020 also comprises:

Second flow control unit 1021 is used for receiving data conditions according to second modular converter 1020, generates corresponding Flow Control frame.

Second judging unit 1022, being used for any one passage lane[n] content of current time transmission judges, if packet, 1023 pairs of these packets of the second packet map unit are handled, if unloaded, 1024 pairs of these zero loads of the second unloaded map unit are handled.

The second packet map unit 1023 is used for any one passage lane[n] the current time data packets for transmission is mapped as bus RXD[8n+7:8n] packet.

The second unloaded map unit 1024 is used for any one passage lane[n] character of current time transmission is mapped as bus RXD[8n+7:8n] zero load.

The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.

Claims (13)

1, a kind of method that realizes that Flow Control is handled in the high band wide data transmission is characterized in that, adopts and carries out transfer of data more than four passages, and this method comprises the steps:

Receiving terminal is provided with flow-control information according to receiving data conditions, and described flow-control information comprises: be set to the command code of channel level Flow Control, the channel parameters that need carry out Flow Control, time out and Flow Control state information; And the flow-control information that sets is sent to transmitting terminal by described passage;

Transmitting terminal receives described flow-control information, and read opcode learns that the Flow Control kind is the channel level Flow Control; If described time out is 0, described Flow Control state information is for sending packet, and transmitting terminal after format conversion, is mapped to the data in the Media Independent Interface XGMII specific bus to transmit in the passage corresponding with described channel parameters; If described time out is non-0 number, described Flow Control state information is for stopping to send packet, and then transmitting terminal stops the data map among the XGMII in the passage of described channel parameters correspondence.

2, method according to claim 1 is characterized in that, described passage adopts serializer/de-serializers SERDES bus.

3, method according to claim 1 is characterized in that, described with the data in the Media Independent Interface XGMII specific bus after format conversion, be mapped to transmit in the passage corresponding and comprise with described channel parameters:

The label of judging XGMII is TXD[8n+7:8n] bus in current time transmits data packets whether, if then described packet is mapped as passage lane[n] in packet; Otherwise, be TXD[8n+7:8n with label] bus in the zero load of current time transmission be mapped as passage lane[n] the spcial character collection; N is a nonnegative integer.

4, method according to claim 3 is characterized in that, this method further comprises:

Judge passage lane[n] in current time transmits data packets whether, if the label that described packet is mapped as XGMII is RXD[8n+7:8n] bus in packet; Otherwise, with passage lane[n] in the spcial character collection of current time transmission to be mapped as label be RXD[8n+7:8n] bus in a zero load.

5, method according to claim 4 is characterized in that, described spcial character collection comprises:

Initial unloaded S is used to represent the initial of packet;

Finish unloaded T, be used to represent the end of packet;

Synchronous idle K is used to realize the byte of sync of every passage;

The unloaded A of phase alignment is used to realize the alignment between many passages;

The unloaded T of clock compensation is used to realize the clock compensation between the different clock-domains.

6, method according to claim 5 is characterized in that, described is TXD[8n+7:8n with label] bus in the zero load of current time transmission be mapped as passage lane[n] the spcial character collection comprise:

Judge that label is TXD[8n+7:8n] bus in the zero load of current time transmission whether be initial zero load or finish unloaded, if, then described initial zero load is mapped as passage lane[n] in the S character, perhaps, described end zero load is mapped as passage lane[n] in the T character; Otherwise, with TXD[8n+7:8n] in the bus zero load of current transmission be mapped as K character, A character or R character at random.

7, method according to claim 6 is characterized in that, describedly zero load is mapped as the R character must satisfies following condition:

The R character must be after each packet finishes;

When receiving packet, can not insert the R character;

When deletion R character, still need to possess the length of minimum parlor distance.

8, method according to claim 1 is characterized in that, described flow-control information is the control word in the Flow Control frame in the band.

9, a kind of device of realizing that Flow Control is handled in the high band wide data transmission is characterized in that this device comprises:

First modular converter, be used to receive the data more than 4 buses of an XGMII_E interface, will be wherein any bus TXD[8n+7:8n] in data be converted to a passage lane[n] data, and the data of each bar passage are sent to transport module, n is a nonnegative integer;

Transport module is used for the data from each bar passage of first modular converter are sent to second modular converter;

Second modular converter, be used to receive data from each bar passage of transport module, with described any passage lane[n] data be converted to a bus RXD[8n+7:8n] data, and the data of described each bar bus are sent to the corresponding bus of the 2nd XGMII_E interface respectively;

Described second modular converter comprises second flow control unit, is used for receiving data conditions according to second modular converter, generates corresponding flow-control information; Described flow-control information comprises: be set to the command code of channel level Flow Control, the channel parameters that need carry out Flow Control, time out and Flow Control state information;

Described transport module is used for the flow-control information from second modular converter is sent to first modular converter;

Described first modular converter comprises the first-class control unit, is used to receive described flow-control information, and read opcode learns that the Flow Control kind is the channel level Flow Control; Select specific port/channel to send data according to flow-control information, and stop the data transmission of other port/channel.

10, device according to claim 9 is characterized in that, described transport module comprises the SERDES bus more than 4.

11, device according to claim 9 is characterized in that, described first modular converter further comprises:

First judging unit, being used for any one bus TXD[8n+7:8n] content of current time transmission judges, if packet then makes the first packet map unit that this packet is handled, if unloaded, the first unloaded map unit is handled to this zero load;

The first packet map unit is used for any one bus TXD[8n+7:8n] the current time data packets for transmission is mapped as passage lane[n] packet;

The first unloaded map unit is used for any one bus TXD[8n+7:8n] zero load of current time transmission is mapped as passage lane[n] spcial character.

12, device according to claim 11, it is characterized in that the described first unloaded map unit is used for initial zero load is mapped as the S character, will finish zero load and be mapped as the T character, other zero load is mapped as K, A, R character at random, and keeps being evenly distributed of K, A, R character.

13, device according to claim 9 is characterized in that, described second modular converter comprises:

Second judging unit, being used for any one passage lane[n] content of current time transmission judges, if packet then makes the second packet map unit that this packet is handled, if unloaded, the second unloaded map unit is handled to this zero load;

The second packet map unit is used for any one passage lane[n] the current time data packets for transmission is mapped as bus RXD[8n+7:8n] packet;

The second unloaded map unit is used for any one passage lane[n] character of current time transmission is mapped as bus RXD[8n+7:8n] zero load.

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