CN100545778C - Primary power supplier with side is in order to the controller of control output current - Google Patents

Abstract

The invention relates to the controller of a kind of primary power supplier with side in order to the control output current, it comprises a waveform detection circuit, and the primary side switch current signal according to a transformer of power supply unit produces a current waveform signal; One second control circuit produces an oscillation signal, switches the switching frequency of signal in order to determine one; One integrating circuit, produce an average current signal according to the current waveform signal, and foundation one time signal produces an integration signal to average current signal integration, time signal is to produce according to oscillation signal, integration circuit time constant is relevant with the switching cycle that switches signal in addition, so integration signal and output current are proportional; One first control circuit produces the switching signal according to integration signal, oscillation signal and a reference voltage, and the pulse bandwidth of signal is switched in first control circuit control, so controller can be adjusted the output current of power supply unit.

Description

Primary power supplier with side is in order to the controller of control output current

Technical field:

The invention relates to a kind of power supply unit, be meant a kind of controller of power supply unit especially, it is the primary side that is arranged at power supply unit, in order to the output current of control power supply unit.

Background technology:

Press, multiple now power supply unit has been widely used in to provide adjusts voltage and electric current, and based on considering on the safety, current off-line type power supply unit has galvanic isolation between primary side and secondary side, if the controller of power supply unit is arranged at the primary side of power supply unit, will be difficult to control the output current of power supply unit.So based on the problems referred to above, the invention provides a kind of controller, it is the primary side that is arranged at power supply unit, in order to the output current of control power supply unit.

Summary of the invention:

Fundamental purpose of the present invention is to provide a kind of controller of power supply unit, and it is arranged on the primary side of power supply unit, and carries out output current control according to the primary side switch current of power supply unit.

Primary power supplier with side of the present invention is in order to the controller of control output current, it includes a first control circuit, be used to produce one and switch the transformer and an output current of adjusting power supply unit of signal with switching power supply, first control circuit includes an error amplifier, in order to the control output current; One comparer connects a pulse width modulation circuit, and comparer switches the pulse bandwidth of signal according to the output signal control of error amplifier.Controller of the present invention still includes a second control circuit, is used to produce an oscillation signal switches signal with decision switching frequency; One waveform detection circuit, a primary side switch current signal of its sampling power supply unit produces a current waveform signal; One integrating circuit, it produces an average current signal according to the current waveform signal, and utilizes a time signal that the average current signal is carried out integration and produces an integration signal, and transfers to error amplifier, so can adjust the output current of power supply unit.Above-mentioned time signal is to produce according to oscillation signal, and integration circuit time constant is relevant with the switching cycle of switching signal, so the output current of integration signal and power supply unit is proportional.

Description of drawings:

Fig. 1 is the circuit diagram of the power supply unit of one embodiment of the invention;

Fig. 2 is the oscillogram of power supply unit of the present invention;

Fig. 3 is the output current waveform correlation figure of power supply unit of the present invention;

Fig. 4 is the relative curve map with output current of the output voltage of power supply unit of the present invention;

Fig. 5 is the circuit diagram of the controller of one embodiment of the invention;

Fig. 6 is the circuit diagram of the voltage feedback control circuit of one embodiment of the invention;

Fig. 7 is the circuit diagram of the second control circuit of one embodiment of the invention;

Fig. 8 is the circuit diagram that the pulse wave of one embodiment of the invention produces circuit;

Fig. 9 is the oscillogram of the second control circuit of one embodiment of the invention;

Figure 10 is the circuit diagram of the waveform detection circuit of one embodiment of the invention;

Figure 11 is the circuit diagram of the integrating circuit of one embodiment of the invention.

The figure number explanation:

The 30 electric current senses of 10 transformers, 20 power electric crystals

Measuring resistance 40 rectifiers 41 rectifiers

45 electric capacity

50 inductance, 60 operational amplifier 61-64,411-413 resistance

65 photo-couplers, 66 resistance, 67 diodes

70 controllers, 71 first operational amplifiers, 75 first comparers

91 and lock 92 and lock 93 phase inverters

95D type flip-flop 200 second control circuits

201 the 3rd sequential operation amplifiers 205 the 3rd comparer

210 the 3rd sequential resistance 215 the 5th electric capacity

220 tertiary voltages are to current converter circuit 250 the 3rd sequential electric crystal

230 minions are closed 231 octavos and are closed

232 the 9th switches 233 the tenth switch

251-255,353,363,410,514-517,519,534-539 electric crystal

260 phase inverters, 270 first pulse waves produce circuit

290 second pulse waves produce circuit 300 waveform detection circuit

305 first fixed current sources, 308 first electric crystals

310 second comparers, 311 first switches 312 the 3rd switch

315 the 4th switches, 321 first electric capacity 325 the 4th electric capacity

330 the 3rd pulse waves produce circuit 350 time delay circuits

351 phase inverters, 352 fixed current sources, 354 electric capacity

355 and lock 360 click signal generating circuit 361 phase inverters

362 fixed current sources, 364 electric capacity 365 and locks

366 phase inverters, 400 first control circuits, 420 adding circuits

430 comparers, 450 pulse width modulation circuits, 500 integrating circuit

511 first sequential resistance, 520 phase inverters

529 second voltages are to current converter circuit 530 second sequential operation amplifiers

531 second sequential resistance, 532 second sequential electric crystals 550 the 5th switch

551 the 6th switches 560 the 3rd electric crystal, 570 sequential electric capacity

571 output capacitances, 600 voltages feedback control circuit/PLS anti-phase oscillations signal

FB feedbacks and holds CLR to remove signal I ₂₅₀Reference current

I ₂₅₃Second control circuit charging current I ₂₅₅The second control circuit discharge current

I ₃₅₂Electric current I ₃₆₂Electric current I ₅₁₂The first programmed electric current

I ₅₁₅The first mapping electric current I ₅₁₉The first programmed charging current

I ₅₃₂The second programmed electric current I ₅₃₅The 3rd mapping electric current

I ₅₃₇The 4th mapping electric current I ₅₃₉The second programmed charging current

I _AVGAverage current signal I _PThe primary side switch current

I _{P (PEAK)}Primary side switch current peak I _PAElectric current I _PBElectric current

I _SSecondary side switch current I _{S (PEAK)}Secondary side switch current peak value

I _SAElectric current I _SBElectric current I _OOutput current

OUT output terminal PLS oscillation signal RMP slope signal

S _VVoltage circuit signal S _ICurrent return signal SMP sample signal

STR stores signal T switching cycle T _D1First time delay

T _D2Second time delay T _P1The first pulse bandwidth T _P2Second pulse bandwidth

T _ONON time T _SIntegration period V _AThe first current waveform signal

V _BThe second current waveform signal V _CCSupply voltage V _INInput voltage

V _IPPrimary side switch current signal V _HHigh threshold voltage

V _LLow threshold voltage V _OOutput voltage V _PWMSwitch signal

V _REF1The first reference voltage V _REF2The second reference voltage V _SIInitial signal

V _SPPeak value signal V _XIntegration signal VS current sense end

Embodiment:

Seeing also Fig. 1, is the circuit diagram of the power supply unit of one embodiment of the invention.As shown in the figure, power supply unit of the present invention includes a transformer 10, and it is provided with a first side winding N _PWith a secondary side winding N _SOne controller 70, one output terminal OUT produce one and switch signal V _PWMBe used to control a power electric crystal 20,, so can adjust the output voltage V of power supply unit with switching transformer 10 _OAnd output current I _O, transformer 10 sees through rectifier 40,41, an inductance 50 and an electric capacity 45 and transmits the output terminal of energy to power supply unit; One voltage feedback loop, it comprises an operational amplifier 60, resistance 61,62 and a photo-coupler 65, with output voltage V _OFeedback to a back coupling end FB of controller 70; One electric capacity 63, one end couple an end of a resistance 64, and the other end of electric capacity 63 couples a negative input end of operational amplifier 60, and a positive input terminal of operational amplifier 60 receives a reference voltage V _R, the other end of resistance 64 couples an output terminal of operational amplifier 60; One resistance 66, it is coupled between the output terminal of photo-coupler 65 and power supply unit; One diode 67, it is coupled between the primary side and earth terminal of power supply unit.

When switching signal V _PWMWhen changing high levle into, transformer 10 will produce a primary side switch current I _P, primary side switch current I _PA peak I _PACan be expressed as:

$I_{\mathrm{PA}}=\frac{T_{\mathrm{NS}}}{T_{\mathrm{NP}}}\&times;\{\frac{[(\frac{T_{\mathrm{NS}}}{T_{\mathrm{NP}}}\&times;V_{\mathrm{IN}})-V_O-V_F]}{{\mathrm{<figure-callout\; id="50"\; label="L"\; filenames="C20061005726800351.png"\; state="\{\{state\}\}">L</figure-callout>}}_{50}}\&times;T_{\mathrm{ON}}\}+(\frac{V_{\mathrm{IN}}}{L_P}\&times;T_{\mathrm{ON}})---\left(1\right)$

Wherein, T _NPAnd T _NSBe respectively the first side winding N of transformer 10 _PWith secondary side winding N _SUmber of turn, V _IN, V _OBe respectively an input voltage and the output voltage of power supply unit, V _FBe the pressure drop of rectifier 40, L ₅₀Inductance value, T for inductance 50 _ONBe to switch signal V _PWMAn ON time, L _PBe the first side winding N of transformer 10 _PThe magnetizing inductance value.Above-mentioned equation (1) is because L _PNumerical value very big, so (V in the equation (1) _IN/ L _P) * T _ONThe electric current that the is produced (V that to be left in the basket _IN/ L _P) * T _ONThe electric current that is produced.

Power supply unit still includes a current sensing resistor 30, and it is coupled between power electric crystal 20 and the earth terminal, in order to conversion primary side switch current I _PBe a primary side switch current signal V _IPOne current sense end VS of controller 70 couples a current sensing device, and for example current sensing resistor 30, in order to detecting primary side switch current signal V _IP

Seeing also Fig. 2, is the oscillogram of power supply unit of the present invention.It shows the switching signal V of controller 70 outputs _PWMWaveform and the primary side switch current I of power supply unit _PWith secondary side switch current I _SWaveform.Secondary side switch current I _SCan be expressed as:

$I_S=\frac{T_{\mathrm{NP}}}{T_{\mathrm{NS}}}\&times;I_P---\left(2\right)$

Primary side switch current I _PA peak I _{P (PEAK)}With secondary side switch current I _SA peak I _{S (PEAK)}Can be expressed as:

I _P(PEAK)＝I _PA+I _PB (3)

I _S(PEAK)＝I _SA+I _SB (4)

$I_{\mathrm{SA}}=\frac{T_{\mathrm{NP}}}{T_{\mathrm{NS}}}\&times;I_{\mathrm{PA}}---\left(5\right)$

$I_{\mathrm{SB}}=\frac{T_{\mathrm{NP}}}{T_{\mathrm{NS}}}\&times;I_{\mathrm{PB}}---\left(6\right)$

Wherein, I _PAWith I _PBExpression is stored in the continuity energy of inductance 50 respectively, and it is switching signal V _PWMClosing time can't discharge fully when releasing energy.Being characterized as inductance 50 stored energy and when next switching cycle begins, can't discharging fully of continuity energy.

Seeing also Fig. 3, is the output current waveform correlation figure of power supply unit of the present invention.It is to demonstrate output current I _OWith secondary side switch current I _SRelation.The output current I of power supply unit _OBe secondary side switch current I _SMean value, the output current I of power supply unit _OCan be expressed as:

$I_O=[I_{\mathrm{SB}}+(I_{\mathrm{SA}}\&times;\frac{1}{2})]\&times;\frac{1}{T_S}---\left(7\right)$

Wherein, T _SBe the integration period of expression to the switch current integration, T _SBe based on switching cycle T.Can learn the output current I of power supply unit by equation (2) and (7) _OCan be according to primary side switch current I _PAdjust.Output voltage V of the present invention _OTo output current I _ORelative curve as shown in Figure 4, output current I _OThe controlled fixed current source that is made as.

Seeing also Fig. 5, is the circuit diagram of the controller of one embodiment of the invention.Controller 70 of the present invention includes one first circuit, and it is a waveform detection circuit 300 and the current sense end VS that is coupled in controller 70, that is is coupled to current sensing resistor 30, and waveform detection circuit 300 is by sampling primary side switch current signal V _IPAnd produce one first signal, and first signal includes one the 5th signal and one the 6th signal, and first signal is the current waveform signal, and the 5th signal is one first current waveform signal V _A, the 6th signal is one second current waveform signal V _BOne second control circuit 200, it is used to produce one the 4th signal, and the 4th signal is an oscillation signal PLS, switches signal V in order to decision _PWMSwitching frequency; One second circuit, it is an integrating circuit 500, in order to by integration one average current signal I _AVGAnd producing one second signal, second signal is an integration signal V _X, average current signal I _AVGBe according to the first current waveform signal V _AWith the second current waveform signal V _BProduce.One time constant of integrating circuit 500 and switching signal V _PWMSwitching cycle T relevant, so integration signal V _XOutput current I with power supply unit _OProportional.

One first control circuit 400, in order to produce one the 3rd signal, it is for switching signal V _PWMFirst control circuit 400 comprises an error amplifier and is used for output current control, and it has one first operational amplifier 71 and one first reference voltage V _REF1One first comparer 75, it connects a pulse width modulation circuit 450, is used for switching signal V according to the output signal control of first operational amplifier 71 _PWMPulse bandwidth.Error amplifier is to amplify integration signal V _XAnd provide a loop gain for output current control.From the above, the present invention is by detecting primary side switch current I _PSwitch signal V and adjust _PWMPulse bandwidth as being all a current control loop, and more can be according to the first reference voltage V _REF1Control primary side switch current I _PIntensity.Shown in equation (2), secondary side switch current I _SBe and primary side switch current I _PProportional.

Primary side switch current I _PBe to convert primary side switch current signal V to via current sensing resistor 30 _IP, provide waveform detection circuit 300 through detecting primary side switch current signal V _IP, produce the first current waveform signal V _AWith the second current waveform signal V _BIntegrating circuit 500 is according to the first current waveform signal V _AWith the second current waveform signal V _BProduce integration signal V _X, shown in it can be expressed as:

$V_X=(V_B+\frac{V_A-V_B}{2})\&times;\frac{T_S}{T_1}---\left(8\right)$

Wherein, V _AWith V _BCan be expressed as

$V_A=\frac{T_{\mathrm{NS}}}{T_{\mathrm{NP}}}\&times;R_S(I_{\mathrm{SA}}+I_{\mathrm{SB}})---\left(9\right)$

$V_B=\frac{T_{\mathrm{NS}}}{T_{\mathrm{NP}}}\&times;R_S\&times;I_{\mathrm{SB}}---\left(10\right)$

Wherein, T ₁Be the time constant of integrating circuit 500, R _SIt is the resistance value of current sensing resistor 30.

With reference to equation (7)-(10), integration signal V _XCan be rewritten as:

$V_X=\mathrm{<figure-callout\; id="1"\; label="k"\; filenames="C20061005726800361.png,C20061005726800362.png"\; state="\{\{state\}\}">k</figure-callout>}1\&times;\frac{T_S}{T_I}\&times;\frac{T_{\mathrm{NS}}}{T_{\mathrm{NP}}}\&times;R_S\&times;I_O---\left(11\right)$

Wherein, K ₁Be T _SThe constant of/T.Can learn integration signal V by equation (11) _XOutput current I with power supply unit _OProportional, i.e. output current I _OIntegration signal V during increase _XAlso can be along with increase.Yet, after the current control loop adjustment, integration signal V _XMaximal value be to be subjected to the first reference voltage V _REF1Limit.Maximum output current I _{O (MAX)}Under the back coupling control of current control loop, can be expressed as:

$I_{O\left(\mathrm{MAX}\right)}=\frac{T_{\mathrm{NP}}}{T_{\mathrm{NS}}}\&times;\frac{G_A\&times;G_{\mathrm{SW}}\&times;{\mathrm{<figure-callout\; id="1"\; label="V\; R"\; filenames="C20061005726800361.png,C20061005726800362.png"\; state="\{\{state\}\}">V</figure-callout>}}_R}{1+(G_A\&times;G_{\mathrm{SW}}\&times;\frac{R_S}{K})}---\left(12\right)$

Wherein, K equals T _IThe constant of/T, V _R1Be the first reference voltage V _REF1Value, G _ABe the yield value of error amplifier, G _SWYield value for first control circuit 400.If the quite high (G of the loop gain of current control loop _A* G _SW＞＞1), maximum output current I _{O (MAX)}Can be expressed as:

$I_{O\left(\mathrm{MAX}\right)}=K\&times;\frac{T_{\mathrm{NP}}}{T_{\mathrm{NS}}}\&times;\frac{V_{R1}}{R_S}---\left(13\right)$

Therefore, the maximal value I of the output current of power supply unit _{O (MAX)}Be according to the first reference voltage V _REF1And be adjusted to a fixed current.

Pulse width modulation circuit 450, the output terminal OUT that it couples controller 70 is used for output and switches signal V _PWMWith switching power supply.Pulse width modulation circuit 450 of the present invention includes a D type flip-flop 95, a phase inverter 93 and two and lock 91,92.One D input end of D type flip-flop 95 receives a supply voltage V _CCOscillation signal PLS sets D type flip-flop 95 through phase inverter 93, one input end of phase inverter 93 couples second control circuit 200, one output terminal of phase inverter 93 couples one of D type flip-flop 95 and sets end, one output terminal of D type flip-flop 95 couples and a first input end of lock 92, one second input end that reaches lock 92 couples the output terminal of phase inverter 93, and the output terminal that reaches lock 92 also is an output terminal of pulse width modulation circuit 450, is used for producing switching signal V _PWM

And lock 91, the one output terminal couples the replacement input end of D type flip-flop 95, and with replacement D type flip-flop 95, and a first input end of lock 91 receives a voltage circuit signal S _VVoltage feedback control circuit 600, it couples the back coupling end FB of second control circuit 200 and controller 70 and current sense end VS to produce voltage circuit signal S _V, and be used to adjust the output voltage V of power supply unit _OFirst comparer, 75 outputs, one current return signal S _IAnd transfer to and one second input end of lock 91, in order to as a replacement signal, to reach the purpose of output current control.One positive input terminal of first comparer 75 couples an output terminal of first operational amplifier 71, and a negative input end of first comparer 75 then receives the slope signal RMP that second control circuit 200 is provided.Voltage circuit signal S _VAnd current return signal S _IThe D type of all can resetting flip-flop 95 switches signal V in order to shorten _PWMPulse bandwidth so that adjust the output voltage V of power supply unit _OAnd output current I _O

Seeing also Fig. 6, is the circuit diagram of the voltage feedback control circuit of the embodiment of the invention.As shown in the figure, voltage feedback control circuit 600 of the present invention includes an electric crystal 410, three resistance 411,412,413, an adding circuit 420 and a comparer 430.The gate of electric crystal 410 couples an end of back coupling end FB and resistance 411, the other end of resistance 411 then couples the drain and supply voltage vcc of electric crystal 410, the source electrode of electric crystal 410 couples an end of resistance 412, and resistance 413 is coupled between the other end and earth terminal of resistance 412.One positive input terminal of comparer 430 is to be coupled to feedback through electric crystal 410 and resistance 412,413 to hold FB, to be offset accurate position and decay.One negative input end of comparer 430 couples an output terminal of adding circuit 420, is used to receive primary side switch current signal V _IPWith the summation of slope signal RMP, with the compensation slope.Therefore, voltage circuit signal S _VBe an output terminal that is created in comparer 430, to be used for the output voltage V of voltage circuit control and adjustment power supply unit _O

Seeing also Fig. 7, is the circuit diagram of the second control circuit of embodiments of the invention.As shown in the figure, second control circuit 200 of the present invention includes a tertiary voltage to current converter circuit 220, and it includes one the 3rd sequential operation amplifier 201, one the 3rd sequential resistance 210 and one the 3rd sequential electric crystal 250.Tertiary voltage is to current converter circuit 220 foundations one second reference voltage V _REF2, produce a reference current I ₂₅₀One positive input terminal of the 3rd sequential operation amplifier 201 receives the second reference voltage V _REF2, a negative input end of the 3rd sequential operation amplifier 201 couples the source electrode of the 3rd sequential electric crystal 250, and an output terminal of the 3rd sequential operation amplifier 201 couples the gate of the 3rd sequential electric crystal 250, and the drain of the 3rd sequential electric crystal 250 is exported this reference current I ₂₅₀The 3rd sequential resistance 210 is coupled between the source electrode and earth terminal of the 3rd sequential electric crystal 250.

One the 6th current mirror, it includes electric crystal 251,252,253, is used for according to reference current I ₂₅₀Produce a second control circuit charging current I ₂₅₃, the source electrode of electric crystal 251,252,253 all couples supply voltage V _CC, the gate of electric crystal 251,252,253 is coupled in together mutually with the drain of electric crystal 251, and the drain of electric crystal 251 also couples the drain of the 3rd sequential electric crystal 250, and the drain of electric crystal 253 produces second control circuit charging current I ₂₅₃One the 7th current mirror, it includes electric crystal 254,255, is used for according to reference current I ₂₅₀Produce a second control circuit discharge current I ₂₅₅, the source electrode of electric crystal 254,255 is coupled to earth terminal, and the gate of electric crystal 254,255 couples the drain of electric crystal 254, and the drain of electric crystal 254 couples the drain of electric crystal 252, and the drain of electric crystal 255 produces second control circuit discharge current I ₂₅₅

One minion closes 230, and it is coupled between the drain and one the 5th electric capacity 215 of electric crystal 253.One octavo is closed 231 and is coupled between the drain and the 5th electric capacity 215 of electric crystal 255, so can obtain slope signal RMP at the 5th electric capacity 215.One the 3rd comparer 205, it has a positive input terminal and couples mutually with the 5th electric capacity 215, and an output terminal of the 3rd comparer 205 is in order to output oscillation signal PLS, and it is that signal V is switched in decision _PWMSwitching frequency.One the 9th switch 232, one first termination is received a high threshold voltage V _H, and one first termination of 1 the tenth switch 233 is received a low threshold voltage V _L, one second end of the 9th switch 232 and the tenth switch 233 all is coupled in a negative input end of the 3rd comparer 205.One phase inverter 260, one input end couple an output terminal of the 3rd comparer 205, and to produce anti-phase the 4th signal, it is an anti-phase oscillations signal/PLS.

Oscillation signal PLS controls the switching that octavo is closed the 231 and the tenth switch 233, and anti-phase oscillations signal/PLS then controls the switching that minion is closed the 230 and the 9th switch 232.Signal V is switched in the capacitance decision of the resistance value of the 3rd sequential resistance 210 and the 5th electric capacity 215 _PWMSwitching cycle T, it can be expressed as:

$T=\frac{{\mathrm{<figure-callout\; id="215"\; label="C"\; filenames="C20061005726800401.png"\; state="\{\{state\}\}">C</figure-callout>}}_{215}\&times;V_{\mathrm{<figure-callout\; id="2"\; label="OSC\; V\; REF"\; filenames="C20061005726800421.png"\; state="\{\{state\}\}">OSC</figure-callout>}}}{V_{\mathrm{REF}}}={\mathrm{<figure-callout\; id="210"\; label="R"\; filenames="C20061005726800401.png"\; state="\{\{state\}\}">R</figure-callout>}}_{210}\&times;{\mathrm{<figure-callout\; id="215"\; label="C"\; filenames="C20061005726800401.png"\; state="\{\{state\}\}">C</figure-callout>}}_{215}\&times;\frac{V_{\mathrm{OSC}}}{V_{\mathrm{REF}2}}---\left(14\right)$

Wherein, V _OSC=V _H-V _L, R ₂₁₀Be the resistance value of the 3rd sequential resistance 210, C ₂₁₅It is the capacitance of the 5th electric capacity 215.Oscillation signal PLS more is sent to one first pulse wave and produces circuit 270 and one second pulse wave generation circuit 290, remove signal CLR to be used for producing a sample signal SMP and respectively, sample signal SMP and removing signal CLR transfer to waveform detection circuit 300 and integrating circuit 500.

Seeing also Fig. 8, is the circuit diagram of the pulse wave generation circuit of embodiments of the invention.First pulse wave of the present invention produces circuit 270 and second pulse wave generation circuit 290 is as shown in Figure 8.Pulse wave generation circuit of the present invention includes a time delay circuit 350 and and clicks signal generating circuit 360, and the output signal that pulse wave produces circuit is to click signal.Time delay circuit 350 includes a phase inverter 351, a fixed current source 352, an electric crystal 353, an electric capacity 354 and one and lock 355.One input end of phase inverter 351 receives an input signal, and it is oscillation signal PLS, and an output terminal of phase inverter 351 couples the gate of electric crystal 353.Fixed current source 352 is coupled in the drain and the supply voltage V of electric crystal 353 _CCBetween, the source electrode of electric crystal 353 is coupled to earth terminal.Electric capacity 354 is coupled between the drain and earth terminal of electric crystal 353.And an input end coupling capacitance 354 of lock 355, another input end receives oscillation signal PLS.One electric current I in fixed current source 352 ₃₅₂With the time of the capacitance of electric capacity 354 decision conduction delay.

Click signal generating circuit 360, it includes a phase inverter 361, a fixed current source 362, an electric crystal 363, an electric capacity 364, one and a lock 365 and a phase inverter 366, one output terminal of time delay circuit 350 is coupled to an input end of clicking signal generating circuit 360, and an output terminal of clicking signal generating circuit 360 is the output terminal that pulse wave produces circuit.One input end of phase inverter 361 couples and the output terminal of lock 355, and an output terminal of phase inverter 361 couples the gate of electric crystal 363.Fixed current source 362 is coupled in the drain and the supply voltage V of electric crystal 363 _CCBetween, the source electrode of electric crystal 363 is coupled to earth terminal.Electric capacity 364 is coupled between the drain and earth terminal of electric crystal 363.One input end of phase inverter 366 is coupled to electric capacity 364, one output terminal of phase inverter 366 couples and an input end of lock 365, and another input end of lock 365 is coupled to and the output terminal of lock 355, an output terminal that reaches lock 365 is that signal is clicked in output, and it is this sample signal SMP or this removing signal CLR.One electric current I in fixed current source 362 ₃₆₂Click the pulse bandwidth of signal with the decision of the capacitance of electric capacity 364.

The waveform that the sample signal SMP of first pulse wave generation circuit 270 and second pulse wave produce the removing signal CLR of circuit 290 is as shown in Figure 9.The positive edge of the oscillation signal PLS that the present invention is produced by second control circuit 200, and trigger first pulse wave produce circuit 270 through one first time delay T _D1After, i.e. generation has one first pulse bandwidth T _P1Sample signal SMP, the positive edge of same time oscillation signal PLS also trigger second pulse wave produce circuit 290 through one second time delay T _D2After, generation immediately has one second pulse bandwidth T _P2Removing signal CLR.

Seeing also Figure 10, is the circuit diagram of the waveform detection circuit of embodiments of the invention.Waveform detection circuit 300 of the present invention comprises one second comparer 310, and the one positive input terminal couples the current sense end VS of controller 70, in order to receive primary side switch current signal V _IP, primary side switch current signal V _IPBe and primary side switch current I _PProportional, a negative input end of second comparer 310 couples one first electric capacity, 321, one first electric capacity 321 and applies to nip primary side switch current signal V _IPPeak value.One first fixed current source 305, it couples supply voltage V _CCIn order to first electric capacity 321 is charged, one first switch 311 is coupled between the first fixed current source 305 and first electric capacity 321, and the switching of first switch 311 is controlled by an output signal of second comparer 310, and first electric capacity 321 like this promptly can produce a peak value signal V _SP, itself and electric current I shown in Figure 2 _PA, I _PBSummation proportional.

One first electric crystal 308, it is and first electric capacity, 321 coupled in parallel that in order to control 321 discharges of first electric capacity, the gate of first electric crystal 308 receives removes signal CLR, the source electrode that the drain of first electric crystal 308 couples first electric capacity, 321, the first electric crystals 308 then is coupled to earth terminal.One the 3rd switch 312, it is coupled between first electric capacity 321 and one the 3rd electric capacity 322, and the 3rd switch 312 is controlled by sample signal SMP, in order to periodically from this peak value signal of first electric capacity 321 sampling V _SPTo the 3rd electric capacity 322, so can obtain the first current waveform signal V at the 3rd electric capacity 322 _A

One second switch 314, it is coupled between current sense end VS and one second electric capacity 324, that is is coupled between the current sensing resistor 30 and second electric capacity 324, and second electric capacity 324 applies to keep primary side switch current signal V _IPInitial value, so second electric capacity 324 promptly can produce an initial signal V _SI, it is and electric current I shown in Figure 2 _PBProportional.One the 4th switch 315, it is coupled between second electric capacity 324 and one the 4th electric capacity 325, and the 4th switch 325 is controlled by sample signal SMP, with periodically from the initial signal V of second electric capacity 324 sampling _SITo the 4th electric capacity 325, so the 4th electric capacity 325 promptly can produce the second current waveform signal V _BOne the 3rd pulse wave produces circuit 330, and its circuit is same as circuit shown in Figure 8, and the 3rd pulse wave produces circuit 330 and receives switching signal V _PWM, storing signal STR to produce one, it is the switching of pulse wave signal in order to control second switch 314, primary side switch current signal V is used to take a sample _IPInitial value, postpone to switch the positive edge of signal and produce according to one so store signal STR, postpone to switch signal promptly according to switching signal V _PWMProduce through the positive edge after the time delay, be used to this time delay avoid from switching the jamming incoherent signal sampling of spike.In this case, second switch 314 is according to switching signal V _PWMSampling primary side switch current signal V _IPInitial value.

Seeing also Figure 11, is the circuit diagram of the integrating circuit of embodiments of the invention.As shown in the figure, integrating circuit 500 includes one first voltage to current converter circuit 509, it includes one first sequential operation amplifier 510, one first sequential resistance 511, one first sequential electric crystal 512, one first current mirror and one second current mirror, to be used for according to the second current waveform signal V _BVoltage, and produce one first programmed charging current I ₅₁₉First current mirror, it includes electric crystal 514,515,519, the second current mirrors and then includes electric crystal 516,517.One positive input terminal of the first sequential operation amplifier 510 receives the second current waveform signal V _B, a negative input end of the big device 510 of first sequential operation couples the source electrode of the first sequential electric crystal 512, and an output terminal of the big device 510 of first sequential operation couples the gate of the first sequential electric crystal 512.The drain of the first sequential electric crystal 512 is exported one first programmed electric current I ₅₁₂The first sequential resistance 511 is coupled between the source electrode and earth terminal of the first sequential electric crystal 512.

First current mirror is used to shine upon the first programmed electric current I ₅₁₂Shine upon electric current I and produce one first ₅₁₅With the first programmed charging current I ₅₁₉, the source electrode of electric crystal 514,515,519 all couples supply voltage V _CC, the gate of electric crystal 514,515,519 is coupled in together mutually with the drain of electric crystal 514, and the drain of electric crystal 514 couples the drain of the first sequential electric crystal 512, and the drain of electric crystal 515,519 produces the first mapping electric current I respectively ₅₁₅With the first programmed charging current I ₅₁₉Second current mirror is used to shine upon the first mapping electric current I ₅₁₅, and produce one second mapping electric current I ₅₁₇, the source electrode of electric crystal 516,517 all is coupled to earth terminal, and the gate of electric crystal 516,517 is coupled in together mutually with the drain of electric crystal 516, and the drain of electric crystal 516 couples the drain of electric crystal 515, and the drain of electric crystal 517 produces the second mapping electric current I ₅₁₇

One second voltage is to current converter circuit 529, it includes one second sequential operation amplifier 530, one second sequential resistance 531, one second sequential electric crystal 532, one the 3rd current mirror, one the 4th current mirror and one the 5th current mirror, to be used for according to the first current waveform signal V _AWith the second current waveform signal V _BVoltage, and produce one second programmed charging current I ₅₃₉The 3rd current mirror, the 4th current mirror and the 5th current mirror include plural electric crystal 534-539.One positive input terminal of the second sequential operation amplifier 530 receives the first current waveform signal V _AOne negative input end of the second sequential operation amplifier 530 couples the source electrode of the second sequential electric crystal 532, one output terminal of the second sequential operation amplifier 530 couples the gate of the second sequential electric crystal 532, and the drain of the second sequential electric crystal 532 is exported one second programmed electric current I ₅₃₂The second sequential resistance 531 is coupled between the source electrode and earth terminal of the second sequential electric crystal 532.

The 3rd current mirror, it includes electric crystal 534,535 and is used to shine upon the second programmed electric current I ₅₃₂, to produce one the 3rd mapping electric current I ₅₃₅, the source electrode of electric crystal 534,535 all is coupled to supply voltage V _CC, the gate of electric crystal 534,535 is coupled in together mutually with the drain of electric crystal 534,532, and the drain of electric crystal 535 produces the 3rd mapping electric current I ₅₃₅The 4th current mirror, it includes electric crystal 536,537, is used for according to the 3rd mapping electric current I ₅₃₅With the second mapping electric current I ₅₁₇, and produce one the 4th mapping electric current I ₅₃₇The source electrode of electric crystal 536,537 all is coupled in earth terminal, and the gate of electric crystal 536,537 is coupled in together mutually with the drain of electric crystal 536, and the drain of electric crystal 536 couples the drain of electric crystal 535,517, and the drain of electric crystal 537 produces the 4th mapping electric current I ₅₃₇

The 4th mapping electric current I ₅₃₇Can be expressed as I ₅₃₇=I ₅₃₅-I ₅₁₇Because the physical dimension of electric crystal 536 is the twice of the physical dimension of electric crystal 537, so the 4th mapping electric current I ₅₃₇It is electric current I ₅₃₆Half.The 5th current mirror, it includes electric crystal 538,539, is used to shine upon the 4th mapping electric current I ₅₃₇, and produce the second programmed charging current I ₅₃₉, the source electrode of electric crystal 538,539 all couples supply voltage V _CC, the gate of electric crystal 538,539 is coupled in together mutually with the drain of electric crystal 538,537, and the drain of electric crystal 539 produces the second programmed charging current I ₅₃₉The drain of electric crystal 519,539 couples mutually, is used for the addition first programmed charging current I ₅₁₉With the second programmed charging current I ₅₃₉, and produce an average current signal I _AVG, average current signal I _AVGCan be expressed as:

$I_{\mathrm{AVG}}=\frac{V_B}{R_{511}}\&times;\frac{(\frac{V_A}{R_{531}}-\frac{V_B}{R_{511}})}{2}---\left(15\right)$

Wherein, R ₅₁₁With R ₅₃₁Be respectively the resistance value of the first sequential resistance 511 and the second sequential resistance 531.

The first sequential resistance 511, the second sequential resistance 531 and a sequential electric capacity 570 are time constants of decision integrating circuit 500, wherein the second sequential resistance 531 is relevant with the first sequential resistance 511, resistance value as the second sequential resistance 531 is set at the resistance value that equals the first sequential resistance 511, so equation (15) can be rewritten as:

$I_{\mathrm{AVG}}=\frac{1}{R_{511}}\&times;(V_B+\frac{V_A-V_B}{2})---\left(16\right)$

One the 5th switch 550, it is coupled between the drain and sequential electric capacity 570 of electric crystal 519,539, the switching of the 5th switch 550 is controlled by the oscillation signal PLS by a phase inverter 520, it is that expression the 5th switch 550 is controlled by anti-phase oscillations signal/PLS, controls the switching of the 5th switch 550 according to oscillation signal PLS so the 5th switch 550 also can be said so.One the 3rd electric crystal 560, its coupled in parallel sequential electric capacity 570, with 570 discharges of control timing electric capacity, the gate of the 3rd electric crystal 560 receives removes signal CLR, and the source electrode of the 3rd electric crystal 560 is coupled in earth terminal, and drain then couples sequential electric capacity 570.One the 6th switch 551, it is coupled between a sequential electric capacity 570 and the output capacitance 571, the switching of the 6th switch 551 is controlled by sample signal SMP, with the voltage that is used for timing electric capacity 570 periodically to output capacitance 571, so output capacitance 571 is to produce integration signal V _XIntegrating circuit 500 utilizes according to a time signal average current signal I _AVGIntegration is to produce integration signal V _X, wherein time signal is anti-phase oscillations signal/PLS, so integrating circuit 500 also can be said so according to oscillation signal PLS to average current signal I _AVGCarry out integration, integration signal V _XCan be expressed as:

$V_X=\frac{1}{R_{511}{C}_{570}}\&times;(V_B+\frac{V_A-V_B}{2})\&times;T_S---\left(17\right)$

Wherein, C ₅₇₀Capacitance for sequential electric capacity 570.

Can learn integration signal V according to Fig. 5, Fig. 7, Figure 10 and embodiment shown in Figure 11 _XBe and secondary side switch current I _SOutput current I with power supply unit _ORelevant, so equation (11) can be rewritten as follows:

$V_X=m\&times;\frac{T_{\mathrm{NS}}}{T_{\mathrm{NP}}}\&times;R_S\&times;I_O---\left(18\right)$

Wherein, m can be expressed as:

$m={\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="C20061005726800421.png"\; state="\{\{state\}\}">D</figure-callout>}}^2\&times;\frac{R_{210}{C}_{215}}{R_{511}{C}_{570}}\&times;\frac{V_{\mathrm{OSC}}}{V_{\mathrm{REF}2}}---\left(19\right)$

Wherein, D represents to switch signal V _PWMMaximal duty cycle, it is pulse bandwidth and the switching cycle T that is decided by anti-phase oscillations signal/PLS.The resistance value R of the first sequential resistance 511 ₅₁₁Resistance value R with the 3rd sequential resistance 210 ₂₁₀Relevant, the capacitance C of sequential electric capacity 570 ₅₇₀Capacitance C with the 5th electric capacity 215 ₂₁₅Relevant, so integration signal V _XOutput current I with power supply unit _OProportional.

The above, it only is a preferred embodiment of the present invention, be not to be used for limiting scope of the invention process,, all should be included in the claim of the present invention so the equalization of doing according to the described shape of the present patent application claim, structure, feature and principle changes and modifies such as.

Claims (18)

1. a controller in order to control an output current, is applied in the power supply unit of primary side control, and it includes:

One waveform detection circuit, couple a current sensing device of this power supply unit, be used to the primary side switch current signal that this current sensing device produced of taking a sample, to produce a current waveform signal, this current sensing device receives a primary side switch current of a transformer of this power supply unit, produces this primary side switch current signal;

One second control circuit produces an oscillation signal and is used to determine that one switches a switching frequency of signal, and this switching signal is used to switch this transformer and the output current of adjusting this power supply unit;

One integrating circuit receives this current waveform signal, produces an average current signal, and according to a time signal to this average current signal integration, produce an integration signal, this time signal produces according to this oscillation signal;

One error amplifier includes one first operational amplifier and one first reference voltage, and this first operational amplifier receives this first reference voltage and this integration signal, produces an output signal;

One first comparer according to this output signal of this error amplifier, produces a replacement signal, and to control a pulse bandwidth of this switching signal, this switching signal is adjusted this output current of this power supply unit by this first reference voltage;

One pulse width modulation circuit according to this replacement signal and this oscillation signal, produces this switching signal.

2. as the 1st described controller of claim, it is characterized in that a time constant of this integrating circuit is relevant with the switching cycle that this switches signal.

3. as the 1st described controller of claim, it is characterized in that this waveform detection circuit includes:

One second comparer, the one positive input terminal couples this current sensing device, receives this primary side switch current signal, and this primary side switch current signal and this primary side switch current are proportional;

One first electric capacity couples a negative input end of this second comparer, and this first electric capacity is in order to a peak value of this primary side switch current signal of nip;

One first fixed current source is used for this first electric capacity charging;

One first switch is coupled between this first fixed current source and this first electric capacity, and this first switch is controlled by an output signal of this second comparer;

One first electric crystal, coupled in parallel are used for this first capacitor discharge in this first electric capacity;

One second electric capacity, an initial value of this primary side switch current signal of nip;

One second switch, be coupled between this current sensing device and this second electric capacity, this second switch is controlled by one and stores signal, this storage signal is a pulse wave signal, and produce according to a positive edge that postpone to switch signal, this delay switching signal is to produce according to the positive edge of this switching signal after a time delay;

One the 3rd electric capacity;

One the 3rd switch is coupled between this first electric capacity and the 3rd electric capacity, and a voltage of this first electric capacity that is used for periodically taking a sample is to the 3rd electric capacity, to produce one first current waveform signal at the 3rd electric capacity;

One the 4th electric capacity;

One the 4th switch is coupled between this second electric capacity and the 4th electric capacity, and a voltage of this second electric capacity that is used for periodically taking a sample is to the 4th electric capacity, to produce one second current waveform signal at the 4th electric capacity;

Wherein, this current waveform signal comprises this first current waveform signal and this second current waveform signal.

4. as the 1st described controller of claim, it is characterized in that this integrating circuit includes:

One first voltage is to current converter circuit, one first sequential operation amplifier, one first sequential resistance, one first sequential electric crystal and plural electric crystal are set, this first sequential operation amplifier, this first sequential resistance couple this first sequential electric crystal with this electric crystal of plural number, be used for one second current waveform signal, produce one first programmed charging current according to this current waveform signal;

One second voltage is to current converter circuit, couple this first voltage to current converter circuit, and one second sequential operation amplifier, one second sequential resistance, one second sequential electric crystal and plural electric crystal be set, this second sequential operation amplifier, this second sequential resistance couple this second sequential electric crystal with this electric crystal of plural number, be used for one first current waveform signal and this second current waveform signal, produce one second programmed charging current according to this current waveform signal;

One sequential electric capacity;

One the 5th switch, the one end couple this first voltage to current converter circuit and this second voltage to current converter circuit, to receive this average current signal, this average current signal is the summation of this first programmed charging current and this second programmed charging current, the other end of the 5th switch couples this sequential electric capacity, and the 5th switch is controlled by this time signal;

One the 3rd electric crystal, coupled in parallel are used to control this sequential capacitor discharge in this sequential electric capacity;

One output capacitance;

One the 6th switch is coupled between this sequential electric capacity and this output capacitance, and a voltage of this sequential electric capacity that is used for periodically taking a sample is to this output capacitance, to produce this integration signal in this output capacitance.

5. as the 4th described controller of claim, it is characterized in that this first voltage is relevant to this second sequential resistance of current converter circuit with this second voltage to this first sequential resistance of current converter circuit.

6. as the 1st described controller of claim, it is characterized in that this second control circuit includes:

One tertiary voltage is to current converter circuit, one the 3rd sequential operation amplifier, one the 3rd sequential resistance and one the 3rd sequential electric crystal are set, the 3rd sequential operation amplifier and the 3rd sequential resistance are coupled to the 3rd sequential electric crystal, be used for according to one second reference voltage, produce a reference current, the 3rd sequential operation amplifier receives this second reference voltage;

One the 6th current mirror according to this reference current, produces a second control circuit charging current;

One the 7th current mirror according to this reference current, produces a second control circuit discharge current;

One the 5th electric capacity;

One minion is closed, and is coupled between the 6th current mirror and the 5th electric capacity;

One octavo is closed, and is coupled between the 7th current mirror and the 5th electric capacity;

One the 3rd comparer, the one positive input terminal couples the 5th electric capacity, and an output terminal of the 3rd comparer produces this oscillation signal;

One the 9th switch is coupled between the negative input end of a high threshold voltage and the 3rd comparer;

The tenth switch is coupled between this negative input end of a low threshold voltage and the 3rd comparer;

One phase inverter, one input end couple this output terminal of the 3rd comparer, and an output terminal of this phase inverter produces an anti-phase oscillations signal, are used to control the switching of this minion pass and the 9th switch;

Wherein, this octavo pass is controlled by this oscillation signal with the switching of the tenth switch.

7. a controller in order to control an output current, is applied in the power supply unit of primary side control, and it includes:

One waveform detection circuit couples a current sensing device of this power supply unit, and a primary side switch current signal of a transformer of this power supply unit that is used to take a sample produces a current waveform signal;

One second control circuit periodically produces an oscillation signal;

One integrating circuit receives this current waveform signal and produces an integration signal according to a time signal, and this time signal produces according to this oscillation signal;

One first control circuit, include an error amplifier, one first comparer and a pulse bandwidth and adjust circuit, this error amplifier receives one first reference voltage and this integration signal, produce an output signal, this first comparer is according to this output signal, produce a replacement signal, to control a pulse bandwidth of a switching signal, this pulse bandwidth is adjusted circuit according to this replacement signal and this oscillation signal, produce this switching signal, this switching signal is used to switch this transformer and the output current of adjusting this power supply unit by this first reference voltage.

8. as the 7th described controller of claim, it is characterized in that a time constant of this integrating circuit is relevant with the switching cycle that this switches signal.

9. as the 7th described controller of claim, it is characterized in that this waveform detection circuit includes:

One second comparer, the one positive input terminal couples this current sensing device, receives this primary side switch current signal, and a primary side switch current of this primary side switch current signal and this transformer is proportional;

One first electric capacity couples a negative input end of this second comparer, and this first electric capacity is in order to a peak value of this primary side switch current signal of nip;

One first fixed current source is used for this first electric capacity charging;

One first switch is coupled between this first fixed current source and this first electric capacity, and this first switch is controlled by an output signal of this second comparer;

One first electric crystal, coupled in parallel are used for this first capacitor discharge in this first electric capacity;

One second electric capacity, an initial value of this primary side switch current signal of nip;

One second switch, be coupled between this current sensing device and this second electric capacity, this second switch is controlled by one and stores signal, this storage signal is a pulse wave signal, and produce according to a positive edge that postpone to switch signal, this delay switching signal is to produce according to the positive edge of this switching signal after a time delay;

One the 3rd electric capacity;

One the 3rd switch is coupled between this first electric capacity and the 3rd electric capacity, and a voltage of this first electric capacity that is used for periodically taking a sample is to the 3rd electric capacity, to produce one first current waveform signal at the 3rd electric capacity;

One the 4th electric capacity;

One the 4th switch is coupled between this second electric capacity and the 4th electric capacity, and a voltage of this second electric capacity that is used for periodically taking a sample is to the 4th electric capacity, to produce one second current waveform signal at the 4th electric capacity;

Wherein, this current waveform signal comprises this first current waveform signal and this second current waveform signal.

10. as the 7th described controller of claim, it is characterized in that this integrating circuit includes:

One first voltage is to current converter circuit, one first sequential operation amplifier, one first sequential resistance, one first sequential electric crystal and plural electric crystal are set, this first sequential operation amplifier, this first sequential resistance couple this first sequential electric crystal with this electric crystal of plural number, be used for one second current waveform signal, produce one first programmed charging current according to this current waveform signal;

One second voltage is to current converter circuit, couple this first voltage to current converter circuit, and one second sequential operation amplifier, one second sequential resistance, one second sequential electric crystal and plural electric crystal be set, this second sequential operation amplifier, this second sequential resistance couple this second sequential electric crystal with this electric crystal of plural number, be used for one first current waveform signal and this second current waveform signal, produce one second programmed charging current according to this current waveform signal;

One sequential electric capacity;

One the 5th switch, the one end couple this first voltage to current converter circuit and this second voltage to current converter circuit, to receive an average current signal, this average current signal is the summation of this first programmed charging current and this second programmed charging current, the other end of the 5th switch couples this sequential electric capacity, and the 5th switch is controlled by this time signal;

One the 3rd electric crystal, coupled in parallel are used to control this sequential capacitor discharge in this sequential electric capacity;

One output capacitance;

One the 6th switch is coupled between this sequential electric capacity and this output capacitance, and a voltage of this sequential electric capacity that is used for periodically taking a sample is to this output capacitance, to produce this integration signal in this output capacitance.

11., it is characterized in that this first voltage is relevant to this second sequential resistance of current converter circuit with this second voltage to this first sequential resistance of current converter circuit as the 10th described controller of claim.

12., it is characterized in that this second control circuit includes as the 7th described controller of claim:

One tertiary voltage is to current converter circuit, one the 3rd sequential operation amplifier, one the 3rd sequential resistance and one the 3rd sequential electric crystal are set, the 3rd sequential operation amplifier and the 3rd sequential resistance are coupled to the 3rd sequential electric crystal, be used for producing a reference current according to one second reference voltage, the 3rd sequential operation amplifier receives this second reference voltage;

One the 6th current mirror according to this reference current, produces a second control circuit charging current;

One the 7th current mirror according to this reference current, produces a second control circuit discharge current;

One the 5th electric capacity;

One minion is closed, and is coupled between the 6th current mirror and the 5th electric capacity;

One octavo is closed, and is coupled between the 7th current mirror and the 5th electric capacity;

One the 3rd comparer, the one positive input terminal couples the 5th electric capacity, and an output terminal of the 3rd comparer produces this oscillation signal;

One the 9th switch is coupled between the negative input end of a high threshold voltage and the 3rd comparer;

The tenth switch is coupled between this negative input end of a low threshold voltage and the 3rd comparer;

One phase inverter, one input end couple this output terminal of the 3rd comparer, and an output terminal of this phase inverter produces an anti-phase oscillations signal, are used to control the switching of this minion pass and the 9th switch;

Wherein, this octavo pass is controlled by this oscillation signal with the switching of the tenth switch.

13. a controller in order to control an output current, is applied in the power supply unit of primary side control, it includes:

One waveform detection circuit, the primary side switch current signal according to a transformer of this power supply unit produces a current waveform signal;

One integrating circuit according to this a current waveform signal and an oscillation signal, produces an integration signal;

One first control circuit, include an error amplifier, one first comparer and a pulse bandwidth and adjust circuit, this error amplifier receives one first reference voltage and this integration signal, produce an output signal, this first comparer is according to this output signal, produce a replacement signal, to control a pulse bandwidth of a switching signal, this pulse bandwidth is adjusted circuit according to this replacement signal and this oscillation signal, produce this switching signal, this switching signal is used to switch this transformer and the output current of adjusting this power supply unit by this first reference voltage;

One second control circuit produces this oscillation signal, is used to determine that one of this switching signal switches frequency.

14., it is characterized in that a time constant of this integrating circuit is relevant with the switching cycle that this switches signal as the 13rd described controller of claim.

15., it is characterized in that this waveform detection circuit includes as the 13rd described controller of claim:

One second comparer is detected this primary side switch current signal;

One first electric capacity, a peak value of this primary side switch current signal of nip;

One second electric capacity, an initial value of this primary side switch current signal of nip;

One second switch, one termination are received this primary side switch current signal, and the other end couples this second electric capacity, and this second switch is taken a sample this primary side switch current signal to this second electric capacity according to this switching signal;

One the 3rd electric capacity;

One the 3rd switch is coupled between this first electric capacity and the 3rd electric capacity, and a voltage of this first electric capacity that is used for periodically taking a sample is to the 3rd electric capacity, to produce one first current waveform signal at the 3rd electric capacity;

One the 4th electric capacity;

One the 4th switch is coupled between this second electric capacity and the 4th electric capacity, and a voltage of this second electric capacity that is used for periodically taking a sample is to the 4th electric capacity, to produce one second current waveform signal at the 4th electric capacity;

Wherein, this current waveform signal comprises this first current waveform signal and this second current waveform signal.

16., it is characterized in that this integrating circuit includes as the 13rd described controller of claim:

One first voltage is to current converter circuit, one first sequential operation amplifier, one first sequential resistance, one first sequential electric crystal and plural electric crystal are set, this first sequential operation amplifier, this first sequential resistance couple this first sequential electric crystal with this electric crystal of plural number, be used for one second current waveform signal, produce one first programmed charging current according to this current waveform signal;

One second voltage is to current converter circuit, couple this first voltage to current converter circuit, and one second sequential operation amplifier, one second sequential resistance, one second sequential electric crystal and plural electric crystal be set, this second sequential operation amplifier, this second sequential resistance couple this second sequential electric crystal with this electric crystal of plural number, be used for one first current waveform signal and this second current waveform signal, produce one second programmed charging current according to this current waveform signal;

One sequential electric capacity;

One the 5th switch, the one end couple this first voltage to current converter circuit and this second voltage to current converter circuit, to receive an average current signal, this average current signal is the summation of this first programmed charging current and this second programmed charging current, the other end of the 5th switch couples this sequential electric capacity, and the 5th switch is controlled by this oscillation signal;

One output capacitance;

One the 6th switch is coupled between this sequential electric capacity and this output capacitance, and a voltage of this sequential electric capacity that is used for periodically taking a sample is to this output capacitance, to produce this integration signal in this output capacitance.

17., it is characterized in that this first voltage is relevant to this second sequential resistance of current converter circuit with this second voltage to this first sequential resistance of current converter circuit as the 16th described controller of claim.

18., it is characterized in that this second control circuit includes as the 13rd described controller of claim:

One tertiary voltage is to current converter circuit, one the 3rd sequential operation amplifier, one the 3rd sequential resistance and one the 3rd sequential electric crystal are set, the 3rd sequential operation amplifier and the 3rd sequential resistance are coupled to the 3rd sequential electric crystal, be used for according to one second reference voltage, produce a reference current, the 3rd sequential operation amplifier receives this second reference voltage;

One the 6th current mirror according to this reference current, produces a second control circuit charging current;

One the 7th current mirror according to this reference current, produces a second control circuit discharge current;

One the 5th electric capacity;

One minion is closed, and is coupled between the 6th current mirror and the 5th electric capacity;

One octavo is closed, and is coupled between the 7th current mirror and the 5th electric capacity;

One the 3rd comparer, the one positive input terminal couples the 5th electric capacity, and an output terminal of the 3rd comparer produces this oscillation signal;

One the 9th switch is coupled between the negative input end of a high threshold voltage and the 3rd comparer;

The tenth switch is coupled between this negative input end of a low threshold voltage and the 3rd comparer;

One phase inverter, one input end couple this output terminal of the 3rd comparer, and an output terminal of this phase inverter produces an anti-phase oscillations signal, are used to control the switching of this minion pass and the 9th switch;

Wherein, this octavo pass is controlled by this oscillation signal with the switching of the tenth switch.

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