CN100536124C - 互连结构及其形成方法 - Google Patents
互连结构及其形成方法 Download PDFInfo
- Publication number
- CN100536124C CN100536124C CNB2005100798239A CN200510079823A CN100536124C CN 100536124 C CN100536124 C CN 100536124C CN B2005100798239 A CNB2005100798239 A CN B2005100798239A CN 200510079823 A CN200510079823 A CN 200510079823A CN 100536124 C CN100536124 C CN 100536124C
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- dielectric layer
- opening
- lining
- interconnection structure
- metal
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- 239000004020 conductor Substances 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims description 39
- 239000002184 metal Substances 0.000 claims description 39
- 238000005452 bending Methods 0.000 claims description 25
- 238000000151 deposition Methods 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 21
- 239000000203 mixture Substances 0.000 claims description 18
- 238000005516 engineering process Methods 0.000 claims description 13
- 238000010849 ion bombardment Methods 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 150000004767 nitrides Chemical class 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 229910045601 alloy Inorganic materials 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 5
- RTZKZFJDLAIYFH-UHFFFAOYSA-N ether Substances CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 claims description 5
- -1 poly (arylene ether Chemical compound 0.000 claims description 5
- 239000003870 refractory metal Substances 0.000 claims description 5
- 239000005368 silicate glass Substances 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 238000012986 modification Methods 0.000 claims description 4
- 230000004048 modification Effects 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 229920005591 polysilicon Polymers 0.000 claims description 2
- 230000000717 retained effect Effects 0.000 claims description 2
- 229910021332 silicide Inorganic materials 0.000 claims description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 229910001092 metal group alloy Inorganic materials 0.000 claims 1
- 239000010410 layer Substances 0.000 abstract description 69
- 238000012360 testing method Methods 0.000 abstract description 4
- 239000011229 interlayer Substances 0.000 abstract description 2
- 238000005530 etching Methods 0.000 description 19
- 239000010949 copper Substances 0.000 description 8
- 239000000654 additive Substances 0.000 description 5
- 230000000996 additive effect Effects 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 230000014509 gene expression Effects 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000000224 chemical solution deposition Methods 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 4
- 239000012212 insulator Substances 0.000 description 4
- 230000007935 neutral effect Effects 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 230000002349 favourable effect Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 125000003118 aryl group Chemical group 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 239000012634 fragment Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 239000005864 Sulphur Substances 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 125000002915 carbonyl group Chemical group [*:2]C([*:1])=O 0.000 description 1
- 239000003153 chemical reaction reagent Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 150000003457 sulfones Chemical class 0.000 description 1
- 150000003462 sulfoxides Chemical class 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76844—Bottomless liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76847—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned within the main fill metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76865—Selective removal of parts of the layer
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims (30)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/964,882 US7282802B2 (en) | 2004-10-14 | 2004-10-14 | Modified via bottom structure for reliability enhancement |
US10/964,882 | 2004-10-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1761056A CN1761056A (zh) | 2006-04-19 |
CN100536124C true CN100536124C (zh) | 2009-09-02 |
Family
ID=36179885
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100798239A Expired - Fee Related CN100536124C (zh) | 2004-10-14 | 2005-06-29 | 互连结构及其形成方法 |
Country Status (3)
Country | Link |
---|---|
US (3) | US7282802B2 (zh) |
CN (1) | CN100536124C (zh) |
TW (1) | TWI349989B (zh) |
Families Citing this family (29)
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US20070126120A1 (en) * | 2005-12-06 | 2007-06-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device |
DE102006004412B3 (de) * | 2006-01-31 | 2007-08-30 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Erhöhen der Ätzselektivität in einer Kontaktstruktur in Halbleiterbauelementen |
US7439624B2 (en) | 2006-05-18 | 2008-10-21 | International Business Machines Corporation | Enhanced mechanical strength via contacts |
DE102007004860B4 (de) * | 2007-01-31 | 2008-11-06 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung einer Kupfer-basierten Metallisierungsschicht mit einer leitenden Deckschicht durch ein verbessertes Integrationsschema |
US7859113B2 (en) * | 2007-02-27 | 2010-12-28 | International Business Machines Corporation | Structure including via having refractory metal collar at copper wire and dielectric layer liner-less interface and related method |
US8030778B2 (en) * | 2007-07-06 | 2011-10-04 | United Microelectronics Corp. | Integrated circuit structure and manufacturing method thereof |
JP2009111251A (ja) * | 2007-10-31 | 2009-05-21 | Tohoku Univ | 半導体装置およびその製造方法 |
US20090179328A1 (en) * | 2008-01-14 | 2009-07-16 | International Business Machines Corporation | Barrier sequence for use in copper interconnect metallization |
US7892968B2 (en) * | 2008-01-21 | 2011-02-22 | International Business Machines Corporation | Via gouging methods and related semiconductor structure |
US20090200674A1 (en) * | 2008-02-07 | 2009-08-13 | International Business Machines Corporation | Structure and method of forming transitional contacts between wide and thin beol wirings |
US8283250B2 (en) | 2008-12-10 | 2012-10-09 | Stats Chippac, Ltd. | Semiconductor device and method of forming a conductive via-in-via structure |
JP2010287831A (ja) * | 2009-06-15 | 2010-12-24 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
US7956463B2 (en) * | 2009-09-16 | 2011-06-07 | International Business Machines Corporation | Large grain size conductive structure for narrow interconnect openings |
US8551877B2 (en) * | 2012-03-07 | 2013-10-08 | Tokyo Electron Limited | Sidewall and chamfer protection during hard mask removal for interconnect patterning |
US9105638B2 (en) | 2013-11-11 | 2015-08-11 | International Business Machines Corporation | Via-fuse with low dielectric constant |
US20150255388A1 (en) | 2014-03-09 | 2015-09-10 | International Business Machines Corporation | Enhancement of iso-via reliability |
US20160071791A1 (en) * | 2014-09-09 | 2016-03-10 | Globalfoundries Inc. | Multimetal interlayer interconnects |
KR20160141034A (ko) * | 2015-05-27 | 2016-12-08 | 삼성전자주식회사 | 반도체 소자 및 반도체 소자의 제조 방법 |
US10170358B2 (en) | 2015-06-04 | 2019-01-01 | International Business Machines Corporation | Reducing contact resistance in vias for copper interconnects |
US10586732B2 (en) | 2016-06-30 | 2020-03-10 | International Business Machines Corporation | Via cleaning to reduce resistance |
US9786603B1 (en) * | 2016-09-22 | 2017-10-10 | International Business Machines Corporation | Surface nitridation in metal interconnects |
US10658318B2 (en) * | 2016-11-29 | 2020-05-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | Film scheme for bumping |
KR102402670B1 (ko) | 2017-06-26 | 2022-05-26 | 삼성전자주식회사 | 저항 구조체를 포함하는 반도체 소자 |
US10366919B2 (en) * | 2017-09-20 | 2019-07-30 | Globalfoundries Inc. | Fully aligned via in ground rule region |
US10559492B2 (en) | 2017-11-15 | 2020-02-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Patterning methods for semiconductor devices and structures resulting therefrom |
US10886226B2 (en) * | 2018-07-31 | 2021-01-05 | Taiwan Semiconductor Manufacturing Co, Ltd. | Conductive contact having staircase barrier layers |
EP3868184A4 (en) | 2018-10-29 | 2022-08-10 | CelLink Corporation | FLEXIBLE HYBRID CONNECTION CIRCUITS |
TWI764388B (zh) * | 2020-04-27 | 2022-05-11 | 台灣積體電路製造股份有限公司 | 積體電路晶片及其形成方法 |
US11694926B2 (en) * | 2020-04-27 | 2023-07-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Barrier free interface between beol interconnects |
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-
2004
- 2004-10-14 US US10/964,882 patent/US7282802B2/en not_active Expired - Fee Related
-
2005
- 2005-06-29 CN CNB2005100798239A patent/CN100536124C/zh not_active Expired - Fee Related
- 2005-10-03 TW TW094134501A patent/TWI349989B/zh not_active IP Right Cessation
-
2007
- 2007-08-15 US US11/839,258 patent/US20070281469A1/en not_active Abandoned
-
2008
- 2008-05-15 US US12/121,216 patent/US7906428B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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US20060081986A1 (en) | 2006-04-20 |
US20070281469A1 (en) | 2007-12-06 |
US7282802B2 (en) | 2007-10-16 |
CN1761056A (zh) | 2006-04-19 |
US7906428B2 (en) | 2011-03-15 |
TW200629519A (en) | 2006-08-16 |
TWI349989B (en) | 2011-10-01 |
US20080220608A1 (en) | 2008-09-11 |
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