CN100529773C - Integrate circuit system pressing impedance detection method - Google Patents
Integrate circuit system pressing impedance detection method Download PDFInfo
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- CN100529773C CN100529773C CNB2006100635753A CN200610063575A CN100529773C CN 100529773 C CN100529773 C CN 100529773C CN B2006100635753 A CNB2006100635753 A CN B2006100635753A CN 200610063575 A CN200610063575 A CN 200610063575A CN 100529773 C CN100529773 C CN 100529773C
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- integrated circuit
- feedback voltage
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- pressing impedance
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Abstract
The invention relates to an integrated circuit system press impedance testing method which comprises an integrated circuit system including a first integrated circuit and a second integrated circuit electrically connected with the first integrate circuit. Two pins of the first integrated circuit and two pins of the second integrated circuit corresponding connected with the first integrated circuit respectively form two branches. Every branch is formed by multi press impedance in series. The two pins of the first integrated circuit are connected, thus leading the two branches and a design essential resistance of the integrated circuit to form a series circuit. A first pin of the second integrate circuit inputs a testing voltage and a second pin of the second integrated circuit detects a feedback voltage. Whether the integrate circuit system press impedance is qualified is confirmed by judging the feedback voltage. The press impedance of the integrated circuit system is detected by the integrated circuit system press impedance testing method, thus ensuring the reliability of signal transmission of the electric equipment of the integrated circuit system.
Description
Technical field
The present invention relates to a kind of integrate circuit system pressing impedance detection method.
Background technology
At present, have advantages such as volume is little, integrated level is high, online convenience owing to integrated circuit and be widely used in the various electronic equipments, especially in liquid crystal indicator, integrated circuit more is widely used in the liquid crystal panel drive.Usually, liquid crystal panel comprises two opposing substrates and the liquid crystal layer that is clamped between two relative substrates, and is provided with circuit structures such as sweep trace, data line, thin film transistor (TFT), public electrode at a substrate surface.In order to drive the foregoing circuit structure, industry is often utilized COG (Chip OnGlass, glass flip chip) engages (Bonding) technology and COF (Chip On Film, membrane of flip chip) joining technique is realized corresponding joint of integrated circuit, glass substrate and printed circuit board (PCB) or flexible circuit board to be electrically connected, and provides the integrated circuit (IC) system of required driving voltage and working signal thereby constitute one for liquid crystal panel.
Seeing also Fig. 1, is a kind of side view of prior art integrated circuit (IC) system.This integrated circuit (IC) system 10 comprises one first integrated circuit 11, one second integrated circuit 12, a flexible circuit board 13 and a glass substrate 14.This first integrated circuit 11 utilizes the COG technology to be bonded on this glass substrate 14, this second integrated circuit 12 utilizes the COF technology to be bonded on this flexible circuit board 13, one end of this flexible circuit board 13 utilizes the COG technology to be bonded on this glass substrate 14 edges, and each pin of this first integrated circuit 11 is connected each pin of this second integrated circuit 12 via the metal routing (figure does not show) of this flexible circuit board 12, many electrically conducting transparent cablings (figure does not show) correspondence that these glass substrate 14 edges are provided with successively.
Seeing also Fig. 2, is the equivalent circuit diagram of integrated circuit (IC) system 10 shown in Figure 1.Usually, between this first integrated circuit 11 and this glass substrate 14, between this second integrated circuit 12 and this flexible circuit board 13, when utilizing COF or COG technology to engage between this flexible circuit board 13 and this glass substrate 14, can produce certain pressing impedance at abutting end.
Two pin ones 23,124 with second integrated circuit 12 of two pin ones, 13, the 114 corresponding connections with it of this first integrated circuit 11 are example, if two pin ones 13,114 of this first integrated circuit 11 produce two first pressing impedance R1, R4 respectively when engaging with this glass substrate 14, this flexible circuit board 13 produces two second pressing impedance R2, R5 when engaging with glass substrate 14, two pin ones 23,124 of this second integrated circuit 12 produce two the 3rd pressing impedance R3, R6 respectively when engaging with this flexible circuit board 13.
Usually, when said integrated circuit system 10 is applied in each electronic equipment, industry can be according to experience or the one maximum pressing impedance of production requirements set, when the resistance sum of the pressing impedance R1 that produces when this integrated circuit (IC) system 10, R2, R3, R4, R5, R6 surpasses this maximum pressing impedance, then can influence working signal via 10 transmission of this integrated circuit (IC) system, to cause working signal damaged when serious, influence the signal transmission reliability of electronic equipment.
Summary of the invention
In order to solve the immesurable problem of integrate circuit system pressing impedance in the prior art, be necessary to provide a kind of whether qualified integrate circuit system pressing impedance detection method of integrate circuit system pressing impedance that detects.
A kind of integrate circuit system pressing impedance detection method, it comprises: step 1, one integrated circuit (IC) system is provided, it comprises one first integrated circuit and second integrated circuit that is electrically connected with this first integrated circuit, two pins of this second integrated circuit of the corresponding connection with it of two pins of this first integrated circuit form two branch roads respectively, and a plurality of pressing impedance series connection of each route constitute; Step 2, with two pin short circuits of this first integrated circuit, the earth terminal ground connection of this integrated circuit (IC) system, thus make the design internal resistance of two branch roads and this integrated circuit (IC) system constitute the circuit of connecting; Step 3 is imported a test voltage at the first pin place of this second integrated circuit, at the second pin place of this second integrated circuit detecting feedback voltage; Step 4, estimation obtains a feedback voltage minimum value; Step 5, this feedback voltage minimum value of obtaining of this feedback voltage of obtaining of detecting and estimation relatively, thereby by judging that the feedback voltage size determines whether this integrate circuit system pressing impedance qualified.
A kind of integrate circuit system pressing impedance detection method, it comprises: step 1, one integrated circuit (IC) system is provided, it comprises one first integrated circuit and second integrated circuit that is electrically connected with this first integrated circuit, one pin of this first integrated circuit and the corresponding connection of a pin of this second integrated circuit, thereby form a branch road between two pins, a plurality of pressing impedances series connection of this route constitute, this branch road circuit of connecting with the design internal resistance formation one of this integrated circuit (IC) system; Step 2 is imported the pin place that a test voltage to this second integrated circuit constitutes this branch road, and constitutes the pin place detecting feedback voltage of this branch road on first integrated circuit; Step 3, estimation obtains a feedback voltage minimum value; Step 4, this feedback voltage minimum value of obtaining of this feedback voltage of obtaining of detecting and estimation relatively, thereby by judging that the feedback voltage size determines whether this branch road pressing impedance qualified.
Utilize the said integrated circuit system pressing impedance detection method that the pressing impedance of common integrated circuit (IC) system is detected, surpass industry according to experience or when producing the maximum pressing impedance that need set when testing the pressing resistance value, can in time carry out heavy industry to this integrated circuit (IC) system, thereby avoid in the subsequent manufacturing processes, cause the unstable even incomplete problem of working signal of this integrated circuit (IC) system transmission because of the pressing impedance is too high, thereby guarantee to use the signal transmission reliability of this integrated circuit (IC) system electronic equipment.
Description of drawings
Fig. 1 is a kind of side view of prior art integrated circuit (IC) system.
Fig. 2 is the equivalent circuit diagram of integrated circuit (IC) system shown in Figure 1.
Fig. 3 is the side view that utilizes the integrated circuit (IC) system that integrate circuit system pressing impedance detection method first embodiment of the present invention detected.
Fig. 4 utilizes integrate circuit system pressing impedance detection method first embodiment of the present invention to detect the schematic equivalent circuit of this integrated circuit (IC) system.
Fig. 5 utilizes integrate circuit system pressing impedance detection method second embodiment of the present invention to detect the schematic equivalent circuit of this integrated circuit (IC) system.
Embodiment
See also Fig. 3 and Fig. 4, Fig. 3 is the side view that utilizes the integrated circuit (IC) system that integrate circuit system pressing impedance detection method first embodiment of the present invention detected, and Fig. 4 utilizes integrate circuit system pressing impedance detection method first embodiment of the present invention to detect the schematic equivalent circuit of this integrated circuit (IC) system.This integrated circuit (IC) system 20 comprises one first integrated circuit 21, one second integrated circuit 23, a flexible circuit board 25, a printed circuit board (PCB) 24 and a glass substrate 22.This first integrated circuit 21 utilizes the COG technology to be bonded on this glass substrate 22, this second integrated circuit 23 utilizes the COF technology to be bonded on this printed circuit board (PCB) 24, one end of this flexible circuit board 25 utilizes the COG technology to be bonded on this glass substrate 22 edges, and be electrically connected with this first integrated circuit 21 via the electrically conducting transparent cabling (not label) that is arranged on this glass substrate 22, its other end utilizes the COF technology to be bonded on this printed circuit board (PCB) 24, and is electrically connected with this second integrated circuit 23 via the metal routing (not label) of this printed circuit board (PCB) 24.
23 liang of pin twos of two pin twos 11,212 and this second integrated circuit, 31, the 232 corresponding examples that electrically connect as with this first integrated circuit 21, if two pin twos 11,212 of this first integrated circuit 21 form two first pressing impedance R1 and R4 respectively when engaging with this glass substrate 22, this flexible circuit board 25 forms two second pressing impedance R2, R5 when engaging with this glass substrate 22 and this printed circuit board (PCB) 24, this second integrated circuit 23 forms two the 3rd pressing impedance R3, R6 when engaging with this printed circuit board (PCB) 24.The design internal resistance of this first integrated circuit 21, this flexible circuit board 25 and this second integrated circuit 23 is R
In
Because this first integrated circuit 21 is electrically connected with this second integrated circuit 23 via this flexible circuit board 25, then in the equivalent electrical circuit that this integrated circuit (IC) system 20 is detected, this first pressing impedance R1, the second pressing impedance R2 and the 3rd pressing impedance R3 constitute one first series arm 200, and this first pressing impedance R4, the second pressing impedance R5 and the 3rd pressing impedance R6 constitute one second series arm 210.
Whether good for the pressing situation that detects this integrated circuit (IC) system 20, can utilize following detection method:
Step 1 is with this first series arm 200, this second series arm 210 and this design internal resistance R
InSeries connection ground connection is about to first pin two 11 and second pin two, 12 short circuits of this first integrated circuit 21, with the earth terminal ground connection of this integrated circuit (IC) system 20.
Step 2 is imported a test voltage V at first pin two, 31 places of this second integrated circuit 23, and in second pin two, 32 places of this second integrated circuit 23 detecting feedback voltage V
Out, this feedback voltage V
OutBe this design internal resistance R
InThe voltage at two ends.
Step 3, the estimation feedback voltage V
OutMinimum value min (V
Out).According to the series circuit voltage divider principle, as can be known:
V＝V
out+IR
total
V
out＝IR
in
Wherein, I is the electric current of series circuit of flowing through; R
Total=R1+R2+R3+R4+R5+R6.
Define the maximum pressing impedance max (R that this integrated circuit (IC) system 20 is allowed according to experience or production requirement
Total), when the pressing impedance surpasses max (R
Total) time, show that the pressing of this integrated circuit (IC) system 20 is out of condition.Max (R according to definition
Total) value, can estimate and learn feedback voltage V
OutMinimum value min (V
Out).
Step 4 is relatively detected the feedback voltage V that obtains
OutMinimum value min (the V that obtains with estimation
Out).Because it is constant that input test voltage V keeps, IR
TotalWith feedback voltage V
OutBe inversely proportional to, then work as V
Out〉=min (V
Out) time, show pressing impedance R
TotalBe no more than max (R
Total), these integrated circuit (IC) system 20 each circuit module pressings are all right; Otherwise, if V
Out＜min (V
Out), then show R
TotalToo high, these integrated circuit (IC) system 20 each circuit module pressings are in poor shape, need carry out pressing again.
Fig. 5 utilizes integrate circuit system pressing impedance detection method second embodiment of the present invention to detect the schematic equivalent circuit of this integrated circuit (IC) system 20.These integrated circuit (IC) system 20 pressing impedances are also detected can take following detection method:
Step 1, this first series arm 200 and this design internal resistance R
InSeries connection ground connection is imported a test voltage V at first pin two, 31 places of this second integrated circuit 23
1, in first pin two, 11 places of this first integrated circuit 21 detecting feedback voltage V
1out
Step 2, the estimation feedback voltage V
1outMinimum value min (V
1out).According to the series circuit voltage divider principle, as can be known:
V
1＝V
1out+IR
1total
V
1out＝IR
in
Wherein, I is the electric current of series circuit of flowing through; R
1total=R1+R2+R3.
Define the maximum pressing impedance max (R that integrated circuit (IC) system 20 is allowed according to experience
1total), when the pressing impedance surpasses max (R
1total) time, show that the pressing of this integrated circuit (IC) system 20 is out of condition.Max (R according to definition
1total) value, can estimate and learn feedback voltage V
1outMinimum value min (V
1out).
Step 3, relatively the minimum value min (V that obtains through estimation
1out) and detect the feedback voltage V that obtains
1outValue.Because it is constant that input test voltage V keeps, IR
1totalWith feedback voltage V
1outBe inversely proportional to, then work as V
1out〉=min (V
1out) time, the pressing impedance R of first series arm 200
1totalBe no more than max (R
1total), the pressing of this first series arm 200 is all right; Otherwise, if V
1out＜min (V
1out), the pressing impedance R of first series arm 200 then
1totalToo high, need carry out pressing again.
Step 4 is again with this second series arm 210 and this design internal resistance R
InSeries connection ground connection is imported a test voltage V at second pin two, 32 places of this second integrated circuit 23
2, in second pin two, the 12 detecting feedback voltage V of this first integrated circuit 21
2out
Step 5, repeating step two can learn to step 3 whether the pressing impedance of this second series arm 210 is qualified, thereby learn whether these integrated circuit (IC) system 20 each circuit structure pressing situations are good.
In the said integrated circuit system pressing impedance detection method, at the minimum value min (V that relatively obtains through estimation
Out), min (V
1out) and test the feedback voltage V that obtains
Out, V
1outDuring value, can utilize a comparer to compare.Minimum value min (the V that will obtain through estimation at first
Out), min (V
1out) be stored in the register.This comparer feedback voltage V that read test obtains in first pin two 11 of second pin two 32 of this second integrated circuit 23 or first integrated circuit 21 and this register respectively
Out, V
1outReach the minimum value min (V that estimation obtains
Out), min (V
1out), this minimum value min (V relatively again
Out), min (V
1out) and this feedback voltage V
Out, V
1outSize, if V
Out〉=min (V
Out) or V
1out〉=min (V
1out), this comparer is exported a high level, shows that the pressing reactance of this integrated circuit (IC) system is qualified, and pressing is all right; Otherwise, if V
Out＜min (V
Out) or V
1out＜min (V
1out), this comparer is exported a low level, shows that the pressing impedance of this integrated circuit (IC) system is defective, and pressing is out of condition.
Utilize the said integrated circuit system pressing impedance detection method that the pressing impedance of common integrated circuit (IC) system is detected, when maximum pressing impedance that the pressing impedance surpasses that this integrated circuit (IC) system allowed, can in time carry out heavy industry to this integrated circuit (IC) system, thereby avoid in subsequent manufacturing processes, cause the unstable even incomplete problem of working signal of this integrated circuit (IC) system transmission because of the pressing impedance is too high, thereby guarantee the signal transmission reliability of the electronic equipment of this integrated circuit (IC) system of use.
Claims (10)
1. integrate circuit system pressing impedance detection method is characterized in that:
Step 1, one integrated circuit (IC) system is provided, it comprises one first integrated circuit and second integrated circuit that is electrically connected with this first integrated circuit, two pins of this second integrated circuit of the corresponding connection with it of two pins of this first integrated circuit form two branch roads respectively, and a plurality of pressing impedance series connection of each route constitute;
Step 2, with two pin short circuits of this first integrated circuit, the earth terminal ground connection of this integrated circuit (IC) system, thus make the design internal resistance of two branch roads and this integrated circuit (IC) system constitute the circuit of connecting;
Step 3 is imported a test voltage at the first terminal place of this second integrated circuit, at the second terminal place of this second integrated circuit detecting feedback voltage;
Step 4, estimation obtains a feedback voltage minimum value;
Step 5, this feedback voltage minimum value of obtaining of this feedback voltage of obtaining of detecting and estimation relatively, thereby by judging that the feedback voltage size determines whether this integrate circuit system pressing impedance qualified.
2. integrate circuit system pressing impedance detection method as claimed in claim 1, it is characterized in that: the evaluation method of this feedback voltage minimum value is the pressing impedance maximal value that this integrated circuit (IC) system of setting is allowed, equal this feedback voltage and the voltage sum is born in this pressing impedance according to test voltage, calculate the minimum value of this feedback voltage.
3. integrate circuit system pressing impedance detection method as claimed in claim 2, its spy is: if this feedback voltage that detecting obtains is more than or equal to this feedback voltage minimum value, then the pressing impedance of this integrated circuit (IC) system is no more than the pressing impedance maximal value that is allowed, and integrated circuit pressing impedance is qualified; Otherwise this integrate circuit system pressing impedance is defective.
4. integrate circuit system pressing impedance detection method as claimed in claim 3 is characterized in that: this feedback voltage and this feedback voltage minimum value utilizing a comparer relatively to detect to obtain.
5. integrate circuit system pressing impedance detection method as claimed in claim 4 is characterized in that: utilize this feedback voltage minimum value of register-stored estimation, in the time of relatively, this comparer reads this feedback voltage minimum value from this register.
6. integrate circuit system pressing impedance detection method is characterized in that:
Step 1, one integrated circuit (IC) system is provided, it comprises one first integrated circuit and second integrated circuit that is electrically connected with this first integrated circuit, one pin of this first integrated circuit and the corresponding connection of a pin of this second integrated circuit, thereby between two pins, form a branch road, the a plurality of pressing impedances of this route series connection constitutes, this branch road circuit of connecting with the design internal resistance formation one of this integrated circuit (IC) system;
Step 2 is imported the pin place that a test voltage to this second integrated circuit constitutes this branch road, and constitutes the pin place detecting feedback voltage of this branch road certainly on this first integrated circuit;
Step 3, estimation obtains a feedback voltage minimum value;
Step 4, this feedback voltage minimum value of obtaining of this feedback voltage of obtaining of detecting and estimation relatively, thereby by judging that the feedback voltage size determines whether this branch road pressing impedance qualified.
7. integrate circuit system pressing impedance detection method as claimed in claim 6, it is characterized in that: the evaluation method of this feedback voltage minimum value is the pressing impedance maximal value that this branch road of setting is allowed, equal this feedback voltage and the voltage sum is born in this pressing impedance according to test voltage, calculate the minimum value of this feedback voltage.
8. integrate circuit system pressing impedance detection method as claimed in claim 7, it is characterized in that: if this feedback voltage that detecting obtains is detected voltage minimum more than or equal to this, then the pressing impedance of this branch road is no more than the pressing impedance maximal value that is allowed, and the pressing impedance of this branch road is qualified; Otherwise this branch road pressing impedance is defective.
9. integrate circuit system pressing impedance detection method as claimed in claim 8 is characterized in that: this feedback voltage and this feedback voltage minimum value utilizing a comparer relatively to detect to obtain.
10. integrate circuit system pressing impedance detection method as claimed in claim 9 is characterized in that: utilize this feedback voltage minimum value of register-stored estimation, in the time of relatively, this comparer reads this feedback voltage minimum value from this register.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100635753A CN100529773C (en) | 2006-11-10 | 2006-11-10 | Integrate circuit system pressing impedance detection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100635753A CN100529773C (en) | 2006-11-10 | 2006-11-10 | Integrate circuit system pressing impedance detection method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101178419A CN101178419A (en) | 2008-05-14 |
| CN100529773C true CN100529773C (en) | 2009-08-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006100635753A Active CN100529773C (en) | 2006-11-10 | 2006-11-10 | Integrate circuit system pressing impedance detection method |
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Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101859719B (en) * | 2009-04-10 | 2012-03-14 | 奇景光电股份有限公司 | Particle detection method and device thereof |
| CN102005165B (en) * | 2009-08-28 | 2013-09-18 | 上海天马微电子有限公司 | Press fit testing device and method |
| TWI442360B (en) | 2010-10-28 | 2014-06-21 | Au Optronics Corp | Display device and system for inspecting bonding resistance and inpsecting method thereof |
| CN102122478B (en) * | 2010-11-12 | 2014-08-13 | 友达光电股份有限公司 | Display, detection system and detection method for junction impedance thereof |
| CN104749478B (en) * | 2013-12-30 | 2018-06-22 | 昆山国显光电有限公司 | Crimp test circuit and test method and its application |
| CN104569605A (en) * | 2014-12-31 | 2015-04-29 | 昆山国显光电有限公司 | FOG bonding structure impedance detection circuit and method |
| CN107144602A (en) * | 2017-05-16 | 2017-09-08 | 武汉华星光电技术有限公司 | Binding region conducting particles presses detection method |
| CN107703361A (en) * | 2017-09-21 | 2018-02-16 | 武汉华星光电技术有限公司 | A kind of measurable FOF of whole Bonding regions impedance |
| CN109633274B (en) * | 2018-12-10 | 2021-01-08 | 武汉精立电子技术有限公司 | Gamma debugging system and method based on OLED screen impedance detection technology |
| CN113450683A (en) * | 2020-03-25 | 2021-09-28 | 联咏科技股份有限公司 | Display driver and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0673072A2 (en) * | 1994-03-18 | 1995-09-20 | Hitachi, Ltd. | Bipolar semiconductor devices |
| CN1274452A (en) * | 1998-07-20 | 2000-11-22 | 阿尔斯托姆控股公司 | Current loop comprising parallel test circuit and 4-20mA or 0-20 mA |
-
2006
- 2006-11-10 CN CNB2006100635753A patent/CN100529773C/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0673072A2 (en) * | 1994-03-18 | 1995-09-20 | Hitachi, Ltd. | Bipolar semiconductor devices |
| CN1274452A (en) * | 1998-07-20 | 2000-11-22 | 阿尔斯托姆控股公司 | Current loop comprising parallel test circuit and 4-20mA or 0-20 mA |
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| Publication number | Publication date |
|---|---|
| CN101178419A (en) | 2008-05-14 |
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