CN100517504C - 半导体器件 - Google Patents
半导体器件 Download PDFInfo
- Publication number
- CN100517504C CN100517504C CNB2006100778653A CN200610077865A CN100517504C CN 100517504 C CN100517504 C CN 100517504C CN B2006100778653 A CNB2006100778653 A CN B2006100778653A CN 200610077865 A CN200610077865 A CN 200610077865A CN 100517504 C CN100517504 C CN 100517504C
- Authority
- CN
- China
- Prior art keywords
- sensor amplifier
- output terminal
- transistor
- bit line
- semiconductor devices
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/1204—Bit line control
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/06—Sense amplifier related aspects
- G11C2207/065—Sense amplifier drivers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Tests Of Electronic Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Abstract
Description
Claims (13)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005146446 | 2005-05-19 | ||
JP2005146446A JP4370526B2 (ja) | 2005-05-19 | 2005-05-19 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1866398A CN1866398A (zh) | 2006-11-22 |
CN100517504C true CN100517504C (zh) | 2009-07-22 |
Family
ID=37425391
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2006100778653A Expired - Fee Related CN100517504C (zh) | 2005-05-19 | 2006-05-09 | 半导体器件 |
Country Status (3)
Country | Link |
---|---|
US (2) | US20060262618A1 (zh) |
JP (1) | JP4370526B2 (zh) |
CN (1) | CN100517504C (zh) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009070474A (ja) * | 2007-09-13 | 2009-04-02 | Panasonic Corp | 半導体集積回路 |
JP2014096191A (ja) * | 2012-11-09 | 2014-05-22 | Renesas Electronics Corp | 半導体記憶装置 |
KR20160122586A (ko) | 2015-04-14 | 2016-10-24 | 에스케이하이닉스 주식회사 | 반도체장치 및 이를 포함하는 반도체시스템 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2825291B2 (ja) * | 1989-11-13 | 1998-11-18 | 株式会社東芝 | 半導体記憶装置 |
JP3305449B2 (ja) * | 1993-09-17 | 2002-07-22 | 富士通株式会社 | 半導体記憶装置 |
US6320778B1 (en) * | 1994-01-06 | 2001-11-20 | Oki Electric Industry Co., Ltd. | Semiconductor memory with built-in cache |
US5970066A (en) * | 1996-12-12 | 1999-10-19 | Paradyne Corporation | Virtual ethernet interface |
JP4400999B2 (ja) * | 2000-06-29 | 2010-01-20 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JP2002208298A (ja) * | 2001-01-10 | 2002-07-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
JP2004227710A (ja) * | 2003-01-24 | 2004-08-12 | Renesas Technology Corp | 半導体記憶装置 |
US6917550B2 (en) * | 2003-04-01 | 2005-07-12 | Oki Electric Industry Co., Ltd. | Semiconductor memory device |
JPWO2004102578A1 (ja) * | 2003-05-13 | 2006-07-13 | 富士通株式会社 | 半導体記憶装置 |
KR100529386B1 (ko) * | 2004-04-27 | 2005-11-17 | 주식회사 하이닉스반도체 | 래치-업 방지용 클램프를 구비한 반도체 메모리 소자 |
-
2005
- 2005-05-19 JP JP2005146446A patent/JP4370526B2/ja not_active Expired - Fee Related
-
2006
- 2006-05-09 CN CNB2006100778653A patent/CN100517504C/zh not_active Expired - Fee Related
- 2006-05-19 US US11/436,723 patent/US20060262618A1/en not_active Abandoned
-
2009
- 2009-02-11 US US12/369,201 patent/US20090154275A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
JP2006323938A (ja) | 2006-11-30 |
US20090154275A1 (en) | 2009-06-18 |
JP4370526B2 (ja) | 2009-11-25 |
US20060262618A1 (en) | 2006-11-23 |
CN1866398A (zh) | 2006-11-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: PS4 LASCO CO., LTD. Free format text: FORMER OWNER: ELPIDA MEMORY INC. Effective date: 20130829 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20130829 Address after: Luxemburg Luxemburg Patentee after: ELPIDA MEMORY INC. Address before: Tokyo, Japan Patentee before: Elpida Memory Inc. |
|
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090722 Termination date: 20140509 |