CN100505496C - An adaptive synchronous commutating control circuit and method - Google Patents
An adaptive synchronous commutating control circuit and method Download PDFInfo
- Publication number
- CN100505496C CN100505496C CNB2005101176789A CN200510117678A CN100505496C CN 100505496 C CN100505496 C CN 100505496C CN B2005101176789 A CNB2005101176789 A CN B2005101176789A CN 200510117678 A CN200510117678 A CN 200510117678A CN 100505496 C CN100505496 C CN 100505496C
- Authority
- CN
- China
- Prior art keywords
- synchronous rectification
- control
- signal
- circuit
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Dc-Dc Converters (AREA)
- Rectifiers (AREA)
Abstract
The adaptive synchronous rectification control method comprises: when charging the capacitor in transistor, sampling the source-drain voltage of the transistor to prevent the conduction of its parasitic diode, and then optimizing the switch control for the rectification transistor.
Description
Technical field
The present invention is meant a kind of adaptive synchronous commutating control circuit and method, refers to a kind of adaptive synchronous commutating control circuit and method that is applied to power-switching circuit (POWER CONVERTER) especially.
Background technology
Along with the development of power electronics, for some electronic installation such as personal computer and the Communication Equipment desired output voltage is more and more lower, desired output power is also increasing.Traditional power electronics change-over circuit adopts a diode to carry out the rectification conversion to I haven't seen you for ages, apparently, under the occasion of low-voltage output, the forward conduction voltage drop of diode just becomes the main cause that the restriction converter efficiency promotes.
General solution is to replace diode to carry out rectification, just so-called synchronous rectification with a transistor.The transistor that is used as the usefulness of synchronous rectification at present is metal oxide semiconductor field effect tube (MOSFET) mostly.
See also Fig. 1, it is the circuit diagram of half bridge series resonance change-over circuit commonly used.
The half bridge series resonance change-over circuit (LLC-SRC) 10 of Fig. 1 is to use the metal oxide semiconductor field effect tube of synchronous rectification.In Fig. 1, Q1 and Q2 are two metal oxide semiconductor field effect tubes, and resonant capacitance Cs and resonance inductance L s have then constituted a resonant network jointly; Tr be one with secondary be tapped transformer; S1 and S2 are respectively the synchronous rectification transistors of Tr level of transformer, wherein D1 and C1 are respectively parasitic body diode and the parasitic economize on electricity appearances of synchronous rectification transistor S1, and D2 and C2 then are respectively that parasitic body diode and the parasitic economize on electricity of synchronous rectification transistor S2 held; Co is an output capacitance.
Metal oxide semiconductor field effect tube Q1 and Q2 are staggered conductings, and its duty ratio is respectively 50%.When transistor Q1 obtains control impuls and during conducting, the voltage Vr of forward can be added on this resonant network of the common formation of resonant capacitance Cs and resonant inductance Ls institute, the polarity of voltage of the voltage Vr of forward in Fig. 1 mark.At this moment, the synchronous rectification transistor S1 conducting of Tr level of transformer, so the elementary voltage of transformer Tr is output the voltage clamp of capacitor C o, resonant capacitance Cs and resonance inductance L s just produce resonance.If resonance time less than the ON time of transistor Q1, just represented the resonance frequency of change-over circuit 10 to be higher than operating frequency, then must turn-off synchronous rectification transistor S1 to avoid forming reverse current in this resonance end.
Similarly, after transistor Q1 shutoff, transistor Q2 conducting, just conducting of synchronous rectification transistor S2 enters down harmonic period half; The back i.e. shutoff that synchronous rectification transistor S2 finishes at resonance is to prevent reverse current.
See also Fig. 2, it is higher than the oscillogram under the situation of operating frequency in resonance frequency for the LLC-SRC change-over circuit 10 of Fig. 1, wherein, Vgp is elementary metal oxide semiconductor field effect tube Q1 of transformer Tr and the control impuls of Q2, Vgs is the control impuls of transformer Tr secondary synchronization rectifying transistor S1 and S2, Vr is the voltage that is added on this resonant network, ir and im are respectively the exciting curents by the resonance current of this resonant network and transformer Tr, and is1 and is2 are respectively the electric current by synchronous rectification transistor S1 and S2.
As seen from Figure 2, at t0 to t1 constantly, the transistor Q1 conducting that transformer Tr is elementary, this resonant network bears forward voltage and resonance, the synchronous rectification transistor S1 conducting of Tr level of transformer, its current value are the difference (turn ratio at this hypothesis transformer Tr is 1:1) of resonance current and transformer excitation electric current.At t1 constantly, the current over-zero of synchronous rectification transistor S1, synchronous rectification transistor S1 is turned off, this moment, the magnetizing inductance Lm of this resonant network and transformer Tr constituted another resonant network jointly, because the harmonic period of new resonant network is very long, so in the moment, its resonance current can be considered as remaining unchanged approx at t1-t3.At t3 constantly, transistor Q2 that transformer Tr is elementary and secondary synchronous rectification transistor S2 conducting, negative voltage is added on this resonant network that resonant capacitance Cs and resonance inductance L s constituted, and enters next harmonic period.
From the course of work of LLC-SRC 10 as can be seen, if the series resonance change-over circuit is operated under the situation of its harmonic period less than switch periods, then turn-off time of the secondary synchronous rectification transistor of control transformer suitably, entire circuit could normal operation.
The control method that is commonly used to carry out synchronous rectification in traditional LLC-SRC circuit has: the current zero-crossing point of (1) sample-synchronous rectifying transistor turn-offs; And the fixedly ON time of (2) control rectifying transistor.
(1) current zero-crossing point of sample-synchronous rectifying transistor turn-offs
Electric current on the sample-synchronous rectifying transistor, and when current over-zero, synchronous rectification transistor is turn-offed; The advantage of this method is the Optimal Control that can realize synchronous rectification transistor, and shortcoming is a relatively difficulty of current sample method.
(2) the fixedly ON time of control rectifying transistor
Compared to previous method, the realization of the method for the fixedly ON time of control synchronous rectification transistor is fairly simple; But it is poor that shortcoming is an adaptive capacity, and ifs circuit parameter difference just can't reach the Optimal Control to synchronous rectification transistor.
In addition, U.S. Pat 6, No. 870747 case also proposes another kind of adaptivity control method, it is to adopt digital control approach, the synchronous rectification that mainly is applicable to pulse-width modulation (PWM) transducer is Guaranteed, the whether conducting of parasitic body diode by detecting synchronous rectification transistor is made control corresponding at synchronous rectification transistor.
Though this method can realize the good control to synchronous rectification transistor in some PWM transducer, can not realize the Optimal Control to synchronous rectification transistor in series resonant circuit.This be because the latter half of synchronous rectification transistor conducting its electric current approach zero, therefore see through judge parasitic body diode whether the mode of conducting be difficult to the control that realization is turn-offed when the current over-zero synchronous rectification transistor.In addition, be digital control method owing to what this case adopted, because of the limited cause of the counting precision of timer, difficulty is applied to the high frequency occasion.Moreover, when the PWM transducer is operated under the discontinuous current pattern (DCM), the shutoff of synchronous rectification transistor also need be carried out when current over-zero, and do not contact directly with the cut-off signals of main pwm signal, can't accomplish the best shutoff of synchronous rectification transistor when therefore, this scheme is operated in DCM to transducer.
See also Fig. 3 (a), it is the schematic diagram of the equivalence model of synchronous rectification transistor S1 or S2.
In Fig. 3 (a), transistor has three end points, be respectively source electrode s, drain electrode d with gate pole g, Cp be a parasitic economize on electricity appearance between its leakage-source electrode, Dp is its parasitic body diode.In the PWM transducer, if transducer is operated under the continuous current mode (CCM), the electric current of the synchronous rectification transistor of can supposing to flow through is constant.
See also Fig. 3 (b), it is operated in continuous current mode (CCM) following time, the main electric current of synchronous rectification transistor and the schematic diagram of voltage for the PWM transducer.
In Fig. 3 (b), isd is the electric current of synchronous rectification transistor of flowing through, and Vgs is the control impuls of synchronous rectification transistor, and Vds is the pressure drop (also promptly, the voltage of going up Cp is held in parasitic economize on electricity) of synchronous rectification transistor.
Shown in Fig. 3 (b), for the ON time of synchronous rectification transistor less than best ON time; Just synchronous rectification transistor is turn-offed when also promptly on the t1 moment, synchronous rectification transistor, also having electric current to flow through.After synchronous rectification transistor turn-offed, electric current at first held Cp to the economize on electricity of synchronous rectification transistor and charges, so capacitance voltage can rise, and the slope of rising is determined by the capacitance of Cp and the size of electric current.And rise to after the certain value when capacitance voltage, promptly by the body diode Dp clamp of synchronous rectification transistor, so its occurrence is the forward voltage drop of body diode Dp, and electric current sees through the body diode conducting, and economize on electricity is held voltage and is kept a constant potential level always.In this case, will the operational paradigm of transducer will be reduced if turn-off synchronous rectification transistor ahead of time.
See also Fig. 3 (c), it is operated under the continuous current mode (CCM) schematic diagram of main electric current and voltage when synchronous rectification transistor turn-offs ahead of time for the PWM transducer.
Similarly, at t1 constantly, when synchronous rectification transistor turn-offed, electric current was just to parasitism economize on electricity capacity charge.Because in the harmonic conversion circuit, when synchronous rectification transistor turn-offed, its electric current had been one and approached zero smaller value, so this less electric current makes capacitance voltage slowly rise to the capacity charge meeting of economizing on electricity, and its slope also reduces gradually.When t2 moment current over-zero, the voltage on the parasitic economize on electricity appearance Cp does not also rise to the clamp value of body diode Dp.From this process also as can be seen, 6, No. 870747 cases of U.S. Pat only propose to see through body diode Dp whether conducting is with the control method as synchronous rectification transistor, can not reach the Optimal Control of synchronous rectification transistor.
See also Fig. 3 (d), it is operated under the discontinuous current pattern (DCM) schematic diagram of main electric current and voltage when synchronous rectification transistor turn-offs ahead of time for the PWM transducer.
Shown in Fig. 3 (d), similar with series resonant circuit, flow through linear decline of electric current of synchronous rectification transistor, when when t1 turn-offs synchronous rectification transistor constantly too early, row charging when little electric current just holds Cp to the economize on electricity of synchronous rectification transistor, therefore capacitance voltage slowly rises, and its slope also reduces gradually equally.When t2 moment current over-zero, capacitor C p voltage is lower than the clamp value of body diode Dp.Therefore, when the PWM transducer is operated in following time of DCM, only see through and judge whether conducting is also can't reach the Optimal Control of synchronous rectification transistor as synchronous rectification transistor control corresponding method for body diode.
Therefore, the applicant tests and research through concentrated in view of the disappearance that is produced in the prior art, and a spirit of working with perseverance, and visualizes the present invention's " adaptive synchronous commutating control circuit and method " eventually, below is brief description of the present invention.
Summary of the invention
Main conception of the present invention is in the middle of the process of electric current to the economize on electricity capacity charge, and the ON time that voltage is optimized synchronous rectification transistor is held in the sampling economize on electricity.
According to conception of the present invention, a kind of adaptive synchronous commutating control circuit is proposed, be to be applied to the main switch of primary in the power-switching circuit and at least one secondary synchronous rectification transistor, this adaptive synchronous commutating control circuit comprises signal preprocessor, signal conditioner and control impuls generator.This signal preprocessor is in order to receiving the drain-source voltage of this synchronous rectification transistor, and the output preprocessed signal, and wherein this preprocessed signal is relevant with the minimum value of this drain-source voltage.This signal conditioner is in order to receive this preprocessed signal and reference potential, and relatively this preprocessed signal and this reference potential, with output synchronous rectification control signal, wherein this synchronous rectification control signal is controlled this synchronous rectification transistor in order to the next switch periods at this synchronous rectification transistor.This control impuls generator is in order to receive this synchronous rectification control signal, and produce the control wave that is synchronized with this main switch according to the synchronization pulse that is synchronized with this main switch, control this synchronous rectification transistor by this control wave again, wherein the selection of this reference potential makes the absolute value of this drain-source voltage negative loop of this synchronous rectification transistor be not more than the conducting voltage of the parasitic diode of this synchronous rectification transistor.
Description of drawings
The present invention must pass through following graphic and detailed description, thereby obtains more deep understanding:
Fig. 1 is the circuit diagram of a half bridge series resonance change-over circuit of using always;
Fig. 2 is that the LLC-SRC change-over circuit 10 of Fig. 1 is higher than the oscillogram under the situation of operating frequency in resonance frequency;
Fig. 3 (a) is the schematic diagram of the equivalence model of synchronous rectification transistor;
Fig. 3 (b) is that the PWM transducer is operated in continuous current mode (CCM) following time, the main electric current of synchronous rectification transistor and the schematic diagram of voltage;
Fig. 3 (c) is that the PWM transducer is operated under the continuous current mode (CCM) schematic diagram of main electric current and voltage when synchronous rectification transistor turn-offs ahead of time;
Fig. 3 (d) is the schematic diagram that the PWM transducer is operated in main electric current and voltage under the discontinuous current pattern (DCM), when synchronous rectification transistor turn-offs ahead of time;
Fig. 4 is the calcspar of adaptive synchronous commutating control circuit that the present invention carries;
Fig. 5 is the oscillogram after change-over circuit adopts the control circuit of Fig. 4;
Fig. 6 is the first concrete circuit diagram of implementing of the control circuit of Fig. 4;
Fig. 7 (a) is the working waveform figure of sampling shaping circuit;
Fig. 7 (b) is the working waveform figure of valley value detection circuit; And
Fig. 8 is the working waveform figure of control impuls;
Fig. 9 is the second concrete circuit diagram of implementing of the control circuit of Fig. 4; And
Figure 10 is that synchronous rectification transistor is opened the working waveform figure that control impuls produces.
The primary clustering symbol description
10 half bridge series resonance change-over circuits
Q1, Q2, S1, S2 transistor
The Cs resonant capacitance
The Ls resonant inductance
The Tr transformer
D1, D2 parasitic body diode
The parasitic economize on electricity of C1, C2 is held
The Co output capacitance
The Vr forward voltage
The ir resonance current
The im exciting curent
Is1, is2, isd transistor current
The s source electrode
The g gate
The d drain electrode
The parasitic economize on electricity of Cp is held
The Dp parasitic body diode
The pulse of Vgs transistor controls
The Vds transistor voltage drop
The Vgp drive signal
P10 first input signal
P20 second input signal
The P30 signal preprocessor
The P40 signal conditioner
P50 control impuls generator
The P60 control signal
The P70 control wave
P90 synchronous rectification control signal
The little electric current of iSD
The X10 shaping circuit of sampling
The X20 valley value detection circuit
X30 proportional plus integral control loop
The X40 control impuls produces circuit
The X11 diode
X13 (Va) forward voltage
The X21 comparator
X22 (Vb) valley signal
The X31 operational amplifier
The X33 resistor capacitor circuit
X34 (Vc) voltage signal
The X41 circuit for generating triangular wave
The X42 transistor
X44 (Vtriangle) triangular signal
The X46 comparison signal
X47 and door
X48 or door
The X50 potential regulator
The X60 delay circuit
The Vref reference potential
Embodiment
See also Fig. 4, it is the calcspar of adaptive synchronous commutating control circuit that the present invention carries, and this control circuit needs two input signals, and first input signal P10 is the voltage difference Vds for transistor drain d and source electrode s; Also promptly, the voltage Vcp on the transistor parasitic economize on electricity appearance.Second input signal P20 is the synchronization pulse of primary switch, in order to allow conducting and the main switch same period mutually synchronization mutually of synchronous rectification transistor.What deserves to be mentioned is that the present invention is to use the primary switch Q1 among Fig. 2, the drive signal Vgp of Q2 to illustrate, but as long as can realize the present invention with the synchronous any signal of drive signal Vgp.
In Fig. 4, signal preprocessor P30 receives the parasitism economize on electricity of synchronous rectification transistor and holds voltage Vds, and it is carried out suitable processing so that detect control.Signal conditioner P40 receives pretreated signal, and it is to control through the loop circuit of a simulation to do corresponding adjusting, finally draws the signal P60 of a reflection energy Optimal Control synchronous rectification transistor.Control impuls generator P50 is exactly the control wave P70 that produces synchronous rectification transistor according to the control signal P60 of signal conditioner P40 output, simultaneously control wave P70 also with the main switch same period of mutually synchronization mutually.
See also Fig. 5, it adopts the oscillogram behind the control circuit of Fig. 4 for change-over circuit.
As seen from Figure 5, in first switch periods, synchronous rectification transistor turn-offs constantly at t1, owing to turn-off too early, also have little electric current I sd to pass through on the synchronous rectification transistor this moment, and this little electric current I sd can charge to the parasitism economize on electricity appearance of synchronous rectification transistor, and produce the little spike in the t1-t2 period, the control circuit of Fig. 4 see through to detect the voltage Vcp that the parasitism economize on electricity of synchronous rectification transistor is held, and regulates control impuls to be optimized by the loop circuit.And in next cycle t2-t4, synchronous rectification transistor just turn-offs constantly at t3, but should turn-off still too early, and therefore control circuit of the present invention just is optimized once more ..., at last passed through several cycles after just can obtain optimized control impuls.With this embodiment, just no longer occur due to voltage spikes in this one-period at t4-t5, so the control of synchronous rectification transistor has just obtained optimization.
See also Fig. 6, it is the concrete enforcement circuit diagram of the control circuit of Fig. 4.In Fig. 6, this control circuit comprises that mainly sampling shaping circuit X10, valley value detection circuit X20, proportional plus integral control loop X30 and control impuls produce circuit X40.The The whole control circuit has two input signals; Signal P10 is the voltage Vcp that the economize on electricity of synchronous rectification transistor is held, and signal P20 is the control signal Vgp of primary transistor.P70 then is the Optimal Control signal Vgs of the synchronous rectification transistor of the last output of this control circuit.
X10 is a sampling shaping circuit, when the economize on electricity of synchronous rectification transistor is held voltage Vcp when negative, when also promptly having electric current to pass through synchronous rectification transistor, three diode X11 are forward conduction just, obtained the forward voltage Va (being X13) after the biasing, suitably the biasing back is with convenient sampling.As long as it should be noted that to reach the purpose that realizes voltage bias, the quantity of diode X11 need not be defined as three among the figure; Also promptly, any amount of diode all can.
When synchronous rectification transistor oppositely turn-offs, its economize on electricity appearance is born very high forward voltage, this moment, three diode X11 turn-offed with regard to bearing back-pressure, and the high pressure of synchronous rectification transistor S1, S2 Vcp when turn-offing has been blocked in this measure, can prevent that the control assembly among the figure is damaged.
Fig. 7 (a) is the working waveform figure for sampling shaping circuit X10.By finding out among the figure, when synchronous rectification transistor S1, S2 had electric current to pass through, the voltage Vcp (W10 among the figure) that economize on electricity is held was a negative value, when synchronous rectification transistor oppositely turn-offs, Vcp then be a high pressure on the occasion of, the size of this value is determined by circuit parameter.Va (W20 among the figure) is the waveform of the sampled voltage after the shaping, Vd is the forward conduction voltage drop of three diode X11, when synchronous rectification transistor bears positive voltage, owing to bearing reverse voltage, block by three diodes, and sampled voltage just only is control voltage VCC.
X20 among Fig. 6 is a valley value detection circuit, is used for the minimum of detection signal Va, and comparator X21 is used for comparator input signal Va and valley signal Vb (X22 of Fig. 6); If the value of input signal Va is greater than valley signal Vb, the output of comparator X21 is high potential, and this moment, the valley signal remained unchanged; If the value of input signal Va is less than valley signal X22, the output of comparator X21 is electronegative potential, thereby the valley signal is dragged down rapidly, to reach the minimum of input signal Va.
See also Fig. 7 (b), it is the working waveform figure of valley value detection circuit X20.
In Fig. 7 (b), Va is the sampled signal waveform after the shaping, and Vb (W40 of Fig. 6) is the valley signal waveform of X22 end.When the valley signal was higher than the input signal of testing circuit, Vb was pulled low to the valley of input signal, and when the valley signal was lower than the input signal of testing circuit, Vb just can not respond input signal.
X30 is a relatively integral control circuit.Operational amplifier X31 receives valley value detection circuit X20 and detects a valley signal Vb and a fixing reference potential Vref (X32 of Fig. 6), amplify with the ratio of carrying out error, realize the circuit control of a loop circuit, the voltage Vc (X34 of Fig. 6) of output control at last.Vref (X32 of Fig. 6) is a fixing reference potential, the optimization degree the when size of its value has determined synchronous rectification transistor work; Particularly, its value is that the bias potential of three diode X11 deducts a smaller value (for example 0.1V), sees through the loop circuit control of proportional integral like this, and the value that the parasitism economize on electricity of synchronous rectification transistor is held can be controlled in-0.1V.Therefore can realize the optimal control of synchronous rectification transistor.In addition, the introducing as the resistor capacitor circuit X33 of proportional integral link is in order to strengthen stability and the dynamic property that this loop circuit is a system.
Because loop circuit output result will act on synchronous rectification transistor at next cycle, therefore, the comparator X21 in operational amplifier X31 and the valley value detection circuit can utilize low-speed component and can not influence control performance.
X40 is that the control impuls of synchronous rectification transistor produces circuit, because the proportional plus integral control loop has only produced the voltage signal Vc (X34) of a control, therefore it must be converted to the ON time of corresponding synchronous rectifying transistor.Here, we have adopted voltage signal and a triangular wave have been compared to produce the method for control impuls.X41 is a circuit for generating triangular wave, and it is made up of a RC charging network and a transistor X42.When transistor turn-offed, the RC charging network is charging just, so capacitance voltage rises gradually, when transistor X42 opened, electric capacity just saw through transistor X42 discharge at once, and capacitance voltage descends rapidly.Herein, we have used elementary switching pulse to be used as synchronous control signal, transistor X42 opens just thus that synchronous control signal (being the control signal of primary transistor) Vgp controls, control signal Vgp is through the CONTROLLED POTENTIAL of the reverse back of a non-lock as transistor X42, so not only produced triangular signal Vtriangle (X44), and this triangular signal Vtriangle (X44) by elementary control signal Vgp institute synchronously.Triangular signal Vtriangle (X44) and the control signal Vc (X34) that ratio control circuit produces have obtained comparison signal X46 through comparator X45, the X46 signal sees through and door X47 with elementary control signal Vgp again, and generates final synchronous rectification control signal Vgs (P70).
See also Fig. 8, it is the working waveform figure of control impuls.As seen from Figure 8, see through the control of primary transistor control signal Vgp, circuit for generating triangular wave has just produced the triangular waveform shown in Vtriangle among Fig. 8 (Z20), see through comparator X45 and VC (Z30) and one and a door X47, finally obtained the control signal waveform of synchronous rectification, shown in Vgs (Z40).As can be seen from Figure, opening with primary control signal of the control signal of synchronous rectification is synchronous, turn-offs and is then controlled by the loop circuit control circuit.
After the adaptive synchronous commutating control method proposed by the invention of introducing in series resonant circuit, just can make optimum optimization to the synchronous rectification turn-off time.Therefore the voltage that the parasitic economize on electricity of synchronous rectification is held because control method has been sampled, and its valley point voltage of having taken a sample have promoted the control precision of control method.In addition, the stability of this control method has then been strengthened in the introducing of proportional integral link, and has optimized control, has self-regulating function.
The advantage of adaptive synchronous commutating control method of the present invention is that employed assembly is less, and circuit framework is simple, and circuit is not high to the performance demands of part assembly yet simultaneously; Moreover, be analog control mode because the The whole control method adopts, the problem of the accuracy of timekeeping that does not therefore have digital control method and had, so the inventive method also is applicable to the application scenario of high frequency.
Need to prove, cited control method not only is applicable to series resonant circuit (LLC-SRC) among the embodiment, also is applicable to the harmonic conversion circuit of other kenel and is operated in pulse-width modulation (PWM) circuit (as flyback (flyback) topology) under the discontinuous current pattern (DCM).As previously mentioned, when pwm circuit is operated in DCM, electric current by synchronous rectification transistor descends gradually, its turn-off time and elementary control signal are not contacted directly, but determined by the circuit parameter of transducer, therefore utilize method proposed by the invention just can control synchronous rectification transistor along with the conversion of circuit parameter, it is turned off when current over-zero.
In addition, though it is pointed out that the shutoff moment of only having described control synchronous rectification pulse among the embodiment equally, method proposed by the invention is applicable to opening constantly of transducer too.See also Fig. 9, the control principle figure when it is applied to open for this control method.
Identical with Fig. 6, this circuit comprises that equally sampling shaping circuit X10, valley value detection circuit X20, proportional plus integral control ring X30 and control impuls produce circuit X40.But different with Fig. 6 is that Fig. 9 has also increased potential regulator X50 and delay circuit X60; In addition, control impuls produces original having changed into door X47 or door X48 in the circuit.In Fig. 9, the effect of potential regulator X50 is that current potential is adjusted to guarantee the correctness of control circuit, and the introducing of delay circuit is in order to make control signal obtain correct synchronization pulse.Through whole optimal control of opening, finally can obtain opening the synchronous rectification control signal P90 after the optimization.
See also Figure 10, it opens the working waveform figure that control impuls produces for synchronous rectification transistor.
By can finding out among the figure, primary control signal Vgp obtained postponing shown in Figure 10 after through a delay circuit X60 after signal Vgp-delay, be t-delay time of delay.The triangular wave that circuit for generating triangular wave produced Vtriangle2 as shown in FIG., this signal also promptly are subjected to the signal Vgp institute of primary transistor synchronous by Vgp-delay institute synchronously.Signal VC2 sees through comparator X45 and one or an X48 for seeing through the adjusted proportional plus integral control signal of current potential, has finally obtained the control signal waveform of synchronous rectification, shown in Vgs2.As can be seen from the figure, opening by the loop circuit control circuit of the control signal of synchronous rectification controlled, and turn-offs then synchronous with primary control signal.So just can reach to optimize and open the purpose of control.
In sum, the controlling schemes that the present invention is proposed is used to the optimal control of opening and turn-offing simultaneously, just can access optimized synchronous rectification controlling schemes.
The present invention can be made by those of ordinary skills and revising and change, but does not break away from the scope that claims are protected.
Claims (14)
1. an adaptive synchronous commutating control circuit is to be applied to the main switch of primary in the power-switching circuit and at least one secondary synchronous rectification transistor, and this adaptive synchronous commutating control circuit comprises:
Signal preprocessor, in order to receiving the drain-source voltage of this synchronous rectification transistor, and the output preprocessed signal, wherein this preprocessed signal is relevant with the minimum value of this drain-source voltage;
Signal conditioner, in order to receive this preprocessed signal and reference potential, and relatively this preprocessed signal and this reference potential, with output synchronous rectification control signal, wherein this synchronous rectification control signal is controlled this synchronous rectification transistor in order to the next switch periods at this synchronous rectification transistor; And
The control impuls generator, in order to receive this synchronous rectification control signal, and produce the control wave that is synchronized with this main switch according to the synchronization pulse that is synchronized with this main switch, control this synchronous rectification transistor by this control wave again, wherein the selection of this reference potential makes the absolute value of this drain-source voltage negative loop of this synchronous rectification transistor be not more than the conducting voltage of the parasitic diode of this synchronous rectification transistor.
2. adaptive synchronous commutating control circuit according to claim 1, wherein, this power-switching circuit be selected from resonant circuit and be operated in the discontinuous current pattern pulse-width modulation circuit one of them.
3. adaptive synchronous commutating control circuit according to claim 1, wherein, this signal preprocessor comprises:
The sampling shaping circuit, when the conducting when negative of this drain-source voltage, and the output forward voltage; And
Valley value detection circuit is in order to receive this forward voltage and itself and valley signal made comparisons and to export this preprocessed signal, wherein
This sampling shaping circuit is made of at least one diode series connection.
4. adaptive synchronous commutating control circuit according to claim 3, wherein, this valley value detection circuit is made of comparator and diodes in reverse series.
5. adaptive synchronous commutating control circuit according to claim 1, wherein, this signal conditioner is the proportional plus integral control loop, wherein, this proportional plus integral control loop comprises:
Operational amplifier in order to receiving this preprocessed signal, and is made comparisons itself and reference potential and is exported this synchronous rectification control signal.
6. adaptive synchronous commutating control circuit according to claim 5, wherein, described proportional plus integral control loop more comprises:
Resistor capacitor circuit is parallel to this operational amplifier, in order to stablize this proportional plus integral control loop and to promote its dynamic property.
7. adaptive synchronous commutating control circuit according to claim 1, wherein, this control impuls generator comprises:
Inverter is in order to reception and this synchronous rectification control signal is anti-phase;
Circuit for generating triangular wave is according to the triangular signal that is synchronized with this main switch by this anti-phase synchronous rectification control signal with generation;
Comparator, in order to relatively this synchronous rectification control signal and this triangular signal, and the output comparison signal; And
With door, in order to carrying out and computing, and produce this control wave at this synchronous rectification control signal and this comparison signal.
8. adaptive synchronous commutating control circuit according to claim 7, wherein this circuit for generating triangular wave comprises:
Transistor is according to by this anti-phase synchronous rectification control signal and conducting and ending; And
Resistor capacitor circuit, when this transistor turns, this resistor capacitor circuit discharge, and when this transistor ends, this resistor capacitor circuit charging.
9. adaptive synchronous commutating control circuit according to claim 1, wherein this control impuls generator comprises:
Delay circuit is in order to receive and to postpone this synchronous rectification control signal;
Circuit for generating triangular wave is synchronized with the triangular signal of this main switch with generation according to this synchronous rectification control signal that is delayed;
Potential regulator is in order to receive and to regulate this synchronous rectification control signal;
Comparator, in order to this synchronous rectification control signal and this triangular signal that relatively is conditioned, and the output comparison signal; And
Or door, in order to carrying out exclusive disjunction, and produce this control wave at this synchronous rectification control signal and this comparison signal.
10. according to right 9 described adaptive synchronous commutating control circuits, wherein this circuit for generating triangular wave comprises:
Transistor is according to this synchronous rectification control signal that is delayed and conducting and ending; And
Resistor capacitor circuit, when this transistor turns, this resistor capacitor circuit discharge, and when this transistor ends, this resistor capacitor circuit charging.
11. an adaptive synchronous commutating control method is to be applied to the main switch of primary in the power-switching circuit and at least one secondary synchronous rectification transistor, this adaptive synchronous commutating control method comprises that step is as follows:
Step 1 when the economize on electricity of this synchronous rectification transistor is held when charging, is carried out voltage sample at the leakage-source electrode of this synchronous rectification transistor, and the voltage of being sampled is relevant with the minimum value of drain-source voltage;
Step 2, relatively this sampled voltage and the reference potential of this synchronous rectification transistor, and obtain the synchronous rectification control signal, wherein this synchronous rectification control signal is in order to control this synchronous rectification transistor in the next switch periods of this synchronous rectification transistor; And
Step 3, synchronizing signal according to this synchronous rectification control signal and this main switch obtains the synchronous rectification drive signal, make the charging interval minimum of parasitic capacitance of this synchronous rectification transistor, wherein the selection of this reference potential is the conducting voltage less than the parasitic diode of this synchronous rectification transistor.
12. adaptive synchronous commutating control method according to claim 11, wherein, this power-switching circuit be selected from resonant circuit and be operated in the discontinuous current pattern pulse-width modulation circuit one of them.
13. adaptive synchronous commutating control method according to claim 11, wherein, step 1 comprises that also step is as follows:
Receive the drain-source voltage of this synchronous rectification transistor, and carry out preliminary treatment; And
According to this preliminary treatment output synchronous rectification control signal.
14. adaptive synchronous commutating control method according to claim 11, wherein, step 2 comprises that also step is as follows:
Produce the control wave that is synchronized with this main switch according to the synchronization pulse that is synchronized with this main switch; And
Control this synchronous rectification transistor by this control wave.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101176789A CN100505496C (en) | 2005-11-08 | 2005-11-08 | An adaptive synchronous commutating control circuit and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005101176789A CN100505496C (en) | 2005-11-08 | 2005-11-08 | An adaptive synchronous commutating control circuit and method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1964173A CN1964173A (en) | 2007-05-16 |
| CN100505496C true CN100505496C (en) | 2009-06-24 |
Family
ID=38083114
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005101176789A Active CN100505496C (en) | 2005-11-08 | 2005-11-08 | An adaptive synchronous commutating control circuit and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100505496C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI474589B (en) * | 2012-09-29 | 2015-02-21 | Delta Electronics Inc | Hybrid controlling method of resonant converter, resonant converter system and hybrid controller |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102357022B1 (en) * | 2014-09-12 | 2022-01-28 | 현대모비스 주식회사 | Method and device for controlling synchoronizing rectification ldc |
| CN107196535B (en) * | 2017-07-20 | 2019-07-05 | 云南电网有限责任公司电力科学研究院 | A kind of inverter series connection synchronisation control means based on adaptive notch filter |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3152016B2 (en) * | 1993-06-15 | 2001-04-03 | 富士電機株式会社 | Control device for power MOSFET for synchronous rectification |
| JP3396605B2 (en) * | 1997-10-13 | 2003-04-14 | 沖電気工業株式会社 | Limiting circuit of synchronous rectifier circuit |
| US6870747B2 (en) * | 2001-03-30 | 2005-03-22 | Texas Instruments Incorporated | Control circuit for synchronous rectifiers in DC/DC converters to reduce body diode conduction losses |
-
2005
- 2005-11-08 CN CNB2005101176789A patent/CN100505496C/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3152016B2 (en) * | 1993-06-15 | 2001-04-03 | 富士電機株式会社 | Control device for power MOSFET for synchronous rectification |
| JP3396605B2 (en) * | 1997-10-13 | 2003-04-14 | 沖電気工業株式会社 | Limiting circuit of synchronous rectifier circuit |
| US6870747B2 (en) * | 2001-03-30 | 2005-03-22 | Texas Instruments Incorporated | Control circuit for synchronous rectifiers in DC/DC converters to reduce body diode conduction losses |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI474589B (en) * | 2012-09-29 | 2015-02-21 | Delta Electronics Inc | Hybrid controlling method of resonant converter, resonant converter system and hybrid controller |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1964173A (en) | 2007-05-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI285467B (en) | Adaptive synchronous rectification control circuit and method thereof | |
| TWI508418B (en) | Ccm synchronous rectification control scheme | |
| CN202268807U (en) | Integrated circuit for controlling switch in primary side regulator, integrated control circuit and switching power supply for primary side regulation | |
| CN103490605B (en) | Isolated switch converter and controller and control method thereof | |
| US9461558B2 (en) | Control device of a switching power supply | |
| CN102163913B (en) | Control device, led light emitting device including the same, and control method | |
| US9577538B2 (en) | Utilizing secondary-side conduction time parameters of a switching power converter to provide energy to a load | |
| US10630168B1 (en) | Bridgeless power factor correction converter with zero current detection circuit | |
| CN102128973B (en) | Voltage zero-crossing detecting circuit and DC-DC converter with same | |
| CN106208714A (en) | Synchronous rectifying switching power source and control method | |
| CN103280963B (en) | A kind of PFC control circuit reducing power tube conducting power consumption | |
| CN105991034A (en) | Power conversion device with power-saving and high conversion efficiency mechanism | |
| CN111404403A (en) | Synchronous rectification control method and control circuit for self-adaptive detection time | |
| US20100259957A1 (en) | Bridgeless pfc circuit for critical continuous current mode and controlling method thereof | |
| CN104242620A (en) | system with ripple suppression circuit and ripple suppression method thereof | |
| US20220006393A1 (en) | Flyback switch circuit and control method thereof | |
| US9893639B1 (en) | Synchronous rectifier control circuit and method using volt-second balancing | |
| CN100505496C (en) | An adaptive synchronous commutating control circuit and method | |
| US7012821B1 (en) | Flyback converter with synchronous rectifier | |
| CN111711344A (en) | Self-calibration zero-crossing detection circuit of switching power supply | |
| CN203814007U (en) | Isolation led drive circuit | |
| CN110579639B (en) | Mains supply zero-crossing detection circuit and switch power supply system using same | |
| CN212935768U (en) | Self-calibration zero-crossing detection circuit of switching power supply | |
| CN201134763Y (en) | Off-line current type PWM power source control circuit | |
| CN203313482U (en) | LED drive circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |