CN100498806C - Device and method for outputting signal of emulation infrared detector - Google Patents
Device and method for outputting signal of emulation infrared detector Download PDFInfo
- Publication number
- CN100498806C CN100498806C CNB2007100461192A CN200710046119A CN100498806C CN 100498806 C CN100498806 C CN 100498806C CN B2007100461192 A CNB2007100461192 A CN B2007100461192A CN 200710046119 A CN200710046119 A CN 200710046119A CN 100498806 C CN100498806 C CN 100498806C
- Authority
- CN
- China
- Prior art keywords
- infrared
- data
- sdram
- real time
- processing platform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Abstract
The present invention discloses a simulative infrared detector output signal device and method. The device includes a host machine PCI bus, an infrared picture data collected from the experiment in the outside field, and a simulative system driving program which are stored inside the host machine; a FPGA which plays roles of interface and controlling, and two SDRAM. The method includes: through an application program, infrared picture data is called from a database, and the driving program writes the infrared picture data into the memory of the host machine, then, the FPGA is informed to read out the infrared picture data in the memory of PC through PCI bus, and the infrared picture data is written into the SDRAM, at last, the infrared simulative picture data is read out from the SDRAM by the FPGA, and is sent to a back phase infrared real time signal processing platform according to the protocol. The present invention has the advantages that the real simulative data can be provided for the pre-stage research of the infrared signal real time processing platform; the infrared simulative data transmitted to the back phase infrared real time signal processing platform can not be interrupted in the frame; the relative data interface is provided according to the back phase infrared real time signal processing platform connected at the back terminal; and the target information can be real time superimposed when the infrared picture data is sent.
Description
Technical field
The present invention relates to infrared warning equipment, infrared reconnaissance tracking equipment etc., specifically be meant the device and method that outputting signal of emulation infrared detector is provided for the infrared real time signal processing platform of this equipment.
Background technology
Infrared warning equipment and infrared reconnaissance tracking equipment normally are made of infrared eye and infrared real time signal processing platform two parts.The main task of infrared real time signal processing platform is that the picture signal that detector sends over is handled, and detects the target of particular requirement from complex background, provides warning information simultaneously or it is followed the tracks of.
In the development and design process of infrared warning equipment and infrared reconnaissance tracking equipment, various simulation means have extensively been adopted.Utilize various simulation means, both can verify, optimize the design concept and the design proposal of system efficiently, can avoid using the height spending that true detector faces again and shorten problem such as detector serviceable life.Therefore l-G simulation test becomes the important step that infrared warning equipment and infrared reconnaissance tracking equipment are developed in earlier stage.
L-G simulation test mainly contains two types: one, hardware-in-the-loop simulation, and this kind mode spends bigger, and dirigibility is also relatively poor; Two, digital picture direct injection emulation, present most digital picture injected simulation system is based on low speed bus, no large capacity cache, data source is an analog image, therefore it is slow to export emulated data speed, and has interruption between frame and the frame, and simulated effect is undesirable.
Summary of the invention
The objective of the invention is to propose the simulator and the method for the pouring-in infrared eye output signal of a kind of digital picture, thereby realize the infrared eye output image data of true efficient emulation reality, satisfy existing infrared real time signal processing platform research and development requirement.
For achieving the above object, the simulator of the pouring-in infrared eye of digital picture of the present invention comprises: 1 one in the main frame of band pci bus 2, and host memory contains the pouring-in infrared eye analogue system of infrared picture data storehouse, the digital picture driver that field trial is gathered; Be connected in the field programmable gate array (FPGA) 3 of band pci bus main frame and infrared real time signal processing platform 5.This FPGA is used to accept infrared image, and according to the interface mode that the back infrared real time signal processing platform of level requires infrared picture data is sent to the infrared real time signal processing platform of back level.
The also outer two high capacity synchronous DRAMs (SDRAM) 4 that hang with of said FPGA.
There are infrared picture data storehouse that comprises target information and the infrared background image data base that does not comprise target information in said infrared picture data storehouse.
The control state machine of said FPGA inside is connected with pci bus by the PCIBridge Core that open IP organizes Opencores to provide; Control state machine is connected with two outer SDRAM of sheet respectively by two sdram controllers; Control state machine also is connected in data selector, is used to realize that the table tennis of SDRAM output data switches; Under the control of control state machine, emulated data is at last by infrared real time signal processing platform interface output.
Emulation mode of the present invention may further comprise the steps:
Main frame sends to FPGA by pci bus with infrared picture data;
Following task is finished in the instruction that FPGA sends according to main frame:
1) data-moving, when PC is ready to a frame or multiframe data, send reading order, FPGA can write an infrared picture data of designated length in the assigned address in the PC internal memory among the SDRAM and go, when main frame is write a SDRAM, the view data among another piece SDRAM can be read into the infrared real time signal processing platform of back level;
2) read-write SDRAM switches, when PC sends switching SDRAM instruction, two SDRAM roles can be exchanged, the SDRAM that originally was used to write the PC data in EMS memory will be used for to the back infrared real time signal processing platform of level provides data, and originally be used for providing the SDRAM of data will be used to preserve the data that send over from main frame for the back infrared real time signal processing platform of level;
3) provide interruption to main frame, after reading the data block of designated length, can send interruption, allow main frame that the next frame data can be provided to main frame from main frame;
4) according to the instruction of main frame, the infrared real time signal processing platform of level provides the infrared picture data that comprises target information backward; Perhaps the infrared real time signal processing platform of level provides the infrared background that does not comprise target information view data backward, and the target information that superposes in real time in the process that sends, the stack of target information is finished by the inner infrared real time signal processing platform interface logic of FPGA.
Distinguishing feature of the present invention be following some:
(1) can obtain the real simulation data that early stage development provide of data from the infrared picture data storehouse of host side by high-speed bus for the infrared signal real-time processing platform;
(2) can accomplish to be transferred in the infrared simulation Frame of the infrared real-time processing platform of back level uninterrupted;
(3) according to after connect the infrared real time signal processing platform of different back levels corresponding data-interface be provided;
(4) instruction of sending according to main frame can with any frame number infrared simulation view data continual send to the back infrared real-time processing platform of level or with the speed more than the twice fixedly the circulation of frame number infrared simulation view data send to the infrared real-time processing platform of back level;
(5) can when sending the infrared simulation view data, send the infrared background image, and the target information that in the process that sends, superposes in real time.
Description of drawings
Fig. 1 is the system chart of the pouring-in infrared eye analogue system of digital picture.
Fig. 2 is a FPGA internal logic synoptic diagram.
Fig. 3 is a host computer system control flow chart of the present invention.
Embodiment
With reference to the accompanying drawings the specific embodiment of the present invention is described in further detail below, what Fig. 1 showed is the system chart of the pouring-in infrared eye analogue system of digital picture.The realization of total system as can see from Figure 1: from field trial infrared picture data storehouse, call corresponding infrared picture data by application program, host driver writes host memory with infrared picture data, notify FPGA that the infrared simulation view data in the PC internal memory is read by pci bus then, and write among the SDRAM, last from SDRAM, read the infrared simulation view data by FPGA again and agreement according to the rules sends to the infrared real time signal processing platform of back level.
The pci bus clock frequency is 33MHz in the design of the present invention, the 32bit data bus.Pci bus has at a high speed, the data transmission characteristics of burst (Burst), under the design's condition, if FPGA can constantly apply for bus, adopt the burst read-write in the time of each read-write operation, and one time the read-write operation cycle data can reach 64 clock period, the bandwidth of pci bus can reach 107MByte/s so in theory, has reached the purpose of infrared picture data high-speed transfer.But in fact the pci bus arbiter device of main frame is to allow FPGA monopolize pci bus, and therefore surveying transfer rate is 40MByte/s.And, because moderator can not allow FPGA monopolize pci bus, therefore, between the read-write of two secondary bursts, have the free time in the time interval at random.If emulation is planar array detector,, will cause in the frame of emulating image data discontinuous owing to this free time because image pixel is more.Discontinuous and actual infrared eye output situation does not meet in the frame of this view data, can not well reach the purpose of emulation.In order to solve this for topic, introduced another gordian technique among the design, be exactly on FPGA, to connect two high capacity SDRAM storeies.When main frame sends to FPGA by pci bus with infrared picture data, FPGA is buffered in the infrared simulation view data among the SDRAM earlier, after SDRAM deposits frame data or multiframe data, the infrared real time signal processing platform that connects after again it being transmitted to so just can reach the continuous purpose of the interior emulating image data of frame.It should be noted that on FPGA articulated two SDRAM, the purpose of doing has like this increased memory capacity on the one hand, be easy to also on the other hand realize that two SDRAM are operated under the table tennis data exchange mode to improve transfer rate.
In whole design, PC is responsible for the Control work of total system.And FPGA plays the effect of interface and auxiliary control in whole design.The instruction that main frame sends can with any frame number infrared picture data continual send to the infrared real-time processing platform of back level or with the speed more than the twice fixedly the circulation of frame number infrared picture data send to the infrared real-time processing platform of back level, the realization principle of this mechanism has detailed elaboration in the explanation of Fig. 3.According to after connect the infrared real time signal processing platform of different back levels and corresponding data-interface be provided and when sending the infrared simulation view data, send the infrared background image, and in the process that sends in real time the stack target information finish by the FPGA internal logic.
Fig. 2 shows the FPGA internal logic synoptic diagram among the present invention.The PCIBridge Core that the interface of FPGA and pci bus has adopted open IP to organize Opencores to provide.This nuclear provides the interface of Wishbone SOC (system on a chip) bus and PCI logic bus.Control state machine is connected with PCIBridge Core and has adopted the Wishbone agreement.When main frame by the state machine sending controling instruction of pci bus to FPGA, perhaps the register of initialization FPGA inside the time, FPGA is as target device.And after the mode of operation of the intact FPGA of host setting, when obtaining infrared picture data from host memory by FPGA, FPGA will can avoid host side to interrupt the possibility of the last transaction of pci bus owing to the reason of other more complicated such as operating system as the initiating equipment of pci bus transaction so as far as possible.When using this nuclear, be also noted that relevant register will be set, allow this nuclear when reading the data of host memory, can adopt the mode of burst, improve transfer efficiency.
Sdram controller among the FPGA is according to the design proposal design of the SDRAM Controller IP Core of Alteral company.The read write command that is mainly used to finish the initialization of SDRAM, FPGA is sent is converted to work such as read-write that SDRAM requires, periodic refreshing SDRAM.Submit the data on the sdram controller data bus to SDRAM because send the SDRAM read write command at every turn, the delay time of 11 clock period is arranged.Therefore, must allow SDRAM be operated under the pattern of whole page or leaf read-write, and allow the length of each burst read-write be set to 64 clock period, i.e. 256Byte.It is just considerably less that the delay time of each read-write is on average shared on each byte, both improved transfer efficiency, simultaneously also very convenient flexibly.
The work that outside infrared system for real-time signal processing interface is mainly finished is that the requirement according to the infrared real time signal processing platform of back level provides control signal corresponding, and when submitting infrared image to according to every frame to the target that the different monochrome informations of stack diverse location are set of FPGA internal object information register.Outside infrared real time signal processing interface module can be configured to the interface mode of different agreement arbitrarily, and is very flexible, and the versatility of this infrared simulation device has been strengthened greatly.
Fig. 3 shows host computer system Control Software process flow diagram of the present invention.Two kinds of functions are arranged during real work of the present invention: one, with any frame number infrared image of accessing in the infrared picture data storehouse at a high speed, the continual infrared real time signal processing platform of back level that sends to; Two, the fixedly frame number infrared picture data that will be stored among the SDRAM sends to the infrared real time signal processing platform of back level with the rate loop more than the twice.Function one can satisfy the emulation demand of present most of infrared eyes, and second function is the emulation demand for the novel infrared detector that may occur future.Adopted in the design that is implemented in native system of two functions and in host application program, selected two kinds of different mode m ode0 and mode1 to realize.
When realizing function one, select mode0 in the corresponding host driver.When realizing function two, select mode1 in the corresponding host driver.Can see from Fig. 2 the difference of two kinds of pattern maximums is when to send switching SDRAM instruction.If when being operated in mode1, whenever send a frame image data to FPGA and just send the instruction of once switching SDRAM, in fact just allow two SDRAM be operated under the pattern of table tennis.A SDRAM is when accepting the view data of reading to come from main frame under the control of the state machine of FPGA, the previous frame view data of being preserved among another piece SDRAM just can be sent to the infrared real time signal processing platform of back level.If when being operated in mode0, be not that each FPGA reads away frame data from main frame, main frame will send the instruction of switching SDRAM, but when a SDRAM is filled with the view data of enough multiframes, just can send switching command, just can realize being stored in function that the fixedly frame number view data among the SDRAM is read repeatedly.Such design realizes two kinds of functions very cleverly with the state machine in the cover FPGA, saved the resource in the sheet, also is a gordian technique of the present invention.
One embodiment of the present of invention are as follows:
The SDRAM of the MT48LC8M32B2 model of Micron company is as buffer memory.Finish all exchanges data control and pci bus interface and SDRAM chip interface and and the interface of the infrared real time signal processing platform of back level by the xc2v1000 model FPGA of a slice Xilinx company.Xc2v1000 has resource in enough sheets.There is the BlockRam of 40 18kbit its inside, can be easily design abundant inside FIFO buffering is provided.In addition, there are eight DCM Clock management modules inside, can only provide under the situation of one road clock input, easily need not external other chips just can be for the clock of needed different frequency is provided between the internal logic module.There are 5120 Slice unit inside, because comprised PCI bridge, sdram controller, internal control state machine among this FPGA, still more complicated comparatively speaking, when realizing at last, the actual inside Slice that takies is about about 60%, the multi-purpose possibility of existing expansion brings too many difficulty can for the placement-and-routing of FPGA yet.Main frame is DELL Precision 670 workstations.
Test result is as shown in the table:
| Picture format | The image transfer mode | Average frame number/the s that transmits | Average transmission rate |
| 256 x, 256 pixel 16bit/ pixels | Frame number is play (stack target information) continuously arbitrarily | 152 | 19.939MByte/s |
| 256 x, 256 pixel 16bit/ pixels | Fixedly frame number is play continuously | 303 | 39.81MByte/s |
Claims (2)
1. the device of an outputting signal of emulation infrared detector comprises:
(1) one in the main frame of band pci bus (2), host memory contains the pouring-in infrared eye analogue system of infrared picture data storehouse, the digital picture driver that field trial is gathered, and there are infrared picture data storehouse that comprises target information and the infrared background image data base that does not comprise target information in described infrared picture data storehouse;
Infrared real time signal processing platform (5);
On-site programmable gate array FPGA (3) is connected in main frame (1) and infrared real time signal processing platform (3);
The also outer two high capacity synchronous DRAM SDRAM (4) that hang with of described FPGA, two SDRAM are operated under the table tennis data exchange mode to improve transfer rate;
Main frame (1) is given FPGA (3) by pci bus (2) with the infrared simulation image data transmission in the described infrared picture data storehouse, and FPGA (3) gives back level infrared real time signal processing platform (5) according to the interface mode that the back infrared real time signal processing platform of level (5) requires with the infrared simulation image data transmission;
The control state machine of described FPGA inside is connected with pci bus by the PCIBridge Core that open IP organizes Opencores to provide; Control state machine is connected with two plug-in SDRAM respectively by two sdram controllers; Control state machine has also connected data selector, is used to realize that the table tennis of SDRAM output data switches; Under the control of control state machine, data are at last by infrared real time signal processing platform interface output.
2. utilize the device of the described a kind of outputting signal of emulation infrared detector of claim 1 to carry out the emulation mode of infrared eye output signal, it is characterized in that may further comprise the steps:
Main frame is given FPGA by pci bus with the infrared simulation image data transmission;
Following task is finished in the instruction that FPGA sends according to main frame:
1) data-moving, when main frame is ready to a frame or multiframe infrared simulation view data, send reading order, FPGA can write an infrared simulation view data of designated length in the assigned address in the host memory among the SDRAM and go, when main frame is write a SDRAM, the infrared simulation view data among another piece SDRAM can be read into the infrared real time signal processing platform of back level;
2) read-write SDRAM switches, when main frame sends switching SDRAM instruction, two SDRAM roles can be exchanged, the SDRAM that originally was used to write data in the host memory will be used for to the back infrared real time signal processing platform of level provides data, and originally be used for providing the SDRAM of data will be used to preserve the data that send over from main frame for the back infrared real time signal processing platform of level;
3) provide interruption to main frame, after reading the data block of designated length, can send interruption, allow main frame that the next frame data can be provided to main frame from main frame;
4) according to the instruction of main frame, the infrared real time signal processing platform of level provides the infrared simulation that comprises target information view data backward; Perhaps the infrared real time signal processing platform of level provides the infrared background emulating image that does not comprise target information data backward, and the target information that superposes in real time in the process that sends, the stack of target information is finished by the inner infrared real time signal processing platform interface logic of FPGA.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100461192A CN100498806C (en) | 2007-09-19 | 2007-09-19 | Device and method for outputting signal of emulation infrared detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100461192A CN100498806C (en) | 2007-09-19 | 2007-09-19 | Device and method for outputting signal of emulation infrared detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101118568A CN101118568A (en) | 2008-02-06 |
| CN100498806C true CN100498806C (en) | 2009-06-10 |
Family
ID=39054682
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2007100461192A Expired - Fee Related CN100498806C (en) | 2007-09-19 | 2007-09-19 | Device and method for outputting signal of emulation infrared detector |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100498806C (en) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101551827B (en) * | 2008-04-02 | 2013-11-06 | 中兴通讯股份有限公司 | Test method and device capable of switching multi-simulation accuracy |
| CN101276318B (en) * | 2008-05-12 | 2010-06-09 | 北京航空航天大学 | Direct access data transmission control apparatus based on PCI-E bus |
| CN102004219B (en) * | 2010-09-17 | 2014-06-04 | 南京理工大学 | Infrared focal plane array detector simulation device and method |
| CN102117342A (en) * | 2011-01-21 | 2011-07-06 | 中国科学院上海技术物理研究所 | Peripheral component interconnect (PCI) Express bus-based multiband infrared image real-time acquisition system and method |
| CN102538972B (en) * | 2011-12-31 | 2014-04-09 | 中国电子科技集团公司第四十一研究所 | Infrared focal plane array signal simulator |
| CN103108162A (en) * | 2013-01-31 | 2013-05-15 | 西安唐都科教仪器开发有限责任公司 | High-definition high-frame-rate real-time video anti-reflection instrument |
| CN103440389B (en) * | 2013-08-31 | 2016-04-27 | 西安电子科技大学 | Based on infrared camouflage effect emulation system and the appraisal procedure of full link |
| CN103618854A (en) * | 2013-11-19 | 2014-03-05 | 中国电子科技集团公司第四十一研究所 | Programmable simulation device and method for infrared focal plane device output signal |
| CN103856736B (en) * | 2014-01-10 | 2017-05-17 | 北京环境特性研究所 | Real-time remote configurable image injection device with a plurality of output interfaces |
| CN104023243A (en) * | 2014-05-05 | 2014-09-03 | 北京君正集成电路股份有限公司 | Video preprocessing method and system and video post-processing method and system |
| CN104467909B (en) * | 2014-12-23 | 2016-11-30 | 天津光电通信技术有限公司 | A kind of transmission circuit of configurable pci bus based on FPGA technology |
| CN104535194A (en) * | 2015-01-15 | 2015-04-22 | 厦门理工学院 | Simulation device and method of infrared detector based on DMD |
| CN104765930B (en) * | 2015-04-22 | 2018-04-20 | 清华大学 | Overhead infrared Target Countermeasure analogue system |
| CN105681651B (en) * | 2016-01-08 | 2018-11-06 | 北京环境特性研究所 | A kind of embedded high-speed real-time scene video generation device |
| CN105654419A (en) * | 2016-01-25 | 2016-06-08 | 上海华力创通半导体有限公司 | Operation processing system and operation processing method of image |
| CN105929730B (en) * | 2016-04-21 | 2018-08-07 | 西安电子科技大学 | A kind of compound alarm analogue system of laser infrared and method |
| CN105930292B (en) * | 2016-04-28 | 2018-12-18 | 上海机电工程研究所 | A kind of method and its system realizing IR Scene high speed and injecting in real time |
| CN109544493A (en) * | 2018-11-09 | 2019-03-29 | 中国科学院长春光学精密机械与物理研究所 | A kind of real-time injection device of high speed optoelectronic theodolite target |
| CN109710551B (en) * | 2018-12-28 | 2022-12-06 | 中国科学院长春光学精密机械与物理研究所 | Injection type simulation system based on FMC standard |
| WO2021217436A1 (en) * | 2020-04-28 | 2021-11-04 | 深圳市大疆创新科技有限公司 | Infrared data processing method, chip, terminal and system |
| CN113259540B (en) * | 2020-12-18 | 2024-04-02 | 深圳怡化电脑股份有限公司 | Processing method, device, equipment and storage medium for scanning image data |
| CN116130561B (en) * | 2023-04-14 | 2023-06-27 | 山西创芯光电科技有限公司 | Preparation method of superlattice infrared detector |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5596185A (en) * | 1993-11-10 | 1997-01-21 | Bodenseewerk Geratetechnik Gmbh | Device for generating picture information in real time for testing picture resolving sensors |
| WO2001007902A1 (en) * | 1999-07-21 | 2001-02-01 | General Electric Company | Synthetic reference thermal imaging method |
| CN2646794Y (en) * | 2003-06-24 | 2004-10-06 | 中国科学院光电技术研究所 | Equipment for implementing infrared image background compensation by using digital image processing module |
| CN1546993A (en) * | 2003-12-04 | 2004-11-17 | 上海交通大学 | Infrared target detecting, tracking and identifying system |
-
2007
- 2007-09-19 CN CNB2007100461192A patent/CN100498806C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5596185A (en) * | 1993-11-10 | 1997-01-21 | Bodenseewerk Geratetechnik Gmbh | Device for generating picture information in real time for testing picture resolving sensors |
| WO2001007902A1 (en) * | 1999-07-21 | 2001-02-01 | General Electric Company | Synthetic reference thermal imaging method |
| CN2646794Y (en) * | 2003-06-24 | 2004-10-06 | 中国科学院光电技术研究所 | Equipment for implementing infrared image background compensation by using digital image processing module |
| CN1546993A (en) * | 2003-12-04 | 2004-11-17 | 上海交通大学 | Infrared target detecting, tracking and identifying system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101118568A (en) | 2008-02-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100498806C (en) | Device and method for outputting signal of emulation infrared detector | |
| CN100538565C (en) | Be used for method and apparatus based on the redundancy approach of the design of Controller of processor | |
| EP1217602B1 (en) | Updating image frames in a display device comprising a frame buffer | |
| CN105549916B (en) | Peripheral component interconnect express (PCIe) solid state hard disk controller, PCIe based storage system and data read and write method thereof | |
| CN102117342A (en) | Peripheral component interconnect (PCI) Express bus-based multiband infrared image real-time acquisition system and method | |
| CN104702474A (en) | FPGA (Field Programmable Gate Array)-based EtherCAT (Ethernet Control Automation Technology) main station device | |
| CN102945291A (en) | High-speed image acquisition memory card based on PCI-E (Peripheral Component Interconnect-Express) | |
| CN101876925A (en) | Internal storage mirroring method, device and system | |
| CN108279927A (en) | The multichannel command control method and system, controller of adjustable instruction priority | |
| CN105320462A (en) | Data access method for solid state driver | |
| CN103632708B (en) | The self refresh control apparatus of synchronous DRAM and method | |
| CN106547483A (en) | A kind of SDR sdram controllers of Universal efficient and its method of work | |
| CN104535194A (en) | Simulation device and method of infrared detector based on DMD | |
| CN105631057A (en) | ARM-based high-speed data acquisition system | |
| CN102802016B (en) | CCD signal simulator and simulation method | |
| CN108134912A (en) | A kind of video flow converting method | |
| CN112463665A (en) | Switching method and device for multi-channel video memory interleaving mode | |
| US20140019742A1 (en) | Approach for managing state transitions of a data connector | |
| CN101969552B (en) | System and method for parallel processing of video data | |
| KR100438736B1 (en) | Memory control apparatus of performing data writing on address line | |
| CN105163108A (en) | Image data dummy source | |
| CN104156907A (en) | FPGA-based infrared preprocessing storage system and FPGA-based infrared preprocessing storage method | |
| CN101488119B (en) | Address interpretation method, apparatus and single-board | |
| CN102693526A (en) | Infrared image processing method based on reconfigurable computing | |
| CN106655975B (en) | Take into account the control device of electric motor of the data communication of low delay and high-throughput |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090610 Termination date: 20110919 |