CN100496048C - Multi-host communication system - Google Patents

Multi-host communication system Download PDF

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CN100496048C
CN100496048C CNB2005100312894A CN200510031289A CN100496048C CN 100496048 C CN100496048 C CN 100496048C CN B2005100312894 A CNB2005100312894 A CN B2005100312894A CN 200510031289 A CN200510031289 A CN 200510031289A CN 100496048 C CN100496048 C CN 100496048C
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priority
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communication
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CN1671141A (en
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邹润民
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Abstract

This invention discloses a micro controller with bus and intercommunicated nodes for multi-host communication system, which contains data transmission unit, receiving unit, asynchronous series communication interface, bus monitor check unit, priority mark transmission unit, bus priority arbitration unit, priority mark filter unit, data/address identifying unit, wherein the asynchronous series communication interface connected with a multi-host interface whose another end connected with said bus. Said invention not only realizes point-to-point multi-host communication among plurality of equipment but also does not increase the occupation to software and hardware resource of MCU, and reduces cost and raises efficiency.

Description

Multi-host communication system
Technical field
The present invention relates to a kind ofly in the integrated type network equipment system, each node can initiatively be initiated the multi-host communication system of communication request.
Background technology
Application and development along with network technology and automatic control technology, control system becomes increasingly complex, the application of various control system develops to the direction of multimachine networking gradually from unit, measurement and control systems such as for example data acquisition, fire-fighting, gate inhibition, consumption, this just needs to form between each measurement and the control appliance or between each equipment and the microcomputer network to intercom mutually.
At present, realize the data communication between a plurality of control appliances, prior art mainly adopts dual mode: a kind of is the MS master-slave communication system that adopts communication mode formations such as RS-485, as shown in Figure 1; Another kind of mode is to adopt fieldbus or Industrial Ethernet mode to constitute how main peer communication system, as shown in Figure 2.
In the MS master-slave communication system that communication modes such as RS-485 constitute, the microcontroller of each equipment has transmission and receives packet transmission and receiving element and the asynchronous serial communication interface that comprises destination address, this machine address, fixed-length data, CRC check sign indicating number, connected in series by 485 interfaces, one end and MCU, the other end links to each other with bus.Because its bus interface ardware feature has determined that can only have one in the all-network node in such network system is host node (can initiatively initiate the node of communication request), and other node is for from node (can not initiatively initiate the node of communication request).The general work situation of such network be host node regularly in turn and respectively communicate from node, respectively only when host node requires its communication, could communicate, and respectively from not intercoming mutually between the node with host node from node.From number of nodes more for a long time, each from the time interval that node is communicated by letter with host node will be big more, have data to give the correct time when run into accident from node, also can only wait until the host node repeating query to data could being reported at that time, so system real time and communication efficiency are relatively poor.In addition, also the place one's entire reliance upon reliability of host node of the reliability that we also can find out such network on the operation principle of such network, whole network can not communicate again when the host node fault.Adopting the great advantage of the communication system of RS-485 mode is that device hardware is simple in structure, system cost is cheap, this mainly is because inner this of each smart machine just has MCU, and each node control equipment only needs to increase on hardware once cover RS-485 transmitting-receiving interface and can make equipment possess network savvy.
In the how main peer communication system that adopts fieldbus or Industrial Ethernet mode to constitute, each equipment all will increase the specialized protocol explanation chip that a responsible agreement is explained, explain that by specialized protocol chip is responsible for and the MCU interface of equipment itself and control external bus interface, and bus communication protocol made an explanation, realize multi-host communication.Adopt specialized protocol to explain that the advantage behind the chip is conspicuous: to be responsible for the interface control and the mistake of bus and to have handled because specialized protocol is explained chip, its communication link is reliable and stable, speed is higher, system real time is higher, and, the MCU of each equipment itself can realize exchanges data with external bus because only needing to carry out exchanges data separately by the requirement of specialized protocol explanation chip and its, and the realization multi-host communication, the software burden of equipment MCU is also less.This communication network though simplified the burden of equipment MCU and user's design complexity, also exists some disadvantages:
(1) specialized protocol is explained chip price higher (price that often surpasses the MCU of a lot of equipment own), product (various industry and the product for civilian use huge) for a lot of cost control strictnesses as quantity, this kind communication mode can not be considered, other communication mode can only be selected; (2) specialized protocol explains that in general the interface of chip and equipment MCU all is the parallel bus interface mode, and what adopt in present a lot of equipment all is that the monolithic operational mode (is that MCU itself in the equipment possesses certain peripheral functionality, need not carry out the bus expansion), therefore adopt this kind communication mode will cause the complicated of device interior hardware circuit, will cause the volume of equipment to increase simultaneously (explaining chip) because will increase bus expanded circuit and this specialized protocol of MCU.(3) various fieldbus have different separately procotols and soft, hardware requirement, and it is incompatible each other, specialized protocol explains that chip manufacturer is foreign vendor, part manufacturer in addition require the user and certain agreement of its signing after could supply with User Agreement and explain chip, therefore after a large amount of energy of input and money have been developed these total line products, be limited by protocol chip manufacturer easily as the user, hardly other choice may be arranged again; (4) because bus communication protocol is fixed (behind the selected bus type, bus communication protocol is just fixing), might not be suitable for user's application need;
In a word, the dual mode of present widely used multi-point perhaps can not satisfy the requirement of multi-host communication, perhaps has shortcomings such as hardware cost height, volume can't dwindle, circuit complexity.
Summary of the invention
The object of the present invention is to provide a kind of multi-host communication that both can realize each node in the network, make that again the network struction cost is low, equipment volume is little, the simple multi-host communication system of circuit.
Multi-host communication system of the present invention, each node device that have bus, intercoms mutually, described each node device comprises microcontroller and has the multiple main interfaces of difference transmission and receiving ability chip that described microcontroller has transmission and receives packet transmitting element and packet receiving element and the asynchronous serial communication interface that comprises destination address, this machine address, fixed-length data, CRC check sign indicating number; It is characterized in that described microcontroller also has the bus monitoring detecting unit that is used for judging when each node device is initiatively initiated communication request that bus is whether idle; Be used for each node device captures bus by different level of priority priority sign transmitting element; When being used for two or more node devices and initiating communication request simultaneously and cause bus collision, the trunk priority power arbitration unit of arbitrating by the good level of priority of each apparatus settings; The priority sign filter element of priority sign is abandoned in filter when being used for each equipment receiving data; Data/Address Recognition unit; Described asynchronous serial communication interface sends and to link to each other with the multiple main interfaces of receiving ability chip with a described difference that has, and the described other end that has the multiple main interfaces of difference transmission and receiving ability chip links to each other with described bus.
From technical scheme of the present invention as can be seen, it is compared with the MS master-slave communication system that existing RS-485 communication mode constitutes, and has increased be used for judging when each equipment is initiatively the initiated communication request bus bus monitoring detecting unit of free time whether; Priority sign transmitting element; During bus collision, the trunk priority power arbitration unit that the high low level of priority that configures by each node device is arbitrated; The priority sign filter element of priority sign is abandoned in filter during each equipment receiving data; Data/Address Recognition unit; 485 interfaces have been substituted by a multiple main interfaces that has difference transmission and receiving ability chip in addition.On the physical layer of network, can set up many main equipment relations like this by the multi-host communication interface, each node sends data with message mode, before sending data, whether detect communication bus by the bus monitoring detecting unit earlier has other node taking the signal of bus (transmission data), if detect sort signal, illustrate that bus is just busy, can not send data; Otherwise the explanation channel idle can begin to send data.When two or more nodes send data simultaneously, bus clashes, according to its pre-set priority high low level arbitrated the node of competing by trunk priority power arbitration unit this moment, allows the high node of priority continue to send and the low equipment of priority initiatively withdraws from transmission.We can establish height with the priority of the demanding node of real-time, this node just preferentially other node carry out data and send, so just can satisfy of the requirement of different stage node to real-time.Therefore can be divided into bus arbitration phase and packet the whole message transmission phase and send the phase, the same destination address sign indicating number, this machine address code, fixed-length data, the CRC check sign indicating number of also comprising of packet that the packet that the packet transmission phase sends sends with the RS-485 communication mode.When each node device receives data priority sign filter element automatically filter abandon the priority id signal, do not influence reception, and be that data or address receive and get ready in advance by data/Address Recognition unit to packet.The present invention has not only realized carrying out between a plurality of equipment point-to-point multi-host communication, and do not increase taking of, hardware resource soft to equipment microcontroller MCU, make that the network struction cost is low, equipment volume is little (the MS master-slave formula network of its cost, volume and employing RS-485 mode is suitable).Owing to utilized the hardware of multi-host communication interface and equipment MCU to carry out bus arbitration and data selection, make the data that require MCU to handle significantly reduce, thereby greatly reduced the software overhead of MCU simultaneously, improved the operating efficiency of MCU.。
Description of drawings
Fig. 1 is the structural representation of prior art RS-485 communication system.
Fig. 2 is the structural representation of the how main peer communication system of prior art.
Fig. 3 is a multi-host communication system structural representation of the present invention.
Fig. 4 is multiple main interfaces circuit theory diagrams of the present invention.
Fig. 5 is that data of the present invention send message format.
Fig. 6 is a data transmission procedure flow chart of the present invention.
Fig. 7 is the flow chart of DRP data reception process of the present invention.
Fig. 8 is that nondestructive bus is arbitrated example schematic by turn.
Embodiment
As can be seen from Figure 3, multi-host communication system of the present invention is adapted to the common bus of many equipment and communicates, and a plurality of equipment come Data transmission by bus.For each control appliance, the parts composition and the structure that are used for data communication between them are identical, the microcontroller (following represent with MCU) and the multiple main interfaces that all comprise equipment itself, MCU have and send and receive packet transmitting element and receiving element and the asynchronous serial communication interface that comprises destination address, this machine address, fixed-length data, CRC check sign indicating number; Also be useful on and judge the bus monitoring detecting unit of judging when described equipment is initiatively initiated communication request that bus is whether idle; Be used for each node device captures bus by different level of priority priority sign transmitting element; When being used for two or more node devices and initiating communication request simultaneously and cause bus collision, the trunk priority power arbitration unit of arbitrating by the good level of priority of each apparatus settings; The priority sign filter element of priority sign is abandoned in filter when being used for each equipment receiving data; Data/Address Recognition unit; Be connected by serial transmission line between the asynchronous serial communication interface of MCU and the multiple main interfaces, multiple main interfaces is connected with bus again.When MCU will send data, at first whether idle by bus monitoring detecting unit testbus, if detect bus after the free time then start priority sign transmitting element and send the priority sign, by trunk priority power arbitration unit trunk priority power is arbitrated then, arbitration result feeds back to the packet transmitting element, and the packet transmitting element carries out data message by asynchronous serial communication interface and multiple main interfaces and sends after obtaining bus control right.
Be sent to the asynchronous serial communication interface after the data transaction of multiple main interfaces with detected network, the bus monitoring detecting unit starts priority sign filter element after detecting this signal, the filter of priority id signal is abandoned, data after the filter carry out through data/Address Recognition unit being sent to the packet receiving element after the identification of data and address, data are sent to the MCU applying portion after will receiving processing by the packet receiving element.
The multiple main interfaces circuit as shown in Figure 4.U2 is the MCU (all smart machines all are equipped with MCU) of various control appliances among the figure, and the TxD of U2 and RxD are respectively the transmitting terminal pin and the receiving terminal pin of the inner asynchronous serial communication mouth of MCU; U1 for multiple main interfaces in the system of the present invention with have that difference sends and the special chip of receiving ability, its model generally adopts PCA82C250, PCA82C251, TJA1040, TJA1050 etc., that present embodiment is used is PCA82C250, and U1 and accessory circuit thereof have constituted external bus interface of the present invention.What the bus in the native system topology network adopted is twisted-pair feeder, and one that chooses wantonly wherein again is defined as N_H, and then another root is defined as N_L.N_H among Fig. 4 is N_H described in the network topology, N_L is N_L described in the network topology, 7 pin of U1 link to each other with resistance R 2, the other end of resistance R 2 links to each other with N_H, and 6 pin of U1 link to each other with R3, and the other end of R3 links to each other with N_L, the TxD of U2 links to each other with the TxD of U1, the RxD of U2 links to each other with the RxD of U1, and U1, R2, R3 finish external bus interface jointly, and the MCU of control appliance carries out exchanges data by U1 and external bus just; One end of resistance R 1 links to each other with 8 pin of U1, (ground of indication is the common reference point of device interior to other end ground connection in the control appliance, general hypothesis this place is zero-potential point, the inner institute of control appliance target voltage is all compared with this place, and control appliance MCU also is potential reference point with this place); The 2 pin ground connection of U1,3 pin of U1 connect+5V; In Fig. 3 A, we with control appliance MCU be+5V power supply power supply describes, for control appliance MCU be other power voltage system we only need the increase voltage conversion circuit to get final product.
Fig. 5 shows data of the present invention and sends message format, beginning of message is that length is the priority sign ID of a byte, be exactly packet then, packet is divided into again: destination address sign indicating number (length is 1 byte), this machine address code (length is 1 byte), fixed-length data (length is N byte, decides according to the difference of control appliance), CRC check sign indicating number (length is 2 bytes) be totally 4 parts.CRC effect sign indicating number is for carrying out the cyclic redundancy check (CRC) code of effect to destination address sign indicating number, this machine address code, N byte data.When designing, communication of the present invention adopted nine multi computer communication modes, set: except the 9th bit data position of destination address is 1 (as nine communications time address designation), the 9th bit data position of all the other each bytes (comprising the priority sign) is 0 (as Data Identification), sets good certainly conversely.
Though we have utilized MCU on hardware universal asynchronous communication interface (UART) is as the transmitting-receiving interface, in order to realize arbitrating by turn, data send part we must software simulation UART transmission, and when sending, carry out the collision detection of bus state.Now explain data transmission procedure in conjunction with Fig. 6 data transmission procedure flow chart of the present invention.Node detected by monitoring detecting unit whether the RXD end is the logical zero state earlier before sending data, thereby judged whether bus is occupied, and only being consecutively detected RXD in a period of time T all is the logical one state, just can think the bus free time at this moment.And this time period T will determine according to communication speed, total principle is must be greater than the transmitting time of 1 character frame (during for 9 communication modes, T must be greater than 11 times of position communication times), this is that RXD is the logical one attitude when receiving and dispatching because of the asynchronous communication mode free of data, the transmission of each byte comprises a start bit (logical zero), eight or nine bit data positions and a position of rest (logical one), therefore must be consecutively detected the interior RXD of 11 times of position communication times and be logical one, could assert that not having other node is sending data.Therefore, after process of transmitting begins, promptly enter step S101, delay parameter T (requiring as mentioned above) is set this moment, then step S102 testbus state whether idle (whether the RXD end that is equipment MCU is the logical one state), if bus not idle (taken by other node, the RXD end is 0) then jumps to the transmission submodule and begins the place, restart from step S101 then; If detect the bus free time (the RXD end is 1), then enter step S103, judge whether delay time T arrives, if delay time does not arrive, then continue step S102; If delay time arrives, then enter step S104.At step S104, begin to send the start bit (logical zero) of communication frames, enter step S105, the 1 times of position communication time t that delays time, S104, S105 finish the transmission of communication frames start bit.Enter step S106 then, send the lowest order that priority identifies ID by priority sign transmitting element, enter step S107, the 0.5 times of position communication time of delaying time enters step S108 then.Step S108 utilize trunk priority power arbitration unit detect this moment the RXD end whether with on the data logic mode that sends during a forwarding step identical, if it is different, then explanation bus this moment has conflict, there is the higher node of priority level taking bus, just jump to the place that begins that sends submodule this moment, restart from step S101 then; If the data logic mode identical (bus does not have conflict) that sends when detecting RXD with a last forwarding step, the transmission success that previous step is rapid then is described, can enter next step S109, the 0.5 times of position communication time of delaying time is so far finished the transmission of 1 data bit of priority sign ID.Enter next step S110 then, judge whether priority sign ID sends to finish,, then enter step S111, send next data bit of priority sign ID, forward step S107 then to and continue if also do not send; Finish if send, then enter step S112, send the 9th bit data position (logical zero) of priority sign ID, then enter step S113 after sending the 9th, send the position of rest (logical one) of priority ID correspondence, after S113 finishes, priority sign ID sends and finishes, this moment, this node was robbed the bus ownership, just can begin to send normal packet in the mode of not testbus conflict then, promptly entered step S114.Step S114 sends the address code of destination node in the mode of not testbus conflict (to indicate the ID process similar with sending priority for process of transmitting, just do not need the testbus conflict, and the 9th bit data position sends logical one), enter step S115 then, send the address code (the 9th data bit sends logical zero) of this machine in the mode of not testbus conflict, after finishing, step S115 promptly enters step S116, send the data (the 9th bit data position of each byte transmit frame all sends logical zero) of fixed length successively in the mode of not testbus conflict, after finishing, S116 then enters step S117, calculate the CRC check sign indicating number of this group packet, enter the CRC check sign indicating number that step S118 sends this group packet (two bytes altogether then, and the 9th bit data position of each byte transmit frame all sends logical zero), after finishing, S118 promptly finishes to send the submodule process.After finishing data transmission procedure, when equipment had data to send again to require, equipment MCU can carry out data with identical flow process again and send.
Below in conjunction with Fig. 7 decryption receiving course.Suppose that equipment MCU receives the asynchronous serial communication data with interrupt mode.At first, equipment MCU after startup just communication modes be set to 9 asynchronous serial communication modes, and be interrupt to receive.When entering to receive, each node device interrupts, the priority id signal is abandoned in the filter earlier of priority sign filter element, when having only address code to enter (the 9th bit data position is 1 character frame), equipment MCU just can enter to receive and interrupt, other any data can not cause entering the reception interrupt service routine, and priority sign ID (the 9th bit data position is set at 0) can not enter the reception interrupt service routine naturally.After entering the reception interrupt service routine,, judge at step R102 whether the address code that receives is this machine address (whether being to send to this machine promptly) at step R101 user software receiver address sign indicating number, if not, then interrupt returning; If what receive is this machine address code, then enter step R103.At step R103, it is the working method of 0 (data) for receiving only the 9th that equipment MCU is set, and by discerning data/Address Recognition unit, prepares to receive numeric data code; At step R104, receive whole packet with inquiry mode, calculate CRC check sign indicating number (cyclic redundancy check (CRC) code) at step R105, judge at step R106 whether the CRC sign indicating number that calculates equates with the CRC sign indicating number that receives, if illustrate that then the packet that receives is correct, enter the data processing work after step R107 continues packet reception correctly; If CRC check is not passed through, then enter step R108 and carry out work of treatment (as put receive error flag, require transmit leg repeating transmission etc.) after packet receives mistake.Enter step R109 after step R107, R108 finish, equipment MCU is set, by discerning data/Address Recognition unit, prepare, interrupt behind the step R109 returning for receiver address sign indicating number next time for to receive only the 9th be the working method of 1 (address code).So far, the DRP data reception process of equipment finishes.When having again on the bus after new data send, equipment can receive data with identical flow process again.
From the data transmission procedure of system of the present invention as can be seen, each node all sends data with message mode, the bus arbitration phase arbitrates the multinode of competing, allow the high node of priority continue to send and the low equipment of priority initiatively withdraws from transmission, and adopt carrier sense multiple access CSMA (Carrier Sense Multiple Access) technology to solve the bus collision problem, be that node is before sending message, whether at first detect communication bus has other node sending the signal of data, if detect sort signal, illustrate that channel is just busy, can not send data; Otherwise at this moment the explanation channel idle can send data.Because each node is monitored bus before sending data, therefore bus collision only may occur in the incipient stage of each communication, at communication speed is 19.2Kbps even when lower, the communication line time-delay will be much smaller than the communication bit time, therefore first byte was in the transmission time when bus collision only can occur in communication and begins, and can not occur in the communication process that has begun.When having two or more nodes to send data simultaneously, bus access conflict mechanism is used arbitration rules by turn, and ID solves by the priority sign.Be about to a period of time that each communication begins, be defined as the bus arbitration phase, during this period, each transmitter all compares with detected bus state on bus the state that sends on the bus, have only that this node just can continue to send when identical, when the transmission of TXD end is " recessiveness " level (logical one), and it is detected when be logical zero (on the corresponding bus is " dominance " level) at RXD end, illustrate that bus is just taken by other node, therefore this node withdraws from arbitration automatically, and no longer transmits subsequent bit.When adopting regular that low level sends earlier, low level is that 0 node bus priority is higher.
The multiple main interfaces that system of the present invention adopts, make bus be divided into two states: dominance and recessiveness, bus state Support Line and function, and depend on dominance condition, be that bus will have automatic priority arbitration function, below multiple main interfaces hardware truth table shown in our associative list 1 explain its course of work:
Figure C200510031289D00091
Device node A that gives an example in the table 1 and device node B are any two nodes in the network, and 0 in the table refers to logic state " 0 ", and 1 refers to logic state " 1 ".We are logic state " 0 " as long as the TXD output of an equipment is arranged as can be seen from table 1, and then the logic state of the RXD of all devices end is " 0 ", that is to say that the logical zero priority is higher.The TXD end of equipment MCU is the logical one states that are in when not sending data, can not influence bus state.If what the MCU of device A sent is logical one, but its RXD end is detected to be logic state " 0 ", then the MCU of device A just knows that explanation has other node sending data this moment, and priority is higher than own, and this moment, the MCU of device A just can initiatively withdraw from transmission.Therefore the node that sends " recessiveness " level (logical one) can not destroy " dominance " level (logical zero) state, because testbus state before transmission, so conflict only just can occur when multinode sends data simultaneously, the data bit that each node before clashing in therefore each communication process sends all belongs to normal transmission, that is to say, when the low node detection of priority withdraws from communication automatically to bus collision, the datagram that the node that priority is high sends is not affected, and its communication sends and still can normally send by its scheduled plan.
Suppose to have two equipment to send data simultaneously, ID is the data of 0x15 if device A sends the priority sign, it is the data of 0x07 that equipment B sends priority sign ID, as shown in Figure 8, because the D1 position of 0x15 is a logical zero, and the D1 position of 0x07 is a logical one, therefore this moment, bus state will be decided by the logical zero of the D1 of 0x15, be dominance condition, thereby the signal of the RXD of all devices end is a logical zero just, equipment B just can find to have occurred conflict when detecting, therefore according to data transmission flow provided by the invention, equipment B will withdraw from process of transmitting automatically.And this kind conflict does not impact the transmission of device A, so device A still can be carried out data by its predetermined way and sent (its data that sent are still effective, because the data of conflict both sides transmission before conflict takes place are identical).Equipment B must waiting facilities A sends could continue its process of transmitting after finishing.Because conflict does not influence the data transmission procedure of the high node of priority, therefore this mode can greatly improve the utilance of logical (news) letter channel, reduce the appearance of bus collision.In actual application, can be set to high priority to the demanding equipment of real-time, thereby it can preferentially send data than the easier bus control right of obtaining of miscellaneous equipment.The bus collision of three or three above equipment analysis classes is therewith seemingly explained no longer one by one at this.
From receiving course of the present invention as can be seen, owing to adopted nine multi computer communication modes when communication of the present invention designs, and the 9th bit data position of setting except destination address is that the 9th bit data position of all the other each bytes is 0 (as Data Identification) 1 (address designation when being used as nine communications).Because the reception program only just begins normal reception receiving after the 9th bit data position is the data of 1 (address), so the priority in each message identifies and can not produce any influence to recipient's program.So after adopting nine multi computer communication modes, can avoid each node to receive the datagram that is not to issue it, thereby can greatly reduce its software overhead, reduce influence to other applying portions.

Claims (2)

1, a kind of multi-host communication system, each node device that have bus, intercoms mutually, described each node device comprises microcontroller and has the multiple main interfaces of difference transmission and receiving ability chip that described microcontroller has transmission and receives packet transmitting element and packet receiving element and the asynchronous serial communication interface that comprises destination address, this machine address, fixed-length data, CRC check sign indicating number; It is characterized in that described microcontroller also has the bus monitoring detecting unit that is used for judging when each node device is initiatively initiated communication request that bus is whether idle; Be used for each node device captures bus by different level of priority priority sign transmitting element; When being used for two or more node devices and initiating communication request simultaneously and cause bus collision, the trunk priority power arbitration unit of arbitrating by the good level of priority of each apparatus settings; The priority sign filter element of priority sign is abandoned in filter when being used for each equipment receiving data; Data/Address Recognition unit; Described asynchronous serial communication interface sends and to link to each other with the multiple main interfaces of receiving ability chip with a described difference that has, and the described other end that has the multiple main interfaces of difference transmission and receiving ability chip links to each other with described bus.
2, multi-host communication system according to claim 1 is characterized in that the chip that described multiple main interfaces adopts is one of following four models: PCA82C250, PCA82C251, TJA1040 or TJA1050.
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