CN100461866C - Image device, image processing system and method thereof - Google Patents

Image device, image processing system and method thereof Download PDF

Info

Publication number
CN100461866C
CN100461866C CNB2006101375927A CN200610137592A CN100461866C CN 100461866 C CN100461866 C CN 100461866C CN B2006101375927 A CNB2006101375927 A CN B2006101375927A CN 200610137592 A CN200610137592 A CN 200610137592A CN 100461866 C CN100461866 C CN 100461866C
Authority
CN
China
Prior art keywords
image
mentioned
picture
compressed frames
compressing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CNB2006101375927A
Other languages
Chinese (zh)
Other versions
CN1956543A (en
Inventor
何镇在
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MediaTek Inc
Original Assignee
MediaTek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MediaTek Inc filed Critical MediaTek Inc
Publication of CN1956543A publication Critical patent/CN1956543A/en
Application granted granted Critical
Publication of CN100461866C publication Critical patent/CN100461866C/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

A video apparatus, a video processing system and a method thereof are provided. The video processing apparatus includes a video decoder and video encoder for processing video frames. The video decoder generates de-compressed frames from the first compressed video frames, and writes the de-compressed frames to the storage, wherein at least one of the de-compresse frames is generated according to the de-compressed frames previously generated. The video encoder generates the second compressed video frames from said de-compressed frame without the repetition of said de-compressed frames. The video processing method includes the following steps: a plurality of de-compressed frames are generated from the first compressed video which have successive compressed frames arranged according to the display order; the second compressed video is generated from the de-compressed frames without the de-compressed frames stored to the storage repeatedly. The smaller memory is adapted to transcoding or displaying.

Description

Device for image, image processing system and method thereof
Technical field
The present invention is a kind of device for image, image processing system and method thereof relevant for a kind of technology that is applicable to the common storage that video conversion sign indicating number and image show concretely.
Background technology
Image converter helps to coding image (for example compressing image) decoding and according to the different encoding mechanisms image coding of will decoding.Image comprises continuous picture (frame) (being called image again), and each picture comprises number row and the pixel (pixel) of counting the hurdle.Transducer can receive first compressing image and produce second compressing image, compared to first compressing image, second compressing image have higher compression ratio (compression ratio) with and/or lower resolution (resolution).
In some embodiments, first compressing image has identical resolution (each picture in first compressing image and each picture in second compressing image have the hurdle and the row of equal number) with second compressing image but has different bit transfer rate (bit rate) (for example the bit transfer rate of first compressing image can be 150~300 kilobits/picture, otherwise the bit transfer rate of second compressing image can be 30~150 kilobits/picture).Concerning according to the image of mpeg standard compression, change quantization standard (quantization level) can change image under the situation that does not influence resolution bit transfer rate.Increase the quantization brigadier and can make more position during encoding, be blocked (truncate), and cause compressing image to have lower bit transfer rate and lower image quality.
In some embodiments, first compressing image has different resolution with second compressing image.For example, first compressing image can be for having high definition TV (HighDefinition Television, HDTV) program that resolution is 1920*1080.If the user has the TV that resolution is 1366*768, when recording in order at the high-definition television programs of watching in the future the time, can help compressing image transcoding with 1920*1080 is that the compressing image of 1366*768 makes TV programme have the resolution consistent with TV.The compression ratio that see through to increase image with and/or reduce the resolution of image, the bit transfer rate that the user can reduce compressing image makes more video program can be stored in a certain amount of storage device.
Concerning some compression algorithms (for example MPEG-2 or MPEG-4), the DISPLAY ORDER of picture is different from the order with picture coding/decoding.Coded picture (intra frame in the mpeg standard definition, I-frame), one-way fashion coded picture (unidirectional frame, P-frame) and reversible coded picture (bidirectional-frame, B-frame), wherein do not need to carry out compression to I-frame with reference to other picture, use the information of previous I-frame or P-frame to carry out compression/de-compression, use the information of previous I-frame or P-frame and next I-frame or P-frame to carry out compression/de-compression B-frame to P-frame.For example, picture can be according to DISPLAY ORDER (for example I0, B1, B2, P3, B4, B5, P6, B7, B8, P9, B10, B11 etc.) and is shown that wherein picture I0 is I-frame shown when the T0 of time zone, and picture B1 is B-frame shown when the T1 of time zone, and the rest may be inferred.On the other hand, picture can be according to coded sequence (for example I0, P3, B1, B2, P6, B4, B5, P9, B7, B8, P12, B10, B11 etc.) and coding/decoding, and representative picture P3 is before picture B1 and B2 and coding/decoding, even picture B1 and B2 are shown in before the picture P3.Because the coding/decoding sequence is different from display sequence, when the compressing image transcoding, can make compressing image be shown in display and be recorded in Storage Media, a plurality of memorizer buffer holders are in order to be temporary in the picture during decoding, demonstration and the coded program.
Summary of the invention
The object of the present invention is to provide a kind of device for image, image processing system and method thereof.
For achieving the above object, the invention provides a kind of device for image, comprise image-decoding device and image coder.The image-decoding device produces plural compressed frames from the first plural compressing image picture, at least one compressed frames produces according to the information of the previous compressed frames that produces.Image coder produces the second plural compressing image picture and does not need to duplicate the compressed frames that is stored in memory from compressed frames.
The realization of device for image can comprise following at least feature.Device for image comprises display controller, does not need the compressed frames of duplicating in order to the demonstration of control compressed frames.Device for image comprises system controller, produces before the compressed frames in order to control image-decoding device, image coder and display controller in being stored in memory is override by subsequently compressed frames and shows the second compressing image picture.Image coder produces corresponding to the plural number of the picture that decompresses from second compressing image and rebuilds picture, and image coder stores rebuilds picture to memory.Device for image comprises display controller, in order to show the reconstruction picture of rebuilding picture and not needing to duplicate.Device for image comprises system controller, produces the second compressing image picture in order to control image-decoding device and image coder before the compressed frames quilt compressed frames subsequently that is stored in memory overrides.Compressed frames comprises interior coded picture, one-way fashion coded picture and reversible coded picture.When compressed frames sorted with DISPLAY ORDER, compressed frames comprised at least two continuous reversible coded pictures.Image-decoding device and image coder common storage, thus, point at any time, memory storage by the image-decoding device write be not more than four compressed frames and by image coder write two rebuild pictures.Image-decoding device and image coder common storage, thus, point at any time, memory storage is not more than six compressed frames.Image-decoding device and image coder common storage, thus, point at any time, maximum seven compressed frames of memory storage.First compressing image and second compressing image have different bit transfer rates.First compressing image and second compressing image have different resolution.Device for image comprises separates scaler, in order to produce low resolution picture from high resolution pictures.First compressing image comprises continuous bit streams.
The present invention also provides a kind of image processing system, comprises image-decoding device, image coder, display controller and system controller.The image-decoding device produces plural compressed frames, has interior coded picture, one-way fashion coded picture and reversible coded picture from the first plural compressing image, and at least some compressed frames produce according to the information of previous compressed frames.Image coder produces the second plural compressing image picture and does not need to duplicate the compressed frames that is stored in the memory from compressed frames, the first compressing image picture and the second compressing image picture have different bit transfer rates with and/or different resolution.The image that display controller is exported the first compressing image picture does not need to duplicate the picture that is stored in the memory to display unit.System controller control image-decoding device and image coder.
The present invention also provides a kind of device for image, comprises image-decoding device and image coding device.The image-decoding device produces plural decoded picture according to the information of early decoding picture from the first plural number coding image frame.The image coding device produces the second plural number coding image frame and does not need to duplicate the decoded picture that is stored in the memory from decoded picture.
The realization of device for image can comprise at least one following feature.Device for image comprises display unit, does not need to duplicate the picture that is stored in the memory in order to the image that shows decoded picture.Decoded picture comprises interior coded picture, one-way fashion coded picture and reversible coded picture.
The present invention also provides a kind of device for image, comprises image-decoding device and image coder.The image-decoding device produces plural compressed frames from the first plural compressing image picture, the first decompression image comprises the continuous squeezed that sorts according to display sequence.Image coder produces the second plural compressing image picture and does not need to duplicate the compressed frames that is stored in the memory from compressed frames.
The realization of device for image can comprise following at least feature.Device for image comprises display controller, does not need the compressed frames of duplicating in order to the image that shows compressed frames.Compressed frames comprises interior coded picture, one-way fashion coded picture and reversible coded picture.
The invention provides a kind of image treatment method, comprise that the information by previous plural compressed frames produces the plural compressed frames of first compressing image; And see through the compressed frames be stored in the memory and produce second compressing image and do not need to duplicate the compressed frames that is stored in the memory.
The realization of image treatment method can comprise following at least feature.Image treatment method comprises the generation of the control compressed frames and second compressing image, so compressed frames was compressed before being override by the subsequent decompression picture.Image treatment method comprises the compressed frames that shows compressed frames and do not need to duplicate storage.Image treatment method comprises the generation of the control compressed frames and second compressing image and the demonstration of control compressed frames, therefore compression and demonstration compressed frames before the subsequent decompression picture overrides compressed frames.Produce compressed frames and comprise coded picture, one-way fashion coded picture and reversible coded picture in the generation.When compressed frames sorted with DISPLAY ORDER, DISPLAY ORDER comprised two continuous reversible coded pictures.Write and coding step comprises that at least six compressed frames of storage are to memory.Write and coding step comprises that at least seven compressed frames of storage are to memory.
The present invention also provides a kind of image treatment method, comprises producing plural compressed frames from first compressing image with the continuous squeezed that sorts according to DISPLAY ORDER; And produce second compressing image and do not need to duplicate the compressed frames that is stored in the memory from compressed frames.
The present invention also provides a kind of image treatment method, comprises decoding first compressing image and produce plural compressed frames; With the compressed frames write memory; Coding compressed frames and produce second compressing image comprises that producing plural number rebuilds picture, in order to the reference as the coded portion compressed frames; And will rebuild the picture write memory, rebuild picture to small part and override the part compressed frames.
The realization of image treatment method can comprise at least one following feature.The data rate of second compressing image is different from the data rate of first compressing image.The resolution of second compressing image is different from the resolution of first compressing image.Image treatment method comprises demonstration reconstruction picture and does not repeat to rebuild picture.Decoding step comprises according to mpeg standard decodes.
Beneficial effect of the present invention is: less memory is applicable to transcoding or demonstration.For example, standard variation optical digital disk (Digital Versatile Disc, DVD, resolution with 720*480) image on can have the bit rate that is about 150~300 every kilobit/pictures, and (Video Compact Disc, VCD) image on can have the bit rate that is about 30~150 every kilobit/pictures in standard optical disc.When the image transcoding on the DVD is when being applicable to the image of VCD, has the compressed frames that bit rate is about 4153.3 every kilobit/pictures and be temporary in the memory.See through image treatment method of the present invention, memory does not need to store simultaneously greater than six (or seven, according to different application and different) compressed frames.When handling resolution and be the HDTV program of 1920*1080, each pixel represents with 12 positions, and each compressed frames has and is about 24.9 megabits.Therefore, be reduced to the number of pictures that must be stored in simultaneously in the memory during decoding, coding and the display routine and can significantly reduce memory use amount and expense.
Description of drawings
Fig. 1 is the block schematic diagram of show image controller.
Fig. 2 A, Fig. 3 A, Fig. 4 A and Fig. 5 A are the schematic diagram of input/output signal.
Fig. 2 B is the calcspar of display-memory device.
Fig. 2 C, Fig. 3 B, Fig. 4 B and Fig. 5 B are sequential chart.
The primary clustering symbol description
Image coder/decoder 8 image controllers 10 image-decoding devices 12 image coders 14
Audio frequency coder/decoder 16 display controllers 18 Memory Controllers 20 storage arrangements 22
System controller 24 input coding images, high bit transfer rate compressing image 26
Signal of video signal 27 displays 28 hurdles, 138 time zone T0-T12
Input buffer 100 output buffers 116 sequential Figure 140,150,160,170
Rebuild coded reference 1 buffer 102 and rebuild coded reference 2 buffers 104
Stage 1 coded buffer, 106 stages 2 coded buffer 108
Stage 3 coded buffers, 110 stages 4 coded buffer 112
Stages 5 coded buffer 114
Output encoder image, low bit transfer rate compressing image 30
Row 120,122,124,126,128,130,132,134,136
Embodiment
For foregoing invention purpose of the present invention and other purpose, feature and advantage can be become apparent, cited below particularlyly go out better embodiment, and cooperate appended graphicly, be described in detail below:
Execution mode:
With reference to Fig. 1, image controller 10 comprises image codec (video codec) 8, display controller 18 and storage arrangement 22.Image codec 8 comprises image-decoding device 12 and image coder 14.Image controller 10 receives input coding image 26 and produces output encoder image 30.Input coding image 26 and output encoder 30 can be used as continuous bit streams and transmit.Input coding image 26 and output encoder image 30 can have the picture of encoding according to different compression algorithms, and different compression algorithms has different compression ratios or resolution.Display controller 18 produces the signal of video signal 27 that is applicable to display 28.Each image 26 and 30 comprises continuous picture.At picture codec, coding and during showing, some picture temporarily is stored in the storage arrangement 22.Image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22 make the number of pictures that must be stored in simultaneously in the storage arrangement 22 be less than other system.Therefore, less storage arrangement 22 just can satisfy the demands.
Image-decoding device 12, image coder 14 and display controller 18 are with specific sequential processes picture, thus, at decoding, coding and during showing, picture does not need to be replicated or moves to another memory location from a memory location, therefore can reduce the number of pictures that must be stored in simultaneously in the memory.Particular procedure is considered the form (for example the picture in the input coding image 26 whether in DISPLAY ORDER or coded sequence), the relation (for example B-frame and P-frame can produce according to previous B-frame and P-frame) between the picture of input coding image 26, whether display frame and type that will picture displayed (for example compressed frames or rebuild picture) in coding in proper order.
Image controller 10 comprises audio coding/decoder 16, in order to audio signal decoding or coding, Memory Controller 20, in order to the access of control to storage arrangement 22, and system controller 24, in order to regulate the operation of image-decoding device 12, image coder 14, audio coding/decoder 16, display controller 18 and Memory Controller 20.
Next for using image controller 10 to come eight execution modes of transcoding (or coding) and show image.
First execution mode:
With reference to Fig. 2 A, in the first embodiment, the input coding image 26 of input is high bit transfer rate compressing image, and the output encoder image 30 of output is low bit transfer rate compressing image.Input coding image 26 has identical resolution with output encoder 30.Input coding image 26 all has the picture that sorts with coded sequence with output encoder 30.Display controller 18 will have high bit transfer rate and the compressed frames that sorts with DISPLAY ORDER is sent to display 28.Image controller 10 outputs have the compressing image 30 (for example in order to store) of low level transfer rate, and display 28 shows the decompression image with high bit transfer rate simultaneously.Input coding image 26 can be encoded according to mpeg standard with the picture of output encoder image 30.
High bit transfer rate compressing image (higher bit-rate compressed video) has higher bit transfer rate with respect to low bit transfer rate compressing image (lower bit-rate compressed video), and high bit transfer rate decompression image (higher bit-rate decompressed video) has higher bit transfer rate with respect to low bit transfer rate decompression image (lower bit-rate decompressed video).Because the cause of compression, high bit transfer rate compressing image can have than the lower bit transfer rate of low bit transfer rate compressing image.The resolution of compressing image is relevant with the resolution of compressed frames.The compressed frames that the compressed frames that the decompression of high-resolution compressing image is produced is obtained by the low resolution, compressed image has higher resolution.
Fig. 2 B shows the storage buffer that is arranged in the storage arrangement 22, in order to be stored in the picture that is produced during decoding, coding and the display routine.Storage arrangement 22 comprises input buffer 100, reconstruction coded reference 1 buffer 102, reconstruction coded reference 2 buffers 104, stage 1 coded buffer 106, stages 2 coded buffer 108, stages 3 coded buffer 110, stages 4 coding rank buffer 112, stages 5 coded buffer 114 and output buffer 116.
Input buffer 100 is in order to storing high bit transfer rate squeezed, and output buffer 116 is in order to store low bit transfer rate squeezed (for example in order to be sent to storage device).Stage 1 coded buffer 106, stages 2 coded buffer 108, stages 3 coded buffer 110, stages 4 coding rank buffer 112 and stages 5 coded buffer 114 are in order to store from the high bit transfer rate compressed frames of image-decoding device 12 outputs.Rebuild coded reference 1 buffer 102 and rebuild the low bit transfer rate reconstruction picture that coded reference 2 buffers 104 are produced by image coder 14 in order to storage, and during the coding of other picture, used by image coder 14.Can make image coder produce low bit transfer rate compressed frames by during picture coding, increasing quantization standard (blocking more position).
Is compressed frames rebuilding coded reference 1 buffer 102 with the low bit transfer rate reconstruction picture of rebuilding in coded reference 2 buffers 104.In this execution mode, rebuild picture and have and the identical resolution of high bit transfer rate compressed frames.
Sequential Figure 140 of time sequencing that Fig. 2 C shows the time sequencing of the picture in the buffer be stored in storage arrangement 22 and is shown in the picture of display 28.Picture is with I0, B1, and B2, P3, B4, B5, P6, P7, B8, P9, B10, B11, the order of P12 shows, and is like that.Row 120,122,124,126,128,130 and 132 represent buffer 102,104 respectively, 106,108,110,112 and 114 content.The time zone of the picture that row 134 expressions are encoded.Picture that row 136 expression display controllers 18 are captured and the time zone that is shown in display 28.
In this execution mode, stages 5 coded buffer 114 is not used.Storage arrangement 22 has stages 5 coded buffer 114 that enough big capacity is provided for other execution mode (for example following the 5th execution mode and the 6th execution mode).
Each hurdle among sequential Figure 140 (for example 138) is shown in during the specific time zone T, buffer, by coded picture of image coder 14 and the content that is shown in the picture of display 28.By finding out among sequential Figure 140, each picture in any set time zone is only by image-decoding device 12, image coder 14 and display controller 18 one of them access, thus image-decoding device 12, image coder 14 and display controller 18 can be under the situation that does not cause conflict the shared picture that is stored in the storage buffer.Each picture in the storage arrangement 22 only stores once and not has duplicate (Duplication).
Next will be described in place, different time zone by the performed program of image-decoding device 12, image coder 14 and display controller 18.Each time zone (T0 for example, T1, T2 ...) represent an image time, when image was set to 30 pictures/second, image time was about 33.3 milliseconds (ms).
Before the T0 of time zone (not icon), high bit transfer rate squeezed I0 is write input buffer 100.Same, at time zone T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, during the T12... respectively with high bit transfer rate squeezed P3, B1, B2, P6, B4, B5, P9, B7, B8, P12, B10, B11... write input buffer 100.
During the T0 of time zone, image-decoding device 12 captures squeezed I0 from input buffer 100, decoding compressed picture I0 and produce high bit transfer rate compressed frames I0, and with compressed frames I0 write phase 1 coded buffer 106.
During the T1 of time zone, image-decoding device 12 captures squeezed P3 from input buffer 100, decoding compressed picture P3 and produce compressed frames P3, and with compressed frames P3 write phase 2 coded buffers 108.Image coder 14 captures high bit transfer rate compressed frames I0 from buffer 106, encode compressed frames I0 and produce low bit transfer rate reconstruction picture I0 ' and low bit transfer rate squeezed I0 ', and will rebuild picture I0 ' and write reconstruction, squeezed I0 ' will be write output buffer 116 with reference to 1 buffer 102.
During the T2 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B1 and is produced high bit transfer rate compressed frames B1, and with compressed frames B1 write phase 3 coded buffers 110.Image coder 14 captures compressed frames P3 from buffer 108, encode compressed frames P3 and produce low bit transfer rate reconstruction picture P3 ' and low bit transfer rate squeezed P3 ', and will rebuild picture P3 ' and write reconstruction, squeezed P3 ' will be write output buffer 116 with reference to 2 buffers 104.Display controller 18 captures high bit transfer rate compressed frames I0 from buffer 106, and makes picture I0 be shown in display 28.
During the T3 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B2 and is produced high bit transfer rate compressed frames B2, and with compressed frames B2 write phase 4 coded buffers 112.Image coder 14 captures compressed frames B1 from buffer 110, coding compressed frames B1 and produce low bit transfer rate squeezed B1 ', and squeezed B1 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames B1 from buffer 110, and makes picture B1 be shown in display 28.
During the T4 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed P6 and is produced high bit transfer rate compressed frames P6, and with compressed frames P6 write phase 1 coded buffer 106.Image coder 14 captures compressed frames B2 from buffer 112, coding compressed frames B2 and produce low bit transfer rate squeezed B2 ', and squeezed B2 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames B2 from buffer 112, and makes picture B2 be shown in display 28.
During the T5 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B4 and is produced high bit transfer rate compressed frames B4, and with compressed frames B4 write phase 3 coded buffers 110.Image coder 14 captures compressed frames P6 from buffer 106, encode compressed frames P6 and produce low bit transfer rate reconstruction picture P6 ' and low bit transfer rate squeezed P6 ', and will rebuild picture P6 ' write buffer 102, squeezed P6 ' will be write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames P3 from buffer 108, and makes picture P3 be shown in display 28.
During the T6 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B5 and is produced high bit transfer rate compressed frames B5, and with compressed frames B5 write phase 4 coded buffers 112.Image coder 14 captures compressed frames B4 from buffer 110, coding compressed frames B4 and produce low bit transfer rate squeezed B4 ', and squeezed B4 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames B4 from buffer 110, and makes picture B4 be shown in display 28.
During the T7 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed P9 and is produced high bit transfer rate compressed frames P9, and with compressed frames P9 write phase 2 coded buffers 108.Image coder 14 captures compressed frames B5 from buffer 112, coding compressed frames B5 and produce low bit transfer rate squeezed B5 ', and squeezed B5 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames B5 from buffer 112, and makes picture B5 be shown in display 28.
At time zone T8, T9, during the T10, image controller 10 is operated to be same as said method.
The operation of designing image decoder 12, image coder 14 and display controller 18 only makes that after image-decoding device 12, image coder 14 and display controller 18 did not re-use first picture, first picture just can be override by second picture.For example, during the T4 of time zone and afterwards, image-decoding device 12, image coder 14 or display controller 18 do not re-use picture I0, and therefore the picture I0 in stage 1 coded buffer 106 can be override by picture P6 during the T4 of time zone.Same, during the T7 of time zone and afterwards, image-decoding device 12, image coder 14 or display controller 18 be the picture P3 in operational phase 2 coded buffers 108 no longer, and therefore picture P3 can be override by picture P9 during the T7 of time zone.
Because B-frame as the reference picture of any other picture, does not therefore need low bit transfer rate B '-frame is stored in the storage arrangement 22.
In the first embodiment, image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22, point at any time thus, storage arrangement 22 stores and is no more than four compressed frames that write by image-decoding device 12 (in buffer 106,108,110 and 112) and two reconstruction pictures that write by image coder 14 (in buffer 102 and 104).Because rebuilding picture is compressed frames, therefore puts storage arrangement 22 storages at any time and be no more than six compressed frames.
System controller 24 is in order to coordinate the operation of image-decoding device 12, image coder 14 and display controller 18.For example, the pointer of system controller 24 adjustable image decoders 12, image coder 14 and display controller 18 uses can be by image-decoding device 12, image coder 14 and display controller 18 accesses to control which storage buffer.
Second execution mode
In second execution mode, compared to high bit transfer rate compressing image 26, low bit transfer rate compressing image 30 has lower resolution.Compressing image 26 and 30 can have identical or different compression ratio (for example quantization standard).For example, input coding image 26 can have the resolution of 1920*1080, and output encoder image 30 can have the resolution of 1366*768.The picture that coding image 26 and 30 sorts with coded sequence.Display controller 18 transmits high resolution pictures with the DISPLAY ORDER ordering to display 28.Therefore, image controller 10 is exported the low bit transfer rate compressing image 30 with low resolution in display 28 display of high resolution images.
Shown in Fig. 2 B, the setting of storage buffer in storage arrangement 22 is same as the set-up mode in first execution mode in second execution mode.Input buffer 100 stores the high-resolution squeezed, and output buffer 116 stores the low resolution, compressed picture that is produced by image coder 14.Stage 1 coded buffer 106, stages 2 coded buffer 108, stages 3 coded buffer 110, stages 4 coded buffer 112 and stages 5 coded buffer 114 store the high-resolution compressed frames of being exported by image-decoding device 12.Rebuild and rebuild picture and produce the low resolution, compressed picture by the low resolution of image coder 14 uses during coded reference 1 buffer 102 and reconstruction coded reference 2 buffers 104 are stored in encoding process.See through scaler (Scaler) and can produce low resolution reconstruction picture.Scaler (Scaler) can be the image-decoding device 12 or the image coder 14 of part.Scaler (Scaler) also can be for being independent of the element of image-decoding device 12 and image coder 14.Picture can be carried out coding and convergent-divergent (Scaling) simultaneously.
The time sequencing of second execution mode is similar to first execution mode, shown in Fig. 2 C.Except picture I0 ', B1 ', B2 ', P3 ', B4 ', B5 ', P6 ', B7 ', B8 ', P9 ', B10 ', B11 ' and P12 ' rebuild picture for low resolution, and picture I0, B1, B2, P3, B4, B5, P6, B7, B8, P9, B10, B11 and P12 are outside the high-resolution compressed frames, are same as explanation in first execution mode by image-decoding device 12, image coder 14 and display controller 18 performed processing.
Be same as first execution mode, in second execution mode, image-decoding device 12, image coder 14 and display controller share storage apparatus 22, put storage arrangement 22 storages thus at any time and be not more than six compressed frames, comprise four compressed frames and two reconstruction pictures that write by image coder 14 that write by image-decoding device 12.
The 3rd execution mode
Fig. 3 A of the 3rd execution mode is same as first execution mode, and input coding image 26 is high bit transfer rate compressing image, and output encoder image 30 is low bit transfer rate compressing image.Coding image 26 and 30 has identical resolution, but has different bit transfer rates.Coding image 26 and 30 all has the picture that is sorted with coded sequence.Image 26 and 30 can be the picture of encoding according to mpeg standard.
In the 3rd execution mode, display controller 18 transmits low bit transfer rate picture with the DISPLAY ORDER ordering to display 28.Image controller 10 is the low bit transfer rate compressing image 30 of output when display 28 shows low bit transfer rate decompression image.Fig. 3 B is sequential Figure 150 of the time sequencing of the time sequencing that shows the picture in the buffer be stored in storage arrangement 22 and the picture that is shown in display 28.In this execution mode, stage coded buffer 114 is not used.
Can find out by sequential Figure 150, each picture in any set time zone is only by image-decoding device 12, image coder 14 and display controller 18 one of them access, thus image-decoding device 12, image coder 14 and display controller 18 can be under the situation that does not cause conflict the shared picture that is stored in the storage buffer.Each picture in the storage arrangement 22 only stores once and not has duplicate (Duplication).
Next be described in the different time zone by the performed program of image-decoding device 12, image coder 14 and display controller 18.
Before the T0 of time zone (not icon), high bit transfer rate squeezed I0 is write input buffer 100.Same, at time zone T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, during the T12... respectively with high bit transfer rate squeezed P3, B1, B2, P6, B4, B5, P9, B7, B8, P12, B10, B11... write input buffer 100.
During time zone T0 and T1, image-decoding device 12 is operated in the mode that is same as first execution mode with image coder 14, shown in Fig. 2 C.
During the T2 of time zone, image-decoding device 12 is operated in the mode that is same as first execution mode with image coder 14, shown in Fig. 2 C.Yet during the T2 of time zone, display controller 18 can't make any picture be shown on the display 28.
During the T3 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B2 and is produced high bit transfer rate compressed frames B2, and with compressed frames B2 write phase 4 coded buffers 112.Image coder 14 captures compressed frames B1 from buffer 110, encode compressed frames B1 and produce low bit transfer rate reconstruction picture B1 ' and low bit transfer rate squeezed B1 ', and will rebuild picture B1 ' write buffer 110 and squeezed B1 ' is write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture I0 ' from buffer 102, and makes picture I0 ' be shown in display 28.
High bit transfer rate compressed frames B1 and low bit transfer rate are rebuild picture B1 ' and are had identical resolution (for example hurdle of equal number and row), so compressed frames B1 and rebuild picture B1 ' and have identical size.Compressed frames B1 and reconstruction picture B1 ' can have different image quality (image quality).For example, rebuild picture B1 ' and may be not so good as compressed frames B1 sharp keen (sharp), and the block effect of rebuilding among the picture B1 ' (block artifact) may be more more obvious than the block effect among the compressed frames B1.
During the T4 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed P6 and is produced high bit transfer rate compressed frames P6, and with compressed frames P6 write buffer 106.Image coder 14 captures compressed frames B2 from buffer 112, encode compressed frames B2 and produce low bit transfer rate reconstruction picture B2 ' and low bit transfer rate squeezed B2 ', and will rebuild picture B2 ' write buffer 112 and squeezed B2 ' is write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture B1 ' from buffer 110, and makes picture B1 ' be shown in display 28.
During the T5 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B4 and is produced high bit transfer rate compressed frames B4, and with compressed frames B4 write phase 3 coded buffers 110.Image coder 14 captures compressed frames P6 from buffer 106, encode compressed frames P6 and produce low bit transfer rate reconstruction picture P6 ' and low bit transfer rate squeezed P6 ', and will rebuild picture P6 ' write buffer 102, squeezed P6 ' will be write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture B2 ' from buffer 112, and makes picture B2 ' be shown in display 28.
During the T6 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed B5 and is produced high bit transfer rate compressed frames B5, and with compressed frames B5 write phase 4 coded buffers 112.Image coder 14 captures compressed frames B4 from buffer 110, coding compressed frames B4 and produce low bit transfer rate and rebuild picture B4 ' and low bit transfer rate squeezed B4 ', and will rebuild picture B4 ' and write output buffer 110 and squeezed B4 ' is write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture B3 ' from buffer 110, and makes picture P3 ' be shown in display 28.
During the T7 of time zone, image-decoding device 12 is decoded high bit transfer rate squeezed P9 and is produced high bit transfer rate compressed frames P9, and with compressed frames P9 write buffer 108.Image coder 14 captures compressed frames B5 from buffer 112, encode compressed frames B5 and produce low bit transfer rate reconstruction picture B5 ' and low bit transfer rate squeezed B5 ', and will rebuild picture B5 ' write buffer 112 and squeezed B5 ' is write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture B4 ' from buffer 110, and makes picture B4 ' be shown in display 28.
At time zone T8, T9, during the T10, image controller 10 is operated to be same as said method.
Be same as first execution mode, in the 3rd execution mode, the operation of designing image decoder 12, image coder 14 and display controller 18, only make that after image-decoding device 12, image coder 14 and display controller 18 did not re-use first picture, first picture just can be override by second picture.Image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22 are put storage arrangement 22 thus at any time and are stored in buffer 102,104,106,108,110 and 112 and be not more than six compressed frames.
The 4th execution mode
In the 4th execution mode, compared to high bit transfer rate compressing image 26, low bit transfer rate compressing image 30 has lower resolution.Compressing image 26 and 30 can have identical or different compression ratio (for example quantization standard).For example, input coding image 26 can have the resolution of 1920*1080, and output encoder image 30 can have the resolution of 1366*768.Coding image 26 and 30 all has the picture that sorts with coded sequence.Display controller 18 transmits with low resolution picture that DISPLAY ORDER was sorted to display 28.Therefore, the image controller 10 low bit transfer rate compressing image 30 that output has low resolution when display 28 shows the low resolution image.
Shown in Fig. 3 B, the setting of storage buffer in storage arrangement 22 is same as the set-up mode in second execution mode in the 4th execution mode.Input buffer 100 stores the high-resolution squeezed, and output buffer 116 stores the low resolution, compressed picture that is produced by image coder 14.See through scaler (Scaler) and can produce the low resolution compressed frames.Picture can be carried out coding and convergent-divergent (Scaling) simultaneously.
The time sequencing of the 4th execution mode is similar to the 3rd execution mode, shown in Fig. 3 B.Except picture I0 ', B1 ', B2 ', P3 ', B4 ', B5 ', P6 ', B7 ', B8 ', P9 ', B10 ', B11 ' and P12 ' rebuild picture for low resolution, and picture I0, B1, B2, P3, B4, B5, P6, B7, B8, P9, B10, B11 and P12 are outside the high-resolution compressed frames, are same as explanation in the 3rd execution mode by image-decoding device 12, image coder 14 and display controller 18 performed programs.
Be same as the 3rd execution mode, in the 4th execution mode, image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22 are put storage arrangement 22 thus at any time and are that storage is not more than six compressed frames in buffer 102,104,106,108,110 and 112.
The 5th execution mode
With reference to the 3rd execution mode Fig. 4 A, input coding image 26 is the high bit transfer rate compressing image from image source, for example high definition image Video Camera.The picture of input in the image 26 arranged with DISPLAY ORDER, and according to digitized video (digital video, DV) or jpeg format carry out compression, that is the expression squeezed all is interior coded picture.The low bit transfer rate compressing image of output encoder image 30 for sorting with coded sequence.The picture of image output 30 is encoded according to mpeg standard.Input image 26 comprises the I-frame with the DISPLAY ORDER ordering, and image output 30 comprises I-frame, B-frame and P-frame with the coded sequence ordering.Image 26 and 30 has identical resolution but has different bit transfer rates.Display controller 18 transmits high bit transfer rate picture to display 28 with DISPLAY ORDER.
Sequential Figure 160 of time sequencing that Fig. 4 B shows the time sequencing of the picture in the buffer be stored in storage arrangement 22 and is shown in the picture of display 28.In this execution mode, stages 5 coded buffer 114 is used (in first to fourth execution mode, buffer 114 is not used).
Can find out by sequential Figure 160, each picture in any set time zone is only by image-decoding device 12, image coder 14 and display controller 18 one of them access, thus image-decoding device 12, image coder 14 and display controller 18 can be under the situation that does not cause conflict the shared picture that is stored in the storage buffer.Each picture in the storage arrangement 22 only stores once and not has duplicate (Duplication).
Next be described in the different time zone by the performed program of image-decoding device 12, image coder 14 and display controller 18.
Before the T0 of time zone (not icon), high bit transfer rate coded picture I0 is write input buffer 100.Same, at time zone T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, during the T12... respectively with high bit transfer rate coded picture I1, I2, I3, I4, I5, I6, I7, I8, I9, I10, I11... write input buffer 100.
During the T0 of time zone, image-decoding device 12 decoding and coding picture I0 and produce high bit transfer rate compressed frames I0, and with compressed frames I0 write phase 1 coded buffer 106.
During the T1 of time zone, image-decoding device 12 decoding and coding picture I1 and produce high bit transfer rate compressed frames I1, and with compressed frames I1 write phase 3 coded buffers 110.
During the T2 of time zone, image-decoding device 12 decoding and coding picture I2 and produce high bit transfer rate compressed frames I2, and with compressed frames I2 write phase 4 coded buffers 112.Image coder 14 high bit transfer rate compressed frames I0 of coding and produce low bit transfer rate and rebuild picture I0 ' and low bit transfer rate squeezed I0 ', and will rebuild picture I0 ' and write and rebuild reference 1 buffer 102 and squeezed I0 ' is write output buffer 116.
During the T3 of time zone, image-decoding device 12 decoding and coding picture I3 and produce high bit transfer rate compressed frames I3, and with compressed frames I3 write phase 2 coded buffers 108.Image coder 14 is encoded high bit transfer rate compressed frames I3 and is produced low bit transfer rate reconstruction picture P3 ' and low bit transfer rate squeezed P3 ', and will rebuild picture P3 ' write buffer 104 and squeezed P3 ' is write output buffer 116.
During the T4 of time zone, image-decoding device 12 decoding and coding picture I4 and produce high bit transfer rate compressed frames I4, and with compressed frames I4 write phase 5 coded buffers 114.Image coder 14 is encoded high bit transfer rate compressed frames I1 and is produced low bit transfer rate squeezed B1 ', and squeezed B1 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames I1 from buffer 110, and makes picture I1 be shown in display 28.
During the T5 of time zone, image-decoding device 12 decoding and coding picture I5 and produce high bit transfer rate compressed frames I5, and with compressed frames I5 write phase 3 coded buffers 110.Image coder 14 is encoded compressed frames I2 and is produced low bit transfer rate squeezed B2 ', and squeezed B2 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames I2 from buffer 112, and makes picture I2 be shown in display 28.
During the T6 of time zone, image-decoding device 12 decoding and coding picture I6 and produce high bit transfer rate compressed frames I6, and with compressed frames I6 write phase 1 coded buffer 106.Image coder 14 is encoded compressed frames I6 and is produced low bit transfer rate reconstruction picture P6 ' and low bit transfer rate squeezed P6 ', and will rebuild picture P6 ' write buffer 102 and squeezed P6 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames I3 from buffer 108, and makes picture I3 be shown in display 28.
During the T7 of time zone, image-decoding device 12 decoding and coding picture I7 and produce high bit transfer rate compressed frames I7, and with compressed frames I7 write phase 4 coded buffers 112.Image coder 14 is encoded compressed frames I4 and is produced low bit transfer rate squeezed B4 ', and squeezed B4 ' is write output buffer 116.Display controller 18 captures high bit transfer rate compressed frames I4 from buffer 114, and makes picture I4 be shown in display 28.
At time zone T8, T9, during the T10, image controller 10 is operated to be same as above-mentioned method.
In the 5th execution mode, the operation of designing image decoder 12, image coder 14 and display controller 18, only make that after image-decoding device 12, image coder 14 and display controller 18 did not re-use first picture, first picture just can be override by second picture.Image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22, put storage arrangement 22 storages thus at any time and be not more than seven compressed frames, comprise five compressed frames that write by image-decoding device 12 (in buffer 106,108,110,112 and 114) and two reconstruction pictures that write by image coder 14 (in buffer 102 and 104).
The 6th execution mode
In the 6th execution mode, compared to high bit transfer rate compressing image 26, low bit transfer rate compressing image 330 has lower resolution.For example, input coding image (high bit transfer rate compressing image) 26 can have the resolution of 1920*1080, and output encoder image (low bit transfer rate compressing image) 30 can have the resolution of 1366*768.Coding image 26 has the picture with the DISPLAY ORDER ordering, and coding image (low bit transfer rate compressing image) 30 has the picture that sorts with coded sequence.Display controller 18 transmits with high resolution pictures that DISPLAY ORDER was sorted to display 28.Therefore, image controller 10 is exported the low bit transfer rate compressing image 30 with low resolution in display 28 display of high resolution images.
Shown in Fig. 4 B, the setting of storage buffer in storage arrangement 22 is same as the set-up mode in the 5th execution mode in the 6th execution mode.Input buffer 100 stores the high-resolution squeezed, and output buffer 116 stores the low resolution, compressed picture that is produced by image coder 14.Stage 1 coded buffer 106, stages 2 coded buffer 108, stages 3 coded buffer 110, stages 4 coded buffer 112 and stages 5 coded buffer 114 store the high-resolution compressed frames of being exported by image-decoding device 12.Rebuild coded reference 1 buffer 102 and rebuild coded reference 2 buffers 104 and be stored in the low resolution reconstruction picture that uses image coder 14 to be produced during the encoding process of other picture.See through scaler (Scaler) and can produce low resolution reconstruction picture.Picture can be carried out coding and convergent-divergent (Scaling) simultaneously.
The time sequencing of the 6th execution mode is similar to the 5th execution mode, shown in 4B figure.Except picture I0 ', B1 ', B2 ', P3 ', B4 ', B5 ', P6 ', B7 ', B8 ', P9 ', B10 ', B11 ' and P12 ' rebuild picture for low resolution, and picture I0, B1, B2, P3, B4, B5, P6, B7, B8, P9, B10, B11 and P12 are outside the high-resolution compressed frames, are same as explanation in the 5th execution mode by image-decoding device 12, image coder 14 and display controller 18 performed programs.
Be same as the 5th execution mode, in the 6th execution mode, image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22, put storage arrangement 22 storages thus at any time and be not more than seven compressed frames, comprise five compressed frames that write by image-decoding device 12 (in buffer 106,108,110,112 and 114) and two reconstruction pictures that write by image coder 14 (in buffer 102 and 104).
The 7th execution mode
Fig. 5 A of the 7th execution mode is same as the 5th execution mode, and input coding image 26 is the high bit transfer rate compressing image from image source, and all pictures are all the interior coded picture with the DISPLAY ORDER ordering in the image source.Output encoder image 30 is low bit transfer rate compressing image, and wherein picture sorts with coded sequence.The picture of image output 30 can be encoded according to mpeg standard.Coding image 26 and 30 has identical resolution.The difference of the 5th execution mode and the 7th execution mode is in the 7th execution mode, and display controller 18 transmits low bit transfer rate decompression image 27 to display 28 with DISPLAY ORDER.
Sequential Figure 170 of time sequencing that Fig. 5 B figure shows the time sequencing of the picture in the buffer that is stored in storage arrangement 22 and is shown in the picture of display 28.In the 7th execution mode, rebuild with reference to 1 buffer 102 and reconstruction and be not used (buffer 102 and 104 that is not used in compared to first to the 6th execution mode) with reference to 2 buffers 104.Because the input image is all interior coded picture, therefore when coded picture I0, owing to do not use I0 in ensuing picture codec program, therefore rebuilding picture I0 ' can override picture I0.Therefore stage coded buffer 106 can be in order to store decoded picture I and to rebuild picture I0 '.Each picture in the storage arrangement 22 only stores once and not has duplicate (Duplication).
Next be described in the different time zone by the performed program of image-decoding device 12, image coder 14 and display controller 18.
Before the T0 of time zone (not icon), high bit transfer rate coded picture I0 is write input buffer 100.Same, at time zone T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, during the T12... respectively with high bit transfer rate coded picture I1, I2, I3, I4, I5, I6, I7, I8, I9, I10, I11... write input buffer 100.
During the T0 of time zone, image-decoding device 12 decoding and coding picture I0 and produce high bit transfer rate compressed frames I0, and with compressed frames I0 write phase 1 coded buffer 106.
During the T1 of time zone, image-decoding device 12 decoding and coding picture I1 and produce high bit transfer rate compressed frames I1, and with compressed frames I1 write phase 3 coded buffers 110.
During the T2 of time zone, image-decoding device 12 decoding and coding picture I2 and produce high bit transfer rate compressed frames I2, and with compressed frames I2 write phase 4 coded buffers 112.Image coder 14 high bit transfer rate compressed frames I0 of coding and produce low bit transfer rate and rebuild picture I0 ' and low bit transfer rate squeezed I0 ', and will rebuild picture I0 ' and write phase of regeneration 1 coded buffer 106 and squeezed I0 ' is write output buffer 116.
During the T3 of time zone, image-decoding device 12 decoding and coding picture I3 and produce high bit transfer rate compressed frames I3, and with compressed frames I3 write phase 2 coded buffers 108.In some embodiments, image coder 14 is the data in the beginning coded buffer 108 after the data of image-decoding device 12 decoding specific quantities, and therefore during the T3 of time zone, buffer 108 is image-decoding device 12 and image coder 14 accesses.Image coder 14 is encoded high bit transfer rate compressed frames I3 and is produced low bit transfer rate reconstruction picture P3 ' and low bit transfer rate squeezed P3 ', and will rebuild picture P3 ' write buffer 108 (therefore overriding compressed frames I3) and squeezed P3 ' is write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture I0 ' from buffer 106, and makes picture I0 ' be shown in display 28.
During the T4 of time zone, image-decoding device 12 decoding and coding picture I4 and produce high bit transfer rate compressed frames I4, and with compressed frames I4 write phase 5 coded buffers 114.Image coder 14 is encoded high bit transfer rate compressed frames B1 and is produced low bit transfer rate reconstruction picture B1 ' and low bit transfer rate squeezed B1 ', and will rebuild picture B1 ' write buffer 110 and squeezed B1 ' is write output buffer 116.Display controller 18 captures high bit transfer rate and rebuilds picture B1 ' from buffer 110, and makes picture B1 ' be shown in display 28.
During the T5 of time zone, image-decoding device 12 decoding and coding picture I5 and produce high bit transfer rate compressed frames I5, and with compressed frames I5 write phase 3 coded buffers 110.Because reconstruction picture B1 ' shows in the T4 of time zone and can not be used future again that therefore rebuilding picture B1 ' can be written.Image coder 14 is encoded compressed frames B2 and is produced low bit transfer rate reconstruction picture B2 ' and low bit transfer rate squeezed B2 ', and will rebuild picture B2 ' write buffer 112 and squeezed B2 ' is write output buffer 116.Display controller 18 captures low bit transfer rate and rebuilds picture B2 ' from buffer 112, and makes picture B2 ' be shown in display 28.
During the T6 of time zone, image-decoding device 12 decoding and coding picture I6 and produce high bit transfer rate compressed frames I6, and with compressed frames I6 write phase 1 coded buffer 106.Image coder 14 is encoded compressed frames I6 and is produced low bit transfer rate reconstruction picture P6 ' and low bit transfer rate squeezed P6 ', and will rebuild picture P6 ' write buffer 106 (overriding compressed frames I6) and squeezed P6 ' is write output buffer 116.Display controller 18 captures low bit transfer rate compressed frames P3 ' from buffer 108, and makes picture P3 ' be shown in display 28.
During the T7 of time zone, image-decoding device 12 decoding and coding picture I7 and produce high bit transfer rate compressed frames I7, and with compressed frames I7 write phase 4 coded buffers 112.Image coder 14 is encoded compressed frames I4 and is produced low bit transfer rate reconstruction picture B4 ' and low bit transfer rate squeezed B4 ', and will rebuild picture B4 ' write buffer 114 and squeezed B4 ' is write output buffer 116.Display controller 18 captures low bit transfer rate compressed frames B4 ' from buffer 114, and makes picture B4 ' be shown in display 28.
At time zone T8, T9, during the T10, image controller 10 is operated to be same as above-mentioned method.
Execute in the example the 7th, the operation of designing image decoder 12, image coder 14 and display controller 18, only make that after image-decoding device 12, image coder 14 and display controller 18 did not re-use first picture, first picture just can be override by second picture.Image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22 are put storage arrangement 22 thus at any time and are stored in buffer 106,108,110,112 and 114 and be not more than five compressed frames.
The 8th execution mode
In the 8th execution mode, compared to high bit transfer rate compressing image 26, low bit transfer rate compressing image 30 has lower resolution.For example, input coding image 26 can have the resolution of 1920*1080, and output encoder image 30 can have the resolution of 1366*768.Coding image 26 has the picture with the DISPLAY ORDER ordering, and coding image 30 has the picture that sorts with coded sequence.Display controller 18 transmits with low resolution picture that DISPLAY ORDER was sorted to display 28.Therefore, the image controller 10 low bit transfer rate compressing image 30 that output has low resolution when display 28 shows the low resolution image.
Shown in 5B figure, the setting of storage buffer in storage arrangement 22 is same as the set-up mode in the 7th execution mode in the 8th execution mode.Input buffer 100 stores the high-resolution squeezed, and output buffer 116 stores the low resolution, compressed picture that is produced by image coder 14.Stage 1 coded buffer 106, stages 2 coded buffer 108, stages 3 coded buffer 110, stages 4 coded buffer 112 and stages 5 coded buffer 114 can store the high-resolution compressed frames and low resolution is rebuild picture.See through execution scaler (Scaler) and can produce low resolution reconstruction picture.Picture can be carried out coding and convergent-divergent (Scaling) simultaneously.
The time sequencing of the 8th execution mode is similar to the 7th execution mode, shown in Fig. 5 B.Except picture I0 ', B1 ', B2 ', P3 ', B4 ', B5 ', P6 ', B7 ', B8 ', P9 ', B10 ', B11 ' and P12 ' rebuild picture for low resolution, and picture I0, B1, B2, P3, B4, B5, P6, B7, B8, P9, B10, B11 and P12 are outside the high-resolution compressed frames, are same as explanation in the 7th execution mode by image-decoding device 12, image coder 14 and display controller 18 performed programs.
Be same as the 7th execution mode, in the 8th execution mode, image-decoding device 12, image coder 14 and display controller 18 share storage apparatuses 22 are put at any time thus in buffer 106,108,110,112 and 114 to store and are not more than five compressed frames.
In above-mentioned first to the 8th execution mode, system controller 24 is adjusted the operation of image-decoding device 12, image coder 14 and display controller 18 according to the form of input signal and output signal.Image controller 10 can comprise the firmware (Firmware) that has in order to the program code of control different elements operation.No matter why show the resolution of high or low resolution image and output encoder image 30 and bit transfer rate, firmware can have the program code that makes display 28 display menus makes the user can select input and output format.
Other execution mode
As mentioned above, image is carried out coding/decoding according to JPEG, DV or mpeg standard.Image can also use other standard and carry out coding/decoding, for example International Telecommunications Union's (InternationalTelecommunication Union, ITU) standard H.261, H.263 and H.264.Image controller 10 can be high bit transfer rate image in order to will hang down the bit transfer rate image transcoding.Image controller 10 can be in order to being high resolution image with the low resolution image transcoding.When image is not shown in display, each time zone T0, T1, T2... not necessarily will equal picture cycle.Be to decide the duration of the time zone according to decoding and speed of coding.
Image controller 10 can be with Video Recorder (can store video program), TV or set-top box (set-up box) with built-in mass storage to tape, light memory medium, hard disk or other non-volatile but, the mobile phone of portable image player/recorder and play-/ record image.
In first to fourth execution mode, can see through and ignore no buffer 114 and the littler storage arrangement 22 of manufacturing.In the 7th and the 8th execution mode, can see through ignore no buffer 102 with 104 the littler storage arrangement 22 of manufacturing.When image was not shown in display, image controller 10 can be ignored display controller 18.
Beneficial effect of the present invention is that less memory is applicable to transcoding or demonstration.For example, the image on the standard variation optical digital disk can have the bit rate that is about 150~300 every kilobit/pictures, and the image on standard optical disc can have the bit rate that is about 30~150 every kilobit/pictures.When the image transcoding on the DVD is when being applicable to the image of VCD, has the compressed frames that bit rate is about 4153.3 every kilobit/pictures and be temporary in the memory.See through image treatment method of the present invention, memory does not need to store simultaneously greater than seven compressed frames.When handling resolution and be the HDTV program of 1920*1080, each pixel represents with 12 positions, and each compressed frames has and is about 24.9 megabits.Therefore, be reduced to the number of pictures that must be stored in simultaneously in the memory during decoding, coding and the display routine and can significantly reduce memory use amount and expense.
Though the present invention discloses as above with better embodiment, so it is not in order to limiting scope of the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention, when doing a little change and retouching.Therefore protection scope of the present invention is as the criterion with defining of claim.

Claims (38)

1. a device for image is characterized in that, comprising:
One image-decoding device, in order to producing plural compressed frames from the first plural compressing image picture, at least one above-mentioned compressed frames is that the information according to the previous above-mentioned compressed frames that produces produces; And
One image coder does not need to duplicate the above-mentioned compressed frames that is stored in a memory in order to produce the second plural compressing image picture from above-mentioned compressed frames.
2. device for image as claimed in claim 1 is characterized in that, also comprises a display controller, does not need to duplicate above-mentioned compressed frames in order to the demonstration of controlling above-mentioned compressed frames.
3. device for image as claimed in claim 2, it is characterized in that, also comprise a system controller, produce before the above-mentioned compressed frames in order to control above-mentioned image-decoding device, above-mentioned image coder and above-mentioned display controller in being stored in above-mentioned memory is override by subsequently above-mentioned compressed frames and show the second compressing image picture.
4. device for image as claimed in claim 1, it is characterized in that, above-mentioned image coder produces plural number and rebuilds picture, and wherein above-mentioned reconstruction picture is the above-mentioned compressed frames corresponding to the above-mentioned second compressing image picture, and above-mentioned image coder stores above-mentioned reconstruction picture to depositing in the above-mentioned reservoir.
5. device for image as claimed in claim 4 is characterized in that, also comprises an above-mentioned display controller, does not need to duplicate above-mentioned reconstruction picture in order to show above-mentioned reconstruction picture.
6. device for image as claimed in claim 1, it is characterized in that, also comprise a said system controller, in order to control above-mentioned image-decoding device and above-mentioned image coder before the above-mentioned compressed frames quilt compressed frames subsequently of above-mentioned memory storage overrides, produce the above-mentioned second compressing image picture.
7. device for image as claimed in claim 1 is characterized in that, above-mentioned compressed frames comprises interior coded picture, one-way fashion coded picture and reversible coded picture.
8. device for image as claimed in claim 7 is characterized in that, when above-mentioned compressed frames sorted with a DISPLAY ORDER, above-mentioned compressed frames comprised at least two continuous above-mentioned reversible coded pictures.
9. device for image as claimed in claim 8, it is characterized in that, the shared above-mentioned memory of above-mentioned image-decoding device and above-mentioned image coder, thus, point at any time, above-mentioned memory storage by above-mentioned image-decoding device write be not more than four compressed frames and by two above-mentioned reconstruction pictures that above-mentioned image coder write.
10. device for image as claimed in claim 8 is characterized in that, the shared above-mentioned memory of above-mentioned image-decoding device and above-mentioned image coder is put above-mentioned memory storage thus at any time and is not more than six above-mentioned compressed frames.
11. device for image as claimed in claim 8 is characterized in that, the shared above-mentioned memory of above-mentioned image-decoding device and above-mentioned image coder is put maximum seven compressed frames of above-mentioned memory storage thus at any time.
12. device for image as claimed in claim 1 is characterized in that, above-mentioned first compressing image and above-mentioned second compressing image have different bit transfer rates.
13. device for image as claimed in claim 1 is characterized in that, above-mentioned first compressing image and above-mentioned second compressing image have different resolution.
14. device for image as claimed in claim 1 is characterized in that, also comprises a scaler, in order to produce low resolution picture from high resolution pictures.
15. device for image as claimed in claim 1 is characterized in that, above-mentioned first compressing image comprises a continuous bit streams.
16. an image processing system is characterized in that, comprising:
One image-decoding device, in order to produce plural compressed frames from the first plural compressing image, above-mentioned compressed frames has interior coded picture, one-way fashion coded picture and reversible coded picture, and at least some compressed frames produce according to the information of previous compressed frames; And
One image coder, do not need to duplicate the compressed frames that is stored in the memory in order to produce the second plural compressing image picture from above-mentioned compressed frames, the above-mentioned first compressing image picture and the above-mentioned second compressing image picture have different bit transfer rates with and/or different resolution.
17. image processing system as claimed in claim 16 is characterized in that, also comprises a display controller, does not need to duplicate the picture that is stored in the above-mentioned memory in order to image to a display unit of exporting the above-mentioned first compressing image picture.
18. image processing system as claimed in claim 16 is characterized in that, also comprises a system controller, in order to control above-mentioned image-decoding device and above-mentioned image coder.
19. a device for image is characterized in that, comprising:
One image-decoding device produces plural decoded picture in order to the information according to the early decoding picture from the first plural number coding image frame; And
One image coding device does not need to duplicate the above-mentioned decoded picture that is stored in the memory in order to produce the second plural number coding image frame from above-mentioned decoded picture.
20. device for image as claimed in claim 19 is characterized in that, also comprises a display unit, does not need to duplicate the picture that is stored in the above-mentioned memory in order to the image that shows above-mentioned decoded picture.
21. device for image as claimed in claim 19 is characterized in that, above-mentioned decoded picture comprises interior coded picture, one-way fashion coded picture and reversible coded picture.
22. a device for image is characterized in that, comprising:
One image-decoding device, in order to produce plural compressed frames from the first plural compressing image picture, the first decompression image comprises a continuous squeezed that sorts according to a display sequence; And
One image coder does not need to duplicate the above-mentioned compressed frames that is stored in the memory in order to produce the second plural compressing image picture from above-mentioned compressed frames.
23. device for image as claimed in claim 22 is characterized in that, also comprises a display controller, does not need the compressed frames of duplicating in order to the image that shows above-mentioned compressed frames.
24. device for image as claimed in claim 22 is characterized in that, above-mentioned compressed frames comprises interior coded picture, one-way fashion coded picture and reversible coded picture.
25. an image treatment method is characterized in that, comprising:
Produce the plural compressed frames of one first compressing image through the information of previous plural compressed frames; And
Seeing through the above-mentioned compressed frames that is stored in the memory produces one second compressing image and does not need to duplicate the above-mentioned compressed frames that is stored in the above-mentioned memory.
26. image treatment method as claimed in claim 25 is characterized in that, also comprises the generation of the above-mentioned compressed frames of control and second compressing image, therefore above-mentioned compressed frames was compressed before being override by the subsequent decompression picture.
27. image treatment method as claimed in claim 25 is characterized in that, also comprises the compressed frames that shows above-mentioned compressed frames and do not need to duplicate storage.
28. image treatment method as claimed in claim 27, it is characterized in that, also comprise the above-mentioned compressed frames of control and the generation of second compressing image and the demonstration of controlling above-mentioned compressed frames, therefore compression and demonstration compressed frames before the subsequent decompression picture overrides compressed frames.
29. image treatment method as claimed in claim 25 is characterized in that, produces above-mentioned compressed frames and comprises coded picture, one-way fashion coded picture and reversible coded picture in the generation.
30. image treatment method as claimed in claim 29 is characterized in that, when above-mentioned compressed frames sorted with a DISPLAY ORDER, DISPLAY ORDER comprised two continuous reversible coded pictures.
31. image treatment method as claimed in claim 30 is characterized in that, writes and coding step comprises that at least six above-mentioned compressed frames of storage are to the above-mentioned memory.
32. image treatment method as claimed in claim 30 is characterized in that, writes and encode to comprise and be stored to few seven above-mentioned compressed frames to above-mentioned memory.
33. an image treatment method is characterized in that, comprising:
From one first compressing image, produce plural compressed frames with continuous squeezed that sorts according to a DISPLAY ORDER; And
Produce one second compressing image and need duplicate the above-mentioned compressed frames that is stored in the memory from above-mentioned compressed frames.
34. an image treatment method is characterized in that, comprising:
Decode one first compressing image and produce plural compressed frames;
Compressed frames is write a memory;
Encode above-mentioned compressed frames and produce one second compressing image, comprise that producing plural number rebuilds picture, in order to reference as some above-mentioned compressed frames of coding; And
Above-mentioned reconstruction picture is write above-mentioned memory, override the above-mentioned compressed frames of part to the above-mentioned reconstruction picture of small part.
35. image treatment method as claimed in claim 34 is characterized in that, the data rate of above-mentioned second compressing image is different from the data rate of above-mentioned first compressing image.
36. image treatment method as claimed in claim 34 is characterized in that, the resolution of above-mentioned second compressing image is different from the resolution of above-mentioned first compressing image.
37. image treatment method as claimed in claim 34 is characterized in that, also comprises showing above-mentioned reconstruction picture and not repeating above-mentioned reconstruction picture.
38. image treatment method as claimed in claim 34 is characterized in that, decoding comprises according to mpeg standard decodes.
CNB2006101375927A 2005-10-26 2006-10-26 Image device, image processing system and method thereof Active CN100461866C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US59685105P 2005-10-26 2005-10-26
US60/596,851 2005-10-26
US11/363,891 2006-02-27

Publications (2)

Publication Number Publication Date
CN1956543A CN1956543A (en) 2007-05-02
CN100461866C true CN100461866C (en) 2009-02-11

Family

ID=38063598

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006101375927A Active CN100461866C (en) 2005-10-26 2006-10-26 Image device, image processing system and method thereof

Country Status (1)

Country Link
CN (1) CN100461866C (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102474604A (en) * 2009-06-30 2012-05-23 高通股份有限公司 Texture compression in a video decoder for efficient 2d-3d rendering
CN102915280A (en) * 2011-06-20 2013-02-06 英特尔公司 Configurable buffer allocation for multi-format video processing

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101452679B (en) * 2007-12-07 2012-05-23 瑞昱半导体股份有限公司 Method for generating image driving signal and device thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020181588A1 (en) * 2001-05-31 2002-12-05 Sanyo Electric Co., Ltd. Image processing employing picture type conversion
CN1390046A (en) * 2001-05-31 2003-01-08 三洋电机株式会社 Picture treatment using shere-frame storage
CN1435052A (en) * 1999-12-15 2003-08-06 三洋电机株式会社 Image reproducing method and image processing method and image reproducing device, image processing device and television receiver capable of using the methods

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1435052A (en) * 1999-12-15 2003-08-06 三洋电机株式会社 Image reproducing method and image processing method and image reproducing device, image processing device and television receiver capable of using the methods
US20020181588A1 (en) * 2001-05-31 2002-12-05 Sanyo Electric Co., Ltd. Image processing employing picture type conversion
CN1390046A (en) * 2001-05-31 2003-01-08 三洋电机株式会社 Picture treatment using shere-frame storage

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102474604A (en) * 2009-06-30 2012-05-23 高通股份有限公司 Texture compression in a video decoder for efficient 2d-3d rendering
US8860781B2 (en) 2009-06-30 2014-10-14 Qualcomm Incorporated Texture compression in a video decoder for efficient 2D-3D rendering
CN102915280A (en) * 2011-06-20 2013-02-06 英特尔公司 Configurable buffer allocation for multi-format video processing

Also Published As

Publication number Publication date
CN1956543A (en) 2007-05-02

Similar Documents

Publication Publication Date Title
US7903743B2 (en) Memory sharing in video transcoding and displaying
CN100508585C (en) Apparatus and method for controlling reverse-play for digital video bit stream
US7555045B2 (en) MPEG video decoder and MPEG video decoding method
US5717816A (en) Method and apparatus for the selection of data for use in VTR trick playback operation in a system using intra-coded video frames
JP5041626B2 (en) Decoding device, decoding method, and program
US8774281B2 (en) Implementation of a DV video decoder with a VLIW processor and a variable length decoding unit
JPH06217274A (en) Image signal compressing device
US5903311A (en) Run level pair buffering for fast variable length decoder circuit
JP3356078B2 (en) Compressed stream decoding device and compressed stream decoding method
CN100461866C (en) Image device, image processing system and method thereof
US20040022521A1 (en) Image processing apparatus and method, computer program, and computer readable storage medium
JPH09200695A (en) Method and device for decoding video data for high-speed reproduction
CN1092450C (en) Video data decoder and decoding method thereof
US6940909B2 (en) Video decoding during I-frame decode at resolution change
JP2000101969A (en) Device and method of reproduction
JPH0879701A (en) Screen divi video encoding/decoding device
US7620293B2 (en) Method and apparatus for controlling a bit rate of digital video data
TWI439137B (en) A method and apparatus for restructuring a group of pictures to provide for random access into the group of pictures
KR100244229B1 (en) Memory redistributing method of an mpeg decoder
JPH07170485A (en) Image reproducing device and image decoding device
JPH10150636A (en) Video signal reproducing device and reproducing method for video signal
JPH08223534A (en) Image reproducing device
JPH08163575A (en) Method and device for decoding picture
JP2005159832A (en) Signal processor
US20060230241A1 (en) Buffer architecture for data organization

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant