CN100438399C - Timing tracking apparatus, receiver, timing tracking and regulating method - Google Patents
Timing tracking apparatus, receiver, timing tracking and regulating method Download PDFInfo
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- CN100438399C CN100438399C CNB2005100735390A CN200510073539A CN100438399C CN 100438399 C CN100438399 C CN 100438399C CN B2005100735390 A CNB2005100735390 A CN B2005100735390A CN 200510073539 A CN200510073539 A CN 200510073539A CN 100438399 C CN100438399 C CN 100438399C
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Abstract
The present invention provides a timing tracking device, a receiving device and a timing tracking and regulating method. The timing tracking device uses the data of an early sampling point and a late sampling point to calculate a timing error. The timing tracking device comprises a data separating device, a G (tau/Tc) calculator, an equalizer and a timing error calculator, wherein the data separator is used for separating the data of the early sampling point and the late sampling point from receiving data, the early sampling point and the late sampling point are used for a training sequence, the calculator is used for calculating G (tau/Tc) according to the training sequence data separated from the data separating device, the equalizer is used for calculating the equalizing value of G (tau/Tc) of n sub-frames, and the timing error calculator is used for calculating a timing error according to the equalizing value output by the equalizer.
Description
Technical field
The present invention relates to the timing tracking apparatus in a kind of wireless communication system, receiving system is regularly followed the tracks of and method of adjustment particularly a kind of timing tracking apparatus in TD SDMA (TD-SCDMA) portable terminal, receiving system is regularly followed the tracks of and method of adjustment.
Background technology
In digital mobile communication system, for the correct information that receives base station (BS) transmission, portable terminal (UE) must carry out periodic samples and data frame analyzing to received signal with correct clock information, realize that promptly the local PN sign indicating number that produces is synchronous with the PN sign indicating number in the signal that receives, just need to realize down-going synchronous with the base station.The down-going synchronous of portable terminal is divided into synchronous foundation and follows the tracks of two stages synchronously.
(1) synchronous establishment stage
Portable terminal is at the beginning and do not know whether the base station has sent signal, therefore, need an arrest process, i.e. search and catch the synchronous training sequence that the base station sends in certain frequency and time range, and according to the position and the sampling clock phase of synchronous training sequence specified data frame.This stage is also referred to as synchronous foundation.Just to include signal and local signal that the other side sends in the hold-in range in the difference of phase place, promptly in a chip range.
(2) synchronous tracking phase
In case after finishing this stage, then enter synchronous tracing process, promptly continue to keep synchronously, do not lose synchronously because of ectocine.That is to say, no matter the phase place at which kind of factor two ends is offset, as long as the difference of the phase place of generation skew is in hold-in range, can both estimate simultaneous bias by synchronous tracking, and adjust the phase place of terminal sampling clock in real time, the PN sign indicating number that the PN code tracking of receiving terminal is made a start changes, and the difference of phase place that promptly keeps both is less than the part of a chip.
Method for synchronized commonly used is based on two kinds of the delay phase-locked loop of the Timing Error Detector of door sooner or later and τ-Dithering Loops.They all belong to the phase-locked loop of shift to an earlier date-delaying type.The effect of phase-locked loop is carried out related operation by the signal of the signal of receiving and local two phase differences (reach in advance and delay) that produce and is finished.Delay phase-locked loop is to adopt two independently correlators, and τ-Dithering Loops then adopts the single correlator of timesharing.The shortcoming of this method for synchronized commonly used is to regulate the speed and phase jitter is a pair of contradiction amount.When fast, bigger phase jitter will be arranged if require to regulate the speed; Less phase jitter is arranged if desired, regulate the speed so accordingly also with slack-off.Therefore, be necessary to provide a kind of synchronous follow-up device that has that speed is fast, shake is little etc.
Summary of the invention
In view of the foregoing, the object of the present invention is to provide the timing tracking apparatus that speed is fast and phase jitter is little, receiving system is regularly followed the tracks of and method of adjustment.
An aspect of of the present present invention is to provide a kind of timing tracking apparatus, it utilizes early sampled point and the data computation timing error of sampled point late, comprise a data extractor, be used for training sequence morning sampled point and late sampling number according to separating one from receiving data respectively
Calculator,
P
eBe the power of sampled data morning, P
lBe the power of sampled data late, the sampling number certificate and the training sequence data of sampling number certificate late morning that is used for that the data-driven separator separates is estimated the power of sampling number certificate early and the power of sampling number certificate late respectively, and is calculated
Numerical value, an equalizer is used to calculate n subframe
Average and certain calculation of error device, be used for average according to equalizer output, calculate timing error.
Another aspect of the present invention is to provide a kind of receiving system, and it has aforesaid timing tracking apparatus, the timing error adjustment timing that it utilizes this timing tracking apparatus to calculate.
Another aspect of the present invention is to provide a kind of timing tracking method, and it comprises the training sequence data separating step, utilizes data extractor, with training sequence morning sampled point and late sampling number according to from receive data, separating respectively,
Calculation procedure is utilized
The sampling number certificate and the training sequence data of sampling number certificate were late estimated the power of sampling number certificate early and the power of sampling number certificate late respectively, and were calculated calculator, data-driven separator separate morning
Numerical value, P wherein
eBe the power of sampled data morning, P
lPower for slow sampled data; The average step is utilized equalizer, n subframe of calculating
Average and timing error calculation procedure, utilize the timing error calculator, according to the result of average step, calculate timing error.
Another aspect of the present invention is to provide a kind of timing adjusting method, and it comprises the timing error adjustment step regularly of utilizing aforesaid timing tracking method to calculate.
According to the present invention, sampled point does not have different power/amplitudes with slow sampled point because timing error is not 0 o'clock morning, when in case regularly tracking loop is converged in the timing accuracy allowed band, when just timing error was less than the demand precision, early power/the amplitude difference of sampled point and slow sampled point will be less than a fixing threshold value.Therefore, having has advantages such as speed is fast, phase jitter is little, can keep down-going synchronous effectively in an accuracy rating requires, and adjusts system communication quality decline and even the communication disruption that following the tracks of fails causes synchronously thereby effectively evade by receiver.
Description of drawings
Fig. 1 is the power-time delay figure of multipath channel.
Fig. 2 is the structured flowchart according to receiving system of the present invention.
Fig. 3 is the structured flowchart of timing tracking apparatus.
Fig. 4 is TD-SCDMA subframe structure figure.
Fig. 5 is TD-SCDMA structure of time slot figure.
Fig. 6 is the structure chart of DwPTS.
Fig. 8 is based on relevant implementation method
The structured flowchart of calculator.
Embodiment
As shown in Figure 2, comprise 23, living cosine filter 24, one receivers 26 of a radio-frequency front-end 21, one automatic gain controllers 22, one analog to digital converters and timing tracking apparatus 25 according to receiving system of the present invention.Radio-frequency front-end 21, automatic gain controller 22, analog to digital converter 23, the 26S Proteasome Structure and Function that root is given birth to cosine filter 24 and receiver 26 is identical with prior art, is not described in detail its structure at this.This timing tracking apparatus 25 gives birth to from root that cosine filter 24 receives late, the two paths of data of sampled point early, according to the data estimation timing error of this reception.Here, late, morning, the two-way sampled point was at desirable sampled point.The timing error input analog-to-digital converter 23 that this timing tracking apparatus 25 obtains is to regularly adjusting.The estimation of timing error needs the two paths of data of over-sampling, and receiver receives normal data demodulates needs one tunnel sampled data, so need over-sampling three sampling data at least with the receiving system among the present invention.
The principle of the timing tracking among the present invention is because timing error is not 0 o'clock, and early sampled point has different power/amplitudes with slow sampled point, and the different capacity/amplitude of morning, slow sampled point can be used to estimate timing error so.In case when regularly tracking loop was converged in the timing accuracy allowed band, when just timing error was less than the demand precision, early power/the amplitude difference of sampled point and slow sampled point will be less than a fixing threshold value.Estimated timing error all is at slow sampled point and that sampled point of the centre of sampled point early.
In practical communication system, signal arrives receiving terminal from transmitting terminal through different reflection paths, forms multipath signal.The different propagation paths of multipath signal can cause different propagation delays, i.e. multipath effect.Provided the power-time delay figure of a multipath channel as Fig. 1, wherein, comprised three remarkable different paths in the multipath signal, hereinafter referred to as the effective diameter component.Timing tracking method can be followed the tracks of any one effective diameter among the present invention, follows the tracks of first effective diameter but be preferably, and makes receiver can use effective diameter information as much as possible when data demodulates, improves the performance of receiver data demodulates.Below, only describe to follow the tracks of first effective diameter.
Fig. 3 has shown the structured flowchart according to timing tracking apparatus 25 of the present invention.As shown in Figure 3, this timing estimating apparatus 25 comprises a data extractor 251,
Calculator 252, one equalizers 253 and certain calculation of error device 254.
Therefore, the training sequence data that data extractor 251 obtains can be the midamble data, also can be the SYNC-DL data.Most preferred embodiment of the present invention is the data that data extractor 251 is isolated back 128 chips among the midamble of 144 chips in the time slot.Below, the example that is embodied as of separating midamble with data extractor 251 is introduced, and it is suitable for equally to the realization of SYNC-DL.
Midamble morning, the slow sampled data partly that calculator 252 bases are imported from data extractor 251 estimates early, the power of slow sampled data, and according to the power calculation that estimates
The morning of midamble part, slow sampled data are designated as e respectively
Mid_e(n), n=1,2 ..., 128 and e
Mid_l(n), n=1,2 ..., 128.
Can be formulated as:
Here, T
cWith τ be respectively chip period and timing error.Δ be desirable sampled point respectively with slow sampled point, identical time difference between the sampled point early.
It is the estimated result of R (τ).For adopting root raised cosine filter, work as a=0.22,
The realization of calculator 252 has two kinds of methods.Implementation method 1 is based on the implementation method of FFT and calculates
The present invention is referred to as it to follow the tracks of (FFT Based TimingTracking) method based on the timing of FFT, and Fig. 7 has shown the structured flowchart based on this method.Implementation method 2 is based on relevant implementation method and calculates
The present invention is referred to as it to follow the tracks of (Correlation Based Timing Tracking) method based on relevant timing, and Fig. 8 has shown the structured flowchart based on this method.To at length introduce these two kinds of implementation methods respectively below.
As shown in Figure 7, calculate based on the implementation method of FFT
Calculator 252, comprise and be used to calculate the channel estimator 71 of the power of sampled data early, first effective diameter withdrawal device 72 and power calculator 73, be used to calculate the channel estimator 71 of the power of slow sampled data, first effective diameter withdrawal device 72 and power calculator 73, adder 75, subtracter 74 and divider 76.
When morning during sampled data input channel estimator 71, this channel estimator 71 calculates channel impulse response according to midamble that receives and local midamble.In channel estimator 71, channel impulse response h
eCan be calculated by following formula,
h
e=IFFT[FFT(e
mid_e)./FFT(
mid)] (3)
Here, h
e=[h
e(1), h
e(2) ..., h
e(128)] be the estimated channel impulse response, e
Mid_e=[e
Mid_e(1), e
Mid_e(2) ..., e
Mid_e(128)] be sampled data part morning of the midamble data of reception, L
Mid_e=[l
Mid(1), l
Mid(2) ..., l
Mid(128)] be local midamble data.FFT (), IFFT () represent respectively parenthetic data sequence is done fast fourier transform and inverse transformation.
The channel impulse response that channel estimator 71 calculates is input in first effective diameter withdrawal device 72.First effective diameter extracts 72 devices and extracts first effective diameter (first value in the channel profile window is defaulted as first effective diameter) in the channel profile window according to known user's code channel information (the arbitrary code channel in user's time slot just).In the present invention, the default value of used code channel sequence number is the code channel of the minimum of the user in user's time slot.The position of extracting can be calculated by following formula:
N
extact=112-(K-k
user)*W (4)
Here, K is the number of the midamble shift value of maximum in the sub-district.W is the shift value of two adjacent miamble.k
UserBe illustrated in the sequence number of the minimum code channel in user's time slot.When the number of the midamble of maximum shift value is K,
(
Expression less than the integer of maximum).Realize following the tracks of N with the beacon code channel of TSO if consider based on the timing of FFT
Extact=0 is a fixing value.
P
e=|h
e(N
extact)|
2 (5)
Equally, sampled data power calculates by a channel estimator 71, one first effective diameter withdrawal devices 72 and a power calculator 73 equally late, and its structure is identical with the structure that the calculating of sampled data power is early adopted.Used reception data were the midamble data of sampling late when difference was to calculate.Sampled data power is designated as late:
P
l=|h
l(N
extact)|
2 (6)
Adder 75, subtracter 75 and divider 76 are according to the power and the slow power calculation of sampled data of sampled data morning
Be formulated as:
As shown in Figure 8, calculate based on relevant implementation method
Calculator 252 ', comprise being used to calculate the early correlator 81 and the power calculator 82 of the power of sampled data, be used to calculate the correlator 81 and the power calculator 82 of the power of slow sampled data, displacement midable maker 86, adder 84, subtracter 83 and divider 85.
Plural number midabmle is generated as the process that basic midamble is converted to plural midamble sign indicating number, and plural midamble sign indicating number is described to:
m(n)=j
n*m(n);n=1,2,...,128 (8)
Here, m (n) is the binary representation of basic midamble.
Here, n=1,2 ..., 128.K is the number of the midamble shift value of maximum in the sub-district.W is the shift value of two adjacent midamble.k
UserBe illustrated in the sequence number of the minimum code channel in user's time slot.When the number of the midamble of maximum shift value is K,
(
Expression less than the integer of maximum).Realize following the tracks of (K-k based on relevant timing with the beacon code channel of TSO if consider
User) * W=112 is a fixing value.
In the displacement midable sign indicating number input correlator 81 that displacement midable maker 86 generates.Correlator 81 calculates the correlated results of midamble of sampling morning of displacement midamble and reception.The correlated results R of sampled data early
eCan be expressed as:
This correlated results R
eIn the input power calculator 82.Power calculator 82 calculates the performance number of first effective diameter that is extracted according to the correlated results of input:
P
e=|R
e|
2 (11)
Sampled data power calculates by a correlator 81 and a power calculator 82 equally late, and its structure is identical with the structure that the calculating of sampled data power is early adopted.Used reception data were the midamble data of sampling late when difference was to calculate.
The correlated results R of slow sampled data
lCan be expressed as:
The power of sampled data is designated as late:
P
l=|R
l|
2 (13)
Here, n is for calculating
The number of the subframe of average.The minimum value of n can be 1.In the scope that regularly changes the accuracy requirement (for example 1/8 chip) that is allowing, the n value is big more,
Average is just more near average statistical.
Timing error calculator 254 calculates timing error according to the result of equalizer 253.This calculating has two kinds of implementation methods:
First kind of implementation method is that track loop is to regularly carrying out the fixed step size adjustment.Here, the timing error value of adjustment is calculated according to threshold T and adjustment step value α.The timing error adjusted value
Can calculate with following formula:
Second kind of implementation method is that track loop is to regularly carrying out the adjustment of on-fixed step-length.
Here, the timing error adjusted value is according to threshold T, adjusts step value α and over-sampling multiple S
n(sampling clock frequency just) calculated jointly.
Here,
Expression less than the maximum integer of absolute value, sign[] symbol of expression.T is a threshold value, and it can be determined by above-mentioned two kinds of methods mentioning; K is
The slope of function curve, as mentioned above.
When the pass of the precision of the over-sampling multiple of system and demand is 1/S
nDuring=α, second kind of implementation method and first method are equal to fully.
When the pass of the precision of the over-sampling multiple of system and demand is 1/S
nDuring<α, the convergence effect of second kind of implementation method timing error is better than first method.
For two kinds of above-mentioned methods, threshold value and adjustment step value can be determined according to accuracy requirement regularly, are example with accuracy requirement 1/8 chip, adjust step-length so and can be made as α=1/8.
Threshold T has two kinds of computational methods.
Method one can according to directly according to accuracy requirement and
Function curve is provided with at 0 slope, and for example in the TD-SCDMA system, filter is a root raised cosine filter, so
The slope of function curve is K=1.402, if require the precision of 1/8 chip, threshold T just equals so:
Method two can directly be tried to achieve with formula:
T=G(T
required/T
c) (19)
Here, T
RequiredBe the progress precision of the synchronous tracking of demand,
Root raised cosine filter with a=0.22 is an example, R (τ) as shown in Equation (2), computational methods of the present invention are fit to other filter equally.
Below, describe according to timing tracking method of the present invention.This timing tracking method comprises the steps:
The training sequence data separating step, it utilizes data extractor 251, with training sequence morning sampled point and late sampling number according to from receive data, separating respectively,
Calculation procedure, its utilization
Calculator 252, the training sequence data that the data-driven separator separates calculates
The average step, it utilizes equalizer 253, n subframe of calculating
Average and timing error calculation procedure, utilize timing error calculator 254, according to the result of average step, calculate timing error.
In the training sequence data separating step, the training sequence data of separating is the data of midamble or the data of SYNC-DL.
Calculation procedure have two kinds of implementation methods, promptly based on the implementation method of FFT with based on relevant implementation method.
Comprise training sequence data based on the implementation method of FFT according to sampled point morning, local training sequence and user's code channel information calculations be the step of the power of sampled data early, training sequence data according to slow sampled point, the step of the power of local training sequence and the slow sampled data of user's code channel information calculations, and according to calculate morning sampled data the power and the power calculation of sampled data late
Step,
P
eBe the power of sampled data morning, P
lPower for slow sampled data.
Based on relevant implementation method, comprise training sequence data according to sampled point morning, movement training sequence is calculated the step of the power of sampled data early, training sequence data according to slow sampled point, movement training sequence is calculated the step of the power of slow sampled data, and according to calculate morning sampled data the power and the power calculation of sampled data late
Step,
P
eBe the power of sampled data morning, P
lPower for slow sampled data.
Timing error adjustment calculation step has two kinds of implementation methods.First kind of implementation method of timing error adjustment calculation step is according to threshold T and adjusts step value α and calculate the timing error adjusted value
Second kind of implementation method of timing error adjustment calculation step is according to threshold T, adjusts step value α and over-sampling multiple S
nCalculate the timing error adjusted value
Here,
The result who obtains for the average step,
Expression less than the maximum integer of absolute value, sign[] symbol of expression.
In two kinds of implementation methods of the timing error calculation procedure of Miao Shuing, threshold T equals in the above
Function curve multiply by the accuracy value of demand at 0 slope, perhaps by formula T=G (T
Required/ T
c) calculate.Here, T
RequiredBe the precision of the synchronous tracking progress of demand,
T
cWith τ be respectively chip period and timing error, Δ be desirable sampled point respectively with slow sampled point, identical time difference between the sampled point early.
Utilize timing error adjustment that above-mentioned timing tracking method calculates regularly according to timing adjusting method of the present invention.
For the person of ordinary skill of the art, other advantage and modification all are conspicuous.So, the embodiment that the present invention not merely is defined in the specification to be put down in writing.Therefore, any disengaging by claim and its various changes that are equal to the spirit and scope of the present invention that partly limit all can realize.
Claims (22)
1. timing tracking apparatus, it utilizes early sampled point and the data computation timing error of sampled point late, comprises
One data extractor, be used for training sequence morning sampled point and late sampling number according to separating from receiving data respectively,
One
Calculator,
P
eBe the power of sampled data morning, P
lFor the power of slow sampled data, described
The sampling number certificate and the training sequence data of sampling number certificate were late estimated the power of sampling number certificate early and the power of sampling number certificate late respectively, and were calculated calculator is used for that the data-driven separator separates morning
Numerical value,
Certain calculation of error device is used for the average according to equalizer output, calculates timing error.
2. timing tracking apparatus as claimed in claim 1, wherein,
The training sequence data that data extractor is separated is the data of midamble or the data of SYNC-DL.
3. timing tracking apparatus as claimed in claim 1, wherein,
Calculator is based on the implementation method of FFT
Calculator comprises
Be used for the training sequence data according to sampled point morning, local training sequence and user's code channel information calculations be the channel estimator of the power of sampled data early, effective diameter withdrawal device and power calculator,
Be used for training sequence data according to slow sampled point, the channel estimator of the power of local training sequence and the slow sampled data of user's code channel information calculations, effective diameter withdrawal device and power calculator, and be used for according to calculate morning sampled data power P
ePower P with slow sampled data
lCalculate
Computing unit.
4. timing tracking apparatus as claimed in claim 1, wherein,
Be used for the training sequence data according to sampled point morning, movement training sequence is calculated the early correlator and the power calculator of the power of sampled data,
Be used for the training sequence data according to slow sampled point, movement training sequence is calculated the correlator and the power calculator of the power of slow sampled data, and
6. timing tracking apparatus as claimed in claim 1, wherein,
The timing error calculator is according to threshold T, adjustment step value α and over-sampling multiple S
nCalculate the timing error adjusted value
9. timing tracking apparatus as claimed in claim 5, wherein,
T=G(T
required/T
c)
Here, T
RequiredBe the precision of the synchronous tracking progress of demand,
T
eWith τ be respectively chip period and timing error, Δ be desirable sampled point respectively with slow sampled point, identical time difference between the sampled point early.
10. timing tracking apparatus as claimed in claim 6, wherein,
T=G(T
required/T
c)
Here, T
RequiredBe the precision of the synchronous tracking progress of demand,
T
cWith τ be respectively chip period and timing error, Δ be desirable sampled point respectively with slow sampled point, identical time difference between the sampled point early.
11. a receiving system, it has each described timing tracking apparatus as claim 1-10, the timing error adjustment timing that it utilizes this timing tracking apparatus to calculate.
12. a timing tracking method, it comprises
The training sequence data separating step utilizes data extractor, with training sequence morning sampled point and late sampling number according to from receive data, separating respectively,
Calculation procedure is utilized
The sampling number certificate and the training sequence data of sampling number certificate were late estimated the power of sampling number certificate early and the power of sampling number certificate late respectively, and were calculated calculator, data-driven separator separate morning
Numerical value, P wherein
cBe the power of sampled data morning, P
lBe the power of slow sampled data,
The average step is utilized equalizer, n subframe of calculating
Average and
The timing error calculation procedure is utilized the timing error calculator, according to the result of average step, calculates timing error.
13. timing tracking method as claimed in claim 12, wherein
The training sequence data of separating is the data of midamble or the data of SYNC-DL.
14. timing tracking method as claimed in claim 12, wherein,
According to the training sequence data of sampled point morning, local training sequence and user's code channel information calculations be the step of the power of sampled data early,
According to the training sequence data of slow sampled point, the step of the power of local training sequence and the slow sampled data of user's code channel information calculations, and
According to calculate morning sampled data power P
ePower P with slow sampled data
lCalculate
Step.
15. timing tracking method as claimed in claim 12, wherein,
According to the training sequence data of sampled point morning, movement training sequence is calculated the step of the power of sampled data early,
According to the training sequence data of slow sampled point, movement training sequence is calculated the step of the power of slow sampled data, and
17. timing tracking method as claimed in claim 12, wherein,
The timing error calculation procedure is according to threshold T, adjustment step value α and over-sampling multiple S
nCalculate the timing error adjusted value
20. timing tracking method as claimed in claim 16, wherein,
T=G(T
required/T
c)
Here, T
RequiredBe the precision of the synchronous tracking progress of demand,
T
cWith τ be respectively chip period and timing error, Δ be desirable sampled point respectively with slow sampled point, identical time difference between the sampled point early.
21. timing tracking method as claimed in claim 17, wherein,
T=G(T
required/T
c)
Here, T
RequiredBe the precision of the synchronous tracking progress of demand,
T
cWith τ be respectively chip period and timing error, Δ be desirable sampled point respectively with slow sampled point, identical time difference between the sampled point early.
22. a timing adjusting method, it comprises,
Utilize the timing error adjustment step regularly that calculates as each described timing tracking method of claim 12-21.
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CN101534426B (en) * | 2008-03-11 | 2010-12-01 | 卓胜微电子(上海)有限公司 | National standard timing tracking method of digital television terrestrial broadcasting |
CN102196553A (en) * | 2011-03-31 | 2011-09-21 | 重庆重邮信科通信技术有限公司 | Timing synchronization correcting method of mobile terminal |
CN103368873B (en) * | 2012-03-27 | 2016-09-28 | 北京电信技术发展产业协会 | A kind of method obtaining sampling dithering |
CN108809869B (en) * | 2017-04-28 | 2020-12-29 | 深圳市中兴微电子技术有限公司 | Method and device for controlling sampling time |
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