CN100416811C - Photoelectric chip package structure, manufacturing method and its chip carrier - Google Patents

Photoelectric chip package structure, manufacturing method and its chip carrier Download PDF

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Publication number
CN100416811C
CN100416811C CNB2005101145225A CN200510114522A CN100416811C CN 100416811 C CN100416811 C CN 100416811C CN B2005101145225 A CNB2005101145225 A CN B2005101145225A CN 200510114522 A CN200510114522 A CN 200510114522A CN 100416811 C CN100416811 C CN 100416811C
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China
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photoelectric chip
conducting wire
solder mask
wire layer
those
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CN1956178A (en
Inventor
潘玉堂
周世文
吴政庭
陈廷源
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BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Chipmos Technologies Inc
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BERMUDA CHIPMOS TECHNOLOGIES Co Ltd
Chipmos Technologies Inc
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Priority to CNB2005101145225A priority Critical patent/CN100416811C/en
Publication of CN1956178A publication Critical patent/CN1956178A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

A packaging structure of photoelectric chip is prepared as setting a position giving-up opening on welding block layer to let said welding block layer and photoelectric chip be fixed on a temporary carrier in chip packaging process, fitting top surface of conduction circuit layer with welding block layer and making bottom surface of conduction circuit layer be covered by seal colloid after photoelectric chip is electric-connected to conduction circuit layer.

Description

Photoelectric chip packaging structure, manufacture method and chip bearing member thereof
Technical field
The present invention relates to a kind of optoelectronic package technology, particularly relate to photoelectric chip packaging structure, manufacture method and the chip bearing member thereof of a kind of chipless carrying with substrate.
Background technology
Present photoelectric chip (chip is a wafer, below all be called chip) packaging structure, particularly for the encapsulation of image sensor chip, generally be with circuit substrate as chip bearing, after encapsulation, have thicker thickness.Seeing also shown in Figure 1ly, is the schematic cross-section of existing known photoelectric chip packaging structure.Existing known photoelectric chip packaging structure 1 includes the substrate 10 just like printed circuit board (PCB), and this substrate 10 has the core layer 11 (core layer) that a glass cloth contains resin pickup.Be conducting wire, upper strata layer 12 above it and be coated with a upper strata solder mask 14, and thereunder be lower floor's conducting wire layer 13, and be coated with lower floor's solder mask 15; And with suitable plated-through-hole 16 electric connection conducting wire, upper strata layers 12 and lower floor's conducting wire layer 13.One photoelectric chip 20 is the upper surfaces that are attached at substrate 10.Wherein one of this photoelectric chip 20 smooth start district 21 is to appear up with a plurality of weld pads 22.Can set in advance a transparent glass 23, with this light start district 21 of screening.Utilize a plurality of bonding wires 30 to electrically connect the upper strata conducting wire layer 12 of those weld pads 22 of photoelectric chip 20 to substrate 10.One adhesive body 40 is formed in the upper surface of this substrate 10 and at the periphery of photoelectric chip 20, to seal those bonding wires 30.In addition, a plurality of soldered balls 50 can be arranged at the lower surface of substrate 10 and be engaged to lower floor's conducting wire layer 13.Therefore, existing known photoelectric chip packaging structure 1 can have suitable thickness, and this adhesive body 40 pollutes easily, thereby influences the light transmission path in light start district 21.
This shows that above-mentioned existing photoelectric chip packaging structure, manufacture method and chip bearing member thereof obviously still have inconvenience and defective, and demand urgently further being improved in structure, method and use.In order to solve light photoelectric chip packaging structure, manufacture method and the existing problem of chip bearing member thereof, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and general product does not have appropriate structure to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of new photoelectric chip packaging structure, manufacture method and chip bearing member thereof, just become the current industry utmost point to need improved target.
Because the defective that above-mentioned existing photoelectric chip packaging structure, manufacture method and chip bearing member thereof exist, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of new photoelectric chip packaging structure, manufacture method and chip bearing member thereof, can improve general existing photoelectric chip packaging structure and manufacture method thereof, make it have more practicality.Through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
Main purpose of the present invention is, overcome the defective that existing photoelectric chip packaging structure exists, and provide a kind of novel photoelectric chip packaging structure, technical problem to be solved is to make it can save the thickness that has known substrate core layer now, and can reduce excessive glue pollution, thereby be suitable for practicality more this photoelectric chip.
Another object of the present invention is to, overcome the defective of the manufacture method existence of existing photoelectric chip packaging structure, and provide a kind of manufacture method of new photoelectric chip packaging structure, technical problem to be solved is to make its photoelectric chip packaging structure that can produce a kind of noresidue chip bearing member, thereby is suitable for practicality more.
A further object of the present invention is, overcome the defective that the existing chip bearing part exists, and provide a kind of chip bearing member that is used in chip encapsulating manufacturing procedure, technical problem to be solved is a conducting wire layer and a solder mask that makes it include a temporary carrier and not have the substrate core layer, utilize a temporary carrier to be attached at this solder mask, and by this glutinous crystalline substance gluing one photoelectric chip mouthful in the Chip Packaging process of stepping down, one adhesive body can be covered to the lower surface of this conducting wire layer and fix this photoelectric chip, can not pollute the light start district of this photoelectric chip, thereby be suitable for practicality more.
The object of the invention to solve the technical problems realizes by the following technical solutions.A kind of photoelectric chip packaging structure according to the present invention's proposition, it comprises: a conducting wire layer of no substrate core layer and a solder mask (solder resist), this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, this upper surface of this conducting wire layer is attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down; One photoelectric chip, it has an active surface and a back side, is formed with a smooth start district and a plurality of weld pad on this active surface, and this light start district steps down in the mouth in alignment with this glutinous crystalline substance; A plurality of electrical connecting elements, its those weld pads that electrically connect this photoelectric chip are to this conducting wire layer; An and adhesive body, it covers this lower surface of this conducting wire layer, with in conjunction with this conducting wire layer and this photoelectric chip, and this adhesive body is those electrical connecting elements of sealing and local these active surfaces that cover this photoelectric chip, and manifests this light start district and this solder mask.
The object of the invention to solve the technical problems also adopts following technical measures further to realize.
Aforesaid photoelectric chip packaging structure, the gross thickness of wherein said solder mask and this conducting wire layer are the thickness less than this photoelectric chip.
Aforesaid photoelectric chip packaging structure, wherein said those electrical connecting elements are to be bonding wire, and this adhesive body is to have a plurality of protuberances, it protrudes from this solder mask, and those protuberances are positioned at that this glutinous crystalline substance is stepped down mouthful and at this active surface periphery of this photoelectric chip, to seal those electrical connecting elements fully.
Aforesaid photoelectric chip packaging structure, wherein said those electrical connecting elements are to be projection.
Aforesaid photoelectric chip packaging structure, it includes a transmission element in addition, and it is arranged on this active surface of this photoelectric chip, with this light start district of screening.
Aforesaid photoelectric chip packaging structure, wherein said solder mask are to be the kenel that is embedded in this adhesive body.
The object of the invention to solve the technical problems also realizes by the following technical solutions.The manufacture method of a kind of photoelectric chip packaging structure that proposes according to the present invention, it may further comprise the steps: a conducting wire layer and a solder mask (solder resist) that no substrate core layer is provided, this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, this upper surface of this conducting wire layer is attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down; Attach the temporary carrier of this solder mask to one; Attach a photoelectric chip to this temporary carrier, this photoelectric chip has an active surface and a back side, is formed with a smooth start district and a plurality of weld pad on this active surface, and wherein this light start district steps down in the mouth in alignment with this glutinous crystalline substance; Those weld pads that electrically connect this photoelectric chip by a plurality of electrical connecting elements are to this conducting wire layer; Form an adhesive body in this temporary carrier, this adhesive body is this lower surface that covers this conducting wire layer, and with in conjunction with this conducting wire layer and this photoelectric chip, and this adhesive body is these active surfaces of those electrical connecting elements of sealing and local this photoelectric chip of covering; And remove this temporary carrier, to manifest this light start district and this solder mask.
The object of the invention to solve the technical problems also adopts following technical measures further to realize.
The manufacture method of aforesaid photoelectric chip packaging structure, wherein said those electrical connecting elements are to be bonding wire, this temporary carrier is to have at least one routing fluting, with those weld pads that manifest this photoelectric chip and the part of this conducting wire layer, and this adhesive body is to have at least one protuberance, it fills in this routing fluting, makes it protrude from this solder mask, to seal those electrical connecting elements fully.
The manufacture method of aforesaid photoelectric chip packaging structure has set in advance a transmission element on this active surface of wherein said photoelectric chip, and this photoelectric chip is to be attached at this temporary carrier by this transmission element.
The object of the invention to solve the technical problems also realizes by the following technical solutions.A kind of chip bearing member that is used in chip encapsulating manufacturing procedure according to the present invention's proposition, it comprises: a conducting wire layer and a solder mask of no substrate core layer, this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, this upper surface of this conducting wire layer is attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down; And a temporary carrier, it is attached at this solder mask.
The object of the invention to solve the technical problems also is further achieved by the following technical measures.Aforesaid photoelectric chip packaging structure, it has a plurality of assembly holes wherein said temporary carrier, with those perforates of appearing this solder mask and those connection gaskets of this conducting wire layer.
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, in order to achieve the above object, the invention provides a kind of photoelectric chip packaging structure, mainly comprise a conducting wire layer and a solder mask, a photoelectric chip, a plurality of electrical connecting element and an adhesive body of no substrate core layer.Wherein, this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, and this upper surface of this conducting wire layer is to be attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down.This photoelectric chip has an active surface and a back side, is formed with a smooth start district and a plurality of weld pad on this active surface, and this light start district steps down in the mouth in alignment with this glutinous crystalline substance.Those electrical connecting elements are to electrically connect those weld pads of this photoelectric chip to this conducting wire layer.This adhesive body is this lower surface that covers this conducting wire layer, with in conjunction with this conducting wire layer and this photoelectric chip, and this adhesive body is those electrical connecting elements of sealing and local this active surface that covers this photoelectric chip, to seal those weld pads and to manifest this light start district and this solder mask.
By technique scheme, photoelectric chip packaging structure of the present invention, manufacture method and chip bearing member thereof have following advantage at least:
Photoelectric chip packaging structure of the present invention, be to utilize an a kind of conducting wire layer and solder mask that does not have the substrate core layer, this solder mask is to have the glutinous crystalline substance mouth of stepping down, attach a photoelectric chip for a temporary carrier, the upper surface of this conducting wire layer is to be attached at this solder mask, the lower surface of this conducting wire layer is covered by an adhesive body, can electrically connect a photoelectric chip under the state of package thickness not needing to increase.Therefore, can save the thickness that has known substrate core layer now, and can reduce excessive glue pollution, thereby be suitable for practicality more this photoelectric chip.
The manufacture method of photoelectric chip packaging structure of the present invention, be to utilize a temporary carrier, UV stickiness adhesive tape for example, in chip encapsulating manufacturing procedure, attach a solder mask and a photoelectric chip simultaneously, and the light start district that makes this photoelectric chip steps down in the mouth in alignment with a glutinous crystalline substance of this solder mask, after forming an adhesive body, remove this temporary carrier, to appear this light start district and this solder mask, so can produce a kind of photoelectric chip packaging structure of noresidue chip bearing member, thereby be suitable for practicality more.
The chip bearing member that is used in chip encapsulating manufacturing procedure of the present invention; be a conducting wire layer and a solder mask that includes a temporary carrier and do not have the substrate core layer; this conducting wire layer and this solder mask are to protect with surface insulation as the chip electric connection of a packaging structure respectively; this solder mask is to have a plurality of perforates that appear connection gasket and the glutinous crystalline substance mouth of stepping down; utilize a temporary carrier to be attached at this solder mask; and by this glutinous crystalline substance gluing one photoelectric chip mouthful in the Chip Packaging process of stepping down, thereby be suitable for practicality more.
In sum, the invention provides a kind of special photoelectric chip packaging structure, manufacture method and chip bearing member thereof.This packaging structure mainly comprises a conducting wire layer and a solder mask, a photoelectric chip and an adhesive body of no substrate core layer.This solder mask has the glutinous crystalline substance mouth of stepping down, so that this solder mask and this photoelectric chip are fixed on a temporary carrier in chip encapsulating manufacturing procedure, the upper surface of this conducting wire layer is to be attached at this solder mask, and after electrically connecting this photoelectric chip and this conducting wire layer, the lower surface of this conducting wire layer is covered by this adhesive body.So this photoelectric chip packaging structure can save the thickness of existing substrate core layer, and can reduce excessive glue pollution to this photoelectric chip.The present invention has above-mentioned plurality of advantages and practical value, and in like product and method, do not see have similar structural design and method to publish or use and really genus innovation, no matter it all has bigger improvement on product structure, manufacture method or function, have technically than much progress, and produced handy and practical effect, and more existing photoelectric chip packaging structure, manufacture method and chip bearing member thereof have the multinomial effect of enhancement, thereby be suitable for practicality more, and have the extensive value of industry, really be a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the schematic cross-section that has known photoelectric chip packaging structure now.
Fig. 2 is according to first specific embodiment of the present invention, is a kind of schematic cross-section of photoelectric chip packaging structure.
Fig. 3 to Fig. 6 is according to first specific embodiment of the present invention, is the element cross-section schematic diagram of this photoelectric chip packaging structure in manufacture process.
Fig. 7 is according to second specific embodiment of the present invention, is the schematic cross-section of another kind of photoelectric chip packaging structure.
Fig. 8 and Fig. 9 are according to second specific embodiment of the present invention, are the element cross-section schematic diagram of this photoelectric chip packaging structure in main manufacture process.
1: photoelectric chip packaging structure 10: substrate
11: core layer 12: conducting wire, upper strata layer
13: lower floor's conducting wire layer 14: upper strata solder mask
15: lower floor's solder mask 16: plated-through-hole
20: photoelectric chip 21: light start district
22: weld pad 23: transparent glass
30: bonding wire 40: adhesive body
50: soldered ball 100: the photoelectric chip packaging structure
110: conducting wire layer 111: upper surface
112: lower surface 113: connection gasket
120: solder mask 121: perforate
122: glutinous crystalline substance steps down mouthfuls 130: photoelectric chip
131: active surface 132: the back side
133: light start district 134: weld pad
140: electrical connecting element 150: adhesive body
151: protuberance 160: connect terminal outward
200: temporary carrier 210: the routing fluting
220: assembly hole 300: the photoelectric chip packaging structure
310: conducting wire layer 311: upper surface
312: lower surface 313: connection gasket
320: solder mask 321: perforate
322: glutinous crystalline substance steps down mouthfuls 330: photoelectric chip
331: active surface 332: the back side
333: light start district 334: weld pad
335: transmission element 340: electrical connecting element
350: adhesive body 360: connect terminal outward
400: temporary carrier
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to its embodiment of photoelectric chip packaging structure, manufacture method and chip bearing member thereof, structure, manufacture method, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
Seeing also shown in Figure 2ly, is the schematic cross-section of a kind of photoelectric chip packaging structure of being provided in the present invention's first specific embodiment.This photoelectric chip packaging structure 100 mainly includes a conducting wire layer 110 and a solder mask 120, a photoelectric chip 130, a plurality of electrical connecting element 140 and an adhesive body 150 of no substrate core layer, wherein:
This conducting wire layer 110 has a upper surface 111, a lower surface 112 and a plurality of connection gasket 113, as the inside of photoelectric chip 130 is electrically transmitted.The upper surface 111 of this conducting wire layer 110 is attached at solder mask 120; this solder mask 120 is the surface insulation protections as photoelectric chip packaging structure 100, and its material can be epoxy system, acryl (being acrylic resin (acrylic)) is or the electrical insulating property resin material that pi (PI) is.
This solder mask 120 has a plurality of perforates 121 that appear those connection gaskets 113 and a glutinous crystalline substance and steps down mouthfuls 122.Usually this solder mask 120 is to be selected from pressing diaphragm mould assembly cover layer, dry-film type photosensitive cover lay and welding cover layer (solder mask, be liquid-type photonasty solder mask, also can be described as green lacquer or welding resisting layer) one of them, wherein, select for use welding cover layer can cost lower, energy is smooth in a temporary carrier 200 (as shown in Figure 4) to select pressing diaphragm mould assembly cover layer for use, and can reduce the generation of the excessive glue (mold flash) of pressing mold.Perhaps, this conducting wire layer 110 can not have then by one with solder mask 120, and formulation copper clad laminate (CCL) is constituted, again its insulating barrier is formed those perforates 121 and glutinous crystalline substance with laser drill or die-cut mode and step down mouthfuls 122, and easily low cost obtains in a large number.On concrete structure, this solder mask 120 should be less than the thickness of photoelectric chip 130 with the gross thickness of conducting wire layer 110.Wherein, this solder mask 120 is can be controlled at less than 120 μ m (micron) with the gross thickness of conducting wire layer 110, again being preferable between 15~80 μ m (micron).
This photoelectric chip 130 has an active surface 131 and a back side 132, is formed with a smooth start district 133 and an a plurality of weld pad 134 on this active surface 131.In light start district 133, can include various photoelectric cell, and be electrically connected to those weld pads 134.For example this photoelectric chip 130 can be image sensing chip, light transmitting chip, image projecting chip, identification of fingerprint chip or the like.For this light start district 133 can not be intercepted by adhesive body 150 light, this light start district 133 should step down in the mouth 122 in alignment with glutinous crystalline substance.
In addition, those electrical connecting elements 140, it is to electrically connect those weld pads 134 of photoelectric chip 130 to conducting wire layer 110.In the present embodiment, those electrical connecting elements 140 are to be bonding wire.Preferable, the active surface 131 of this photoelectric chip 130 should flush in solder mask 120, can shorten the length of wire bonding of those electrical connecting elements 140, it can define one by a temporary carrier 200 can be for attaching the plane (as shown in Figure 5) of solder mask 120 with photoelectric chip 130 simultaneously.
This adhesive body 150, it is the lower surface 112 that covers conducting wire layer 110, with in conjunction with this conducting wire layer 110 and photoelectric chip 130, and this adhesive body 150 is those electrical connecting elements 140 of sealing and the local active surface 131 that covers photoelectric chip 130, to seal those weld pads 134 and to appear bright dipping start district 133 and solder mask 120.In the present embodiment, this adhesive body 150 is the back side 132 and the sides thereof that cover photoelectric chip 130.In addition, when those electrical connecting elements 140 are the bonding wires that form for routing, have a dozen bank height, in order to seal those electrical connecting elements 140 fully, this adhesive body 150 has a plurality of protuberances 151, and it protrudes from solder mask 120.Those protuberances 151 are positioned at glutinous crystalline substance and step down mouthfuls 122 and at active surface 131 peripheries of photoelectric chip 130.In addition, the outer terminal 160 that connects of a plurality of for example soldered balls can be arranged on those connection gaskets 113, with external electric connection.
Conducting wire layer 110 and solder mask 120 by above-mentioned no substrate core layer carrying, and this solder mask 120 is to have a glutinous crystalline substance to step down mouthfuls 122, the upper surface 111 of this conducting wire layer 110 is to be attached at this solder mask 120, and the lower surface 112 of this conducting wire layer 110 is covered by adhesive body 150.Therefore, this photoelectric chip packaging structure 100 can save the thickness of existing known substrate core layer, and above-mentioned conducting wire layer 110 can't increase any package thickness with solder mask 120, and can reach the photoelectric chip encapsulation of ultra-thinization.
The present invention also provides a kind of manufacture method of new photoelectric chip packaging structure, sees also Fig. 3 to shown in Figure 6, is the element cross-section schematic diagram of this photoelectric chip packaging structure in manufacture process according to the present invention's first specific embodiment.The manufacture method of above-mentioned photoelectric chip packaging structure 100 mainly may further comprise the steps:
At first, as shown in Figure 3, the conducting wire layer 110 and solder mask 120 that at first provide above-mentioned no substrate core layer to carry.Wherein a kind of concrete practice is, earlier on a substrate, stick a Copper Foil and be etched into conducting wire layer 110 again, form for example solder mask 120 of welding cover layer afterwards, those perforates 121 and the glutinous crystalline substance of this solder mask 120 stepped down and mouthfuls 122 can be formed by the exposure imaging mode, peels off this substrate afterwards again.
As shown in Figure 4, the solder mask 120 that posts conducting wire layer 110 is pasted to a temporary carrier 200.In the present embodiment, this temporary carrier 200 is to be a UV stickiness adhesive tape, with the stickiness gluing solder mask 120 of this temporary carrier 200, as the chip bearing member in the chip encapsulating manufacturing procedure.In addition, because this conducting wire layer 110 is to reach electric connection by the routing mode with photoelectric chip 130, so this temporary carrier 200 should have at least one routing fluting 210, with those weld pads 134 that manifest photoelectric chip 130 and the part of conducting wire layer 110.In addition, this temporary carrier 200 has more a plurality of assembly holes 220, with those perforates 121 of appearing solder mask 120 those connection gaskets 113 with conducting wire layer 110.
Afterwards, as shown in Figure 5, photoelectric chip 130 is pasted to temporary carrier 200.Wherein, step down mouthfuls 122 by the glutinous crystalline substance of solder mask 120, the active surface 131 of photoelectric chip 130 is by 200 gluings of temporary carrier, and the light start district 133 of this photoelectric chip 130 steps down in mouthfuls 122 in alignment with this glutinous crystalline substance.Afterwards, utilize the routing processing procedure to form the electrical connection module 140 of a plurality of for example bonding wires, to electrically connect those weld pads 134 and conducting wire layers 110 of photoelectric chip 130 at routing 210 places that slot.
Afterwards, as shown in Figure 6, can use compression molding techniques to form adhesive body 150, this adhesive body 150 should cover the lower surface 112 of conducting wire layer 110, reach combining of this conducting wire layer 110 and photoelectric chip 130, and insert the protuberance 151 that routing fluting 210 constitutes adhesive body 150, this protuberance 151 is to protrude from solder mask 120, to seal those electrical connecting elements 140 and the local active surface 131 that covers photoelectric chip 130 fully, to seal those weld pads 134.In the present embodiment, this adhesive body 150 more covers the back side 132 of photoelectric chip 130, to increase the protection of chip.Yet this light start district 133 and solder mask 120 are the gluing coverings at temporary carrier 200, and the glue (mold flash) that can't be overflow by the model that adhesive body 150 produced pollute.In addition, after this adhesive body 150 forms, utilize temporary carrier 200 to carry and transmit, can be by those assembly holes 220 of this temporary carrier 200, be provided with those for example the outer terminal 160 that connects of soldered ball on those connection gaskets 113 of conducting wire layer 110.At last, remove temporary carrier 200, to obtain a plurality of photoelectric chip packaging structures 100 as shown in Figure 2.In the present embodiment, it is to utilize the UV rayed in temporary carrier 200 (being the UV adhesive tape), makes this temporary carrier 200 lose stickiness, can peel off this temporary carrier 200 easily, and manifest the light start district 133 and the solder mask 120 of photoelectric chip 130.Therefore, according to the manufacture method of above-mentioned photoelectric chip packaging structure, can reduce the thickness that has substrate core layer in the known photoelectric chip packaging structure now, and can reach ultra-thinization and excellent electrical property connection.
Seeing also shown in Figure 7ly, is according to second specific embodiment of the present invention, is the schematic cross-section of the another kind of photoelectric chip packaging structure of the present invention.In second specific embodiment of the present invention, another kind of photoelectric chip packaging structure 300 is provided, it mainly comprises a conducting wire layer 310 and a solder mask 320, a photoelectric chip 330, a plurality of electrical connecting element 340 and an adhesive body 350 of no substrate core layer, wherein:
This conducting wire layer 310, have a upper surface 311, a lower surface 312 and a plurality of connection gasket 313, the upper surface 311 of this conducting wire layer 310 is to be attached at solder mask 320, and this solder mask 320 has a plurality of perforates 321 that appear those connection gaskets 313 and a glutinous crystalline substance and steps down mouthfuls 322.
This photoelectric chip 330 has an active surface 331 and a back side 332, is formed with a smooth start district 333 and an a plurality of weld pad 334 on this active surface 331.This light start district 333 steps down in mouthfuls 322 in alignment with glutinous crystalline substance.In the present embodiment, set in advance a transmission element 335 on the active surface 331 of this photoelectric chip 330, for example optical glass or transparent resin layer are with this transmission element 335 light start district 333 of screening.
Those electrical connecting elements 340 are to be projection, can use hot pressing or chip bonding mode with those weld pads 334 of electrically connecting photoelectric chip 330 to conducting wire layer 310.
This adhesive body 350, be the back side 332 and the side that covers lower surface 312 with the photoelectric chip 330 of conducting wire layer 310, with in conjunction with this conducting wire layer 310 and photoelectric chip 330, and this adhesive body 350 is those electrical connecting elements 340 of sealing and the local active surface 331 that covers photoelectric chip 330, and appears bright dipping start district 333 and solder mask 320.So in photoelectric chip packaging structure 300 of the present invention, this solder mask 320 is to be embedded in adhesive body 350, the lateral margin of the lateral margin of this solder mask 320 and conducting wire layer 310 is all coated by this adhesive body 350, and this solder mask 320 is not to be formed on the outer surface of this adhesive body 350.In addition, it includes in addition and a plurality ofly outer connects terminal 360, and it is arranged at those connection gaskets 313 of conducting wire layer 310.
Seeing also Fig. 8 and shown in Figure 9, is according to second specific embodiment of the present invention, is the element cross-section schematic diagram of this photoelectric chip packaging structure in main manufacture process.Because the conducting wire layer 310 of above-mentioned no substrate core layer is quite thin with the gross thickness of solder mask 320, can't be directly as chip bearing member, so should be attached at a temporary carrier 400 (as shown in Figure 8) earlier in encapsulation procedure.This solder mask 320 is to be attached at temporary carrier 400.And, in alignment with step down mouthfuls 322 mode of glutinous crystalline substance, will be attached at temporary carrier 400 with light start district 333 in the light transmission piece on the photoelectric chip 330 335, simultaneously, those electrical connecting elements 340 are to be electrically connected to conducting wire layer 310.As shown in Figure 9, it forms adhesive body 350 in the pressing mold mode, and it is the lower surface 312 that covers conducting wire layer 310, and solder mask 320 is to be the kenel that is embedded in this adhesive body 350.After removing temporary carrier 400, can manifest a surface of solder mask 320 and transmission element 335, make light start district 333 also be emerging in outside the adhesive body 350 light-permeable.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the method that can utilize above-mentioned announcement and technology contents are made a little change or be modified to the equivalent embodiment of equivalent variations, but every content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.

Claims (11)

1. photoelectric chip packaging structure is characterized in that it comprises:
The one conducting wire layer and a solder mask of no substrate core layer, this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, this upper surface of this conducting wire layer is attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down;
One photoelectric chip, it has an active surface and a back side, is formed with a smooth start district and a plurality of weld pad on this active surface, and this light start district steps down in the mouth in alignment with this glutinous crystalline substance;
A plurality of electrical connecting elements, its those weld pads that electrically connect this photoelectric chip are to this conducting wire layer; And
One adhesive body, it covers this lower surface of this conducting wire layer, with in conjunction with this conducting wire layer and this photoelectric chip, and this adhesive body is those electrical connecting elements of sealing and local these active surfaces that cover this photoelectric chip, and manifests this light start district and this solder mask.
2. photoelectric chip packaging structure according to claim 1, the gross thickness that it is characterized in that wherein said solder mask and this conducting wire layer are the thickness less than this photoelectric chip.
3. photoelectric chip packaging structure according to claim 1, it is characterized in that wherein said those electrical connecting elements are to be bonding wire, and this adhesive body is to have a plurality of protuberances, it is to protrude from this solder mask, and those protuberances are positioned at that this glutinous crystalline substance is stepped down mouthful and at this active surface periphery of this photoelectric chip, to seal those electrical connecting elements fully.
4. photoelectric chip packaging structure according to claim 1 is characterized in that wherein said those electrical connecting elements are to be projection.
5. photoelectric chip packaging structure according to claim 1 is characterized in that it includes a transmission element in addition, and it is arranged on this active surface of this photoelectric chip, with this light start district of screening.
6. photoelectric chip packaging structure according to claim 1 is characterized in that wherein said solder mask is to be the kenel that is embedded in this adhesive body.
7. the manufacture method of a photoelectric chip packaging structure is characterized in that it may further comprise the steps:
The one conducting wire layer and a solder mask of no substrate core layer are provided, this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, this upper surface of this conducting wire layer is attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down;
Attach the temporary carrier of this solder mask to one;
Attach a photoelectric chip to this temporary carrier, this photoelectric chip has an active surface and a back side, is formed with a smooth start district and a plurality of weld pad on this active surface, and wherein this light start district steps down in the mouth in alignment with this glutinous crystalline substance;
Those weld pads that electrically connect this photoelectric chip by a plurality of electrical connecting elements are to this conducting wire layer;
Form an adhesive body in this temporary carrier, this adhesive body is this lower surface that covers this conducting wire layer, and with in conjunction with this conducting wire layer and this photoelectric chip, and this adhesive body is these active surfaces of those electrical connecting elements of sealing and local this photoelectric chip of covering; And
Remove this temporary carrier, to manifest this light start district and this solder mask.
8. the manufacture method of photoelectric chip packaging structure according to claim 7, it is characterized in that wherein said those electrical connecting elements are to be bonding wire, this temporary carrier is to have at least one routing fluting, with those weld pads that manifest this photoelectric chip and the part of this conducting wire layer, and this adhesive body is to have at least one protuberance, it fills in this routing fluting, makes it protrude from this solder mask, to seal those electrical connecting elements fully.
9. the manufacture method of photoelectric chip packaging structure according to claim 7 is characterized in that having set in advance a transmission element on this active surface of wherein said photoelectric chip, and this photoelectric chip is to be attached at this temporary carrier by this transmission element.
10. chip bearing member that is used in chip encapsulating manufacturing procedure is characterized in that it comprises:
The one conducting wire layer and a solder mask of no substrate core layer, this conducting wire layer has a upper surface, a lower surface and a plurality of connection gasket, this upper surface of this conducting wire layer is attached at this solder mask, and this solder mask has a plurality of perforates that appear those connection gaskets and the glutinous crystalline substance mouth of stepping down; And
One temporary carrier, it is attached at this solder mask.
11. chip bearing member according to claim 10 is characterized in that wherein said temporary carrier has a plurality of assembly holes, with those perforates of appearing this solder mask and those connection gaskets of this conducting wire layer.
CNB2005101145225A 2005-10-24 2005-10-24 Photoelectric chip package structure, manufacturing method and its chip carrier Active CN100416811C (en)

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CN106206328B (en) * 2016-07-27 2018-12-18 桂林电子科技大学 A kind of production method being embedded to Chip package substrate
CN106252471B (en) * 2016-08-31 2019-09-06 珠海市一芯半导体科技有限公司 A kind of more I/O flip LED chips array bump packaging structures and its packaging method
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TWI667746B (en) * 2018-04-03 2019-08-01 南茂科技股份有限公司 Semiconductor package structure and method for manufacturing the same
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