CN100412812C - Cold boot apparatus of mainboard - Google Patents
Cold boot apparatus of mainboard Download PDFInfo
- Publication number
- CN100412812C CN100412812C CNB2005101012454A CN200510101245A CN100412812C CN 100412812 C CN100412812 C CN 100412812C CN B2005101012454 A CNB2005101012454 A CN B2005101012454A CN 200510101245 A CN200510101245 A CN 200510101245A CN 100412812 C CN100412812 C CN 100412812C
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- mainboard
- pin
- chip microcomputer
- connector
- clock
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Abstract
This invention relates to host board cold start device, which comprises one connector and one processor, wherein, the processor comprises one control module and one signal generation module connected to the signal generation module; the connector ad control module are connected; the connector is to connect host board cold start device and one host board; the said control module is to receive one start signals sent by main board and to control signal generation module for one main board reset signal and to output main board reset signal into one main board power lead leg to restart main board.
Description
[technical field]
The invention relates to a kind of cold boot apparatus of mainboard.
[background technology]
The reliability demonstration stage in the computer main board research and development need place computer system with mainboard, carries out the loop test of " start-time-delay-shutdown-time-delay-start ", generally will test about 1000 times.And the startup of computer has the branch of warm start and cold start-up, the cold start-up of mainboard is a power switch of pressing computer under open state, and the power supply supply of cutting off mainboard makes its shutdown, and then presses the power switch of computer, recover main board power supply, main board system is restarted.Carrying out wanting correspondence to carry out mainboard cold start-up test when mainboard starts loop test.
The South Bridge chip of mainboard is provided with a motherboard power supply pin, and it keeps high level to keep the mainboard duty when no external signal, changes a mainboard duty after accepting one " height-low-Gao " level variable signal.When carrying out mainboard cold start-up test, after pressing the power key of computer, the motherboard power supply pin level is dragged down, the level that unclamps motherboard power supply pin behind the power key recovers high level, promptly produce one " height-low-Gao " level variable signal, make the mainboard start that powers on, after pressing the computer power key once more and unclamping, mainboard is accepted one " height-low-Gao " level variable signal once more and is shut down immediately.So repeater worker's cold start makes test process loaded down with trivial details, wastes many manpowers, influences testing efficiency and progress.Therefore, be necessary to provide a kind of and can simplify the device that the mainboard cold start-up is surveyed, this device can send " height-low-Gao " the level variable signal at two intervals to mainboard, finishes the robotization of mainboard cold start-up, makes mainboard cold start-up test process become standard and science.
[summary of the invention]
In view of above content, be necessary to provide a cold boot apparatus of mainboard, to simplify mainboard cold start-up process.
A kind of cold boot apparatus of mainboard, it comprises an a connector and a processor, described processor comprises a control module and a signal generating module, described control module is connected with described signal generating module, described connector is connected with described control module, described connector is in order to electrically connect a described cold boot apparatus of mainboard and a mainboard, after described control module receives an enabling signal of described mainboard transmission, control described signal generating module and produce a mainboard Restart Signal, and described mainboard Restart Signal outputed to a motherboard power supply pin of mainboard South Bridge chip, mainboard is restarted.
Described cold boot apparatus of mainboard makes the cold start-up process of mainboard realize robotization, saves manpower and mainboard cold start-up test duration, has improved the efficient of mainboard cold start-up test.
[description of drawings]
The present invention is further illustrated in conjunction with embodiment with reference to the accompanying drawings.
Fig. 1 is the block diagram of cold boot apparatus of mainboard better embodiment of the present invention.
Fig. 2 is the circuit diagram of cold boot apparatus of mainboard better embodiment of the present invention.
[embodiment]
With reference to Fig. 1, it is the block diagram of cold boot apparatus of mainboard better embodiment of the present invention, one cold boot apparatus of mainboard 10 comprises a processor 12 and a connector 14, described processor 12 comprises a signal generating module 124 and a control module 126, described signal generating module 124 is connected with described control module 126, described connector 14 is connected with described control module 126, described connector 14 is in order to electrically connect a described cold boot apparatus of mainboard 10 and a mainboard, after described control module 126 receives an enabling signal of described mainboard transmission, control described signal generating module 124 and produce a mainboard Restart Signal, and described mainboard Restart Signal sent to a motherboard power supply pin PWRBTN of mainboard South Bridge chip, mainboard is restarted.
With reference to Fig. 2, it is the circuit diagram of cold boot apparatus of mainboard better embodiment of the present invention, described processor 12 is a single chip circuit, described connector 14 is a PS/2 connector, it comprises one power pins+5V, a data pin DATA, a clock pin CLK and a grounding pin GND, and described cold boot apparatus of mainboard 10 can be connected with a mainboard by described connector 14.
Described single chip circuit 12 comprises a single-chip microcomputer 120 and a clock generating circuit 122, and described signal generating module 124 and control module 126 are integrated in the described single-chip microcomputer 120.
Described clock generating circuit 122 comprises a crystal oscillator CRYSTAL and two capacitor C1 and C2, the frequency of described crystal oscillator is 11.0592MHz, the appearance value of described capacitor C1 and C2 is 33pF, and described clock generating circuit 122 provides work clock for described single-chip microcomputer 120.
Described single-chip microcomputer 120 is an AT89C51 chip; it comprises a power pins VCC; one clock output pin P0.0; one data pin P0.1; one status pin EA/VPP; one replacement pin RST; two clock input pin XTAL1 and XTAL2; an one level pin P0.5 and a grounding pin GND; the power pins VCC of described single-chip microcomputer 120 is connected with the power pins+5V of described connector 14; so that the operating voltage of single-chip microcomputer 120 to be provided; described clock output pin P0.0 is connected to transmit a simulated clock simulation clock signal with the power pins VCC of described single-chip microcomputer 120 and the clock pin CLK of described connector 14 respectively; described data pin P0.1 is connected with the power pins VCC of described single-chip microcomputer 12 and the data pin DATA of described connector 14 respectively; the status pin EA/VPP of described single-chip microcomputer 120 is connected with the power pins VCC of described single-chip microcomputer 120; described replacement pin RST is connected with the grounding pin GND of described single-chip microcomputer 120; the replacement pin RST of described single-chip microcomputer 120 also is connected with the power pins VCC of described single-chip microcomputer 120 by a capacitor C3; the alternating current protection is provided; described clock input pin XTAL2 is connected with another clock input pin XTAL1 by described crystal oscillator CRYSTAL; described clock input pin XTAL2 also is connected with the grounding pin GND of described single-chip microcomputer 120 by a capacitor C1; described clock input pin XTAL1 is connected with the grounding pin GND of described single-chip microcomputer 120 by a capacitor C2; the level pin P0.5 of described single-chip microcomputer 120 is connected with the motherboard power supply pin PWRBTN of a mainboard South Bridge chip, and the grounding pin GND of described single-chip microcomputer 120 is connected with the grounding pin GND of described connector 14.
The presetting of level pin P0.5 of described single-chip microcomputer 120 is output as high level, receive an enabling signal of mainboard transmission as the data pin P0.1 of single-chip microcomputer 120 after, the described signal generating module 124 of described control module 126 controls produces a low level and sends to level pin P0.5, so the output level of described level pin P0.5 is changed to low level, it is 1 second that described signal generating module 124 produces the low level duration, the low level of described level pin P0.5 output rebound high level after continuing 1 second, thereby to the power pins PWRBTN of described mainboard south bridge output one " height-low-Gao " level variable signal, after a time interval, by level pin P0.5 output one " height-low-Gao " level variable signal, the described time interval is 5 seconds to described single-chip microcomputer 120 once more.
In mainboard cold start-up test process, described cold boot apparatus of mainboard 10 is installed on the PS/2 interface of a mainboard to be measured, described mainboard to be measured sends an enabling signal by the data pin DATA of described connector 14 to described warm boot apparatus of mainboard 10,10 pairs of these enabling signals of described cold boot apparatus of mainboard are made response, level pin P0.5 by described single-chip microcomputer 12 restarts described mainboard to be measured to the motherboard power supply pin PWRBTN of described mainboard South Bridge chip to be measured output one " height-low-Gao " level variable signal at interval.
Described cold boot apparatus of mainboard 10 makes the cold start-up process of mainboard realize robotization, saves manpower and mainboard cold start-up test duration, has improved the efficient of mainboard cold start-up test.
Claims (9)
1. cold boot apparatus of mainboard, it is characterized in that: described cold boot apparatus of mainboard comprises an a connector and a processor, described processor comprises a control module and a signal generating module, described control module is connected with described signal generating module, described connector is connected with described control module, described connector is in order to electrically connect a described cold boot apparatus of mainboard and a mainboard, after described control module receives an enabling signal of described mainboard transmission, control described signal generating module and produce a mainboard Restart Signal, and described mainboard Restart Signal outputed to a motherboard power supply pin of described mainboard South Bridge chip, mainboard is restarted.
2. cold boot apparatus of mainboard as claimed in claim 1 is characterized in that: described mainboard Restart Signal is two and has certain hour " height-low-Gao " level variable signal at interval.
3. cold boot apparatus of mainboard as claimed in claim 1 is characterized in that: described connector is a PS/2 connector, and described processor is a single chip circuit.
4. cold boot apparatus of mainboard as claimed in claim 3, it is characterized in that: described single chip circuit comprises a single-chip microcomputer and a clock generating circuit, described single-chip microcomputer is an AT89C51 single-chip microcomputer, described control module and described signal generating module are integrated in the described single-chip microcomputer, and described clock generating circuit provides work clock for described single-chip microcomputer.
5. cold boot apparatus of mainboard as claimed in claim 4, it is characterized in that: described single-chip microcomputer comprises a power pins, one clock output pin, one data pin and a level pin, described connector comprises a power pins, one data pin, an one clock pin and a grounding pin, the power pins of described single-chip microcomputer is connected with the power pins of described connector, the clock output pin of described single-chip microcomputer is connected with the clock pin of described connector, the data pin of described single-chip microcomputer is connected with the data pin of described connector, and the level pin of described single-chip microcomputer is connected with the motherboard power supply pin of described mainboard South Bridge chip.
6. cold boot apparatus of mainboard as claimed in claim 5 is characterized in that: described single-chip microcomputer comprises a grounding pin, and the grounding pin of described single-chip microcomputer is connected with the grounding pin of described connector.
7. cold boot apparatus of mainboard as claimed in claim 6, it is characterized in that: described clock generating circuit comprises a crystal oscillator and some capacitors, described single-chip microcomputer also comprises a status pin, one replacement pin and two clock input pins, the status pin of described single-chip microcomputer is connected with described power pins, described replacement pin is connected with the grounding pin of described single-chip microcomputer, wherein a clock input pin is connected with another clock input pin by described crystal oscillator and is connected with the grounding pin of described single-chip microcomputer by a capacitor, and another clock input pin is connected with the grounding pin of described single-chip microcomputer by a capacitor.
8. warm boot apparatus of mainboard as claimed in claim 7 is characterized in that: the replacement pin of described single-chip microcomputer is connected with the power pins of described single-chip microcomputer by an electric capacity.
9. cold boot apparatus of mainboard as claimed in claim 7 is characterized in that: the frequency of described crystal oscillator is 11.0592MHz, and the appearance value of two capacitors of described clock generating circuit is 33pF.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005101012454A CN100412812C (en) | 2005-11-11 | 2005-11-11 | Cold boot apparatus of mainboard |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2005101012454A CN100412812C (en) | 2005-11-11 | 2005-11-11 | Cold boot apparatus of mainboard |
Publications (2)
Publication Number | Publication Date |
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CN1963776A CN1963776A (en) | 2007-05-16 |
CN100412812C true CN100412812C (en) | 2008-08-20 |
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CNB2005101012454A Expired - Fee Related CN100412812C (en) | 2005-11-11 | 2005-11-11 | Cold boot apparatus of mainboard |
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Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN102075011B (en) * | 2009-11-20 | 2013-01-23 | 深圳长城科美技术有限公司 | Electricity concentrator with restoration function |
CN108508785A (en) * | 2018-02-28 | 2018-09-07 | 深圳市中微信息技术有限公司 | It is a kind of based on microcontroller mainboard electrifying timing sequence control method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN2570871Y (en) * | 2002-06-18 | 2003-09-03 | 威盛电子股份有限公司 | Computer motherboard starting up and shutdown testing arrangement |
US20030204790A1 (en) * | 2002-04-30 | 2003-10-30 | Via Technologies, Inc. | Computer main board on/off testing device, method and system |
US20040024556A1 (en) * | 2002-07-24 | 2004-02-05 | Jing-Rung Wang | Method for testing chip configuration settings |
CN1484147A (en) * | 2002-09-20 | 2004-03-24 | 联想(北京)有限公司 | System and method for realizing automatic on/off test of computer |
CN2610406Y (en) * | 2002-12-11 | 2004-04-07 | 技嘉科技股份有限公司 | Opening and closedown testing device |
-
2005
- 2005-11-11 CN CNB2005101012454A patent/CN100412812C/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030204790A1 (en) * | 2002-04-30 | 2003-10-30 | Via Technologies, Inc. | Computer main board on/off testing device, method and system |
CN2570871Y (en) * | 2002-06-18 | 2003-09-03 | 威盛电子股份有限公司 | Computer motherboard starting up and shutdown testing arrangement |
US20040024556A1 (en) * | 2002-07-24 | 2004-02-05 | Jing-Rung Wang | Method for testing chip configuration settings |
CN1484147A (en) * | 2002-09-20 | 2004-03-24 | 联想(北京)有限公司 | System and method for realizing automatic on/off test of computer |
CN2610406Y (en) * | 2002-12-11 | 2004-04-07 | 技嘉科技股份有限公司 | Opening and closedown testing device |
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CN1963776A (en) | 2007-05-16 |
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