CN100365638C - Standardized analyzing method and device for circuit basic diagram - Google Patents

Standardized analyzing method and device for circuit basic diagram Download PDF

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Publication number
CN100365638C
CN100365638C CNB2004100742436A CN200410074243A CN100365638C CN 100365638 C CN100365638 C CN 100365638C CN B2004100742436 A CNB2004100742436 A CN B2004100742436A CN 200410074243 A CN200410074243 A CN 200410074243A CN 100365638 C CN100365638 C CN 100365638C
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Prior art keywords
schematic diagram
user
rule
circuit theory
theory diagrams
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Expired - Fee Related
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CNB2004100742436A
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CN1744091A (en
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钱球
邹斌
仪长
吴强
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Abstract

The present invention discloses a standardized analyzing method and a device for a schematic circuit diagram, which comprises a schematic diagram standardized rule editing procedure and a schematic diagram analysis procedure, wherein the schematic diagram standardized rule editing procedure comprises procedures: tool command language which is input by a user is received, and a schematic diagram standardized rule which comprises files and annotation information is generated; the schematic diagram standardized rule is stored in a schematic diagram standardized rule library; the schematic diagram analysis procedure comprises procedures: a schematic diagram object to be analyzed is acquired, the schematic diagram standardized rule library is queried according to the schematic diagram object, corresponding schematic diagram standardized rules are obtained, and the classification display of the schematic diagram standardized rules is carried out according to the annotation information; the judgment that whether the schematic diagram object to be analyzed accords with the standardization is carried out according to the schematic diagram standardized rule, and an analysis report is generated. The present invention also discloses a standardized analyzing device for the schematic circuit diagram.

Description

A kind of circuit theory diagrams standardized analysis method and device
Technical field
The present invention relates to the electrical patterns data processing technique, particularly relate to a kind of method and device of realizing the standardization analysis by comparator circuit schematic diagram and circuit theory diagrams standard.
Background technology
Along with the progress of society and science and technology, the application of various electronic circuits is increasingly extensive, and the exploitation of circuit also obtains bigger development.At present, for the design of circuit, the circuit theory diagrams design system no longer has been a kind of selection but a kind of means of necessity.Described circuit theory diagrams design system is made of circuit theory diagrams design software product and the hardware environment (as computing machine) that is used to install and move this software product.
In order to guarantee the standard and the compatibility of circuit theory diagrams design, International Electrotechnical Commission (IEC) has formulated the international standard of interlock circuit schematic diagram.Chinese Industrial Standards (CIS) department according to relevant IEC standard formulation national standard, comprise 6988.1~7,13 electric diagram of seven electric drawing standard GB with graphical symbol standard GB 4728.1~13, two electrical equipments with graphical symbol standard GB 5465.1-2 and five relevant criterion.Each business unit needs for self sometimes, can formulate the circuit theory diagrams standard of oneself according to country, international standard in conjunction with enterprise practical.
After the circuit theory diagrams design is finished, need to analyze it and whether meet predetermined standard.Generally speaking, circuit theory diagrams design software product has all attached simple audit function, can check single network error, device SYMBOL general issue (for example SYMBOL does not design pin) as VIEWDRAW.The circuit theory diagrams standardized analysis method of prior art comprises step: simple general rule is set in database; Read the object in the circuit theory diagrams; Search corresponding general rule according to described object; Judge whether conformance with standard of object according to general rule.
But, this method has the some shortcomings part: at first, general rule is solidificated in the circuit theory diagrams design software databank of product by software vendors in advance, the user can't effectively edit and manage rule, the rule that is system can't effectively be expanded usually, and industry does not provide unified rule to standardized analysis, therefore can't the comprehensive review circuit theory diagrams standardization whether, more can't whether meet self-defining standard by the analysis circuit schematic diagram.Secondly, though can satisfy specific demand to the mode that the software vendors customization has the circuit theory diagrams design software product of specified rule by the user, but because rule is solidificated in the software product, need upgrade whole software product during upgrading, be difficult to carry out effectively rule upgrading, cause wasting resource, expend time in.Once more, in the standardization analytic process, the circuit theory diagrams design system is analyzed according to all general rules that find, and is difficult to analytic process is control effectively with the rule of selecting real needs to analyze, thereby causes losing time, and influences the entire system performance.
Therefore, the slip-stick artist is after the circuit theory diagrams design is finished, and the standardization of circuit theory diagrams is analyzed and finally can only be undertaken by artificial mode.For example, there is the standardized code requirement of self-defining circuit theory diagrams in some business unit, needs reference standard to adopt the mode of manual examination and verification to examine, and efficiency is low and standard execution consistance is poor, is difficult to guarantee the comprehensive of examination simultaneously.
Summary of the invention
The technical matters that the present invention solves is to provide a kind of circuit theory diagrams standardized analysis method and device, has preferably extensibility and is easy to upgrading, can improve the efficient of analytic process.
For this reason, the technical scheme of technical solution problem of the present invention is: a kind of circuit theory diagrams standardized analysis method is provided, comprises schematic diagram normalisation rule editing process and schematic diagram analytic process; Wherein, schematic diagram normalisation rule editing process comprises step:
1) receives the Tool Command Language that the user imports, generate the schematic diagram normalisation rule that comprises script file and annotation information;
2) described schematic diagram normalisation rule is stored in schematic diagram normalisation rule storehouse;
The schematic diagram analytic process comprises step:
3) obtain schematic diagram object to be analyzed, and according to described schematic diagram Object Query schematic diagram normalisation rule storehouse, obtain corresponding schematic diagram normalisation rule and according to the annotation information demonstration of classifying;
4) judge whether conformance with standardization of schematic diagram object to be analyzed according to described schematic diagram normalisation rule, and generate analysis report.
Preferably, in described step 3) and 4) between also comprise the instruction that receives user's input, generate analytic process control automatically.
Preferably, described automatic generation analytic process control comprises the schematic diagram normalisation rule of selecting to analyze correspondence.
Preferably, described instruction is a Tool Command Language.
Preferably, in described step 3) and 4) between also comprise the analysis report that generates before obtaining, generate analytic process control automatically.
Preferably, also comprise user authentication process: obtain the identity information of user input, compare with the data of User Information Database; If authentication is passed through, then allow the user to operate; If authentification failure, then refusing user's operation.
Preferably, also be included in the authentication pass through after, return the corresponding authority information of user.
Preferably, also comprise after the described step 4) and carry out location of mistake, show not meet standardized schematic diagram object.
The present invention also provides a kind of circuit theory diagrams standardization analytical equipment, comprising:
Schematic diagram normalisation rule edit cell is used for generating the schematic diagram normalisation rule that comprises script file and annotation information according to the Tool Command Language of user's input;
Schematic diagram normalisation rule storage unit is used to store described schematic diagram normalisation rule;
Schematic diagram normalisation rule administrative unit, being used for classifying according to annotation information shows described schematic diagram normalisation rule;
Schematic diagram object and regular acquiring unit are used to obtain schematic diagram object to be analyzed, and according to described schematic diagram Object Query schematic diagram normalisation rule storage unit, obtain corresponding schematic diagram normalisation rule;
The standardization judging unit is used for judging whether conformance with standardization of schematic diagram object to be analyzed according to described schematic diagram normalisation rule;
The analysis report generation unit is used for generating analysis report according to aforementioned judgement.
Preferably, also comprise the analytic process control module, be used for generating analytic process control automatically according to the instruction of user's input or the analysis report that generated in the past.
Preferably, also comprise user information storage unit, be used to store user's identity information; User authentication unit is used for the identity information of user input is compared with the data of user information storage unit, according to the comparative result startup or withdraw from analytic process.
Preferably, also comprise the location of mistake unit, be used for showing not meeting standardized schematic diagram object.
With respect to prior art, the invention has the beneficial effects as follows: at first, but because employing extension standards rules technology of the present invention, can generate the schematic diagram normalisation rule of include file and annotation information according to the Tool Command Language of user's input, and described schematic diagram normalisation rule is stored in schematic diagram normalisation rule storehouse, therefore can realize self-defined, the expansion certainly of normalisation rule, it is comprehensive to guarantee that standardization is analyzed, and the robotization that makes the circuit theory diagrams standardization analyze becomes possibility.Secondly, because rule has relative independentability, be the editor of normalisation rule and to utilize normalisation rule analysis be process independently, make the increase and the modification of user rule need not revise analytical equipment, only use order is carried out the expansion of rule or revise getting final product, that is to say that upgrading of the present invention and expansion are comparatively convenient, owing to can guarantee the modification of normalisation rule, when changing, need not revise analytical equipment, therefore can save resource and time, help the stability of total system.Once more, analyze owing to carry out the circuit theory diagrams standardization automatically, the slip-stick artist is freed from labor standard fractional analysis work, improved the efficient and the quality of standardization examination, guaranteed the consistance of enterprises circuit theory diagrams designs simultaneously, standard is carried out flexibly.
In addition, the present invention has the function of location of mistake reactionary slogan, anti-communist poster flexibly, makes the user find the non-standard place of circuit theory diagrams quickly, thereby increases work efficiency.And the process of can the standardization of control circuit schematic diagram analyzing, thereby avoid on the project that need not to analyze, losing time occupying system resources.In standardization is analyzed, can also be by the analysis report before the input, unsanctioned project before selecting automatically only to analyze.
Description of drawings
Fig. 1 is the schematic diagram of circuit theory diagrams standardization analytical equipment of the present invention;
Fig. 2 is the system schematic that adopts circuit theory diagrams standardization analytical equipment of the present invention;
Fig. 3 is the schematic flow sheet of circuit theory diagrams standardized analysis method of the present invention;
Fig. 4 is the theory diagram of circuit theory diagrams standardization analytical equipment embodiment of the present invention.
Embodiment
In order to carry out the standardization analysis of circuit theory diagrams efficiently, neatly, circuit theory diagrams standardization analytical equipment provided by the invention adopts can expansion normalisation rule technology, can support editor, increase, deletion and modification, thereby can realize the multianalysis of circuit theory diagrams and support self-defined standard normalisation rule.
Seeing also Fig. 1, is the schematic diagram of circuit theory diagrams standardization analytical equipment of the present invention.Described circuit theory diagrams standardization analytical equipment comprises normalisation rule edit manager 110 and standardization comparer 120; Wherein, the TCL that normalisation rule edit manager 110 provides according to the user (Tool CommandLanguage, Tool Command Language) script generates the TCL explosion command, promptly every rule of circuit theory diagrams standardization can be described with one section TCL script, form relatively independent TCL rule; Standardization comparer 120 obtains circuit theory diagrams to be analyzed, according to the TCL explosion command that normalisation rule edit manager 110 provides, realizes circuit theory diagrams standardization analysis, and generates analysis report.
Therefore, all need not revise the design of standardization comparer 120 for modification, increase, the deletion of circuit theory diagrams normalisation rule, only with revise by normalisation rule edit manager 110, increase, the pairing TCL script of deletion circuit theory diagrams normalisation rule gets final product.
Among the present invention, the circuit theory diagrams of input can adopt general form: EDIF (ElectronicDesign Interchange Format, electronic design interchange format).Circuit theory diagrams design software product Viewlogic, Concept HDL, Capture etc. can both support the circuit theory diagrams output of EDIF form and read in.
Described device can also configure user information manager 130, is used for storing subscriber information, carries out authentification of user and return user's authority information when starting analytic process.For example, the user can be divided into general user and administrator, and the general user can only use the TCL rule; And the administrator can manage TCL rule, management general user's authority.
User profile typing customer information manager in several ways 130, as adopt manual typing or from Notes ID file, read in user profile and connect mode such as write by database.
Seeing also Fig. 2, is the system schematic that adopts circuit theory diagrams standardization analytical equipment of the present invention.Wherein, normalisation rule edit manager 110 and standardization comparer 120 can be arranged in the principle diagram design terminal 910; 130 of customer information manager are arranged in the server 920; In addition, the normalisation rule that generates by normalisation rule edit manager 110 also is stored in the server 920; Connect by network between principle diagram design terminal 910 and the server 920.
Among the present invention, principle diagram design terminal 910 can be multiple electronic equipments with data-handling capacity such as computing machine, notebook; Network can be multiple modes such as LAN (Local Area Network), WLAN (wireless local area network) or wide area network.
Certainly, circuit theory diagrams standardization analytical equipment of the present invention also can integral body be arranged in the single principle diagram design terminal 910, and this does not give unnecessary details.
Seeing also Fig. 3, is the schematic flow sheet of circuit theory diagrams standardized analysis method of the present invention, and this method comprises schematic diagram normalisation rule editing process and schematic diagram analytic process.
Wherein, in the described normalisation rule editing process, the TCL that normalisation rule edit manager 110 provides according to the user (Tool Command Language, Tool Command Language) script generates the TCL explosion command, promptly every rule of circuit theory diagrams standardization can be described with one section TCL script, form relatively independent TCL rule; Comprise script file and annotation information in this rule.Subsequently, the TCL rule is stored.
In the described schematic diagram analytic process, at first, standardization comparer 120 obtains circuit theory diagrams to be analyzed, and the circuit theory diagrams of input can adopt general form: EDIF (Electronic DesignInterchange Format, electronic design interchange format); Subsequently, according to the schematic diagram normalisation rule that described schematic diagram Object Query normalisation rule edit manager 110 generates and stores, obtain corresponding schematic diagram normalisation rule and according to the annotation information demonstration of classifying; Realize circuit theory diagrams standardization analysis subsequently, and generate analysis report.
For the ease of the understanding of the present invention, the present invention is described in detail below in conjunction with embodiment.
Seeing also Fig. 4, is the theory diagram of circuit theory diagrams standardization analytical equipment embodiment of the present invention.
The function of present embodiment mainly comprises: user management, editor's circuit theory diagrams normalisation rule, management circuit schematic diagram normalisation rule storehouse, the standardization of enforcement circuit theory diagrams are analyzed.
Wherein, described normalisation rule edit manager 110 comprises schematic diagram normalisation rule edit cell 111, schematic diagram normalisation rule storage unit 112 and schematic diagram normalisation rule administrative unit 113.
Schematic diagram normalisation rule edit cell 111 can generate the schematic diagram normalisation rule of include file and annotation information according to the Tool Command Language of user's input.This schematic diagram normalisation rule edit cell 111 provides the basic function of usual editor, can carry out text editing, and the Inspection Order of TCL key word, expansion, note etc. are shown with special color.Can show supplementarys such as head office number, current ranks number at status bar.TCL explosion command for analyzing usefulness can provide order to assist Core Generator, as order and prompting detailed directions of associating automatically according to the character of user's input and pointing out all to start with this character.Each bar circuit theory diagrams normalisation rule is except comprising a TCL script file, and the file header of this document also has the annotation information of standard, comprises rule name, classification declaration etc., and good readability is arranged.
When editor's normalisation rule, the interface that schematic diagram normalisation rule edit cell 111 provides rule editing to use is as the typing edit box.This typing edit box and the interlock of TCL note: when user input commands, the usage and the explanation of prompt command automatically; When changing entry information, the corresponding change of TCL note; If change the TCL note, the corresponding change of typing edit box content.
The described schematic diagram normalisation rule that schematic diagram normalisation rule storage unit 112 storage principle figure standardization rule editing unit 111 generate.
Schematic diagram normalisation rule administrative unit 113 is checked the TCL rule in the circuit theory diagrams normalisation rule storehouse according to classifying.Described classification comprises the general rule class that is applicable to all designs and according to device Regularia of type of device classification or the like.In addition,, provide the rule server administration authority, as increasing, delete, revise the TCL rule for the administrator; And the general user can only use the TCL rule, can not see detailed TCL code, can only see rule name and explanation.
Described standardization comparer 120 is according to the TCL script of normalisation rule correspondence, whether the automatic circuit theory diagrams of analyzing input meet is provisioning request: whether use standard size (as A3, A4 drawing) as the figure paper size, whether network naming meets the requirements, and electric diagram is with graphical symbol conformance with standard etc. whether.This comparer 120 comprises schematic diagram object and regular acquiring unit 121, standardization judging unit 122 and analysis report generation unit 123, analytic process control module 124 and location of mistake unit 125.
During work, schematic diagram object and regular acquiring unit 121 obtain schematic diagram object to be analyzed, and according to described schematic diagram Object Query schematic diagram normalisation rule storage unit 112, obtain corresponding schematic diagram normalisation rule; Analytic process control module 124 is according to the instruction of user's input or the analysis report that generated in the past, automatically generate the TCL script that is used for analytic process control, that is to say, it also is to control with the TCL script (promptly to load the rule that adopts TCL to write that the examination of examination module is carried out, load the explosion command bag, load the TCL language interpreter, read in schematic diagram then and carry out channel check, Engineering Control comprises beginning, time-out and end etc.), for example the terminal user can revise examination control script, do not carry out certain rule-like, directly look into other rules or part rule; Standardization judging unit 122 is judged whether conformance with standardization of schematic diagram object to be analyzed according to described schematic diagram normalisation rule; Analysis report generation unit 123 generates analysis report according to aforementioned judgement.125 of location of mistake unit can carry out information interaction according to the circuit theory diagrams design software product of analysis report and principle diagram design terminal, light not meet standardized schematic diagram object and check to make things convenient for the user in software product.
Need to prove that the analytic process control module 124 of this standardization analytical equipment uses the execution of TCL script control analysis process, this is because use TCL language control analysis process more flexible, and is easy to grasp.Can certainly adopt alternate manner.
Described customer information manager 130 realizes subscriber management function, comprises user information storage unit 131; User authentication unit 132 is used for the identity information of user input is compared with the data of user information storage unit 131, according to the comparative result startup or withdraw from analytic process.The user is divided into general user and administrator, and the general user can only use the TCL rule, and the administrator can manage TCL rule, management general user authority.
Introduce the flow process of circuit theory diagrams standardized analysis method embodiment of the present invention below.
1) user's login
The user moves circuit theory diagrams design software product, then start-up circuit schematic diagram standardization analytical equipment; At first carry out authentication, send identity information to user authentication unit 132; User authentication unit 132 according to the data verifications in the user information storage unit 131 be legal after, then return corresponding user right information, allow the user to carry out next step operation, comprise editing rule, rule and implement to analyze etc.; If the user is the authentication by user authentication unit 132, with regard to the operation of refusing user's, the user can not carry out standardized analysis or regulation management, user management.
Need to prove that circuit theory diagrams standardization analytical equipment can be realized by the form of chip with hardware; Also can be used as the computer program that operates in the circuit theory diagrams design terminal.
When adopting computer program, this program can be a menu item in the circuit theory diagrams design software product, also can be an independently module.In this case, after authentication is passed through, can also carry out the software version information and the contrast of server version information of client, if find the software of terminal software version than the low then auto-update of server version terminal.
2) standardization analysis
The user is by after authenticating, and schematic diagram object and regular acquiring unit 121 are imported the circuit theory map file of the EDIF form that will carry out the standardization analysis.
After the user clicked " next step " key in the assay surface that the standardization analytical equipment provides, schematic diagram object and regular acquiring unit 121 were obtained the standardization analysis rule from schematic diagram normalisation rule storage unit 112 automatically.
The title and the explanation tabulation of the rule that obtains are shown to the user, select for the user; The user can select the normalisation rule of any appearance, does comprehensive analysis.Sometimes, just only need selection some rule wherein for the express-analysis part.
After choosing rule, again by behind " next step " key, analytic process control module 124 generates an analysis and Control TCL script automatically, and this script comprises the regular collection that the user selects, and the user can add additional examination condition control example as adding common TCL control script bag or order in script.At this moment, the user can also call in the report file that this schematic diagram was analyzed in the past, unsanctioned TCL rule before then analytic process control module 124 is selected only to analyze automatically.
By " next step ", standardization judging unit 122 carries out standardization and analyzes execution again.In the analytic process,, just be presented in the window of a rolling in the screen if incongruent place is arranged, and the roughly progress that has the prompting of prompting bar to analyze, make things convenient for the user can in time understand the analysis situation.
3) analysis report
In the analytic process, analysis report generation unit 123 generates analysis reports automatically, and wherein most important parts is the wrong content of analyzed circuit theory diagrams.
When the user clicks this content, location of mistake unit 125 will will should mistake corresponding target in circuit theory diagrams be lighted easily, and the target place page is changed to current page, make things convenient for the user to check.Do not meet the situation of normalisation rule, can divide multiple grade, wrong, warning, prompting etc., analysis report also can be given make mistake the normalisation rule tabulation that reason, execution occur, the list of rules of passing through, unsanctioned list of rules, user friendly correction.Unsanctioned list of rules is arranged in the analysis report, not can be used as the input of next analysis condition, can guarantee to analyze next time and only wrong rule occurred and carry out, accelerated analysis speed at this by project.Certainly the user also can ignore analysis result last time, reanalyses.
Because this standardization analytical equipment input is standardized circuit theory bitmap-format: the EDIF form, so good readability is arranged, this is because the file of EDIF form is the ASIC sign indicating number, and clear and definite syntactic definition is arranged.
Because circuit theory diagrams standardization analytical equipment needs and circuit theory diagrams design software product carries out information interaction, as the target localization function.General circuit theory diagrams design software product all provides this interface, makes location of mistake unit 125 mistake that analyzes can be able to be navigated to device or network or the sign etc. in the concrete page.If circuit theory diagrams design software product do not provide this interface, then carry out target localization, the locating function that provides as circuit theory diagrams design software product itself by other modes.
4) normalisation rule editor
The user can also carry out the editor of normalisation rule according to the description of front easily by after authenticating, and this does not give unnecessary details.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (12)

1. a circuit theory diagrams standardized analysis method is characterized in that: comprise schematic diagram normalisation rule editing process and schematic diagram analytic process; Wherein, schematic diagram normalisation rule editing process comprises step:
1) receives the Tool Command Language that the user imports, generate the schematic diagram normalisation rule that comprises script file and annotation information;
2) described schematic diagram normalisation rule is stored in schematic diagram normalisation rule storehouse;
The schematic diagram analytic process comprises step:
3) obtain schematic diagram object to be analyzed, and according to described schematic diagram Object Query schematic diagram normalisation rule storehouse, obtain corresponding schematic diagram normalisation rule and according to the annotation information demonstration of classifying;
4) judge whether conformance with standardization of schematic diagram object to be analyzed according to described schematic diagram normalisation rule, and generate analysis report.
2. circuit theory diagrams standardized analysis method according to claim 1 is characterized in that: in described step 3) and 4) between also comprise the instruction that receives user's input, generate analytic process control automatically.
3. circuit theory diagrams standardized analysis method according to claim 2 is characterized in that: described automatic generation analytic process control comprises selects to analyze corresponding schematic diagram normalisation rule.
4. circuit theory diagrams standardized analysis method according to claim 2 is characterized in that: described instruction is a Tool Command Language.
5. circuit theory diagrams standardized analysis method according to claim 1 is characterized in that: in described step 3) and 4) between also comprise the analysis report that generates before obtaining, generate analytic process control automatically.
6. circuit theory diagrams standardized analysis method according to claim 1 is characterized in that, also comprises user authentication process: obtain the identity information of user input, compare with the data of User Information Database; If authentication is passed through, then allow the user to operate; If authentification failure, then refusing user's operation.
7. circuit theory diagrams standardized analysis method according to claim 6 is characterized in that: also be included in the authentication pass through after, return the corresponding authority information of user.
8. circuit theory diagrams standardized analysis method according to claim 1 is characterized in that: also comprise after the described step 4) and carry out location of mistake, show not meet standardized schematic diagram object.
9. a circuit theory diagrams standardization analytical equipment is characterized in that, comprising:
Schematic diagram normalisation rule edit cell is used for generating the schematic diagram normalisation rule that comprises script file and annotation information according to the Tool Command Language of user's input;
Schematic diagram normalisation rule storage unit is used to store described schematic diagram normalisation rule;
Schematic diagram normalisation rule administrative unit, being used for classifying according to annotation information shows described schematic diagram normalisation rule;
Schematic diagram object and regular acquiring unit are used to obtain schematic diagram object to be analyzed, and according to described schematic diagram Object Query schematic diagram normalisation rule storage unit, obtain corresponding schematic diagram normalisation rule;
The standardization judging unit is used for judging whether conformance with standardization of schematic diagram object to be analyzed according to described schematic diagram normalisation rule;
The analysis report generation unit is used for generating analysis report according to aforementioned judgement.
10. circuit theory diagrams standardization analytical equipment according to claim 9 is characterized in that: also comprise the analytic process control module, be used for generating analytic process control automatically according to the instruction of user's input or the analysis report that generated in the past.
11. circuit theory diagrams standardization analytical equipment according to claim 9 is characterized in that: also comprise user information storage unit, be used to store user's identity information; User authentication unit is used for the identity information of user input is compared with the data of user information storage unit, according to the comparative result startup or withdraw from analytic process.
12. circuit theory diagrams standardization analytical equipment according to claim 9 is characterized in that: also comprise the location of mistake unit, be used for showing not meeting standardized schematic diagram object.
CNB2004100742436A 2004-09-03 2004-09-03 Standardized analyzing method and device for circuit basic diagram Expired - Fee Related CN100365638C (en)

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI510944B (en) * 2013-09-24 2015-12-01 Wistron Corp Methods for generating schematic diagrams and apparatuses using the same
CN113011125B (en) * 2019-12-18 2023-01-10 海信视像科技股份有限公司 Printed circuit board checking method, device, equipment and computer storage medium
CN112016173B (en) * 2020-08-12 2022-05-10 中国汽车工业工程有限公司 Method for manufacturing electrical diagram
CN113239650B (en) * 2021-07-09 2021-10-15 成都爱旗科技有限公司 Report generation method and device and electronic equipment

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11328237A (en) * 1998-05-12 1999-11-30 Nec Corp Formal verification device and method for sequential circuit
US6099575A (en) * 1998-06-23 2000-08-08 Lucent Technologies Inc. Constraint validity checking
US6449750B1 (en) * 1999-01-18 2002-09-10 Kabushiki Kaisha Toshiba Design verification device, method and memory media for integrated circuits
US20030115562A1 (en) * 2001-12-19 2003-06-19 Martin Andrew K. Design verification system for avoiding false failures and method therefor
US20040015797A1 (en) * 2002-07-19 2004-01-22 Micron Technology, Inc. Line width check in layout database
US6748352B1 (en) * 1999-12-30 2004-06-08 Intel Corporation Method and apparatus for scan design using a formal verification-based process

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11328237A (en) * 1998-05-12 1999-11-30 Nec Corp Formal verification device and method for sequential circuit
US6099575A (en) * 1998-06-23 2000-08-08 Lucent Technologies Inc. Constraint validity checking
US6449750B1 (en) * 1999-01-18 2002-09-10 Kabushiki Kaisha Toshiba Design verification device, method and memory media for integrated circuits
US6748352B1 (en) * 1999-12-30 2004-06-08 Intel Corporation Method and apparatus for scan design using a formal verification-based process
US20030115562A1 (en) * 2001-12-19 2003-06-19 Martin Andrew K. Design verification system for avoiding false failures and method therefor
US20040015797A1 (en) * 2002-07-19 2004-01-22 Micron Technology, Inc. Line width check in layout database

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
Computer,第6期. 2001 *
通用集成电路设计规则检查. 冯国臣,胡国元.微电子学与计算机 , Microelectronics & Computer,第6期. 2001 *
通用集成电路设计规则检查. 冯国臣,胡国元.微电子学与计算机 , Microelectronics &amp *

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