CN100364199C - Single-phase active electric-power filter using analog cascade connection controller - Google Patents
Single-phase active electric-power filter using analog cascade connection controller Download PDFInfo
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Abstract
The single-phase active electric power filter of using analog cascaded controller includes control circuit, and connected main circuit. The control circuit includes first and second proportional plus integral controllers, multiplier, subtracter, feedforward controller, and adder. Principle of the invention is as following: using voltage loop composed of these analog parts adjusts DC voltage of bus in two control loops including external current loop as well as generates current of reference power supply; using current loop reduces interference effect, and tracks current of reference filter; finally, generating command signal for main circuit to generate compensating current. Using analog devices in low cost without need of microprocessor, the invention realizes active electric power filter capable of restraining harmonic, and correcting power factor. The invention reduces cost of the filter, and has no mathematic burden for calculating fundamental wave and harmonic of load current.
Description
Technical Field
The invention relates to an active filtering technology, in particular to a single-phase active power filter using an analog cascade controller.
Background
Today, the use of electrical energy has expanded from simple linear loads to electronic power devices with electrical characteristics such as non-linearity, surge, and imbalance, such as solid-state motor drives, personal computers, and energy-saving ballasts. In these devices having distorted characteristics of the input current, a rectifier is often used. In addition, typical switching power supplies employ diode rectifiers for ac-dc conversion. These diodes draw a short pulse of input current from the power supply system, rather than a smooth sinusoidal input current. Then, in order to deliver the same amount of power with a short pulse, the current peak will be very high. This places stress on the wiring, circuit breakers, and even the electrical distribution equipment provided by the utility company. Meanwhile, since the current drawn by these devices from the power supply system is non-sinusoidal, these types of device interfaces generate harmonics, resulting in poor input Power Factor (PF) and high Total Harmonic Distortion (THD), i.e., pollution to the quality of the power supply, causing problems in the power system.
To maximize power handling capability, a Power Factor Correction (PFC) circuit and an active power filter may be added to improve the waveform of the input current. Ideally, the input current should be sinusoidal and in phase with the supply voltage. Without the PFC circuit, a typical switching power supply has a power factor of about 0.6 and has considerable odd harmonic distortion.
In addition, the European Union has the international standard IEC 61000-3-2 that limits the input harmonic content and products, which establishes a limit on the harmonics of the input current. In order to comply with such standards as IEC 61000-3-2 and IEEE 519, the design of switching power supplies requires such features, for example, reducing input current harmonics to comply with harmonic limits, resulting in high input power to minimize reactive power.
For general purpose use, active power filters are also preferred because they can be installed in a variety of applications. However, only three-phase commercial active power filter products are available and they are very expensive and therefore the number of installations is not large.
Disclosure of Invention
In view of the above, the present invention provides a single phase parallel active power filter (SPSAPF) with very low cost and very good solution to the problem of power quality.
The technical scheme of the invention is realized as follows:
a single-phase parallel active filter connected in parallel between a power system and a nonlinear load, comprising a control circuit and a main circuit connected thereto, wherein the control circuit comprises:
a first proportional integral controller, one input end of which receives a reference voltage, and the other input end of which receives a regulated direct current bus voltage output from the main circuit, for performing a first proportional integral after subtracting the regulated direct current bus voltage from the reference voltage;
a multiplier, one input terminal of which receives the output of the first proportional integral controller, and the other input terminal of which receives the reduced power supply voltage;
a subtractor, one input end of which receives the output of the multiplier, and the other input end of which receives a load current, for subtracting the load current from the output of the multiplier to obtain a reference current;
a feedforward controller receiving the supply voltage and the regulated DC bus voltage for dividing a sum of the supply voltage and the regulated DC bus voltage by a voltage amount;
a second proportional-integral controller, one input end of which receives the reference current and the other input end of which receives the filter current output from the main circuit, for performing a second proportional-integral after subtracting the filter current from the reference current;
and one input end of the adder receives the output of the feedforward controller, and the other input end of the adder receives the output of the second proportional-integral controller to obtain a control signal and output the control signal to the main circuit.
The principle of the invention is as follows: the analog devices form two control loops of a voltage loop inside an external current loop, the voltage of a direct current bus is adjusted through the voltage loop, a reference power supply current is generated for a parallel filter, the reference filter current is tracked, and finally a command signal is generated to a main circuit to generate a compensation current.
Wherein, the integral gain K of the first proportional integral controller I1 The proportional gain K is determined by equation 15 P1 Is determined by equation 16, where f v For the supply frequency, n is a positive number, and the bandwidth of the voltage loop is the supply frequency f v 1/n times of the total.
Wherein the integral gain K of the second proportional-integral controller I2 The proportional gain K is determined by equation 7 P2Is determined by equation 8, where f s The unattenuated natural angular frequency omega of the current loop being the switching frequency of the filter, m being a positive number l Set to 1/m times the switching frequency of the filter.
Preferably, the feedforward controller divides the target dc bus voltage by twice the voltage.
The invention can realize the active power filter which can well restrain harmonic wave and correct power factor by using low-cost analog equipment without a microprocessor, thereby greatly reducing the production cost of the active power filter, having no large mathematical burden required by calculating fundamental wave and harmonic wave of load current, and being capable of being arranged at various positions to solve the problem of electric energy quality.
Drawings
Fig. 1 is a schematic diagram showing a general single-phase parallel type active power filter applied to a power system;
FIG. 2 shows a block diagram of the current loop control of the present invention;
FIG. 3 (a) shows a block diagram of a voltage control loop of the present invention;
FIG. 3 (b) shows a block diagram of the voltage ring of FIG. 3 (a) in steady state;
fig. 4 shows a cascade control block diagram of a parallel type active power filter of the present invention consisting of two control loops of a current loop and a voltage loop;
FIGS. 5 (a) and 5 (b) show Bode plots of transfer functions between reference filter currents and filter currents using the present invention;
FIGS. 6 (a) and 6 (b) show Bode plots of transfer functions between a reference voltage and a DC bus voltage using the present invention;
fig. 7 shows a schematic circuit diagram of an example of the parallel type active power filter of the present invention;
fig. 8 (a) to 8 (d) show a system power supply current waveform, a power supply current spectrum, a power supply current THD, and a power factor in a general nonlinear load, respectively;
fig. 9 (a) to 9 (d) show the power supply current spectrum, the power supply current THD and the power factor after the system when the active power filter of the present invention is added to a general nonlinear load, respectively;
fig. 10 illustrates internal signals of the active power filter applied to fig. 9 (a) to 9 (d);
11 (a) to 11 (d) show the power supply current waveform, power supply current spectrum, power supply current THD and power factor from the system at low non-linear loads, respectively;
fig. 12 (a) to 12 (d) show the power supply current spectrum, power supply current THD and power factor, respectively, after a system incorporating the active power filter of the present invention in a low nonlinear load;
fig. 13 illustrates internal signals of the active power filter applied to fig. 12 (a) to 12 (d);
14 (a) to 14 (d) show the power supply current waveform, power supply current spectrum, power supply current THD and power factor in the system when the power supply voltage is reduced to 80Vrms respectively;
fig. 15 (a) to 15 (d) show the power supply current spectrum, power supply current THD and power factor, respectively, after adding the active power filter of the present invention to the system when the power supply voltage is reduced to 80 Vrms;
fig. 16 shows internal signals of the active power filter applied to fig. 15 (a) to 15 (d).
Detailed Description
To more effectively solve the power supply harmonic problem, it is preferable to install a plurality of smaller rated active filters. Meanwhile, in order to facilitate low-cost analog control, cascade control using a PFC parallel type active power filter is suggested in the present invention.
1. Overview
A simple proportional-integral controller can be easily designed based on a state averaging model (state averaging model) of the parallel active power filter. The whole design comprises: the voltage loop comprises two control loops outside the inner current loop. As long as the speed of the inner current loop is much faster than the outer voltage loop, a cascade control can be implemented. To achieve a high power factor and a low current THD, the bandwidth of the current loop must be fast enough to generate the compensation current. At the same time, the current loop must have sufficient capacity to reduce the influence of the supply voltage and the regulated DC bus voltage on the inductor current (i.e. the filter current). To be able to perform cascaded control and to provide a stable reference inductor current, the bandwidth of the voltage loop cannot be too fast.
The following will describe the establishment of a mathematical model of the active power filter of the present invention to design a control circuit that provides command signals to the main circuit, including: the setting of the bandwidth for the current loop and the voltage loop is used for reducing interference influence and improving the current tracking capability, and the design of the PI controller is adopted. Finally, a circuit implementation of the control circuit employed and demonstrating the effect of using the active power filter of the present invention will also be given.
2. Establishing a mathematical model of the active power filter
Fig. 1 is a schematic diagram showing a case where a general single-phase parallel type active power filter is applied to a power system.
As can be seen from fig. 1, the active power filter only includes a main circuit, which is composed of a set of voltage-type PWM converters and a dc capacitor.
First, equation (1) is established, which describes a state space average model of voltage and current dynamics:
wherein L represents filter inductance, C represents capacitance, i F (t) is the filter induced current, v c (t) is the DC bus voltage, v s (t) is the supply voltage and d (t) is the duty cycle.
3. Design control circuit
It will be specifically analyzed how to build the control circuit of the active power filter of the present invention to provide a command signal to the main circuit to generate the compensation circuit.
The design control circuit is mainly designed for a cascade controller, namely a PI controller (PI 2 for short) of a current loop and a PI controller (PI 1 for short) of a voltage loop which are connected in cascade with each other.
The parallel type active power filter can be decomposed into a voltage control loop and a current control loop according to equation (1).
3.1 Current Loop control
According to equation (1), if we assume that the DC bus voltage is well regulated at U c Where is U c For a preset target dc bus voltage, the filter current is approximately formula (2):
fig. 2 shows a block diagram of the current loop control. Wherein i r (t) is the reference filter current. In order to reduce the DC bus voltage v c (t) and supply voltage v s (t) for the filter current i F (t) a feedforward controller G is also included in the control loop F (s) and a PI controller PI2. Feedforward controller G F (s) purpose is to eliminate v c (t) and v s (t) and the output filter current i F (t) using the formula (3):
the added PI controller PI2 tries to compensate for the differences in the control loop and it uses equation (4):
wherein, K P2 And K I2 Is a constant. Output filter current i using an added feedforward and feedback controller F (t) becomes:
wherein, I F (s) and I r (s) is the filter current i F (t) and a reference filter current i r (t) Laplace transform, and s is a Laplace variable. According to the formula (5), K P2 And K I2 In parallel type active power filters, because they affect the ability to reject interference and the reference current I r (s). In practice, the dc bus voltage contains a dc component and several small ripple components. v. of s (t) and a reference filter current i r (t) are in phase.
It should be noted that, in the current control loop, the main concern is to reduce the interference effect and track the reference filter current I r (s)。
To this end, the feedforward controller G of the invention F (s) and a feedback controller (PI 2) for reducing the sum of v c (t) and v s (t) the interference effect caused. As described above, the reference current i r (t) is obtained from the supply voltage and the load current, the frequency content of the reference signal consisting of the supply frequency and harmonics thereof of higher order. In order to track this reference current, the bandwidth of the current control loop must be set as high as possible so that the gain and phase variations of the closed loop control process up to the 20 th harmonic are small.
The characteristic equation of the current loop is as follows:
if the unattenuated natural angular frequency ω of the current loop is I Setting to 1/m times the switching frequency of the filter will result in equation (6):
wherein, f s Is the switching frequency of the filter, the integral gain K required by the PI controller PI2 I2 Given by equation (7):
the damping ratio ξ of the current loop is determined by the following equation:
where ξ is the damping ratio of the current loop. If the current loop is set to critical attenuation, i.e. the damping ratio is 1, the proportional gain K required by the PI controller PI2 P2 Given by equation (8):
thus, the current loop PI controller PI2 of equation (4) (its constant K) is used I2 、K P2 Determined by (7) and (8), the unattenuated natural frequency of the current loop will be 1/m times the switching frequency, so that the current loop is critically damped. According to equation (5), if the bus voltage is well regulated at U c The current loop operates independently of the load current and the supply voltage.
3.1.1
Robust (Robustness) analysis
For current control loop, the output regulated voltage U c Uncertainty can result. However, in the case of the current loop of the present invention, if the bus voltage is increased by 20%, the unattenuated natural angular frequency becomes, according to equation (6)The attenuation ratio of the current loop becomes
. When the bus voltage is reduced by 20%, according to the formula(6) The unattenuated natural angular frequency becomes
The attenuation ratio of the current loop becomes
It can be seen that the current loop can be well controlled even with 20% variation in the output regulated voltage, i.e. there is little variation in the unattenuated natural frequency and the attenuation ratio. In practice, the bus voltage ripple will typically be less than 5% of the regulated voltage, so that the unattenuated natural frequency and the variation in the attenuation ratio will be much smaller.
3.2 Main Voltage control Ring
According to equation (1), if the filter current i is set F (t) as a control input to the parallel filter, the transfer function between the regulated bus voltage and the filter current is:
the purpose of the voltage control loop is to control the dc bus voltage so that the supply current tracks the supply voltage, and by generating a reference current, compensates for harmonics in the load, resulting in a high power factor and a low current THD. By taking the supply current i s (t) and load current i L (t) difference between (t) can be obtainedReference current i r (t) of (d). By introducing a PI controller PI1 in the control loop, a required power supply current i can be obtained s (t) of (d). Consider PI controller PI1 as equation (10):
wherein, K P1 And K I1 And (4) constant. Will convert the slave supply voltage v s (t) obtaining the required supply current i s (t) and K P1 And K I1 Applied to equation (9).
Fig. 3 (a) shows a block diagram of a voltage control loop, where α is a constant. It is assumed that steady state can be achieved and that the steady state output of the PI controller W (t) is W o The block diagram for the voltage ring in steady state is about fig. 3 (b). Output bus voltage V c (t) is about:
wherein, V r (s) is a reference voltage v r (t) Laplace transform, I L (s) is the load current i L (t) Laplace transform.
It should be noted that the purpose of the PI controller PI1 herein is to regulate the dc bus voltage V c (t) and generating a reference supply current i for the parallel filter s (t) (which is derived from the supply voltage v) s (t) generation). The PI controller PI2 can easily eliminate the constant term W o And the dc component of the load current.
Due to v s (t) is the supply voltage, and i L (t) are load currents whose frequencies include the supply frequency, higher harmonics, or dc component. In order to reduce the influence of the supply voltage and the output load current on the dc bus voltage and to have a smooth steady state PI-controller PI2 output, the bandwidth of the voltage loop must be much smaller than the supply frequency so that the voltage control loop can simultaneously attenuate the fundamental frequency and higher harmonics of the reference current. If the steady state PI controller output is smooth, the generated reference supply current i s (t) will have a small THD. If the bandwidth of the voltage loop is too high, the interference will be reflected on the dc bus voltage and, as a result, on the generated reference supply current i s (t) above. (the reference supply current will be destroyed by higher harmonics). The characteristic equation of the voltage ring is as follows:
its unattenuated natural angular frequency is:
the damping ratio ξ is determined by the following equation:
or
Obviously, the unattenuated natural angular frequency ω n Independent of the load current. If the bandwidth of the voltage loop is set to the supply frequency f v 1/n times of the integral gain K of the PI controller PI1 I1 The following steps are changed:
if the attenuation ratio of the voltage loop is set to 1, the proportional gain K of the PI controller PI1 P1 The following steps are changed:
from the above, the characteristics of the voltage control loop are independent of the load conditions. Therefore, a control scheme using equations (10), (15) and (16) will produce a well controlled control voltage loop under a variety of conditions with varying load conditions.
In summary, a block diagram of the control mechanism proposed by two control loops consisting of an inner current loop and an outer voltage loop is shown in fig. 4.
4. Experimental setup and results.
The established parallel type active power filter for experiments is set such that L =500 μ H, C =470 μ F, nominal power supply voltage =110Vrms, and power supply frequency F of the main circuit v =50Hz. The DC bus voltage is set as U c ＝200V。
Please note that U c Must be greater than the peak supply voltage v s (t), and α is set to 0.01, thereby α v i The peak value of (t) was about 1.56v. The principle of setting a is to ensure that the multiplier output does not saturate very easily. The switching frequency is set to f s =40kHz and the natural frequency of the current loop is not attenuatedIs 1/5 times the switching frequency, i.e. m =5. According to equation (7):
if the damping ratio of the current loop is set to 1, according to equation (8):
the transfer function of the current loop PI controller PI2 of equation (4) becomes:
fig. 5 (a) and 5 (b) show Bode plots of the transfer function between the reference filter current and the filter current under ideal conditions using the present invention.
As can be seen from fig. 5 (a) and 5 (b), the gain variation and phase are negligible until 1kHz is reached, which means that the inductor current can follow the reference filter current well within 1 kHz. For the voltage control loop, the bandwidth is set to the supply frequency f v 1/10 times, the proportional gain and integral gain obtained by equations (15), (16) are:
and
the transfer function of the voltage loop PI controller PI1 of equation (10) becomes:
fig. 6 (a) and 6 (b) show Bode plots of the transfer function between the reference voltage and the output dc bus voltage in an ideal case using the present invention. Frequency components at 50Hz and above will have an attenuation of at least 14 dB. Therefore, the frequency components of 50Hz and above will be attenuated by the control loop, so that the output response of the voltage loop PI controller PI1 will be very stable, hardly affected by the supply voltage and the load current.
The stable output of the voltage loop PI controller PI1 ensures a good generation of the reference supply current.
Fig. 4 shows a block diagram of a parallel type active power filter of the present invention.
Referring to fig. 4, the single-phase parallel active filter using an analog cascade controller of the present invention includes a control circuit and a main circuit VSI connected thereto, wherein the control circuit includes:
a first proportional integral controller PI1 having an input receiving a reference voltage v r (t), the other input terminal receives the regulated DC bus voltage v output from the main circuit c (t) performing a first proportional integration after subtracting the regulated bus voltage from the reference voltage;
a multiplier having one input terminal receiving the output of the first proportional integral controller and the other input terminal receiving the reduced power supply voltage α v s (t)；
A subtractor having one input terminal receiving the output of the multiplier and the other input terminal receiving a loadCurrent i L (t) subtracting the load current i from the output of the multiplier L (t) to obtain a reference current i r (t)；
A feed forward controller receiving the supply voltage v s (t) and said regulated DC bus voltage v c (t) for applying the supply voltage v s (t) and regulated bus voltage v c (t) is divided by a voltage amount of 2U c ；
A second proportional-integral controller PI2 having an input receiving the reference current i r (t), the other input terminal receives the filter current i outputted from the main circuit F (t) for applying the reference current i r (t) subtracting the filter current i F (t) followed by a second proportional-integral;
and one input end of the adder receives the output of the feedforward controller, and the other input end of the adder receives the output of the second proportional-integral controller to obtain a control signal and output the control signal to the main circuit.
Fig. 7 shows a hardware implementation of a parallel type active power filter correcting a power factor.
Please refer to fig. 4 together to understand fig. 7. The reference numerals in fig. 4 and 7 are explained as follows:
1 first proportional integral controller 2 multiplier
3 subtracter 4 feedforward controller
5 second proportional integral controller 6 adder
4.1 results of the experiment
To demonstrate the filtering performance of the present invention under different operating conditions, different supply voltages and installation conditions were tested.
A typical non-linear load is an AC to DC conversion using a full bridge rectifier circuit. The nominal supply voltage is 110Vrms and the voltage THD is about 3%. Fig. 8 (a) to 8 (d) show the power supply current waveform, power supply current spectrum, power supply current THD, and power factor from Fluke 41B power harmonic analyzer (manufactured by foruk corporation, usa), respectively, of a system of such a nonlinear load.
As can be seen from fig. 8 (a) to 8 (d), the rated output power supply current (rms) is 1.21A. It is clear that there are many third, fifth and seventh harmonics of equal order, and the supply current THD is 80.4%. The power factor of the circuit is 0.76.
Fig. 9 (a) to 9 (d) show the effect of the system after adding the proposed active power filter to a generally non-linear load, i.e. the supply current waveform, the supply current spectrum, the supply current THD and the power factor from the Fluke 41B power harmonic analyser (manufactured by folk corporation, usa), respectively.
As can be seen from fig. 9 (a) to 9 (d), the rated output power supply current is 1.26A. It is clear that the higher harmonics have been reduced so that the supply current THD is 6.4%. The power factor of the whole system is 0.99. It is clear that the power factor and the current THD are significantly improved after the introduction of the active power filter.
Fig. 10 shows the internal state of the active power filter applied in fig. 9, in which the upper curve is a curve of channel 2, each line segment divided by a dotted line represents 5V, and the lower curve is a curve of channel 1. Where channel 1 represents the filter current and channel 2 represents the ac-coupled dc bus voltage. The dc bus voltage is well regulated to a peak-to-peak variation of about 9V.
Fig. 11 (a) to 11 (d) show a power supply current waveform, a power supply current spectrum, a power supply current THD, and a power factor from a Fluke 41B power harmonic analyzer (manufactured by folk corporation, usa) of the system at the time of low load, respectively. The rated output supply current is 0.87A. It is clear that there are many third, fifth and seventh harmonics of equal order, and the supply current THD is 84.8%. The power factor of the circuit is 0.73.
Fig. 12 (a) to 12 (d) show the effect after adding the proposed active power filter to the system at low load, respectively. The rated output power supply current becomes 0.92A. It is clear that the higher harmonics have been reduced so that the supply current THD is 8.4%. The power factor of the overall system is 0.98.
Fig. 13 shows the internal state of the active power filter applied in fig. 12, in which the upper curve is a curve of channel 2, each line segment divided by a dotted line represents 5V, and the lower curve is a curve of channel 1. Where channel 1 represents the filter current and channel 2 represents the ac-coupled dc bus voltage. The dc bus voltage is well regulated to a peak-to-peak variation of about 7V.
To further demonstrate the function of the active power filter of the present invention, the supply voltage was reduced to 80Vrms. Fig. 14 (a) to 14 (d) show the power supply current waveform, power supply current spectrum, power supply current THD, and power factor from the Fluke 41B power spectrum analyzer, respectively, in this case. The rated output supply current is 1.54A. It is clear that there are many third, fifth and seventh harmonics of equal height, and that the current THD is 69.1%. The power factor of the circuit is 0.78.
Fig. 15 (a) to 15 (d) show the power supply current waveform, power supply current spectrum, power supply current THD and power factor from Fluke 41B power spectrum analyzer, respectively, after adding the proposed active power filter to the system where the power supply voltage is reduced to 80Vrms. The rated supply current is 1.26A. Obviously, the higher harmonics have been reduced so that the current THD is 3.7%. The power factor of the overall system is 1.00. It is clear that the power factor and the current THD can be greatly improved after the introduction of the active power filter.
Fig. 16 shows the internal state of the active power filter applied in fig. 15, in which the upper curve is the curve of channel 2, each line segment divided by a dotted line represents 5V, and the lower curve is the curve of channel 1. Where channel 1 represents the filter current and channel 2 represents the ac-coupled dc bus voltage. The dc bus voltage is well regulated to a peak-to-peak variation of about 8V.
All experimental results show that the proposed active power filter can adjust the dc bus voltage well and has significant improvement in harmonic reduction and power factor correction.
5. Conclusion
First, the controller settings can be easily obtained from the state averaging model and filter settings, and the resulting cascaded controller can be easily implemented using low cost analog devices, thereby eliminating the need for a microprocessor.
Meanwhile, for the problems of power factor correction and harmonic load reduction, the cascade controller provided by the invention provides a simple solution, and can effectively resist the changes of the load and the power supply, thereby greatly reducing the calculation burden of solving the fundamental wave and the harmonic wave of the load current and obtaining the filter current very simply.
Furthermore, experimental results prove that the active power filter based on the control strategy can not only simultaneously complete the functions of reactive power compensation, harmonic suppression and the like, but also has the advantages of simple control, high reliability and good compensation effect. These advantages make it have wide application foreground.
In short, the filter of the invention can greatly improve the electric energy quality, save energy, save cost and meet the requirements of energy code, so the filter can be arranged at various positions to solve the electric energy quality problem.
Claims (5)
1. A single-phase parallel active filter connected in parallel between a power system and a nonlinear load, comprising a control circuit and a main circuit connected thereto, wherein the control circuit comprises:
the first proportional integral controller receives a reference voltage at one input end and receives an adjusted direct current bus voltage output from the main circuit at the other input end, and is used for carrying out first proportional integral after subtracting the adjusted direct current bus voltage from the reference voltage;
a multiplier having one input terminal receiving an output of the first proportional integral controller and another input terminal receiving a scaled-down power supply voltage;
a subtractor having one input terminal receiving the output of the multiplier and the other input terminal receiving a load current, the subtractor subtracting the load current from the output of the multiplier to obtain a reference current;
a feedforward controller that receives the supply voltage and the regulated DC bus voltage for dividing a sum of the supply voltage and the regulated DC bus voltage by a voltage amount;
a second proportional-integral controller, one input end of which receives the reference current and the other input end of which receives the filter current output from the main circuit, for performing a second proportional-integral after subtracting the filter current from the reference current;
and one input end of the adder receives the output of the feedforward controller, and the other input end of the adder receives the output of the second proportional-integral controller to obtain a control signal and output the control signal to the main circuit.
2. The single-phase parallel active filter of claim 1, wherein: integral gain K of the first proportional-integral controller I1 The proportional gain K is determined by equation 15 P1 As determined by the equation 16, it is,
Wherein C represents capacitance, f v Is the power supply frequency, n is a positive number, 1/n represents the bandwidth of the voltage loop as the power supply frequency f v 1/n times of the total weight of the powder.
3. The single-phase parallel active filter of claim 1 or 2, wherein: the above-mentionedIntegral gain K of the second proportional-integral controller I2 The proportional gain K is determined by equation 7 P2 As determined by the equation 8, it is,
Wherein L represents inductance, U c Representing the target DC bus voltage, f s M is a positive number for the switching frequency of the filter, and 1/m represents that the unattenuated natural frequency of the current loop is set to be 1/m times the switching frequency of the filter.
4. The single-phase parallel active filter of claim 3, wherein: the voltage amount divided by the feedforward controller is twice the target direct-current bus voltage.
5. The single-phase parallel active filter of claim 4, wherein: the magnitude of the scaled supply voltage is such that the output of the multiplier is not saturated.
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| CN103257587B (en) * | 2013-03-29 | 2015-12-16 | 国家电网公司 | A kind of wave filter switching control imitation device |
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| CN105281548B (en) * | 2015-11-20 | 2017-12-01 | 中国西电电气股份有限公司 | A kind of feed forward control method for being used to improve electroplating power supply output current frequency |
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| JPH08228469A (en) * | 1995-02-20 | 1996-09-03 | Matsushita Seiko Co Ltd | Active power filter controller |
| US6249108B1 (en) * | 1999-08-31 | 2001-06-19 | The Regents Of The University Of California | Unified constant-frequency integration control of active power filters |
| CN1144363C (en) * | 2002-06-07 | 2004-03-31 | 浙江大学 | Complementary control based monocycle controlled active wavefiller |
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| JPH08228469A (en) * | 1995-02-20 | 1996-09-03 | Matsushita Seiko Co Ltd | Active power filter controller |
| US6249108B1 (en) * | 1999-08-31 | 2001-06-19 | The Regents Of The University Of California | Unified constant-frequency integration control of active power filters |
| CN1144363C (en) * | 2002-06-07 | 2004-03-31 | 浙江大学 | Complementary control based monocycle controlled active wavefiller |
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