CN100362451C - User operation block device and method - Google Patents
User operation block device and method Download PDFInfo
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- CN100362451C CN100362451C CNB2005100348171A CN200510034817A CN100362451C CN 100362451 C CN100362451 C CN 100362451C CN B2005100348171 A CNB2005100348171 A CN B2005100348171A CN 200510034817 A CN200510034817 A CN 200510034817A CN 100362451 C CN100362451 C CN 100362451C
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Abstract
The present invention relates to a blockade device and a blockade method operated by users. When the voltage of a system of an electronic device is insufficient, the present invention is used for protecting the system for preventing the system woken up by the operation of the users from leading to failures or data loss. The device comprises an enabling device and a switch element, wherein the enabling device outputs a switch signal according to a reset signal output by an input voltage source, a voltage indication signal and a system model signal output by system nucleus. The switch element decides whether the system nucleus and the input device are switched on or are not switched on according to the switch signal.
Description
[technical field]
The invention relates to a kind of user's operating blocking-up device and method, and particularly relevant for a kind of user's operating blocking-up device and method at undertension time protection electronic installation.
[background technology]
In now general electronic installation, its central processing unit or microprocessor are understood command system usually and are entered park mode to save electric power when detecting the brownout of power supply or battery.
When being in park mode and power source voltage, system crosses when low, the user is via any action of button, switch and plug-in card or the like during waken system, because it is low that system voltage has passed through, in the time of might activating in system or after activating soon, the incident of generation systems fault or data loss.
In order to solve the above problems; existing method is to have added one deck protective device in system; promptly be utilize another independently microprocessor detect the operation that power source voltage or dump energy determine whether blocking the user via voltameter modes such as (gas gauge); allow system not be waken up, the system that makes is unlikely to break down or the incident of data loss.
But utilize another independently microprocessor and voltameter, not only circuit is comparatively complicated, and the cost that is spent is higher, and power consumption is also very high, so must continuation be improved.
[summary of the invention]
The object of the present invention is to provide a kind of user's operating blocking-up device; to replace independently microprocessor of the prior art and voltameter; and reach the identical function of protection system and data; not only can more save cost; more can save the power consumption of circuit, circuit is also more simplified in design.
Another object of the present invention provides a kind of user and operates blocking-up method, and in order to replacing prior art, its advantage is for more to save cost than prior art, and can reach the identical function of protection system and data.
For reaching above-mentioned and other purpose, the present invention proposes a kind of user's operating blocking-up device, and this device comprises an enabled device and an on-off element.The system model signal that the voltage instruction signal that the reset signal that enabled device is exported according to input voltage source, the system core are exported and the system core are exported, output switching signal.On-off element determines the whether conducting system core and input media then according to switching signal.
Above-mentioned user's operating blocking-up device, in one embodiment, enabled device comprises that more a phase inverter, postpones a flip-flop and a logic element.Phase inverter receives reset signal, in addition anti-phase after, output inverted reset signal.Postpone flip-flop according to inverted reset signal and voltage instruction signal, the output reference signal.Wherein when the inverted reset signal was in logic low potential, reference signal was in logic high potential, and when voltage instruction signal transferred logic high potential to by logic low potential, reference signal was in logic low potential.Logic element is then according to reference signal and system model signal, output switching signal.
Above-mentioned user's operating blocking-up device, in one embodiment, above-mentioned logic element is one or door, and switching signal is the result that reference signal and system model signal carry out the logical OR computing.
For reaching above-mentioned and other purpose, the present invention proposes a kind of user in addition and operates blocking-up method, the method comprises the following steps: at first, the system model signal that the reset signal of exporting according to input voltage source, the voltage instruction signal that the system core is exported and the system core are exported produces switching signal.According to switching signal, determine the whether conducting system core and input media then.
Above-mentioned user's operating blocking-up device, in one embodiment, the step that produces switching signal more comprises: receive reset signal earlier, in addition anti-phase after, produce the inverted reset signal.According to inverted reset signal and voltage instruction signal, produce reference signal again.Wherein when the inverted reset signal was in logic low potential, reference signal was in logic high potential, and when voltage instruction signal transferred logic high potential to by logic low potential, reference signal was in logic low potential.At last, according to reference signal and system model signal, produce switching signal.
Above-mentioned user's operating blocking-up device, in one embodiment, switching signal is the result that reference signal and system model signal carry out the logical OR computing.
Above-mentioned user's operating blocking-up device, in one embodiment, determine the step of the whether conducting system core and input media more to comprise: the conducting system core and input media when switching signal is in logic high potential, and when switching signal is in logic low potential, turn-off the system core and input media.
[description of drawings]
Fig. 1 is the circuit diagram of user's operating blocking-up device of the present invention.
Fig. 2 operates the process flow diagram of blocking-up method for user of the present invention.
[embodiment]
Fig. 1 is the user's operating blocking-up device circuit diagram that is pursuant to one embodiment of the invention.User's operating blocking-up device of present embodiment comprises enabled device 120 and on-off element 114.The system model signal 138 that the voltage instruction signal 134 that the reset signal 130 that enabled device 120 is exported according to input voltage source 102, the system core 104 are exported and the system core 104 are exported, output switching signal 140.114 of on-off elements determine the whether conducting system core 104 and input media 116 according to switching signal 140.
In the present embodiment, if input voltage source 102 has connection external power source (not being illustrated among the figure), reset signal 130 can be in logic high potential, otherwise reset signal 130 can be in logic low potential.If the system voltage that input voltage source 102 is provided is more than or equal to predeterminated voltage, voltage instruction signal 134 can be in logic low potential, otherwise voltage instruction signal 134 can be in logic high potential.The predeterminated voltage of present embodiment is approximately 3.4 volts.In addition, when the system under the present embodiment (electronic installation that normally has microprocessor) is in execution pattern (run mode), system model signal 138 can be in logic high potential, when system was in park mode (suspension mode), system model signal 138 can be in logic low potential.
On-off element 114 is a N NMOS N-channel MOS N field-effect transistor (n-channel metal oxide semiconductor field effect transistor abbreviates nmos pass transistor as) in the present embodiment.On-off element 114 meeting conductings when switching signal 140 is in logic high potential, the user that the system core 104 can be received from input media 116 operates.When switching signal 140. was in logic low potential, on-off element 114 can turn-off, and afterwards, the system core 104 just can not receive the user's operation from input media 116.The present invention is not limited to nmos pass transistor, also can use the similar on-off element of other kind effect.As for input media 116, can be the input media of button, switch, card slot (card slots), cable joint (cable connecters) or other kind in the present embodiment.
The enabled device 120 of present embodiment comprises phase inverter (inverter) 108 and postpones flip-flop (Dfilp-flop) 110.Phase inverter 108 receives reset signals 130, in addition anti-phase after, output inverted reset signal 132.Postpone 110 of flip-flops according to inverted reset signal 132 and voltage instruction signal 134, output reference signal 136.By the function of general delay flip-flop as can be known, when inverted reset signal 132 is in logic low potential, reference signal 136 can be in logic high potential, and when voltage instruction signal 134 transferred logic high potential to by logic low potential, reference signal 136 can be in logic low potential.As for the effect of logic element 112, be according to reference signal 136 and system model signal 138, output switching signal 140.The logic element 112 of present embodiment is one or (OR gate), so the result that switching signal 140 is reference signal 136 and system model signal 138 carries out the logical OR computing.But the present invention is not limited to or door, and in other embodiments, logic element 112 can be other functionally similar circuit.
The detail operations of present embodiment is described with various situations below.At first, when external power source was supplied, reset signal 130 can be in logic high potential, entered the PRESET input end that postpones flip-flop 110 through phase inverter 108, made reference signal 136 and switching signal 140 all go up logic high potential.This moment, the on-off element 114 meeting conducting system cores 104 and input media 116 made the system core 104 can receive that the user from input media 116 operates.
When system did not connect external power source, reset signal 130 can enter logic low potential.This moment, system voltage was that battery by inside provides, therefore can be along with time reduction gradually.
No matter have or not external power source, as long as system voltage also (is approximately 3.2 volts in the present embodiment at the critical voltage of the built-in electricity-saving mechanism (powerpreservation scheme) 106 of the system core 104, but not as limit) more than, system just can remain on normal mode.When normal mode, system model signal 138 can be in logic high potential, therefore the switching signal 140 of logic element 112 meeting output logic noble potentials makes the on-off element 114 conducting system cores 104 and input medias 116, makes the system core 104 can receive user's operation.
When normal mode, if system voltage is reduced to below the critical voltage, electricity-saving mechanism 106 will allow system enter park mode automatically.In addition, the user also can the system of ordering enter park mode.When entering park mode, system model signal 138 can and then enter logic low potential.At this time, the state of on-off element 114 is wanted viewing system voltage and is decided.If the system voltage position is more than the predeterminated voltage (being approximately 3.4 volts) of voltage instruction signal 134, on-off element 114 just can not turn-off, and allows user's the operation can waken system.If system voltage is from more than the predeterminated voltage, drop under the predeterminated voltage, voltage instruction signal 134 can be gone up logic high potential from logic low potential, equal rising edge (positive edge), make to postpone the reference signal 136 that flip-flop 110 is sent to the logic low potential of D input end the Q output terminal in a pulse of CK end input that postpones flip-flop 110.System model signal 138 has been in logic low potential at this moment, that is to say that two input ends of logic element 112 all are in logic low potential, so switching signal 140 can enter logic low potential, make on-off element 114 turn-off barrier systems core 104 and input media 116.Afterwards, user's operation can not waken system, so reached the purpose of protection system when system voltage is not enough.
In case on-off element 114 turn-offs, the method for unique recovery conducting is to connect external power source.After connecting external power source, reset signal 130 can be gone up logic high potential, by phase inverter 108, makes reference signal 136 and switching signal 140 all go up logic high potential, makes on-off element 114 recover conducting.Afterwards, user's operation will waken system, makes system leave park mode.
Please refer to Fig. 2 now, Fig. 2 is for operating the process flow diagram of blocking-up method according to the user of another embodiment of the present invention, and the circuit operation of its flow process and a last embodiment is roughly the same.At first, step 202 receives the reset signal 130 from input voltage source 102, then step 204 with reset signal 130 anti-phase after, produce inverted reset signal 132.
Next, step 206 can produce reference signal 136 according to inverted reset signal 132 and voltage instruction signal 134 from the system core 104.Details is as the delay flip-flop 110 of Fig. 1, when inverted reset signal 132 is in logic low potential, reference signal 136 can be in logic high potential, and when voltage instruction signal 134 transferred logic high potential to by logic low potential, reference signal 136 can be in logic low potential.
Next, step 208 can produce switching signal 140 according to reference signal 136 and system model signal 138 from the system core 104.In the present embodiment, the result that switching signal 140 is reference signal 136 and system model signal 138 carries out the logical OR computing.Step 210 can judge whether switching signal 140 is in logic high potential then.If, the step 212 meeting conducting system core 104 and input media 116, otherwise step 214 can be turn-offed the system core 104 and input media 116.
Comprehensive the above, the present invention is because adopting above-mentioned apparatus and method, and the little place of independence that need not be traditional Reason device and voltameter, therefore compared with prior art, can be more simple on circuit design, and more Save cost, also more power saving.
Claims (17)
1. user's operating blocking-up device comprises:
One enabled device, the system model signal that a reset signal of exporting according to an input voltage source, the voltage instruction signal that a system core is exported and this system core are exported is exported a switching signal; And
Whether one on-off element according to this switching signal, determines this system core of conducting and an input media.
2. user's operating blocking-up device according to claim 1 is characterized in that: this reset signal is in a logic high potential when this input voltage source connects an external power source, otherwise this reset signal is in a logic low potential.
3. user's operating blocking-up device according to claim 1, it is characterized in that: this voltage instruction signal is in a logic low potential during more than or equal to a predeterminated voltage in a system voltage that this input voltage source provided, and is in a logic high potential during less than this predeterminated voltage in this system voltage.
4. user's operating blocking-up device according to claim 3 is characterized in that: this predeterminated voltage is 3.4 volts.
5. user's operating blocking-up device according to claim 1, it is characterized in that: this system model signal system under this system core is in a logic high potential when being in an execution pattern, and the system under this system core is in a logic low potential when being in a park mode.
6. user's operating blocking-up device according to claim 1 is characterized in that: this enabled device more comprises:
One phase inverter receives this reset signal, anti-phase in addition after, export an inverted reset signal;
One postpones flip-flop, according to this inverted reset signal and this voltage instruction signal, export a reference signal, wherein when this inverted reset signal is in a logic low potential, this reference signal is in a logic high potential, when this voltage instruction signal transferred logic high potential to by logic low potential, this reference signal was in logic low potential; And
One logic element according to this reference signal and this system model signal, is exported this switching signal.
7. user's operating blocking-up device according to claim 6 is characterized in that: this logic element is one or door, and this switching signal result of carrying out the logical OR computing for this reference signal and this system model signal.
8. user's operating blocking-up device according to claim 1, it is characterized in that: this system core of conducting and this input media when this on-off element is in a logic high potential in this switching signal, and when this switching signal is in a logic low potential, turn-off this system core and this input media.
9. user's operating blocking-up device according to claim 1 is characterized in that: this on-off element comprises a N NMOS N-channel MOS N field-effect transistor.
10. a user operates blocking-up method, comprises the following steps:
The system model signal that a reset signal of exporting according to an input voltage source, the voltage instruction signal that a system core is exported and this system core are exported produces a switching signal; And
According to this switching signal, whether determine this system core of conducting and an input media.
11. user according to claim 10 operates blocking-up method, it is characterized in that: this reset signal is in a logic high potential when this input voltage source connects an external power source, otherwise this reset signal is in a logic low potential.
12. user according to claim 10 operates blocking-up method, it is characterized in that: this voltage instruction signal is in a logic low potential during more than or equal to a predeterminated voltage in a system voltage that this input voltage source provided, and is in a logic high potential during less than this predeterminated voltage in this system voltage.
13. user according to claim 12 operates blocking-up method, it is characterized in that: this predeterminated voltage is 3.4 volts.
14. user according to claim 10 operates blocking-up method, it is characterized in that: this system model signal system under this system core is in a logic high potential when being in an execution pattern, and the system under this system core is in a logic low potential when being in a park mode.
15. user according to claim 10 operates blocking-up method, it is characterized in that: the step that produces this switching signal more comprises:
Receive this reset signal, anti-phase in addition after, produce an inverted reset signal;
According to this inverted reset signal and this voltage instruction signal, produce a reference signal, wherein when this inverted reset signal is in a logic low potential, this reference signal is in a logic high potential, when this voltage instruction signal transferred logic high potential to by logic low potential, this reference signal was in logic low potential; And
According to this reference signal and this system model signal, produce this switching signal.
16. user according to claim 15 operates blocking-up method, it is characterized in that: the result that this switching signal is this reference signal and this system model signal carries out the logical OR computing.
17. user according to claim 10 operates blocking-up method, it is characterized in that: determine that whether the step of this system core of conducting and this input media more comprises:
This system core of conducting and this input media when this switching signal is in a logic high potential; And
When being in a logic low potential, this switching signal turn-offs this system core and this input media.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100348171A CN100362451C (en) | 2005-05-27 | 2005-05-27 | User operation block device and method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100348171A CN100362451C (en) | 2005-05-27 | 2005-05-27 | User operation block device and method |
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| Publication Number | Publication Date |
|---|---|
| CN1869874A CN1869874A (en) | 2006-11-29 |
| CN100362451C true CN100362451C (en) | 2008-01-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005100348171A Expired - Fee Related CN100362451C (en) | 2005-05-27 | 2005-05-27 | User operation block device and method |
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| CN (1) | CN100362451C (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP5518131B2 (en) * | 2012-05-31 | 2014-06-11 | シャープ株式会社 | Electrical equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5539910A (en) * | 1993-05-03 | 1996-07-23 | Siemens Aktiengesellschaft | Circuit configuration for monitoring the supply voltage of a processor unit |
| CN1357809A (en) * | 2000-12-05 | 2002-07-10 | 神达电脑股份有限公司 | Power source unit unblocking method |
| WO2004044719A2 (en) * | 2002-11-12 | 2004-05-27 | Freescale Semiconductor, Inc. | Low voltage detection system |
-
2005
- 2005-05-27 CN CNB2005100348171A patent/CN100362451C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5539910A (en) * | 1993-05-03 | 1996-07-23 | Siemens Aktiengesellschaft | Circuit configuration for monitoring the supply voltage of a processor unit |
| CN1357809A (en) * | 2000-12-05 | 2002-07-10 | 神达电脑股份有限公司 | Power source unit unblocking method |
| WO2004044719A2 (en) * | 2002-11-12 | 2004-05-27 | Freescale Semiconductor, Inc. | Low voltage detection system |
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| CN1869874A (en) | 2006-11-29 |
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Granted publication date: 20080116 Termination date: 20160527 |