CN100359651C - Polycrystalline silicon annealing arrangement applied to high-performance thin film transistor and method thereof - Google Patents

Polycrystalline silicon annealing arrangement applied to high-performance thin film transistor and method thereof Download PDF

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CN100359651C
CN100359651C CNB2004100432891A CN200410043289A CN100359651C CN 100359651 C CN100359651 C CN 100359651C CN B2004100432891 A CNB2004100432891 A CN B2004100432891A CN 200410043289 A CN200410043289 A CN 200410043289A CN 100359651 C CN100359651 C CN 100359651C
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film transistor
thin
metal pattern
amorphous silicon
poly
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CN1700429A (en
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柯明道
邓至刚
曾当贵
石安
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TPO Displays Corp
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Toppoly Optoelectronics Corp
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Abstract

The present invention relates to a polycrystalline silicon annealing structure and a method thereof applied to high-performance film transistors. The method comprises the following steps: firstly, a metal pattern and an amorphous silicon film are respectively plated and coated in the position which is predetermined for forming a source electrode and a drain electrode on a glass base plate to form an area which induces sideways crystallization growth in a predetermined grid area between the source electrode and the drain electrode, forming a polycrystalline silicon annealing structure; further more, excimer lasers are matched for anneal, and the excimer lasers penetrate the glass base plate through the other surface to make the amorphous silicon film absorb the energy of excimer laser beams so as to form a molten state; the area coated with the metal layer reflects most of the excimer laser beams to make the amorphous silicon film generate a temperature gradient so as to induce the sideways crystallization growth to form an optimized crystal structure in an active area, increasing the performance of the thin film transistors.

Description

Be applied to the poly-silicon annealing structure and the method thereof of high-effect thin-film transistor
Technical field
The present invention relates to a kind of poly-silicon annealing structure and method thereof, particularly relate to a kind of poly-silicon annealing structure and method thereof that is applied to high-effect thin-film transistor.
Background technology
Thin-film transistor (thin-film transistors, TFT) can be applicable to LCD (liquidcrystal display, LCD) driving element, because amorphous silicon (amorphous silicon, α-Si) therefore thin-film transistor can be widely used in the middle of the LCD in 200-300 ℃ of low temperature manufacturing.At present common on the market Thin Film Transistor-LCD (TFT-LCD) nearly all is to use amorphous silicon (thin-film transistor of α-Si) is as the switch element in pixel (pixel) zone.But (electronmobility) is low for the electron mobility of amorphous silicon, is no more than 1cm 2/ V.s, but if will integrate drive circuit on glass substrate, (α-Si) thin-film transistor has not applied present high speed element demands of applications to amorphous silicon.And polysilicon (ploy-Si) thin-film transistor has high carrier mobility, low-temperature sensitive (low temperature sensitivity) and preferred driving force, therefore more is applicable to the development high speed element.With the LCD of polycrystalline SiTFT as switch element, the speed of display frame is fast and brightness is high, peripheral simultaneously driving element and control circuit also can be made on the same substrate, can promote reliability and force down manufacturing cost, therefore become the development main flow of Thin Film Transistor-LCD from now on.
LCD (LCD) is in order to reach image quality high brightness and resolution level, the LCD that for example present projector, digital camera use, thin-film transistor manufacturing process temperature need reach Celsius 1200 and spend to the high temperature of 1400 degree, so essential quartz (quartz) material that uses is as substrate.But costing an arm and a leg of quartz base plate, so in order to reduce production costs, trend uses glass substrate to replace quartz base plate, but the manufacturing process temperature that glass substrate can bear must be below 600 degree Celsius, the trend so the thin-film transistor of development low temperature polycrystalline silicon is inevitable.And most of now LCD screen employed be traditional amorphous silicon manufacturing process, its annealing temperature still needs to use resistant to elevated temperatures glass to be still one of cost and consider greatly up to the above high temperature of 500 degree Celsius.So, the many reduction polysilicons of corresponding generation manufacturing process method of temperature, wherein, because excimer laser is brought out crystallization (eximer laser-induced crystalline, ELC) method and metal induced side crystallization (metal induced lateral crystallization, MILC) method all can be used the polysilicon with growing high quality and fabricating low-defect-density (low defect density), and be attracted attention.
Mode with excimer laser (excimer laser) annealing, be through behind the projection system with laser light, the equally distributed laser beam of produce power, be projeced on the glass substrate of amorphous silicon structures, meeting moment fusion behind the specific wavelength energy of the absorption of the amorphous silicon film on glass substrate excimer laser, and then crystalline transition becomes polysilicon structure, and glass substrate can't absorb energy to this specific wavelength, can not produce heat damage.Because the mode of quasi-molecule laser annealing, whole manufacturing process all are to finish below low temperature, so general glass substrate is all applicable.
Wherein, the quality of the critical voltage of polycrystalline SiTFT (threshold voltage), an effect mobility (filed-effect mobility) and drive current (driving current) depends on the crystallite dimension and the structure of polysilicon.When using the low temperature manufacturing process of quasi-molecule laser annealing to form polysilicon, only tens of nanosecond of the laser pulse time of excimer laser (ns, 10 -9Second), can't provide the silicon atom time enough to have rearranging of directivity,, make and widely to utilize with the manufacturing process of quasi-molecule laser annealing manufacturing process formation polysilicon with big, the uniform polysilicon crystal particle of formation.And metal induced side crystallization method is the lateral growth method, also can obtain bigger silicon crystallization crystal grain.When element application, metal can be plated on source/drain (source/drain) and locate, and when forming the growth of metal induced side crystallization, also forms metal silicide contact (contacts).Therefore, in order to improve the usefulness of low-temperature polysilicon film transistor, develop the manufacturing process that above-mentioned both technology gradually.
Please refer to Figure 1A, it is existing amorphous silicon annealed structure generalized section.Shown in Figure 1A, utilize photolithographic techniques that striated metal level 11 is plated on amorphous silicon layer 10 surfaces earlier, the amorphous silicon layer below is a silicon oxide layer 12.Carry out quasi-molecule laser annealing again.Can reflect about 95% laser energy owing to be coated with the part of striated metal level 11, and the amorphous silicon part that is not covered for metal level 11 then produces melting phenomenon behind the energy of absorption excimer laser beam 13 fixed wave length.Shown in Figure 1B, it looks schematic diagram on the existing amorphous silicon annealed structure.When being projeced into amorphous silicon layer 10 with laser beam, the part that is coated with striated metal level 11 can be dispelled the heat and the part of fusion produces temperature gradient by metal level 11, makes amorphous silicon layer 10 produce the thermal gradient of side direction; Therefore the amorphous silicon layer of fusion part begins nucleation by the amorphous silicon edge that is coated with striated metal level 11, and then crystalline transition becomes polysilicon membrane 14.Need remove striated metal level 11 more then, just can finish the making of follow-up polycrystalline SiTFT.
Another kind method please refer to Fig. 2, and it is existing amorphous silicon annealed structure generalized section.As shown in Figure 2, the oxide layer 22 that all has isolation up and down of amorphous silicon layer 20, between the bottom of the area of grid that amorphous silicon layer 20 is scheduled to and resilient coating 23, form one deck air gap 21 (air gap), laser beam 13 is projeced into amorphous silicon layer 10 by the top, makes the thermal conduction rate in zone, air gap be slower than both sides and is predefined for source/drain (source/drain) and locates.Carry out quasi-molecule laser annealing, the molten amorphous silicon that makes grid part begins nucleation by the edge of source/drain (source/drain), and produces side crystallization and be transformed into polysilicon structure.By above-mentioned technology as can be known, the crystal size that how to increase polysilicon becomes the important goal of present development to improve the usefulness of thin-film transistor.
In addition, for forming preferred polysilicon structure, more develop the continuously lateral solidification method (Sequential Lateral Solidification, SLS), phase deviation photomask (Phase Shift Mask) and amorphous silicon planarization (manufacturing process such as floating α-Silayer).But, utilize these methods to need to increase in addition some equipment, increased the equipment cost of manufacturing process, also be difficult for being integrated into existing manufacturing process.
Summary of the invention
Purpose of the present invention provides a kind of poly-silicon annealing structure and method thereof that is applied to high-effect thin-film transistor, thereby the crystal size of increase polysilicon is to form dynamical thin-film transistor.
Poly-silicon annealing structure and the method thereof that is applied to high-effect thin-film transistor provided by the present invention, locate to plate earlier metal level again coated with amorphous silicon film in the predetermined source/drain (source/drain) that forms of glass substrate, make grid active region position in advance in the middle of making source electrode and drain electrode, and use quasi-molecule laser annealing, make the zone and the pre-defined gate zone that are coated with metal level produce temperature gradient, make the amorphous silicon film of fusion begin nucleation by the low metal level upper area of temperature.And, because the higher amorphous silicon film that makes of temperature of area of grid can have the directive crystallization of time enough to form preferred crystalline texture.
For reaching the poly-silicon annealing method that is applied to high-effect thin-film transistor of the present invention, the present invention also comprises the poly-silicon annealing structure that is applied to high-effect thin-film transistor, is made up of glass substrate, metal pattern and amorphous silicon film; Metal pattern is plated on a surface of glass substrate, and predetermined this metal pattern is the source electrode that forms thin-film transistor and the position of drain electrode, and amorphous silicon film is coated in glass substrate, and covers metal pattern simultaneously.Because when carrying out poly-silicon annealing, excimer laser makes energy that amorphous silicon film absorbs excimer laser beam to form molten condition by penetrating glass substrate dorsad, and most excimer laser beam is then reflected in the zone that is coated with metal level.Allow the amorphous silicon film of metal pattern zone and active region produce temperature gradient, bring out the side direction growth mechanism; And the excimer laser beam energy of this specific wavelength can not absorbed by glass, so can allow the amorphous silicon film transient heating to molten and unlikely glass substrate is caused damage.
Because the present invention forms metal pattern in the predetermined source of thin-film transistor and the position of drain electrode, after the annealing manufacturing process is finished, does not need to remove metal pattern, can be with it as a kind of good metal contact interface.In addition, after this poly-silicon annealing structure fabrication became thin-film transistor, the high field effect that can disperse drain electrode end under the situation of transistor operation was to promote the usefulness of thin-film transistor.
For making purpose of the present invention, structural feature and function thereof are had further understanding, conjunction with figs. elaborates now.
Description of drawings
Figure 1A is existing amorphous silicon annealed structure generalized section;
Figure 1B looks schematic diagram on the existing amorphous silicon annealed structure;
Fig. 2 is another existing amorphous silicon annealed structure generalized section;
Fig. 3 is the embodiment flow chart of steps that is applied to the poly-silicon annealing method of high-effect thin-film transistor of the present invention;
Fig. 4 is the schematic side view of polysilicon structure of the high-effect thin-film transistor of the embodiment of the invention; And
Fig. 5 is the following schematic diagram of looking of the polysilicon structure of the high-effect thin-film transistor of the embodiment of the invention.The simple symbol explanation
210 glass substrates
220 aluminum metal patterns
230 amorphous silicon films
240 excimer laser beam
Embodiment
Disclosed poly-silicon annealing structure and the method thereof that is applied to high-effect thin-film transistor of the present invention, to between amorphous silicon film and glass substrate, make the poly-silicon annealing structure of metal pattern, be applied to carry out uncrystalline silicon annealing manufacturing process has preferred crystallite dimension with formation polysilicon.
For being described in more detail the present invention, please refer to Fig. 3, it is the embodiment flow chart of steps that is applied to the poly-silicon annealing method of high-effect thin-film transistor of the present invention, the embodiment step comprises: a glass substrate (step 110) is provided; In the surperficial plated aluminum metal pattern of glass substrate, and predetermined aluminum metal pattern is the source electrode of formation thin-film transistor and the position (step 120) of drain electrode; The coating amorphous silicon film is in glass substrate, simultaneously covering aluminum metal pattern (step 130); Provide excimer laser beam to be projeced into another surface (step 140) of glass substrate, make excimer laser beam penetrate glass substrate and make energy that amorphous silicon film absorbs excimer laser beam to form molten condition, most of excimer laser beam is then reflected in the zone that is coated with the aluminum metal pattern; Make amorphous silicon film by near aluminum metal pattern part nucleation, and continue to carry out side crystallization to form polysilicon membrane (step 150) to middle section.
By above-mentioned flow process as can be known, the inventive method needs fit applications in the polysilicon structure of high-effect thin-film transistor, is made up of glass substrate, aluminum metal pattern and amorphous silicon film.Please refer to Fig. 4, it is the schematic side view of the embodiment of the invention; Aluminum metal pattern 220 is plated on a surface of glass substrate 210, and predetermined this aluminum metal pattern 220 is the source electrode that forms thin-film transistor and the position of drain electrode, and amorphous silicon film 230 is coated in glass substrate 210, and covers aluminum metal pattern 220 simultaneously.When carrying out poly-silicon annealing, excimer laser beam 240 penetrates glass substrate 210 by another surface, the energy that makes amorphous silicon film 230 absorption excimer laser beam 240 is to form molten condition, and simultaneously, most laser beam is then reflected in the zone that is coated with aluminum metal pattern 220.The amorphous silicon film 230 of molten condition is by beginning nucleation near aluminum metal pattern 220 parts, the amorphous silicon film 230 formation temperature gradients in aluminum metal pattern 220 gaps are brought out the side crystallization growth district, it is comparatively slow that temperature gradient is brought out the cooling of side crystallization growth district, can make silicon atom have time enough to arrange in order, produce bigger silicon crystal size.Its crystallization result please refer to Fig. 5, and it is the following schematic diagram of looking of the embodiment of the invention; Because near the low nucleation section start that promptly becomes of aluminum metal pattern 220 part temperature, then since temperature gradient to bring out the cooling of side crystallization growth district comparatively slow, then make amorphous silicon film 230 crystallize to the crystallite dimension that formation is bigger gradually.Aluminum metal pattern 220 is the source electrode of formation thin-film transistor and the position of drain electrode, and it brings out the side crystallization growth district is the position of setting up the grid of thin-film transistor.
Because the airspace of its top of the amorphous silicon film of aluminum metal pattern interval forms good thermal insulation areas, simultaneously, its aluminum metal pattern can reflect most excimer laser beam, makes that the temperature gradient of the amorphous silicon film be coated with metal pattern and metal pattern gap is bigger; And effectively the formation temperature gradient is brought out the side crystallization growth district.Simultaneously, than the manufacturing process equipment that preceding case the present invention does not need to remove the aluminum metal pattern and increases other, can save manufacturing technology steps and cost of manufacture.Wherein, excimer laser beam used in the present invention is chlorination xenon (XeCl) laser beam or KrF (KrF) laser beam etc.
Though the present invention discloses as above with preferred embodiment; yet it is not in order to limit the present invention; those skilled in the art can do a little change and retouching without departing from the spirit and scope of the present invention, thus protection scope of the present invention should with accompanying Claim the person of being defined be as the criterion.

Claims (9)

1. poly-silicon annealing method that is applied to thin-film transistor, its step comprises:
One substrate is provided;
Surface in this substrate forms a metal pattern, and predetermined this metal pattern is the source electrode of formation thin-film transistor and the position of drain electrode;
Coating one amorphous silicon film covers this metal pattern simultaneously in this substrate;
Provide an excimer laser bundle being projeced into another surface of this substrate, and penetrate this substrate and make energy that this amorphous silicon film absorbs this excimer laser beam to form molten condition, most of excimer laser beam is then reflected in the zone that wherein is coated with this metal pattern; And
This amorphous silicon film of crystallization is to form a polysilicon membrane again, the amorphous silicon film in the gap of this metal pattern forms a temperature gradient and brings out the side crystallization growth district, this temperature gradient is brought out the side crystallization growth district and is lowered the temperature lentamente, so that this amorphous silicon film is by near this metal pattern part nucleation, and brings out the side crystallization growth district to this temperature gradient and continue to carry out side crystallization to finishing this polysilicon membrane.
2. the poly-silicon annealing method that is applied to thin-film transistor as claimed in claim 1, wherein this excimer laser beam is a monochlor(in)ate xenon laser beam.
3. the poly-silicon annealing method that is applied to thin-film transistor as claimed in claim 1, wherein this excimer laser beam is the krypton monofluoride laser beam.
4. the poly-silicon annealing method that is applied to high-effect thin-film transistor as claimed in claim 1, wherein this excimer laser beam is to can be the equivalent laser beam that silicon thin film absorbs.
5. the poly-silicon annealing method that is applied to thin-film transistor as claimed in claim 1, wherein this metal pattern is an aluminum metal pattern.
6. the poly-silicon annealing method that is applied to thin-film transistor as claimed in claim 1, wherein this temperature gradient is brought out the position of side crystallization growth district for the grid of formation thin-film transistor.
7. a poly-silicon annealing structure that is applied to thin-film transistor is applied to carry out uncrystalline silicon annealing manufacturing process to form polysilicon, and it comprises:
One substrate;
One metal pattern is formed at a surface of this substrate, and predetermined this metal pattern is the source electrode that forms thin-film transistor and the position of drain electrode; And
One amorphous silicon film is coated in this substrate, and covers this metal pattern simultaneously.
8. the poly-silicon annealing structure that is applied to thin-film transistor as claimed in claim 7, wherein this metal pattern is an aluminum metal pattern.
9. the poly-silicon annealing structure that is applied to thin-film transistor as claimed in claim 7, wherein the gap of this metal pattern is the position of the grid of formation thin-film transistor.
CNB2004100432891A 2004-05-17 2004-05-17 Polycrystalline silicon annealing arrangement applied to high-performance thin film transistor and method thereof Expired - Fee Related CN100359651C (en)

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CN103700695B (en) * 2013-12-25 2017-11-03 深圳市华星光电技术有限公司 Low-temperature polysilicon film and preparation method thereof, transistor
WO2016023246A1 (en) * 2014-08-15 2016-02-18 深圳市华星光电技术有限公司 Preparation method and preparation apparatus for low-temperature polycrystalline silicon thin film, and low-temperature polycrystalline silicon thin film
WO2016170571A1 (en) * 2015-04-20 2016-10-27 堺ディスプレイプロダクト株式会社 Thin film transistor production method, thin film transistor and display panel
CN104979247B (en) * 2015-06-23 2018-01-12 深圳市华星光电技术有限公司 Laser anneal device and laser anneal method
CN106783532B (en) * 2016-11-18 2020-03-31 武汉华星光电技术有限公司 Preparation method of low-temperature polycrystalline silicon thin film, thin film transistor, array substrate and liquid crystal display panel
CN111403287B (en) * 2020-03-24 2023-12-22 京东方科技集团股份有限公司 Thin film transistor, preparation method thereof, array substrate and display device
CN112397379A (en) * 2020-11-16 2021-02-23 浙江大学 Laser local annealing amorphous polycrystalline composite photoelectron integration method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1050221C (en) * 1994-12-27 2000-03-08 松下电器产业株式会社 Method for forming polycrystalline thin-film and method for fabricating thin-film transistor
CN1058583C (en) * 1993-02-15 2000-11-15 株式会社半导体能源研究所 Semiconductor and process for fabricating the same
US20010001272A1 (en) * 1999-05-19 2001-05-17 Tadashi Ohira Image forming apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1058583C (en) * 1993-02-15 2000-11-15 株式会社半导体能源研究所 Semiconductor and process for fabricating the same
CN1050221C (en) * 1994-12-27 2000-03-08 松下电器产业株式会社 Method for forming polycrystalline thin-film and method for fabricating thin-film transistor
US20010001272A1 (en) * 1999-05-19 2001-05-17 Tadashi Ohira Image forming apparatus

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