CN100358050C - Method hidden ROM for protecting data of storage - Google Patents
Method hidden ROM for protecting data of storage Download PDFInfo
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- CN100358050C CN100358050C CNB2005100347022A CN200510034702A CN100358050C CN 100358050 C CN100358050 C CN 100358050C CN B2005100347022 A CNB2005100347022 A CN B2005100347022A CN 200510034702 A CN200510034702 A CN 200510034702A CN 100358050 C CN100358050 C CN 100358050C
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Abstract
The present invention relates to a method for hiding an ROM, which can prevent a memory from attacking. The present invention comprises the following procedures that the present invention is provided with a hidden ROM used for storing core data in a system, and a control circuit for reading and writing operation for the hidden ROM. Besides, the present invention is added with a limiting signal in writing operation signals. When the limiting signal is effective, the present invention can effectively access the hidden ROM. Because the method of the present invention uses writing operation limits for the storage area of the entire ROM, the entire area for hiding the ROM is not externally written. Thereby, the present invention realizes safe storage and protection for the core data.
Description
Technical field
The present invention relates to a kind of design of integrated circuit method that has storer, in particular, the method for protecting at the significant data of storing in the integrated circuit (IC) chip.
Background technology
In the prior art at the core data data of safety chip, often by being stored among the hiding ROM, user's data is need to be keep secret a bit, user's password for example, data such as key, can not allow the disabled user know, many attacks at present are that illegal user attacks user's memory block by variety of way, read or rewrite user's data.The disabled user reaches by above-mentioned means and usurps user's data, thereby causes the infringement to validated user.
The mode that realizes hiding ROM is many, having plenty of the utility command sequence opens and writes right, write other specific value by address bus from a kind of order to FLASH and data bus as the user, such as, write data 5A in the A5 of address, write data A5 in the 5A of address again, and then write AA to address 55, in the AA address, write 55 at last, just the address space that is hidden among the ROM can be removed and hide.The mode that can use one-off programming ROM (read-only memory) OTPROM that has realizes that this is the function that is provided by ROM producer, only allows the user to write once.
The mode of above-mentioned hiding ROM can recognize a zone that is hidden from the outside, thereby can cause a large amount of attacks at this hidden area; And it hides general by distinctive command sequence, uses existing decoding mode always might carry out the attack of success.
Therefore, there is certain defective in prior art, and awaits improving and development.
Summary of the invention
The purpose of this invention is to provide a kind of method that prevents the hiding ROM that storer is attacked, be used for storage area is protected, prevent that the disabled user from carrying out write operation to it, the so-called ROM of hiding is meant a part of EEPROM/FLASH storage area is not opened the disabled user, makes the disabled user not write right; The method that the present invention hides ROM be to EEPROM/FLASH normally write action in, write operation is added a restriction, and this limiting means is externally not open, thereby prevents that the disabled user from rewriting this hiding ROM, attack storer, thereby prevent attack user data.
Technical scheme of the present invention is as follows:
A kind of method that prevents the hiding ROM that storer is attacked, it may further comprise the steps:
A) a hiding ROM is set and in system, is used to store core data;
B) control circuit is set described hiding ROM is carried out read-write operation, and in its write operation signal, add a restricting signal, when this restricting signal is effective, can effectively visit this hiding ROM.
Described method also is provided with a register, writes a specific value in this register, is used to produce described restricting signal by the judgement to this register value.
Described method also is provided with a particular address and is used to store a specific numerical value in described storer, be used to produce described restricting signal by the special value of this particular address is judged.
Described method also is included in when encapsulating the chip with the hiding ROM of this kind described control circuit is arranged in the scribe line, to destroy the control circuit of described hiding ROM behind packaged chip.
Described method, wherein, described hiding ROM is the EEPROM/FLASH storer.
A kind of method that prevents the hiding ROM that storer is attacked provided by the present invention because employing is that whole ROM accessing zone is carried out the write operation restriction, is not write whole hiding ROM zone by extraneous, thereby realizes safe storage and protection to core data.
Description of drawings
Fig. 1 is the theory diagram that prevents the method for the hiding ROM that storer is attacked of the present invention;
Fig. 2 is the system applies schematic diagram of the method for the invention;
Fig. 3 is the chip production process schematic representation of the method for the invention.
Embodiment
Below, in conjunction with the accompanying drawings, will carry out comparatively detailed explanation to each preferred embodiment of the present invention.
The method that prevents the hiding ROM that storer is attacked of the present invention, in described system, as shown in Figure 2, storer in the system has several, at least one EEPROM/FLASH storer is wherein hidden by system, promptly only in internal circuit, read and write, wherein store core significant datas such as user name, password and key, externally be hidden by described CPU control.Its method of hiding for to this monoblock EEPROM/FLASH normally write action in; write operation is added a restricting signal; as shown in Figure 1; the TEST signal is added on the described signal of writing action; have only when restricting signal is effective; this EEPROM/FLASH write signal is just effective, can effectively be visited, thereby protects this memory block effectively.
In specific embodiments of the invention, described restricting signal can be by writing certain specific value in certain register, such as, in the register of address 77H correspondence, writing data 99H, it is effective that this action just can produce signal TEST.The TEST signal just can be used as the extra control signal that the present invention operates EEPROM/FLASH like this.The circuit structure of TEST signal as shown in Figure 1.
In second preferred embodiment of the present invention, when chip power, described CPU can also monitor the numerical value of a particular address in the storer among the EEPROM/FLASH automatically, if the numerical value of this address is particular data, signal specific in the chip is effective so, this signal specific effectively then can be controlled the write signal of EEPROM/FLASH, makes write invalidate, and EEPROM/FLASH has just become read-only EEPROM/FLASH like this.If the numerical value of this address is not particular data, the signal specific in the chip is invalid so, and so whole EEPROM/FLASH can read-write operation.In case we think that the EEPROM/FLASH space does not have to change in case of necessity, can write particular data to this particular address, the EEPROM/FLASH address space will become read-only EEPROM/FLASH space so.
In the third embodiment of the present invention, with signal Test as pressure welding point, and signal pins Test and control circuit be positioned in the scribe line 110, after Chip Packaging, be scratched because the scribe line place can divide, to fall thereby Test pressure welding point and control circuit 120 are destroyed, the EEPROM/FLASH130 address space will become read-only EEPROM/FLASH space forever like this, thereby obtain the control device of irreversible described hiding ROM, after this generally can't carry out write operation again this concealing memory.
The method that prevents the hiding ROM that storer is attacked of the present invention, can be adapted to have in the design of integrated circuit process of storer, the widely used integrated circuit (IC) chip that has storer comprises various types of IC-card integrated circuit (IC) chip and SOC integrated circuit (IC) chip at present, SIM card as GSM, usim card, bank card, social security card, and chip that various storages use etc. is arranged.
Should be understood that the above-mentioned description at preferred embodiment of the present invention is comparatively concrete, can not therefore be interpreted as the restriction to scope of patent protection of the present invention, scope of patent protection of the present invention should be as the criterion with claims.
Claims (5)
1, a kind of method that prevents the hiding ROM that storer is attacked, it may further comprise the steps:
A) a hiding ROM is set and in system, is used to store core data;
B) control circuit is set described hiding ROM is carried out read-write operation, and in its write operation signal, add a restricting signal, when this restricting signal is effective, can effectively visit this hiding ROM.
2, method according to claim 1 is characterized in that, described method also is provided with a register, writes a specific value in this register, is used to produce described restricting signal by the judgement to this register value.
3, method according to claim 1 is characterized in that, described method also is provided with a particular address and is used to store a specific numerical value in described storer, is used to produce described restricting signal by the special value of this particular address is judged.
4, method according to claim 1 is characterized in that, described method also is included in when encapsulating the chip with the hiding ROM of this kind described control circuit is arranged in the scribe line, to destroy the control circuit of described hiding ROM behind packaged chip.
According to the described method of the arbitrary claim of claim 1～4, it is characterized in that 5, described hiding ROM is the EEPROM/FLASH storer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100347022A CN100358050C (en) | 2005-05-25 | 2005-05-25 | Method hidden ROM for protecting data of storage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100347022A CN100358050C (en) | 2005-05-25 | 2005-05-25 | Method hidden ROM for protecting data of storage |
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| Publication Number | Publication Date |
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| CN1725377A CN1725377A (en) | 2006-01-25 |
| CN100358050C true CN100358050C (en) | 2007-12-26 |
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| CNB2005100347022A Active CN100358050C (en) | 2005-05-25 | 2005-05-25 | Method hidden ROM for protecting data of storage |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5564040A (en) * | 1994-11-08 | 1996-10-08 | International Business Machines Corporation | Method and apparatus for providing a server function in a logically partitioned hardware machine |
| JPH1165936A (en) * | 1997-06-12 | 1999-03-09 | Oki Micro Design Miyazaki:Kk | Memory device |
| CN1239248A (en) * | 1998-06-16 | 1999-12-22 | Ncr国际公司 | Data security arrangement |
| JP2000076133A (en) * | 1998-06-04 | 2000-03-14 | Texas Instr Inc <Ti> | Security guarantee method for program data inside memory writable only once |
| CN1313550A (en) * | 1999-11-08 | 2001-09-19 | 松下电器产业株式会社 | Canceling information update method, device and recording medium |
| CN1346093A (en) * | 2000-09-29 | 2002-04-24 | 索尼公司 | Memory and memory access limiting method |
| CN1380610A (en) * | 2001-04-09 | 2002-11-20 | 凤凰技术有限公司 | System and method for testing computer device |
-
2005
- 2005-05-25 CN CNB2005100347022A patent/CN100358050C/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5564040A (en) * | 1994-11-08 | 1996-10-08 | International Business Machines Corporation | Method and apparatus for providing a server function in a logically partitioned hardware machine |
| JPH1165936A (en) * | 1997-06-12 | 1999-03-09 | Oki Micro Design Miyazaki:Kk | Memory device |
| JP2000076133A (en) * | 1998-06-04 | 2000-03-14 | Texas Instr Inc <Ti> | Security guarantee method for program data inside memory writable only once |
| CN1239248A (en) * | 1998-06-16 | 1999-12-22 | Ncr国际公司 | Data security arrangement |
| CN1313550A (en) * | 1999-11-08 | 2001-09-19 | 松下电器产业株式会社 | Canceling information update method, device and recording medium |
| CN1346093A (en) * | 2000-09-29 | 2002-04-24 | 索尼公司 | Memory and memory access limiting method |
| CN1380610A (en) * | 2001-04-09 | 2002-11-20 | 凤凰技术有限公司 | System and method for testing computer device |
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| Publication number | Publication date |
|---|---|
| CN1725377A (en) | 2006-01-25 |
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