CN100349259C - Method for making low-temp. polycrstalline silicon film - Google Patents
Method for making low-temp. polycrstalline silicon film Download PDFInfo
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- CN100349259C CN100349259C CNB031094104A CN03109410A CN100349259C CN 100349259 C CN100349259 C CN 100349259C CN B031094104 A CNB031094104 A CN B031094104A CN 03109410 A CN03109410 A CN 03109410A CN 100349259 C CN100349259 C CN 100349259C
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Abstract
The present invention relates to a low temperature making method for polycrystalline silicon films, which comprises the following steps: firstly, forming a first metal layer on a base plate, and forming a plurality of openings in the first metal layer; then carrying out a sloping vapor deposition step to form a second metal layer on the first metal layer, wherein micropores are formed on the second metal layer and in the positions corresponding to the opening positions of the first metal layer; forming a silicon layer on the second metal layer, and simultaneously forming a silicon crystal seed granule on the base plate under each micropore; then removing the first and the second metal layers; using the silicon crystal seed granules as crystal seeds, and carrying out an aggradation making technique so as to form an amorphous silicon layer on the base plate; at last, carrying out a laser crystallization step to make the amorphous silicon layer changed into a polycrystalline silicon layer. Because the position of the silicon crystal seeds can be controlled in the present invention, the silicon crystal granules can grow in specific positions, and consequently the number of the crystal granules in the specific areas can be controlled.
Description
Technical field
The invention relates to the manufacture method of a kind of low temperature polycrystalline silicon (Low Temperature Polysilicon) film, and particularly relevant for a kind of method that can control the crystallization nucleation position of low-temperature polysilicon film.
Background technology
In the manufacturing process of Thin Film Transistor-LCD, the technology of low-temperature polysilicon film transistor is in positive development.Low-temperature polysilicon film transistor is a kind of technology that is different from general traditional amorphous silicon film transistor (Amorphous Silicon TFT), and its electron mobility can reach 200cm
2More than/the V-sec, therefore can make thin-film transistor component do forr a short time, and aperture opening ratio (Aperture Ratio) is increased, and then increase display brightness, reduce the function of power consumption.In addition, because the increase of electron mobility can simultaneously be manufactured in glass substrate in company with the thin-film transistor manufacturing process part drive circuit, significantly promote the characteristic and the reliability of display panels, make the panel manufacturing cost significantly reduce, so manufacturing cost is low than the amorphous silicon film transistor LCD.In addition, because of the low-temperature polysilicon film transistor LCD has thin thickness, in light weight, characteristics such as resolution is good, therefore be particularly suitable for being applied to require on the action end product of light and handy power saving.
In the known low-temperature polysilicon film transistor manufacturing process, the manufacture method of low-temperature polysilicon film forms an amorphous silicon layer with chemical vapour deposition technique earlier on substrate.Afterwards, directly carry out the laser crystallisation step again, so that recrystallized amorphous siliconization and form polysilicon.Yet, knownly utilize the mode of laser crystallization so that amorphous silicon is transformed in the method for polysilicon, have the uncontrollable shortcoming in crystallization nucleation position.In addition, the crystallite dimension behind the crystallization also is not too consistent, therefore can cause the crystal boundary number that channel region contained of each thin-film transistor to differ.If the crystal boundary number in the channel region is too many, then can directly influence the electrical and stable of thin-film transistor.
Summary of the invention
Therefore purpose of the present invention just provides a kind of manufacture method of low-temperature polysilicon film, by control required positions of silicon crystal seeds of heterogeneous nucleation stage, with the crystal grain position of control low-temperature polysilicon film.
A further object of the present invention provides a kind of manufacture method of low-temperature polysilicon film, has to solve known low temperature polycrystalline silicon that crystallite dimension differs and the crystal grain problem of uneven distribution.
Another object of the present invention provides a kind of manufacture method of low-temperature polysilicon film, and with the crystal boundary number that channel region was contained of minimizing thin-film transistor, and the number of dies that the control channel district is contained is all in identical scope.
The present invention proposes a kind of manufacture method of low-temperature polysilicon film, and the method at first forms a first metal layer on a substrate, wherein be formed with several openings in the first metal layer, exposes substrate.Then, carry out an inclination evaporation step, to form one second metal level on the first metal layer, wherein the opening part of corresponding the first metal layer is formed with a micropore in second metal level.Afterwards, on second metal level, form a silicon layer, and form a silicon seed particle on the substrate in each micropore simultaneously.Subsequently, remove first metal and second metal level.Then, utilize the silicon seed particle, carry out a chemical vapour deposition (CVD) manufacturing process, thereby on substrate, form an amorphous silicon layer as crystal seed.At last, carry out a laser crystallisation step again, so that amorphous silicon layer is transformed into polysilicon layer.
The present invention proposes a kind of method of controlling the crystal seed position again, and the method at first forms a first metal layer on a substrate, wherein be formed with several openings in the first metal layer, exposes substrate.Then, carry out an inclination evaporation step, to form one second metal level on the first metal layer, wherein the opening part of corresponding the first metal layer is formed with a micropore in second metal level.Afterwards, on second metal level, form a crystal seed layer, and form a seed particles on the substrate in each micropore simultaneously.Subsequently, remove first metal and second metal level.
Because method of the present invention can effectively be controlled the position of crystal seed, therefore follow-up when carrying out crystallization step, position that just can the crystallization control nucleation.
In addition, because method of the present invention can be controlled the position and the size of crystal seed, therefore behind crystallization, the distribution of crystal grain and size also can be comparatively even.
In addition, because of its crystal grain position of the formed low-temperature polysilicon film of the present invention can effectively be brought under control, so the present invention can control the number of grain boundaries in the channel region of each thin-film transistor, and then improves the electrical and stable of thin-film transistor.
For above and other objects of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below:
Description of drawings
Figure 1A to Fig. 1 F is the manufacturing process generalized section according to the low-temperature polysilicon film of a preferred embodiment of the present invention; And
Fig. 2 is the schematic top plan view of the photoresist layer among Figure 1A.
Description of reference numerals:
100: substrate
102,102a: lower metal layer
104,104a: upper metal layers
106,106a: the first metal layer
108: photoresist layer
108a, 110: opening
112: inclination evaporation step
112a: angle
114: the second metal levels
116: micropore
118: vertical evaporation step
120: silicon layer
120a: silicon seed particle
122: amorphous silicon
122a: polysilicon
Embodiment
Shown in Figure 1A to Fig. 1 G, be manufacturing process generalized section according to a kind of low-temperature polysilicon film of the drafting of a preferred embodiment of the present invention.
Please refer to Figure 1A, a substrate 100 at first is provided, substrate 100 for example is glass substrate or plastic base.Then, on substrate 100, form the first metal layer 106.In a preferred embodiment, the first metal layer 106 for example is the double-level-metal layer structure that is made of a lower floor's metal level 102 and a upper metal layers 104.
Afterwards, on the first metal layer 106, form a photoresist layer 108, and be formed with several patterns of openings 108a in the photoresist layer 108.If the present invention is applied in the manufacturing process of low-temperature polysilicon film transistor LCD, then the vertical view of photoresist layer 108 as shown in Figure 2, meaning is that the opening 108a in the photoresist layer 108 arranges with the array type that is of rule.
Please refer to Figure 1B, with photoresist layer 108 is etch mask, and etching the first metal layer 106 is to form several openings 110 in the first metal layer 106, expose substrate 100, and form the first metal layer 106a (being constituted) of patterning by lower metal layer 102a and upper metal layers 104a.
Afterwards, carry out an inclination evaporation step 112, with formation one second metal level 114 on the first metal layer 106a, and opening 110 places of corresponding the first metal layer 106a can be formed with a micropore 116 in formed second metal level 114, shown in Fig. 1 C.Wherein, inclination evaporation step 112 for example is an electron beam (E-Beam) inclination evaporation step, and the angle of inclination 112a with respect to horizontal direction of inclination evaporation step 112 for example be 10 the degree to 30 the degree, preferably 20 the degree.
In a preferred embodiment, the material of second metal level 114 is identical with the material of the lower metal layer 102a of the first metal layer 106a, this be because, follow-up when removing the first metal layer 106a and second metal level 114, can use the lower metal layer 102a that corrodes second metal level 114 and the first metal layer 106a with a kind of etching solution, and simultaneously the upper metal layers 104a of the first metal layer 106a be divested.So, the first metal layer 106a and second metal level 114 just can remove simultaneously.
At this, the material of the lower metal layer 102a of the first metal layer 106a for example is an aluminium, and the material of the upper metal layers 104a of the first metal layer 106a for example is a chromium, and the material of second metal level 114 for example is an aluminium.
Please refer to Fig. 1 D, form a silicon layer 120 on second metal level 114, and form a silicon seed particle 120a simultaneously on 116 exposed substrate 100 of micropore, the particle diameter of wherein formed silicon seed particle 120a for example is 0.5 micron to 1 micron.In a preferred embodiment, the method that forms silicon layer 120 for example is to carry out the vertical evaporation of electron beam step 118.
At this, because silicon seed particle 120a is formed on the substrate 100 that micropore 116 (shown in Fig. 1 C) should be arranged, and micropore 116 is formed in opening 110 (shown in Figure 1B) part should be arranged, therefore, by the position of control the first metal layer 106a split shed 110, just can control the position of follow-up formed silicon seed particle 120a.
Please refer to Fig. 1 E, remove the first metal layer 106a and second metal level 114, and stay silicon seed particle 120a.If the material of the lower metal layer 102a of the first metal layer 106a and second metal level 114 is to use metallic aluminium, the method that then removes the first metal layer 106a and second metal level 114 for example is to use phosphoric acid that it is divested.
Please refer to Fig. 1 F, utilize formed silicon seed particle 120a, carry out a deposition manufacturing process, on substrate 100, to form an amorphous silicon layer 122 as crystal seed.In a preferred embodiment, the method that forms amorphous silicon layer 122 for example is a chemical vapour deposition technique (CVD), and the thickness of formed amorphous silicon layer 122 for example is 300 dust to 700 dusts, preferably 500 dusts.
Please refer to Fig. 1 G, carry out a crystallization step, so that amorphous silicon layer 122 is transformed into polysilicon layer 122a.In a preferred embodiment, the crystallization step that makes amorphous silicon layer 122 be transformed into polysilicon layer 122a for example is a laser crystallisation step.
At this and since when forming amorphous silicon layer 122 be with silicon seed particle 120a as crystal seed forming, and silicon seed particle 120a can control it and is formed on certain location, therefore after crystallization, the position of crystallization nucleation just can obtain control.
If the present invention is applied in the manufacturing process of low-temperature polysilicon film transistor LCD, then can control positions of silicon crystal seeds, with the position of crystal grain after this crystallization controlization through method of the present invention.Thus, just can reduce the crystal boundary number of being contained in the channel region of thin-film transistor.Simultaneously, can also control the crystal boundary number that channel region contained of each thin-film transistor all in identical scope.
In the above-described embodiments, in the mode of control silicon seed particle position, with the crystal grain position of low-temperature polysilicon film after the crystallization controlization.Yet this kind utilizes the mode of inclination vapour deposition method with control seed particles position, is not can only be used in the manufacture method of low-temperature polysilicon film, and the technology of this kind control seed particles position can also be applied in the manufacture method of other film.
Comprehensive the above, the present invention has following advantage:
1. because method of the present invention can effectively be controlled the position of crystal seed, therefore follow-up when carrying out crystallization step, position that just can the crystallization control nucleation.
2. because method of the present invention can be controlled the position and the size of crystal seed, therefore behind crystallization, the distribution of crystal grain and size also can be comparatively even.
3. because of its crystal grain position of the formed low-temperature polysilicon film of the present invention can effectively be brought under control, so the present invention can control the number of grain boundaries in the channel region of each thin-film transistor, and then improves the electrical and stable of thin-film transistor.
Though the present invention discloses as above with preferred embodiment; so it is not to be used for limiting the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; change and retouching when doing some, so protection scope of the present invention defines and is as the criterion when looking the accompanying Claim book.
Claims (20)
1. the manufacture method of a low-temperature polysilicon film comprises:
On a substrate, form a first metal layer, wherein be formed with a plurality of openings in this first metal layer, expose this substrate;
Carry out an inclination evaporation step, to form one second metal level on this first metal layer, wherein corresponding each those opening part are formed with a micropore in this second metal level;
On this second metal level, form a silicon layer, and form a silicon seed particle on this substrate in each those micropore simultaneously;
Remove this first metal layer and this second metal level;
Utilize this silicon seed particle as crystal seed, carry out a deposition manufacturing process, on this substrate, to form an amorphous silicon layer; And
Carry out a crystallization step, so that this amorphous silicon layer is transformed into a polysilicon layer.
2. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: this inclination evaporation step with respect to horizontal direction angle between 10 the degree to 30 the degree.
3. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: this inclination evaporation step is an electron beam evaporation plating step.
4. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: this first metal layer is the pair of lamina metal-layer structure.
5. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 4 is characterized in that: the material of this second metal level is identical with lower floor's material of this double-level-metal layer structure.
6. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 5 is characterized in that: the material of the lower floor of this second metal level and this double-level-metal layer structure is an aluminium.
7. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 6 is characterized in that: the method that removes this first metal layer and this second metal level is to utilize phosphoric acid that it is divested.
8. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: the method that forms this silicon seed particle on this substrate in each those micropore is to utilize an electron beam evaporation plating method.
9. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: each those silicon seed particle grain size is between 0.5 micron to 1.0 microns.
10. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: this crystallization step is a laser crystallisation step.
11. the manufacture method of low temperature polycrystalline silicon film as claimed in claim 1 is characterized in that: the method that forms this amorphous silicon layer is a chemical vapour deposition technique.
12. a method of controlling the crystal seed position comprises:
On a substrate, form a first metal layer, wherein be formed with a plurality of openings in this first metal layer, expose this substrate;
Carry out an inclination evaporation step, to form one second metal level on this first metal layer, wherein corresponding those opening parts are formed with a plurality of micropores in this second metal level;
On this second metal level, form a crystal seed layer, and form a seed particles on this substrate in each those micropore simultaneously; And
Remove this first metal and this second metal level.
13. the method for control crystal seed as claimed in claim 12 position is characterized in that: this inclination evaporation step with respect to horizontal direction angle between 10 the degree to 30 the degree.
14. the method for control crystal seed as claimed in claim 12 position is characterized in that: this inclination evaporation step is an electron beam evaporation plating step.
15. the method for control crystal seed as claimed in claim 12 position is characterized in that: this first metal layer is the pair of lamina metal-layer structure.
16. the method for control crystal seed as claimed in claim 15 position is characterized in that: the material of this second metal level is identical with lower floor's material of this double-level-metal layer structure.
17. the method for control crystal seed as claimed in claim 16 position is characterized in that: the material of the lower floor of this second metal level and this double-level-metal layer structure is an aluminium.
18. the method for control crystal seed as claimed in claim 17 position is characterized in that: the method that removes this first metal layer and this second metal level is to utilize phosphoric acid that it is divested.
19. the method for control crystal seed as claimed in claim 12 position is characterized in that: the method that forms this silicon seed particle on this substrate in each those micropore is to utilize an electron beam evaporation plating method.
20. the method for control crystal seed as claimed in claim 12 position is characterized in that: the size particle diameter of each those seed particles is between 0.5 micron to 1.0 microns.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031094104A CN100349259C (en) | 2003-04-07 | 2003-04-07 | Method for making low-temp. polycrstalline silicon film |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB031094104A CN100349259C (en) | 2003-04-07 | 2003-04-07 | Method for making low-temp. polycrstalline silicon film |
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| CN1536619A CN1536619A (en) | 2004-10-13 |
| CN100349259C true CN100349259C (en) | 2007-11-14 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009082840A1 (en) * | 2007-12-27 | 2009-07-09 | Applied Materials, Inc. | Method for forming a polysilicon film |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101437924B1 (en) * | 2010-01-22 | 2014-09-11 | 한국생명공학연구원 | Lithography method using tilted evaporation |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4256816A (en) * | 1977-10-13 | 1981-03-17 | Bell Telephone Laboratories, Incorporated | Mask structure for depositing patterned thin films |
| US4448797A (en) * | 1981-02-04 | 1984-05-15 | Xerox Corporation | Masking techniques in chemical vapor deposition |
| JPH02298022A (en) * | 1989-05-12 | 1990-12-10 | Nec Corp | Formation of soi layer |
| US5447117A (en) * | 1987-08-08 | 1995-09-05 | Canon Kabushiki Kaisha | Crystal article, method for producing the same and semiconductor device utilizing the same |
| TW480734B (en) * | 2001-04-23 | 2002-03-21 | United Microelectronics Corp | Method for producing thin film transistor (TFT) with transversal polysilicon |
| CN1407603A (en) * | 2001-08-25 | 2003-04-02 | 日立电线株式会社 | Crystal silicon film semiconductor device and its manufacture, and photoelectric device |
-
2003
- 2003-04-07 CN CNB031094104A patent/CN100349259C/en not_active Expired - Lifetime
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4256816A (en) * | 1977-10-13 | 1981-03-17 | Bell Telephone Laboratories, Incorporated | Mask structure for depositing patterned thin films |
| US4448797A (en) * | 1981-02-04 | 1984-05-15 | Xerox Corporation | Masking techniques in chemical vapor deposition |
| US5447117A (en) * | 1987-08-08 | 1995-09-05 | Canon Kabushiki Kaisha | Crystal article, method for producing the same and semiconductor device utilizing the same |
| JPH02298022A (en) * | 1989-05-12 | 1990-12-10 | Nec Corp | Formation of soi layer |
| TW480734B (en) * | 2001-04-23 | 2002-03-21 | United Microelectronics Corp | Method for producing thin film transistor (TFT) with transversal polysilicon |
| CN1407603A (en) * | 2001-08-25 | 2003-04-02 | 日立电线株式会社 | Crystal silicon film semiconductor device and its manufacture, and photoelectric device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009082840A1 (en) * | 2007-12-27 | 2009-07-09 | Applied Materials, Inc. | Method for forming a polysilicon film |
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| CN1536619A (en) | 2004-10-13 |
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