CN100346578C - Realizing method of space hour continuous phase modulating coder - Google Patents

Abstract

The present invention relates to a method for realizing a space-time continuous phase modulation encoder. The method proposes the synthetic optimization design of space-time encoding (STTC), antenna diversity and continuous phase modulation (CPM) for the first time. Compared with an optimum code of space-time STTC, the method has excellent error correction capability by analyzing the performance of an optimum code of space-time continuous phase modulation (STCPM). The method for realizing an optimum code of space-time continuous phase modulation can reduce transmitting power, improve receiving performance, enhance frequency spectrum utilization rate and largely reduce the code error rate in practical communication environment. On average, compared with a traditional space-time optimum code, the optimum codes of continuous phase modulation proposed by the present invention have the encoding gains of 2dB to 8dB. The method for realizing a space-time continuous phase modulation encoder of the present invention is especially suitable for mobile communication environment, and can also be applied to a satellite communication system and an underwater communication system.

Description

The implementation method of Continuous Phase Modulation encoder when empty

Technical field

The present invention relates to a kind of implementation method of channel encoder, exactly, relate to a kind of implementation method of Continuous Phase Modulation encoder when channel coding technology, diversity antenna technology and Continuous Phase Modulation are carried out complex optimum empty, belong to the channel coding technology field of digital communication.

Background technology

In recent years, Space Time Coding (STTC) becomes the research focus of theoretical circles.People such as V.Tarokh have creatively proposed the Space Time Coding design criterion, have introduced paired error probability (PWEP) and two optimization criterions: order criterion and determinant criterion, and hand-designed has provided some simple STTC coded formats.Because the encoder in the V.Tarokh original papers is a hand-designed, can not guarantee it is optimum code, therefore numerous scholars are carrying out useful exploration aspect optimum STTC code Design and the theoretical performance analysis.

At present, Space Time Coding research main flow still concentrates on the direction of chnnel coding and many antennas linear modulation combined optimization.Except well-known linear modulation method, permanent envelope non-linear modulation method-Continuous Phase Modulation (CPM) that propose the beginning of the eighties also is a kind of modulating mode of performance brilliance.Because CPM has than the more characteristics of signals parameter of linear modulation, it is contemplated that, by complex optimum coding and modulation format, very likely obtain than the better coded modulation scheme of linear modulation mode (STTC).

The design of STTC coding differs widely with the design of traditional chnnel coding, need to consider to be optimized in complex space, and Continuous Phase Modulation STCPM coding makes optimized design difficult more owing to introduced non-linear modulation when empty.According to the argumentation of J.L.Massey, complex optimum convolutional encoding and CPM modulate to regard as and design channel encoder on integer items.The Continuous Phase Modulation encoder just becomes the focus of people's concern in the industry when therefore, how to realize sky.

Summary of the invention

The purpose of this invention is to provide a kind of implementation method of Continuous Phase Modulation encoder when empty, the implementation method of Continuous Phase Modulation (STCPM) optimum code can reduce transmitting power, improves receptivity, improves the availability of frequency spectrum, reduce the error rate greatly when adopting these skies in the practical communication environment.

The object of the present invention is achieved like this: a kind of implementation method of Continuous Phase Modulation encoder when empty, and this encoder is made of Space Time Coding device, continuous phase encoder, two diverter switches, a plurality of memoryless modulator and a plurality of transmitting antennas; If the encoder list entries is { x (k) }, k=1,2 .... be time mark, this sequence is the binary message bit sequence; It is characterized in that: described Space Time Coding device links to each other by first diverter switch in proper order with the continuous phase encoder, and does not have feedback arrangement, and this sky time-code device has L _t(v+1) individual tap coefficient is expressed as generator matrix $G=\left[\begin{array}{ccc}{g}_{11}& \&CenterDot;\&CenterDot;\&CenterDot;& {\mathrm{<figure-callout\; id="1"\; label="g"\; filenames="C20041000033500301.png,C20041000033500331.png"\; state="\{\{state\}\}">g</figure-callout>}}_{1,(v+1)}\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ {\mathrm{<figure-callout\; id="1"\; label="g\; L\; t"\; filenames="C20041000033500301.png,C20041000033500331.png"\; state="\{\{state\}\}">g</figure-callout>}}_{L_t}& \&CenterDot;\&CenterDot;\&CenterDot;& g_{L_t,(v+1)}\end{array}\right],$ L represents continuous phase encoder delay unit number in the formula; This implementation method comprises the steps: at least

(1) above-mentioned list entries { x (k) } is sent into encoder in regular turn under clock signal drives;

(2) input signal is at first sent into the Space Time Coding device, and the Space Time Coding device is by L _tThe road constitutes, and each road comprises v delay unit, and comprises v+1 modular two multiplier, a v modulo 2 adder at most, clock cycle T of each delay unit time-delay, described L _tThe number of expression transmitting antenna, v represents the number of Space Time Coding device delay unit;

(3) list entries of sending into the Space Time Coding device first via is divided into two-way: the one tunnel sends into first delay unit (131), and first modular two multiplier (111) and Space Time Coding device tap coefficient g are sent in another road ₁₁Carrying out mould 2 multiplies each other; The output of first delay unit (131) is divided into two-way again: the one tunnel sends into second delay unit (132), and second modular two multiplier (112) and Space Time Coding device tap coefficient g are sent in another road ₁₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (121) and carries out exclusive-OR with the output of modular two multiplier (111); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (122) ₁(k);

(4) list entries of sending into Space Time Coding device the second tunnel also is divided into two-way: the one tunnel sends into first delay unit (134), and first modular two multiplier (115) and Space Time Coding device tap coefficient g are sent in another road ₂₁Carrying out mould 2 multiplies each other; The output of first delay unit (134) is divided into two-way again: the one tunnel sends into second delay unit (135), and second modular two multiplier (116) and Space Time Coding device tap coefficient g are sent in another road ₂₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (123) and carries out exclusive-OR with the output of modular two multiplier (115); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (124) ₂(k);

(5) for all the other each roads of Space Time Coding device, repeat the operating process of above-mentioned steps (3), (4); Send into last road of Space Time Coding device, i.e. L _tThe list entries on road also is divided into two-way: the one tunnel sends into first delay unit (137), and first modular two multiplier (119) and Space Time Coding device tap coefficient g are sent in another road _{Lt, 1}Carrying out mould 2 multiplies each other; The output of first delay unit (137) is divided into two-way again: the one tunnel sends into second delay unit (138), and second modular two multiplier (1110) and Space Time Coding tap coefficient g are sent in another road _{Lt, 2}Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (125) and carries out exclusive-OR with the output of modular two multiplier (119); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (126) _Lt(k);

(6) L of Space Time Coding device _tRoad output sequence y ₁(k), y ₂(k) ..., y _Lt(k) through first diverter switch, be converted to one tunnel serial sequence from the multidiameter delay sequence, send into the continuous phase encoder successively, the continuous phase encoder is made of L delay unit and a modulo 2 adder, clock cycle T of each delay unit time-delay;

(7) list entries of continuous phase encoder is divided into two-way, and one the tunnel is direct output sequence Z ₁(k), another road is divided into two-way output again through first delay unit (1310), and one the tunnel is direct output sequence Z ₂(k), the next stage delay unit is sent on another road; The rest may be inferred, and the output of L-1 delay unit (1312) also is divided into two-way, and one the tunnel is direct output sequence Z _L(k), the output sequence that modulo 2 adder (127) and L delay unit (1313) are sent in another road carries out exclusive-OR, the gained result sends into L delay unit (1313), and the output of L delay unit (1313) also is divided into two-way, and one the tunnel is direct output sequence Z _L+1(k), another road feeds back to modulo 2 adder (127);

(8) L+1 of continuous phase encoder and line output Z ₁(k), Z ₂(k) ..., Z _L+1(k) send into second diverter switch and L respectively _tIndividual identical memoryless modulator links to each other;

(9) table look-up according to the combined sequence of input in each memoryless modulator (141)～(143), need to determine the continuous phase modulated signal of transmission, and pass through each self-corresponding antenna transmission in channel, so finished all operations that does not have feedback Continuous Phase Modulation encoder.

Purpose of the present invention also can be achieved in that a kind of implementation method of Continuous Phase Modulation encoder when empty, and this encoder is made of Space Time Coding device, continuous phase encoder, two diverter switches, a plurality of memoryless modulator and a plurality of transmitting antennas; If the encoder list entries is { x (k) }, k=1,2 .... be time mark, this sequence is the binary message bit sequence; It is characterized in that: described Space Time Coding device links to each other by first diverter switch in proper order with the continuous phase encoder, and Continuous Phase Modulation encoder when being provided with feedback arrangement between the two and forming this sky; This Space Time Coding device has L _t(v+1) individual tap coefficient, this continuous phase encoder has L _tL feedback tap coefficient, its generator matrix is expressed as

This implementation method comprises the steps: at least

(1) above-mentioned list entries { x (k) } is sent into encoder in regular turn under clock signal drives;

(2) input signal is at first sent into the Space Time Coding device, and the Space Time Coding device is by L _tThe road constitutes, and each road comprises v delay unit, and comprises v+1 modular two multiplier and v modulo 2 adder at most, clock cycle T of each delay unit time-delay, described L _tThe number of expression transmitting antenna, v represents the number of Space Time Coding device delay unit;

(3) list entries of sending into the Space Time Coding device first via is divided into two-way: the one tunnel sends into first delay unit (231), and first modular two multiplier (211) and Space Time Coding device tap coefficient g are sent in another road ₁₁Carrying out mould 2 multiplies each other; The output of first delay unit (231) is divided into two-way again: the one tunnel sends into second delay unit (232), and second modular two multiplier (212) and Space Time Coding tap coefficient g are sent in another road ₁₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (221) and carries out exclusive-OR with the output of modular two multiplier (211); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (222) and continuous phase encoder first via feedback sequence u ₁(k) carry out obtaining exporting y as a result behind the exclusive-OR ₁(k);

(4) list entries of sending into Space Time Coding device the second tunnel also is divided into two-way: the one tunnel sends into first delay unit (234), and first modular two multiplier (215) and Space Time Coding device tap coefficient g are sent in another road ₂₁Carrying out mould 2 multiplies each other; The output of first delay unit (234) is divided into two-way again: the one tunnel sends into second delay unit (235), and second modular two multiplier (216) and Space Time Coding tap coefficient g are sent in another road ₂₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (223) and carries out exclusive-OR with the output of modular two multiplier (215); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (224) and continuous phase encoder first via feedback sequence u ₂(k) carry out obtaining exporting y as a result behind the exclusive-OR ₂(k);

(5) for all the other each roads of Space Time Coding device, repeat the operating process of above-mentioned steps (3), (4); Send into last road of Space Time Coding device, i.e. L _tThe list entries on road also is divided into two-way: the one tunnel sends into first delay unit (237), and first modular two multiplier (219) and Space Time Coding device tap coefficient g are sent in another road _{Lt, 1}Carrying out mould 2 multiplies each other; The output of first delay unit (237) is divided into two-way again: the one tunnel sends into second delay unit (238), and second modular two multiplier (2110) and Space Time Coding tap coefficient g are sent in another road _{Lt, 2}Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (225) and carries out exclusive-OR with the output of modular two multiplier (219); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (226) and continuous phase encoder first via feedback sequence u _Lt(k) carry out obtaining exporting y as a result behind the exclusive-OR _Lt(k);

(6) L of Space Time Coding device _tRoad output sequence y ₁(k), y ₂(k) ..., y _Lt(k) through first diverter switch, be converted to one tunnel serial sequence from the multidiameter delay sequence, send into the continuous phase encoder successively, the continuous phase encoder comprises L delay unit and a modulo 2 adder, clock cycle T of each delay unit time-delay, and comprise LL at most _t Individual modulo 2 adder, (L+1) L _tIndividual modular two multiplier;

(7) to be divided into 2 the tunnel, the one tunnel be direct output sequence Z to the list entries of continuous phase encoder ₁(k), first delay unit (2310) is sent on another road;

(8) output of first delay unit (2310) is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z ₂(k), the next stage delay unit is sent on another road, other L _tIndividual branch road all feeds back to the Space Time Coding device, and wherein the 1st branch road feeds back to modular two multiplier (2113), with the feedback tap coefficient f of continuous phase encoder ₁₁Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (227) and modulo 2 adder (228) output carries out exclusive-OR, the 1 road feedback sequence u that obtains ₁(k), send into the modulo 2 adder (222) of Space Time Coding device, the 2nd branch road feeds back to modular two multiplier (2117), with the feedback tap coefficient f of continuous phase encoder ₂₁Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2210) and modulo 2 adder (2211) output carries out exclusive-OR, the 2 road feedback sequence u that obtains ₂(k), send into the modulo 2 adder (224) of Space Time Coding device; The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2221), with the feedback tap coefficient f of continuous phase encoder _{Lt, 1}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2213) and modulo 2 adder (2214) output carries out exclusive-OR, the L that obtains _tRoad feedback sequence u _Lt(k), send into the modulo 2 adder (226) of Space Time Coding device;

(9) the rest may be inferred, and the output of L-1 delay unit (2312) also is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z _L(k), the output sequence that modulo 2 adder (2216) and L delay unit (2313) are sent in another road carries out exclusive-OR, and the result of gained sends into L delay unit (2313), other L _tIndividual branch road all is a feedback branch, and wherein the 1st branch road feeds back to modular two multiplier (2115), with the feedback tap coefficient f of continuous phase encoder _{1, (L-1)}Carrying out mould 2 multiplies each other, the result that the gained result sends into modulo 2 adder (229) and modular two multiplier (2116) output carries out exclusive-OR, send into the modulo 2 adder (2117) of previous stage, the 2nd branch road feeds back to modular two multiplier (2219), with the feedback tap coefficient f of continuous phase encoder _{2, (L-1)}Carry out mould 2 and multiply each other, the result that the result of gained sends into modulo 2 adder (2212) and modular two multiplier (2220) output carries out exclusive-OR, sends into the modulo 2 adder (2118) of previous stage; The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2223), with the feedback tap coefficient f of continuous phase encoder _{Lt, (L-1)}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2215) and modular two multiplier (2224) output carries out exclusive-OR, sends into the modulo 2 adder (2119) of previous stage;

(10) last, the output of L delay unit (2313) also is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z _L+1(k), another road feeds back to modulo 2 adder (2216), other L _tIndividual branch road also all is a feedback branch, and wherein the 1st branch road is input to modular two multiplier (2116), with the feedback tap coefficient f of continuous phase encoder _{1, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (229), and the 2nd branch road feeds back to modular two multiplier (2220), with the feedback tap coefficient f of continuous phase encoder _{2, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (2212); The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2224), with the feedback tap coefficient f of continuous phase encoder _{Lt, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (2215);

(11) L+1 of continuous phase encoder and line output Z ₁(k), Z ₂(k) ..., Z _L+1(k) respectively by second diverter switch and L _tIndividual identical memoryless modulator links to each other;

(12) each memoryless modulator (241)～(243) is according to the combined sequence Z of input ₁(k), Z ₂(k) ..., Z _L+1(k) table look-up, need to determine the continuous phase modulated signal of transmission, and pass through each self-corresponding antenna transmission in channel, so finished all operations of feedback Continuous Phase Modulation encoder.

The present invention has proposed the Synthetical Optimization method of Space Time Coding (STTC), antenna diversity and Continuous Phase Modulation (CPM) first.This method is the performance of Continuous Phase Modulation (STCPM) optimum code when analyzing sky, find that its optimum code with Space Time Coding (STTC) compares, have excellent more error correcting capability, Continuous Phase Modulation (STCPM) sign indicating number can reduce transmitting power, improves receptivity, improves the availability of frequency spectrum, greatly reduce the error rate when adopting these skies in the practical communication environment.On average, compare with traditional Space Time Coding optimum code, the Continuous Phase Modulation optimum code has the coding gain of 2dB～8dB during these skies that the inventive method proposes, is very suitable for mobile communication environment and satellite communication system.Therefore, the inventive method realizes when empty, and the Continuous Phase Modulation encoder can be applied to wireless communication system, also can be applied to satellite communication system, underwater communications system etc.

Description of drawings

Fig. 1 is that the circuit of the present invention's Continuous Phase Modulation encoder when not having feedback arrangement empty is formed schematic diagram.

The circuit of Continuous Phase Modulation encoder was formed schematic diagram when Fig. 2 was the present invention by feedback arrangement empty.

Fig. 3 is two antenna receiving-sendings, have feedback arrangement, q (t) is L=2 for square wave function, continuous phase encoder memory span, total coder state number be 16 empty the time Continuous Phase Modulation encoder and the STTC optimum code of equal state number frame error rate performance comparison schematic diagram.

Fig. 4 is two antenna receiving-sendings, have feedback arrangement, q (t) is L=2 for square wave function, continuous phase encoder memory span, total coder state number be 32 empty the time Continuous Phase Modulation encoder and the STTC optimum code of equal state number frame error rate performance comparison schematic diagram.

Embodiment

The present invention has studied the circuit structure of Continuous Phase Modulation encoder when not having feedback arrangement and having two kinds of feedback arrangement empty respectively, and has provided the encoder matrix of the optimum code under these two kinds of structures respectively.By Computer Simulation, verified the excellent performance of STCPM sign indicating number, compare with traditional STTC sign indicating number, the coding gain of 2dB～8dB is arranged.

Referring to Fig. 1, introduce the not circuit structure of Continuous Phase Modulation encoder during feedback empty of the present invention, this encoder is made of Space Time Coding device, continuous phase encoder, two diverter switches, a plurality of memoryless modulator and a plurality of transmitting antennas; If the encoder list entries is { x (k) }, k=1,2 .... be time mark, this sequence is the binary message bit sequence; The Space Time Coding device links to each other by first diverter switch in proper order with the continuous phase encoder, and does not have feedback arrangement between the two, and this sky time-code device has L _t(v+1) individual tap coefficient is expressed as generator matrix $G=\left[\begin{array}{ccc}{g}_{11}& \&CenterDot;\&CenterDot;\&CenterDot;& {\mathrm{<figure-callout\; id="1"\; label="g"\; filenames="C20041000033500301.png,C20041000033500331.png"\; state="\{\{state\}\}">g</figure-callout>}}_{1,(v+1)}\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ {\mathrm{<figure-callout\; id="1"\; label="g\; L\; t"\; filenames="C20041000033500301.png,C20041000033500331.png"\; state="\{\{state\}\}">g</figure-callout>}}_{L_t}& \&CenterDot;\&CenterDot;\&CenterDot;& g_{L_t,(v+1)}\end{array}\right],$ L represents continuous phase encoder delay unit number in the formula.The implementation method of Continuous Phase Modulation encoder comprises the steps: at least during this sky

(1) above-mentioned list entries { x (k) } is sent into encoder in regular turn under clock signal drives;

(2) input signal is at first sent into the Space Time Coding device, and the Space Time Coding device is by L _tThe road constitutes, and each road comprises v delay unit, and comprises v+1 modular two multiplier, a v modulo 2 adder at most, clock cycle T of each delay unit time-delay, described L _tThe number of expression transmitting antenna, v represents the number of Space Time Coding device delay unit;

(3) list entries of sending into the Space Time Coding device first via is divided into two-way: the one tunnel sends into first delay unit (131), and first modular two multiplier (111) and Space Time Coding device tap coefficient g are sent in another road ₁₁Carrying out mould 2 multiplies each other; The output of first delay unit (131) is divided into two-way again: the one tunnel sends into second delay unit (132), and second modular two multiplier (112) and Space Time Coding device tap coefficient g are sent in another road ₁₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (121) and carries out exclusive-OR with the output of modular two multiplier (111); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (122) ₁(k);

(4) list entries of sending into Space Time Coding device the second tunnel also is divided into two-way: the one tunnel sends into first delay unit (134), and first modular two multiplier (115) and Space Time Coding device tap coefficient g are sent in another road ₂₁Carrying out mould 2 multiplies each other; The output of first delay unit (134) is divided into two-way again: the one tunnel sends into second delay unit (135), and second modular two multiplier (116) and Space Time Coding device tap coefficient g are sent in another road ₂₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (123) and carries out exclusive-OR with the output of modular two multiplier (115); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (124) ₂(k);

(5) for all the other each roads of Space Time Coding device, repeat the operating process of above-mentioned steps (3), (4); Send into last road of Space Time Coding device, i.e. L _tThe list entries on road also is divided into two-way: the one tunnel sends into first delay unit (137), and first modular two multiplier (119) and Space Time Coding device tap coefficient g are sent in another road _{Lt, 1}Carrying out mould 2 multiplies each other; The output of first delay unit (137) is divided into two-way again: the one tunnel sends into second delay unit (138), and second modular two multiplier (1110) and Space Time Coding tap coefficient g are sent in another road _{Lt, 2}Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (125) and carries out exclusive-OR with the output of modular two multiplier (119); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (126) _Lt(k);

(6) L of Space Time Coding device _tRoad output sequence y ₁(k), y ₂(k) ..., y _Lt(k) through first diverter switch, be converted to one tunnel serial sequence from the multidiameter delay sequence, send into the continuous phase encoder successively, the continuous phase encoder is made of L delay unit and a modulo 2 adder, clock cycle T of each delay unit time-delay;

(7) list entries of continuous phase encoder is divided into two-way, and one the tunnel is direct output sequence Z ₁(k), another road is divided into two-way output again through first delay unit (1310), and one the tunnel is direct output sequence Z ₂(k), the next stage delay unit is sent on another road; The rest may be inferred, and the output of L-1 delay unit (1312) also is divided into two-way, and one the tunnel is direct output sequence Z _L(k), the output sequence that modulo 2 adder (127) and L delay unit (1313) are sent in another road carries out exclusive-OR, the gained result sends into L delay unit (1313), and the output of L delay unit (1313) also is divided into two-way, and one the tunnel is direct output sequence Z _L+1(k), another road feeds back to modulo 2 adder (127);

(8) L+1 of continuous phase encoder and line output Z ₁(k), Z ₁(k) ..., Z _L+1(k) send into second diverter switch and L respectively _tIndividual identical memoryless modulator links to each other;

(9) table look-up according to the combined sequence of input in each memoryless modulator (141)～(143), need to determine the continuous phase modulated signal of transmission, and pass through each self-corresponding antenna transmission in channel, so finished all operations that does not have feedback Continuous Phase Modulation encoder.

Referring to Fig. 2, the circuit structure of Continuous Phase Modulation encoder when introducing the present invention and having feedback empty, this encoder is made of Space Time Coding device, continuous phase encoder, two diverter switches, a plurality of memoryless modulator and a plurality of transmitting antennas; If the encoder list entries is { x (k) }, k=1,2 .... be time mark, this sequence is the binary message bit sequence; Wherein the Space Time Coding device links to each other by first diverter switch in proper order with the continuous phase encoder, and Continuous Phase Modulation encoder when being provided with feedback arrangement between the two and forming this sky; This Space Time Coding device has L _t(v+1) individual tap coefficient, this continuous phase encoder has L _tL feedback tap coefficient, its generator matrix is expressed as

Continuous Phase Modulation encoder implementation method comprises the steps: at least during this sky

(1) above-mentioned list entries { x (k) } is sent into encoder in regular turn under clock signal drives;

(2) input signal is at first sent into the Space Time Coding device, and the Space Time Coding device is by L _tThe road constitutes, and each road comprises v delay unit, and comprises v+1 modular two multiplier and v modulo 2 adder at most, clock cycle T of each delay unit time-delay, described L _tThe number of expression transmitting antenna, v represents the number of Space Time Coding device delay unit;

(3) list entries of sending into the Space Time Coding device first via is divided into two-way: the one tunnel sends into first delay unit (231), and first modular two multiplier (211) and Space Time Coding device tap coefficient g are sent in another road ₁₁Carrying out mould 2 multiplies each other; The output of first delay unit (231) is divided into two-way again: the one tunnel sends into second delay unit (232), and second modular two multiplier (212) and Space Time Coding tap coefficient g are sent in another road ₁₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (221) and carries out exclusive-OR with the output of modular two multiplier (211); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (222) and continuous phase encoder first via feedback sequence u ₁(k) carry out obtaining exporting y as a result behind the exclusive-OR ₁(k);

(4) list entries of sending into Space Time Coding device the second tunnel also is divided into two-way: the one tunnel sends into first delay unit (234), and first modular two multiplier (215) and Space Time Coding device tap coefficient g are sent in another road ₂₁Carrying out mould 2 multiplies each other; The output of first delay unit (234) is divided into two-way again: the one tunnel sends into second delay unit (235), and second modular two multiplier (216) and Space Time Coding tap coefficient g are sent in another road ₂₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (223) and carries out exclusive-OR with the output of modular two multiplier (215); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (224) and continuous phase encoder first via feedback sequence u ₂(k) carry out obtaining exporting y as a result behind the exclusive-OR ₂(k);

(5) for all the other each roads of Space Time Coding device, repeat the operating process of above-mentioned steps (3), (4); Send into last road of Space Time Coding device, i.e. L _tThe list entries on road also is divided into two-way: the one tunnel sends into first delay unit (237), and first modular two multiplier (219) and Space Time Coding device tap coefficient g are sent in another road _{Lt, 1}Carrying out mould 2 multiplies each other; The output of first delay unit (237) is divided into two-way again: the one tunnel sends into second delay unit (238), and second modular two multiplier (2110) and Space Time Coding tap coefficient g are sent in another road _{Lt, 2}Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (225) and carries out exclusive-OR with the output of modular two multiplier (219); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (226) and continuous phase encoder first via feedback sequence u _Lt(k) carry out obtaining exporting y as a result behind the exclusive-OR _Lt(k);

(6) L of Space Time Coding device _tRoad output sequence y ₁(k), y ₂(k) ..., y _Lt(k) through first diverter switch, be converted to one tunnel serial sequence from the multidiameter delay sequence, send into the continuous phase encoder successively, the continuous phase encoder comprises L delay unit and a modulo 2 adder, clock cycle T of each delay unit time-delay, and comprise LL at most _t Individual modulo 2 adder, (L+1) L _tIndividual modular two multiplier;

(7) to be divided into 2 the tunnel, the one tunnel be direct output sequence Z to the list entries of continuous phase encoder ₁(k), first delay unit (2310) is sent on another road;

(8) output of first delay unit (2310) is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z ₂(k), the next stage delay unit is sent on another road, other L _tIndividual branch road all feeds back to the Space Time Coding device, and wherein the 1st branch road feeds back to modular two multiplier (2113), with the feedback tap coefficient f of continuous phase encoder ₁₁Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (227) and modulo 2 adder (228) output carries out exclusive-OR, the 1 road feedback sequence u that obtains ₁(k), send into the modulo 2 adder (222) of Space Time Coding device, the 2nd branch road feeds back to modular two multiplier (2117), with the feedback tap coefficient f of continuous phase encoder ₂₁Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2210) and modulo 2 adder (2211) output carries out exclusive-OR, the 2 road feedback sequence u that obtains ₂(k), send into the modulo 2 adder (224) of Space Time Coding device; The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2221), with the feedback tap coefficient f of continuous phase encoder _{Lt, 1}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2213) and modulo 2 adder (2214) output carries out exclusive-OR, the L that obtains _tRoad feedback sequence u _Lt(k), send into the modulo 2 adder (226) of Space Time Coding device;

(9) the rest may be inferred, and the output of L-1 delay unit (2312) also is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z _L(k), the output sequence that modulo 2 adder (2216) and L delay unit (2313) are sent in another road carries out exclusive-OR, and the result of gained sends into L delay unit (2313), other L _tIndividual branch road all is a feedback branch, and wherein the 1st branch road feeds back to modular two multiplier (2115), with the feedback tap coefficient f of continuous phase encoder _{1, (L-1)}Carrying out mould 2 multiplies each other, the result that the gained result sends into modulo 2 adder (229) and modular two multiplier (2116) output carries out exclusive-OR, send into the modulo 2 adder (2117) of previous stage, the 2nd branch road feeds back to modular two multiplier (2219), with the feedback tap coefficient f of continuous phase encoder _{2, (L-1)}Carry out mould 2 and multiply each other, the result that the result of gained sends into modulo 2 adder (2212) and modular two multiplier (2220) output carries out exclusive-OR, sends into the modulo 2 adder (2118) of previous stage; The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2223), with the feedback tap coefficient f of continuous phase encoder _{Lt, (L-1)}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2215) and modular two multiplier (2224) output carries out exclusive-OR, sends into the modulo 2 adder (2119) of previous stage;

(10) last, the output of L delay unit (2313) also is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z _L+1(k), another road feeds back to modulo 2 adder (2216), other L _tIndividual branch road also all is a feedback branch, and wherein the 1st branch road is input to modular two multiplier (2116), with the feedback tap coefficient f of continuous phase encoder _{1, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (229), and the 2nd branch road feeds back to modular two multiplier (2220), with the feedback tap coefficient f of continuous phase encoder _{2, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (2212); The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2224), with the feedback tap coefficient f of continuous phase encoder _{Lt, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (2215);

(11) L+1 of continuous phase encoder and line output Z ₁(k), Z ₂(k) ..., Z _L+1(k) respectively by second diverter switch and L _tIndividual identical memoryless modulator links to each other;

(12) each memoryless modulator (241)～(243) is according to the combined sequence Z of input ₁(k), Z ₂(k) ..., Z _L+1(k) table look-up, need to determine the continuous phase modulated signal of transmission, and pass through each self-corresponding antenna transmission in channel, so finished all operations of feedback Continuous Phase Modulation encoder.

The present invention has passed through the excellent properties of simulating, verifying STCPM sign indicating number.Simulated conditions is frame length N _f=130 information bits, channel is quasistatic decline (Block Fading) channel, the optimum STCPM sign indicating number that has feedback arrangement with two antenna square wave function is an example, emulation two kinds of sign indicating numbers of 16 states, 32 states adopt 2 the 2 frame error rate characteristics of receiving systems, and carried out performance relatively with the STTC sign indicating number of equal state.Wherein the generator matrix of 16 state STCPM sign indicating numbers is $G=\left[\begin{array}{c}11101\\ 01100\end{array}\right],$ The generator matrix of 32 state STCPM sign indicating numbers is $\text{G=}\left[\begin{array}{c}110101\\ 011100\end{array}\right].$ The performance curve that Fig. 3 and Fig. 4 have provided two kinds of sign indicating numbers respectively compares schematic diagram.

In Fig. 3, three kinds of optimum STTC sign indicating numbers are Grimm sign indicating number, HG sign indicating number and YB sign indicating number, and their threes' frame error rate curve is very approaching, after signal to noise ratio is greater than 6dB, compares with these three kinds of sign indicating numbers, and 16 state optimization STCPM sign indicating numbers of the present invention have more performance.At FER=10 ^-3The place, STCPM the coding gain that obtains 2dB than STTC more.Simulation result by Fig. 4 also can obtain the similar conclusion with Fig. 3, by more as can be known, compares with the STTC sign indicating number, and the STCPM sign indicating number is about 2dB at the coding gain at FER=0.005 place.

Claims (15)

1, a kind of implementation method of Continuous Phase Modulation encoder when empty, this encoder is made of Space Time Coding device, continuous phase encoder, two diverter switches, a plurality of memoryless modulator and a plurality of transmitting antennas; If the encoder list entries is { x (k) }, k=1,2 .... be time mark, this sequence is the binary message bit sequence; It is characterized in that: described Space Time Coding device links to each other by first diverter switch in proper order with the continuous phase encoder, and does not have feedback arrangement, and this sky time-code device has L _t(v+1) individual tap coefficient is expressed as generator matrix $G=\left[\begin{array}{ccc}{g}_{11}& \&CenterDot;\&CenterDot;\&CenterDot;& g_{1,(v+1)}\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ \&CenterDot;& \&CenterDot;& \&CenterDot;\\ g_{L_{t}1}& \&CenterDot;\&CenterDot;\&CenterDot;& g_{L_t,(v+1)}\end{array}\right],$ L represents continuous phase encoder delay unit number in the formula; This implementation method comprises the steps: at least

(1) above-mentioned list entries { x (k) } is sent into encoder in regular turn under clock signal drives;

(2) input signal is at first sent into the Space Time Coding device, and the Space Time Coding device is by L _tThe road constitutes, and each road comprises v delay unit, and comprises v+1 modular two multiplier, a v modulo 2 adder at most, clock cycle T of each delay unit time-delay; Described L _tThe number of expression transmitting antenna, v represents the number of Space Time Coding device delay unit;

(3) list entries of sending into the Space Time Coding device first via is divided into two-way: the one tunnel sends into first delay unit (131), and first modular two multiplier (111) and Space Time Coding device tap coefficient g are sent in another road ₁₁Carrying out mould 2 multiplies each other; The output of first delay unit (131) is divided into two-way again: the one tunnel sends into second delay unit (132), and second modular two multiplier (112) and Space Time Coding device tap coefficient g are sent in another road ₁₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (121) and carries out exclusive-OR with the output of modular two multiplier (111); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (122) ₁(k);

(4) list entries of sending into Space Time Coding device the second tunnel also is divided into two-way: the one tunnel sends into first delay unit (134), and first modular two multiplier (115) and Space Time Coding device tap coefficient g are sent in another road ₂₁Carrying out mould 2 multiplies each other; The output of first delay unit (134) is divided into two-way again: the one tunnel sends into second delay unit (135), and second modular two multiplier (116) and Space Time Coding device tap coefficient g are sent in another road ₂₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (123) and carries out exclusive-OR with the output of modular two multiplier (115); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (124) ₂(k);

(5) for all the other each roads of Space Time Coding device, repeat the operating process of above-mentioned steps (3), (4); Send into last road of Space Time Coding device, i.e. L _tThe list entries on road also is divided into two-way: the one tunnel sends into first delay unit (137), and first modular two multiplier (119) and Space Time Coding device tap coefficient g are sent in another road _{Lt, 1}Carrying out mould 2 multiplies each other; The output of first delay unit (137) is divided into two-way again: the one tunnel sends into second delay unit (138), and second modular two multiplier (1110) and Space Time Coding tap coefficient g are sent in another road _{Lt, 2}Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (125) and carries out exclusive-OR with the output of modular two multiplier (119); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, exports y as a result up to modulo 2 adder (126) _Lt(k);

(6) L of Space Time Coding device _tRoad output sequence y ₁(k), y ₂(k) ..., y _Lt(k) through first diverter switch, be converted to one tunnel serial sequence from the multidiameter delay sequence, send into the continuous phase encoder successively, this continuous phase encoder is made of L delay unit and a modulo 2 adder, clock cycle T of each delay unit time-delay;

(7) list entries of continuous phase encoder is divided into two-way, and one the tunnel is direct output sequence Z ₁(k), another road is divided into two-way output again through first delay unit (1310), and one the tunnel is direct output sequence Z ₂(k), the next stage delay unit is sent on another road; The rest may be inferred, and the output of L-1 delay unit (1312) also is divided into two-way, and one the tunnel is direct output sequence Z _L(k), the output sequence that modulo 2 adder (127) and L delay unit (1313) are sent in another road carries out exclusive-OR, the gained result sends into L delay unit (1313), and the output of L delay unit (1313) also is divided into two-way, and one the tunnel is direct output sequence Z _L+1(k), another road feeds back to modulo 2 adder (127);

(8) L+1 of continuous phase encoder and line output Z ₁(k), Z ₂(k) ..., Z _L+1(k) send into second diverter switch and L respectively _tIndividual identical memoryless modulator links to each other;

(9) table look-up according to the combined sequence of input in each memoryless modulator (141)～(143), need to determine the continuous phase modulated signal of transmission, and pass through each self-corresponding antenna transmission in channel, so finished all operations that does not have feedback Continuous Phase Modulation encoder.

2, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1, it is characterized in that: described memoryless modulator is expressed as: exp (j ψ (τ+kT, Z ₁(k), Z ₂(k) ..., Z _L+1(k))), phase function wherein $\stackrel{\&OverBar;}{\mathrm{\&psi;}}(\mathrm{\&tau;}+\mathrm{kT},Z_1\left(k\right),Z_2\left(k\right),\&CenterDot;\&CenterDot;\&CenterDot;,Z_{L+1}\left(k\right))=2\mathrm{\&pi;h}{Z}_{L+1}\left(k\right)+4\mathrm{\&pi;h}\underset{l=0}{\overset{L-1}{\mathrm{\&Sigma;}}}{Z}_{l+1}\left(k\right)q(\mathrm{\&tau;}+\mathrm{lT})+W\left(\mathrm{\&tau;}\right);$ W (τ) is expressed as: $W\left(\mathrm{\&tau;}\right)=\frac{\mathrm{\&pi;h}(M-1)\mathrm{\&tau;}}{T}-2\mathrm{\&pi;h}(M-1)\underset{k=0}{\overset{L-1}{\mathrm{\&Sigma;}}}q(\mathrm{\&tau;}+\mathrm{kT})+(L-1)(M-1)\mathrm{\&pi;h},$ 0≤τ≤T, wherein h represents the modulation index of Continuous Phase Modulation, M represents the system number of Continuous Phase Modulation; Function q (t) has two kinds of forms, and a kind of is square wave function: $q\left(t\right)=\left\{\begin{array}{c}0,t<0\\ \frac{t}{2\mathrm{LT}},0\&le;t<\mathrm{LT},\\ \frac{1}{2},t\&GreaterEqual;\mathrm{LT}\end{array}\right.$ Another kind is a raised cosine: $q\left(t\right)=\left\{\begin{array}{c}0,t<0\\ \frac{t}{2\mathrm{LT}}-\frac{1}{4\mathrm{\&pi;}}\sin \left(\frac{2\mathrm{\&pi;t}}{\mathrm{LT}}\right),0\&le;t<\mathrm{LT}\\ \frac{1}{2},t\&GreaterEqual;\mathrm{LT}\end{array}\right..$

3, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: as transmitting antenna number L _t=2, M=2, h=1/2, q (t) is a square wave function, during no feedback arrangement, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 01\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}100\\ 001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1000\\ 0111\end{array}\right]$ With $G=\left[\begin{array}{c}1110\\ 0001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}10100\\ 01001\end{array}\right]$ With $G=\left[\begin{array}{c}10010\\ 00101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}101000\\ 010010\end{array}\right],$ $G=\left[\begin{array}{c}100100\\ 001010\end{array}\right],$ $G=\left[\begin{array}{c}001001\\ 101000\end{array}\right],$ $G=\left[\begin{array}{c}000101\\ 100100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 01\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}100\\ 001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1100\\ 0101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}11110\\ 01001\end{array}\right].$

4, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: as transmitting antenna number L _t=2, M=2, h=1/2, q (t) is a raised cosine, during no feedback arrangement, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 01\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}100\\ 001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1000\\ 0111\end{array}\right]$ With $G=\left[\begin{array}{c}1110\\ 0001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}10010\\ 01111\end{array}\right]$ With $G=\left[\begin{array}{c}11110\\ 01001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}100101\\ 010000\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 01\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}100\\ 001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1100\\ 0101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}11110\\ 01001\end{array}\right].$

5, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: as transmitting antenna number L _t=3, M=2, h=1/2, q (t) is a square wave function, during no feedback arrangement, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 01\\ 11\end{array}\right],$ $G=\left[\begin{array}{c}10\\ 11\\ 10\end{array}\right],$ $G=\left[\begin{array}{c}01\\ 11\\ 01\end{array}\right],$ $G=\left[\begin{array}{c}11\\ 01\\ 10\end{array}\right],$ $G=\left[\begin{array}{c}01\\ 10\\ 11\end{array}\right],$ $G=\left[\begin{array}{c}11\\ 10\\ 01\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}010\\ 100\\ 011\end{array}\right]$ With $G=\left[\begin{array}{c}110\\ 001\\ 010\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1011\\ 1101\\ 1001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}01100\\ 11000\\ 01001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}111010\\ 110010\\ 011001\end{array}\right].$

6, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: as transmitting antenna number L _t=3, M=2, h=1/2, q (t) is a raised cosine, during no feedback arrangement, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 01\\ 11\end{array}\right],$ $G=\left[\begin{array}{c}10\\ 11\\ 10\end{array}\right],$ $G=\left[\begin{array}{c}01\\ 11\\ 01\end{array}\right],$ $G=\left[\begin{array}{c}11\\ 01\\ 10\end{array}\right],$ $G=\left[\begin{array}{c}01\\ 10\\ 11\end{array}\right],$ $G=\left[\begin{array}{c}11\\ 10\\ 01\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}100\\ 010\\ 011\end{array}\right],$ $G=\left[\begin{array}{c}110\\ 010\\ 001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1110\\ 0100\\ 0101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}10000\\ 01010\\ 01101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}100000\\ 011010\\ 101011\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10\\ 10\\ 11\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}110\\ 010\\ 001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1101\\ 1110\\ 1001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}10101\\ 01110\\ 00011\end{array}\right].$

7, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: as transmitting antenna number L _t=2, M=4, h=1/4, when q (t) is raised cosine, no feedback arrangement, L=1 then, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}013\\ 212\end{array}\right]$ With $G=\left[\begin{array}{c}033\\ 232\end{array}\right],$ L _t=2, M=4, h=1/4, q (t) is a square wave function, no feedback arrangement, L=1 then, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}300\\ 310\end{array}\right];$ L _t=2, M=4, h=1/4, q (t) is a square wave function, and feedback arrangement is arranged, L=1 then, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}21020\\ 22030\end{array}\right].$

8, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: described when empty the Continuous Phase Modulation encoder adopt 2 scale codings, or adopt 3 systems, 4 systems, 8 systems and other multilevel code.

9, a kind of implementation method of Continuous Phase Modulation encoder when empty, this encoder is made of Space Time Coding device, continuous phase encoder, two diverter switches, a plurality of memoryless modulator and a plurality of transmitting antennas; If the encoder list entries is { x (k) }, k=1,2 .... be time mark, this sequence is the binary message bit sequence; It is characterized in that: described Space Time Coding device links to each other by first diverter switch in proper order with the continuous phase encoder, and Continuous Phase Modulation encoder when being provided with feedback arrangement between the two and forming this sky; This Space Time Coding device has L _t(v+1) individual tap coefficient, this continuous phase encoder has L _tL feedback tap coefficient, its generator matrix is expressed as This implementation method comprises the steps: at least

(1) above-mentioned list entries { x (k) } is sent into encoder in regular turn under clock signal drives;

(2) input signal is at first sent into the Space Time Coding device, and the Space Time Coding device is by L _tThe road constitutes, and each road comprises v delay unit, and comprises v+1 modular two multiplier and v modulo 2 adder at most, clock cycle T of each delay unit time-delay; Described L _tThe number of expression transmitting antenna, v represents the number of Space Time Coding device delay unit;

(3) list entries of sending into the Space Time Coding device first via is divided into two-way: the one tunnel sends into first delay unit (231), and first modular two multiplier (211) and Space Time Coding device tap coefficient g are sent in another road ₁₁Carrying out mould 2 multiplies each other; The output of first delay unit (231) is divided into two-way again: the one tunnel sends into second delay unit (232), and second modular two multiplier (212) and Space Time Coding tap coefficient g are sent in another road ₁₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (221) and carries out exclusive-OR with the output of modular two multiplier (211); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (222) and continuous phase encoder first via feedback sequence u ₁(k) carry out obtaining exporting y as a result behind the exclusive-OR ₁(k);

(4) list entries of sending into Space Time Coding device the second tunnel also is divided into two-way: the one tunnel sends into first delay unit (234), and first modular two multiplier (215) and Space Time Coding device tap coefficient g are sent in another road ₂₁Carrying out mould 2 multiplies each other; The output of first delay unit (234) is divided into two-way again: the one tunnel sends into second delay unit (235), and second modular two multiplier (216) and Space Time Coding tap coefficient g are sent in another road ₂₂Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (223) and carries out exclusive-OR with the output of modular two multiplier (215); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (224) and continuous phase encoder first via feedback sequence u ₂(k) carry out obtaining exporting y as a result behind the exclusive-OR ₂(k);

(5) for all the other each roads of Space Time Coding device, repeat the operating process of above-mentioned steps (3), (4); Send into last road of Space Time Coding device, i.e. L _tThe list entries on road also is divided into two-way: the one tunnel sends into first delay unit (237), and first modular two multiplier (219) and Space Time Coding device tap coefficient g are sent in another road _{Lt, 1}Carrying out mould 2 multiplies each other; The output of first delay unit (237) is divided into two-way again: the one tunnel sends into second delay unit (238), and second modular two multiplier (2110) and Space Time Coding tap coefficient g are sent in another road _{Lt, 2}Carry out mould 2 and multiply each other, the result after multiplying each other sends into modulo 2 adder (225) and carries out exclusive-OR with the output of modular two multiplier (219); The rest may be inferred, the output of all delay units all is divided into two-way: the one tunnel sends into next delay unit, the next stage modular two multiplier is sent on another road, the gained result sends into the output of next stage modulo 2 adder and upper level modulo 2 adder again and carries out exclusive-OR, and the result of afterbody is at modulo 2 adder (226) and continuous phase encoder first via feedback sequence u _Lt(k) carry out obtaining exporting y as a result behind the exclusive-OR _Lt(k);

(6) L of Space Time Coding device _tRoad output sequence y ₁(k), y ₂(k) ..., y _Lt(k) through first diverter switch, be converted to one tunnel serial sequence from the multidiameter delay sequence, send into the continuous phase encoder successively, this continuous phase encoder comprises L delay unit and a modulo 2 adder, clock cycle T of each delay unit time-delay, and comprise LL at most _tIndividual modulo 2 adder, (L+1) L _tIndividual modular two multiplier;

(7) to be divided into 2 the tunnel, the one tunnel be direct output sequence Z to the list entries of continuous phase encoder ₁(k), first delay unit (2310) is sent on another road;

(8) output of first delay unit (2310) is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z ₂(k), the next stage delay unit is sent on another road, other L _tIndividual branch road all feeds back to the Space Time Coding device, and wherein the 1st branch road feeds back to modular two multiplier (2113), with the feedback tap coefficient f of continuous phase encoder ₁₁Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (227) and modulo 2 adder (228) output carries out exclusive-OR, the 1 road feedback sequence u that obtains ₁(k), send into the modulo 2 adder (222) of Space Time Coding device, the 2nd branch road feeds back to modular two multiplier (2117), with the feedback tap coefficient f of continuous phase encoder ₂₁Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2210) and modulo 2 adder (2211) output carries out exclusive-OR, the 2 road feedback sequence u that obtains ₂(k), send into the modulo 2 adder (224) of Space Time Coding device; The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2221), with the feedback tap coefficient f of continuous phase encoder _{Lt, 1}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2213) and modulo 2 adder (2214) output carries out exclusive-OR, the L that obtains _tRoad feedback sequence u _Lt(k), send into the modulo 2 adder (226) of Space Time Coding device;

(9) the rest may be inferred, and the output of L-1 delay unit (2312) also is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z _L(k), the output sequence that modulo 2 adder (2216) and L delay unit (2313) are sent in another road carries out exclusive-OR, and the result of gained sends into L delay unit (2313), other L _tIndividual branch road all is a feedback branch, and wherein the 1st branch road feeds back to modular two multiplier (2115), with the feedback tap coefficient f of continuous phase encoder _{1, (L-1)}Carrying out mould 2 multiplies each other, the result that the gained result sends into modulo 2 adder (229) and modular two multiplier (2116) output carries out exclusive-OR, send into the modulo 2 adder of previous stage, the 2nd branch road feeds back to modular two multiplier (2219), with the feedback tap coefficient f of continuous phase encoder _{2, (L-1)}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2212) and modular two multiplier (2220) output carries out exclusive-OR, sends into the modulo 2 adder of previous stage; The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2223), with the feedback tap coefficient f of continuous phase encoder _{Lt, (L-1)}Carry out mould 2 and multiply each other, the result that the gained result sends into modulo 2 adder (2215) and modular two multiplier (2224) output carries out exclusive-OR, sends into the modulo 2 adder of previous stage;

(10) last, the output of L delay unit (2313) also is divided into L _t+ 2 the tunnel, the one tunnel is direct output sequence Z _L+1(k), another road feeds back to modulo 2 adder (2216), other L _tIndividual branch road also all is a feedback branch, and wherein the 1st branch road is input to modular two multiplier (2116), with the feedback tap coefficient f of continuous phase encoder _{1, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (229), and the 2nd branch road feeds back to modular two multiplier (2220), with the feedback tap coefficient f of continuous phase encoder _{2, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (2212); The rest may be inferred, L _tIndividual branch road feeds back to modular two multiplier (2224), with the feedback tap coefficient f of continuous phase encoder _{Lt, L}Carry out mould 2 and multiply each other, the gained result sends into modulo 2 adder (2215);

(11) L+1 of continuous phase encoder and line output Z ₁(k), Z ₂(k) ..., Z _L+1(k) respectively by second diverter switch and L _tIndividual identical memoryless modulator links to each other;

(12) each memoryless modulator (241)～(243) is according to the combined sequence Z of input ₁(k), Z ₂(k) ..., Z _L+1(k) table look-up, need to determine the continuous phase modulated signal of transmission, and pass through each self-corresponding antenna transmission in channel, so finished all operations of feedback Continuous Phase Modulation encoder.

10, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 9, it is characterized in that: described memoryless modulator is expressed as: exp (j ψ (τ+kT, Z ₁(k), Z ₂(k) ..., Z _L+1(k))), phase function wherein $\stackrel{\&OverBar;}{\mathrm{\&psi;}}(\mathrm{\&tau;}+\mathrm{kT},Z_1\left(k\right),Z_2\left(k\right),\&CenterDot;\&CenterDot;\&CenterDot;,Z_{L+1}\left(k\right))=2\mathrm{\&pi;h}{Z}_{L+1}\left(k\right)+4\mathrm{\&pi;h}\underset{l=0}{\overset{L-1}{\mathrm{\&Sigma;}}}{Z}_{l+1}\left(k\right)q(\mathrm{\&tau;}+\mathrm{lT})+W\left(\mathrm{\&tau;}\right);$ W (τ) is expressed as: $W\left(\mathrm{\&tau;}\right)=\frac{\mathrm{\&pi;h}(M-1)\mathrm{\&tau;}}{T}-2\mathrm{\&pi;h}(M-1)\underset{k=0}{\overset{L-1}{\mathrm{\&Sigma;}}}q(\mathrm{\&tau;}+\mathrm{kT})+(L-1)(M-1)\mathrm{\&pi;h},$ 0≤τ≤T, wherein h represents the modulation index of Continuous Phase Modulation, M represents the system number of Continuous Phase Modulation; Function q (t) has two kinds of forms, and a kind of is square wave function: $q\left(t\right)=\left\{\begin{array}{c}0,t<0\\ \frac{t}{2\mathrm{LT}},0\&le;t<\mathrm{LT},\\ \frac{1}{2},t\&GreaterEqual;\mathrm{LT}\end{array}\right.$ Another kind is a raised cosine: $q\left(t\right)=\left\{\begin{array}{c}0,t<0\\ \frac{t}{2\mathrm{LT}}-\frac{1}{4\mathrm{\&pi;}}\sin \left(\frac{2\mathrm{\&pi;t}}{\mathrm{LT}}\right),0\&le;t<\mathrm{LT}\\ \frac{1}{2},t\&GreaterEqual;\mathrm{LT}\end{array}\right..$

11, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 9 is characterized in that: as transmitting antenna number L _t=2, M=2, h=1/2, q (t) is a square wave function, when feedback arrangement is arranged, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}100\\ 011\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}1000\\ 0011\end{array}\right]$ With $G=\left[\begin{array}{c}1110\\ 0101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}10100\\ 00011\end{array}\right]$ With $G=\left[\begin{array}{c}10010\\ 01001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}101100\\ 011111\end{array}\right]$ With $G=\left[\begin{array}{c}111000\\ 011111\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}0101101\\ 1101111\end{array}\right],$ $G=\left[\begin{array}{c}1111101\\ 0100001\end{array}\right],$ $G=\left[\begin{array}{c}1111101\\ 0001001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}1101\\ 0100\end{array}\right]$ With $G=\left[\begin{array}{c}1001\\ 0100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}11101\\ 01100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}110101\\ 011100\end{array}\right]$ With $G=\left[\begin{array}{c}111101\\ 011100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}0101111\\ 1000001\end{array}\right]$ With $G=\left[\begin{array}{c}1000100\\ 1110011\end{array}\right];$ L=3, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}10101\\ 11111\end{array}\right];$ L=3, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}111001\\ 110110\end{array}\right];$ L=3, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1101000\\ 1000101\end{array}\right].$

12, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 9 is characterized in that: as transmitting antenna number L _t=2, M=2, h=1/2, q (t) is a raised cosine, when feedback arrangement is arranged, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}100\\ 011\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}1000\\ 0011\end{array}\right]$ With $G=\left[\begin{array}{c}1110\\ 0101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}10010\\ 00101\end{array}\right]$ With $G=\left[\begin{array}{c}11110\\ 00101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}110100\\ 001011\end{array}\right]$ With $G=\left[\begin{array}{c}101010\\ 010101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}1101101\\ 0000111\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}1101\\ 0100\end{array}\right]$ With $G=\left[\begin{array}{c}1001\\ 0100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}11111\\ 01001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}101111\\ 100001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}1001111\\ 0011101\end{array}\right];$ L=3, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}11001\\ 10110\end{array}\right];$ L=3, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}111000\\ 011101\end{array}\right];$ L=3, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}1110110\\ 1011001\end{array}\right]$ With $G=\left[\begin{array}{c}1000001\\ 1101110\end{array}\right].$

13, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 9 is characterized in that: as transmitting antenna number L _t=3, M=2, h=1/2, q (t) is a square wave function, when feedback arrangement is arranged, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}010\\ 100\\ 001\end{array}\right]$ With $G=\left[\begin{array}{c}110\\ 011\\ 010\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}1111\\ 1001\\ 1101\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}01100\\ 11000\\ 00011\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}111010\\ 110010\\ 010111\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}1011100\\ 1111110\\ 0110101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}1000\\ 0111\\ 1101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}11010\\ 00101\\ 11101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}101010\\ 000101\\ 101101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}1011001\\ 1100110\\ 0111101\end{array}\right].$

14, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 9 is characterized in that: as transmitting antenna number L _t=3, M=2, h=1/2, q (t) is a raised cosine, when feedback arrangement is arranged, L=1 then, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}100\\ 010\\ 001\end{array}\right]$ With $G=\left[\begin{array}{c}110\\ 010\\ 011\end{array}\right];$ L=1, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}1110\\ 0100\\ 0001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}10000\\ 01010\\ 00001\end{array}\right];$ L=1, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}010111\\ 111011\\ 010011\end{array}\right];$ L=1, the optimum code coding generator matrix of v=5 is: $G=\left[\begin{array}{c}1100100\\ 0001011\\ 0101101\end{array}\right];$ L=2, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}1010\\ 1111\\ 1100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}10101\\ 01010\\ 01001\end{array}\right];$ L=2, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}111010\\ 100111\\ 000100\end{array}\right];$ L=2, the optimum code coding generator matrix of v=4 is: $G=\left[\begin{array}{c}1111100\\ 1010001\\ 0010100\end{array}\right];$ L=3, the optimum code coding generator matrix of v=1 is: $G=\left[\begin{array}{c}11100\\ 10101\\ 01101\end{array}\right];$ L=3, the optimum code coding generator matrix of v=2 is: $G=\left[\begin{array}{c}101101\\ 111000\\ 010001\end{array}\right];$ L=3, the optimum code coding generator matrix of v=3 is: $G=\left[\begin{array}{c}0001111\\ 1111101\\ 1100001\end{array}\right].$

15, the implementation method of Continuous Phase Modulation encoder when empty as claimed in claim 1 is characterized in that: described when empty the Continuous Phase Modulation encoder adopt 2 scale codings, or adopt 3 systems, 4 systems, 8 systems and other multilevel code.

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