CN100346129C - Controller of digital electronic detonator - Google Patents
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- CN100346129C CN100346129C CNB031569129A CN03156912A CN100346129C CN 100346129 C CN100346129 C CN 100346129C CN B031569129 A CNB031569129 A CN B031569129A CN 03156912 A CN03156912 A CN 03156912A CN 100346129 C CN100346129 C CN 100346129C
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Abstract
The present invention relates to the improvement of an electronic detonator controller, which belongs to the technical field of blasting supply manufacture. The electronic detonator controller comprises an antijamming circuit 201, a voltage adjustment circuit 203, a communication interface 207, an energy storage capacitor 202, an electronic switch 205, a lighter 206, a control unit 210 and a clock circuit 216. The present invention is characterized in that the present invention is provided with a demoding circuit 320 working under the control of one control unit 210, and electronic ID codes of a detonator are cured in electronic ID251 in the demoding circuit 320. The present invention makes the production, the use and the management of the detonator more convenient, and the unreasonable and illegal use of the detonator is limited to fundamentally solve the safety problem caused by the loss of the detonator.
Description
Technical field
The invention belongs to priming system manufacturing technology field, relate to improvement the electric detonator controller.
Background technology
From the eighties in 20th century, many developed countries begin to develop the electronic delay detonator of being realized the electric ignition mode of accurate timing by integrated circuit.And as platform, the associated safety technical measures of the each side of research electric detonator, and the electric detonator networking mode and the operator scheme that adapt to the digital communication technology development.From the security consideration that detonator is used, the quick-fried industry of China people has been strengthened the control measures of detonator in order to strengthen the management intensity to detonator, and the strict detonator coding marking system of carrying out does not have the detonator of marking to be forbidden without exception to dispatch from the factory; Sale, the purchase use of carrying out civil explosive material flow to the monitoring regime.
Fig. 1 diagrammatic illustration the basic control mode of existing electronic delay detonator, the control of detonator is divided into initiation control device 200 two parts of detonating control system 100 and electric detonator inside.Wherein detonating control system 100 is responsible for the coordination control of blasting circuit, and blasting cap initiation controller 200 is finished concrete initiation control work according to the instruction of detonating control system 100.When detonator is controlled, each detonating control system 100 can be controlled a plurality of detonators from 200.1 to 200.n, and the blasting cap initiation control system has comprised: be used to coordinate the operation of a detonator, detonator is carried out parameter to be set and safety inspection, set the CPU101 that finishes blasting cap initiation control of explosion model, deposit the CPU working procedure, the ROM104 of explosion model and secure data etc., deposit the RAM105 of setup parameter and testing result, and carry out man-machine interactive operation, the man-machine terminal 106 that parameter shows, and be used for communication interface 103 with the communication of each detonator.The a pair of output lead 10.1 and 10.2 of blasting cap initiation control system 100 possesses the power supply and the multiplexing function of communicating by letter, and each blasting cap initiation being provided and carrying out the required energy of associative operation simultaneously, can carry out the exchange of data.
Each controller 200 of finishing detonator internal control function includes: be used to be stored in detonate the beginning after, prevent under situations such as supply line occurs blowing up in the sequence blasting process, blasting cap initiation and controller function still can normally finish must energy storage capacitor 202; Be used for operating voltage VCC, the power-on reset signal RST of burning voltage so that control circuit to be provided, and according to the charging signals PU (Power Up) of core control circuit 210 and discharge signal PD (Power Down) to storage capacitor 202 discharges and recharges operation, the energy that is used to detonate discharges control electronic switch 205; Finish the igniter 206 that the electric capacity store electrical energy is converted into the blasting cap initiation energy; Be used to suppress to power/interference on the communication line and overvoltage, protection detonator internal control circuit anti-jamming circuit 201 completely; Be used for data-signal from (to) supply line separates (coupling) and carries out the conversion of the logic level between inside and outside of signal, promptly finishes the communication interface 207 of the physical connection function of communication protocol; Deposit detonator networking operation, be similar to the IP address in the networking and the EEPROM 204 of defer time data; Be used to finish the key control unit 210 of information processing and coordination, the built-in function of control detonator; The clock circuit 216 of the required clock of key control unit 210 work is provided.Hard core control unit 210 comprises: central processing unit CPU 2, store data and intermediate treatment result's RAM/ROM; Be used to carry out the timer of detonator fixed cycle operator; Be used for carrying out the I/O mouth of input-output operation with ancillary equipment.Identical from the function of function hard core control unit 210 same single-chip microcomputers (as 89C2051), below of the present invention, narrate part, this partial circuit is commonly referred to as single-chip microcomputer 210.
When system works, the a pair of output lead 10.1 of detonating control system and 10.2 anti-jamming circuits with blasting cap initiation controller 200, voltage-regulating circuit 203, communication interface 207 is connected, and by the output signal of voltage adjuster according to single-chip microcomputer 210, energy storage situation to storage capacitor is controlled, detonating control system 100 sends the detonator address by communication interface 103 and distinguishes code (ID) and control commands corresponding (CONTROL INSTRUCTION (CI)), detonator communication interface 207 arrives single-chip microcomputer 210 with the transfer of data that receives, single-chip microcomputer at first according to command determination whether for detonating, general CI such as discharge, as not being that general CI is (as the defer time data setting, read/write ID etc.), then from EEPROM, read ID, whether coincide with the ID that receives, as misfit, then do not carry out any other operation, the data that receive are abandoned; As coincideing, then carry out associative operation, and operating result is fed back to detonating control system 100 by communication interface 207 according to the instruction that receives.After detonating control system 100 is finished each detonator setting, finally send the general CI that detonates, because the instantaneity of signal transmission, each detonator controller 200 is almost received this CI simultaneously, the control procedure that begins to detonate: start the work of timer 2 15, after the defer time of setting arrives, single-chip microcomputer 210 sends time break FIRE, closed electronic switch 205 discharges the electric energy that stores in the storage capacitor 202 to igniter fast, thus detonating capsule.
The shortcoming of above-mentioned detonator controller is that safety guarantee still exists leak, aspect the security control of electric detonator, United States Patent (USP) 5,520,114 must be used the understanding that could operate detonator with special-purpose detonating control system based on electric detonator, detonating control system 100 has been carried out authorization control, promptly add special-purpose unlatching password at man-machine terminal, make the operating personnel that only have licencing key, could start detonating control system, but this safety measure is owing to exist drawback in the detonator: in case the illegal personnel that have other aims understand (or passing through signal detection) order of detonating to this system, and the order of detonating generally is several fixing codes, utilize simple circuit just can produce the CI that detonates, thereby got around the password authorization of detonating control system; At United States Patent (USP) 4,674, in 047, introduced production unit code and detonator safety code have been inserted idea in the detonator controller, but its safety code is the regular coding that writes when detonator is produced, it is identical with the coding that the detonator operation requires that it writes safety code, be that the production unit that password is inserted is grasped the password of inserting, and production unit separates often with applying unit, and circulation also will be passed through in the centre, and applying unit must obtain the detonator safety code when buying detonator, huge property based on the detonator consumption, detonator is sold extensively more, and the possibility that its safety code is divulged a secret is multiplied, and therefore has potential safety hazard equally.
Aspect the safety management of detonator, for the ease of the safety supervision management of detonator in production, circulation and use, present way is that label is encoded, beaten to detonator.Yet there is following deficiency in detonator coding: detonator coding method standard the link of detonator production and use, but can't organize the only illegal use of detonator; Detonator just fragmentates once blast, and its " coding " do not existed, and can't trace the source of detonator; The occupation mode that is unfavorable for the standard detonator, the major accident that prevention practitioner carelessness and violation operation cause.
Summary of the invention
The purpose of this invention is to provide a kind of electric detonator controller of safety and reliability,, take precautions against the social danger that detonator runs off and may cause so that more effectively strengthen managerial ability to blasting cap initiation.
Technical scheme of the present invention is:
A kind of digital electric detonator controller, comprise the conductor terminal R10.1 and the S10.2 that are connected with detonating control system, anti-jamming circuit 201, the COM1 of the input of voltage-regulating circuit 203 and communication interface 207 is connected with S10.2 with terminal R10.1 respectively, the voltage output end of voltage-regulating circuit 203 is respectively with storage capacitor 202 and by electronic switch 205, the series loop that igniter 206 is formed connects, by a control module of forming by single-chip microcomputer 210 and the clock circuit 216 that is attached thereto, the charging signals PU of control module 210 is connected with the respective input of voltage-regulating circuit 203 respectively with the output of discharge signal PD, the output of the reset signal RST of voltage-regulating circuit 203 is connected with the respective input of control module 210, the time break FIRE output of control module 210 is connected with electronic switch 205 corresponding inputs, the communication output TXD of control module 210 is connected with the corresponding port of communication interface 207 respectively with communication input RXD, the output port of power source VCC of voltage-regulating circuit 203 is connected with the power input of control circuit 320 with VSS, it is characterized in that
(1) decoding circuit of working 320 is arranged under the control of control module 210, it by data comparator 311, cryptologic array 314, SI PO shift register A252, electronics ID251, incorporate the code data of going here and there out shift register 255, SI PO shift register B253 and preserving M position clear data into and preserve unit 313 and form; The FPDP of SI PO shift register A252, cryptologic array 314, data comparator 311 connects by bus, the N position code data of input through cryptologic array conversion back output M bit data, is outputed to a data input port of data comparator 311; Cryptologic array 314, electronics ID251, incorporate into and go here and there out the FPDP of shift register 255, SI PO shift register B253 and connect by bus, the FPDP that code data is preserved unit 313 and data comparator 311 is connected by bus, M position clear data fixing in this controller is outputed to another FPDP of data comparator; Data comparator 311 has three enable signal output EN3, EN4, EN5 and an OK signal output part, EN3 is connected with the respective input of electronic switch 205, EN4 is connected with the respective input of voltage-regulating circuit 203, EN5 is connected with the respective input of electronics ID251 with SI PO shift register B253 respectively, and the OK signal port is connected with the respective input of control module 210;
(2) control module 210 has two enable signal output EN1, EN2, and EN1 is connected with the respective input of SI PO shift register 252, and EN2 is connected with the respective input of SI PO shift register 253 with electronics ID251 respectively; Control module 210 has a shift clock signal SCLK output, it respectively with SI PO shift register A252, incorporate into and go here and there out the respective input of shift register 255, SI PO shift register B253 and be connected; Control module 210 has a data Load Signal LOAD output, and it is gone here and there out the respective input of shift register 255 and be connected with incorporating into; Control module 210 is connected with the serial data port of SI PO shift register B 253 with SI PO shift register A252 respectively by serial data line, and control module 210 is gone here and there out the parallel data port of shift register 255 and is connected with incorporating into by parallel data line; Control module 210 has a programming signal PROG output, and it is connected with the respective input of electronics ID251;
(3) the electronics ID that is solidified with this detonator in electronics ID251 encodes.
A kind of digital electric detonator controller, comprise the conductor terminal R10.1 and the S10.2 that are connected with detonating control system, anti-jamming circuit 201, the COM1 of the input of voltage-regulating circuit 203 and communication interface 207 is connected with S10.2 with terminal R10.1 respectively, the voltage output end of voltage-regulating circuit 203 is respectively with storage capacitor 202 and by electronic switch 205, the series loop that igniter 206 is formed connects, the output port of power source VCC of voltage-regulating circuit 203 is connected with the power input mouth of programmable logic device (CPLD) 300 with VSS, for it provides working power, clock circuit 216 provides clock signal, it is characterized in that, a detonator safety control circuit 300 that is made of programmable logic device (CPLD) is arranged, and the structure of this circuit is as follows:
This detonator safety control circuit 300 is made of command decoder 310, decoder module 320, electronics ID identification module 330, holdover timing circuit 340, data latches 350, frequency dividing circuit 360, data reception module 370 and data transmission blocks 380;
The input of frequency dividing circuit 360 is connected with the output of clock circuit 216, it has two output CLK1 and CLK2, CLK1 is connected with the input end of clock of holdover timing circuit 340, and CLK2 is connected with the input end of clock of data reception module 370 with data transmission blocks 380 respectively;
Electronics ID identification module 330 has a data output port DATA2, it is connected with the respective input mouth of decoder module 320 with data transmission blocks [380], electronics ID identification module 330 has one to show whether input electronics ID is the ID-OK output port S1 of this controller ID, the respective input mouth of its and instruction decoder 310 connects, command decoder 310 has one to write electronics ID instruction output end mouth PROG, and it is connected with the respective input mouth of electronics ID identification module 330; It is this controller password that decoder module 320 has an expression input password, allow the accurate output port S2 of password to this controller function, it is connected with the respective input mouth of electronic switch [205], voltage-regulating circuit [203] with (regularly) circuit 340 of delaying, command decoder 310 respectively, command decoder 310 has a decoding instruction output port LE3, and it is connected with the respective input mouth of decoder module 320;
Extension (regularly) circuit 340 has a time break FIRE output, its difference and instruction decoder 310 is connected with electronic switch 205 corresponding inputs, and the defer time data of command decoder 310 latch output port LE4, defer time data loading output port LE7, the operation of delaying enables control signal output port EN3 and is connected with (regularly) circuit 340 corresponding input ports of delaying respectively;
Advantage of the present invention is,
(1) utilizes integrated circuit technique, detonator production coding is changed into " ENUM " (being the detonator identity code) by modes such as " mechanical marking coding ", " laser marking codings ", and place in the detonator body, can onlinely read and discern, make production, use, the management of detonator more convenient.
(2) " detonator identity code " is detonator ID number, not only can be used for the online identity identification of detonator, and reflected the essential information and other relevant additional information that detonator is produced.Utilize these information under the integrated circuit technique disposable recording, and the identity code of each detonator is unique, unchangeable with the password that detonates.
(3) a detonate password relevant with the production sequence number is set for each detonator, the use of detonator must obtain the password that detonates, and can not realize that for the user who does not have password the programming of detonator is used and the operation of detonating.This method has limited the unreasonable use and illegal utilization of detonator.
(4) detonate password as detonator programming and the necessary condition used, there is a corresponding relation in writing password and detonating of detonator between the password, it is disclosed promptly writing the detonator safety code, but its decipherment algorithm is relevant with the random code of control chip itself with the electronics ID of detonator, its corresponding relation is by the third party---and departments that are in charge of manging enterprises grasp, when using, the detonator user must just can obtain accessing to your password of detonator by the third party, because the electronics ID of detonator is similar to resident identification card, the coding of each detonator has nothing in common with each other, therefore the pairing password that detonates of each detonator also has nothing in common with each other, and has reduced the possibility of the cryptocompromise of detonating; Make things convenient for departments that are in charge of manging enterprises that detonator is flowed to the difficulty of monitoring, fundamentally solved the safety problem that detonator runs off and caused.
Description of drawings
Fig. 1 is the electrical schematic diagram of existing electric detonator controller.
Fig. 2 is the formation schematic diagram of the used electronics ID of electric detonator of the present invention.
Fig. 3 is the formation schematic diagram of the used communication data packet of the present invention.
Fig. 4 is the electrical schematic diagram of a kind of basic technical scheme of electric detonator controller of the present invention.
Fig. 5 is the electric theory diagram of second kind of basic technical scheme of electric detonator controller of the present invention.
Fig. 6 is the expansion electrical schematic diagram of detonator safety control circuit 300 among Fig. 5.
Fig. 7 a is the expansion electrical schematic diagram of extension (regularly) circuit 340 among Fig. 6.
Fig. 7 b is the expansion electrical schematic diagram of electronics ID identification module 330 among Fig. 6.
The expansion electrical schematic diagram of decoder module 320 among Fig. 7 c Fig. 6.
The specific embodiment
Below in conjunction with accompanying drawing the present invention is described in further details.Referring to Fig. 4, this is a kind of basic technical scheme of the present invention.It comprises the conductor terminal 10.1 and 10.2 that is connected with detonating control system, the COM1 of the input of anti-jamming circuit 201, voltage-regulating circuit 203 and communication interface 207 is connected with 10.2 with terminal 10.1 respectively, and the voltage output end of voltage-regulating circuit 203 is connected with storage capacitor 202 and the series loop be made up of electronic switch 205, igniter 206 respectively.By a control module of forming by single-chip microcomputer 210 and the clock circuit 216 that is attached thereto, the charging signals PU of control module 210 is connected with the respective input of voltage-regulating circuit 203 respectively with the output of discharge signal PD, the output of the reset signal RST of voltage-regulating circuit 203 is connected with the respective input of control module 210, the time break FIRE output of control module 210 is connected with electronic switch 205 corresponding inputs, the communication output TXD of control module 210 is connected with the corresponding port of communication interface 207 respectively with communication input RXD, and the power port VCC of voltage-regulating circuit 203 is connected with charge power supply with VSS.It is characterized in that,
(1) decoding circuit of working 320 is arranged under the control of control module 210, it by data comparator 311, cryptologic array 314, SI PO shift register 252, electronics ID251, incorporate into and go here and there out code data that shift register 255, SI PO shift register 253 and being used to preserve clear data and preserve unit 313 and form; The FPDP of SI PO shift register 252, cryptologic array 314, data comparator 311 connects by bus, after 314 conversions of cryptologic array, output M bit data is to a data input port of data comparator 311 the N position code data that receives; Cryptologic array 314, electronics ID251, incorporate into and go here and there out the FPDP of shift register 255, SI PO shift register 253 and connect by bus; The FPDP that code data is preserved unit 313 and data comparator 311 is connected by bus, being kept at another data-in port that M position clear data in the code data preservation unit 313 outputs to data comparator 311; Data comparator 311 has three enable signal output EN3, EN4, EN5 and an OK signal output part, EN3 is connected with the respective input of electronic switch 205, EN4 is connected with the respective input of voltage-regulating circuit 203, EN5 is connected with the respective input of SI PO shift register 253 with electronics ID251 respectively, and the OK signal port is connected with the respective input of control module 210.
(2) control module 210 has two enable signal output EN1, EN2, and EN1 is connected with the respective input of SI PO shift register 252, and EN2 is connected with the respective input of SI PO shift register 253 with electronics ID251 respectively; Control module 210 has a shift clock signal SCLK output, it respectively with SI PO shift register 252, incorporate into and go here and there out the respective input of shift register 255, SI PO shift register 253 and be connected; Control module 210 has electronics ID data to load the LOAD output, and it is gone here and there out the respective input of shift register 255 and be connected with incorporating into; Control module 210 is connected with the serial data port of SI PO shift register 252 with SI PO shift register 253 respectively by serial data line, and control module 210 is gone here and there out the parallel data port of shift register 255 and is connected with incorporating into by parallel data line; Control module 210 has a programming signal PROG output, and it is connected with the respective input of electronics ID251.
(3) the electronics ID that is solidified with this detonator in electronics ID251 encodes.
Because the volume ratio of detonator is less, and the function that is realized is comparatively simple, usually the single-chip microcomputer 210 of tuning controller overall work is selected simple single-chip microcomputer (as AT89C2051, PIC series etc.), its inside comprised the timer that can be used for detonator delay operation, be used for data transmit-receive telecommunication management interface (USART), be used to preserve the ROM (EEPROM) that realizes control program of the present invention, a small amount of RAM of temporary intermediate data, and a small amount of I/O port that can be used for the I/O operation.
Operate its coding figure place for the I/O of electronics ID and generally be not less than 13 hexadecimals (referring to Fig. 2) numeral, if adopt parallel work-flow need take single-chip microcomputer 2104*13=52 position I/O port lines at least, therefore adopt mode connected in series for the I/O operation of electronics ID, so that simplify the connected mode of single-chip microcomputer 210.Its implementation procedure is as follows: by means of realizing going here and there out incorporating into of the parallel/serial conversion of electronics ID data shift register 255, the electronics ID data that are kept in the electronics ID unit 251 are input in the single-chip microcomputer 210, so that single-chip microcomputer 210 carries out electronics ID comparison, or turn back in the detonating control system 100 by communication interface 207; Be written to electronics ID data in the electronics ID unit 251 for need, the electronics ID data format that single-chip microcomputer 210 is received by its telecommunication management interface (USART) and keeps in the RAM of single-chip microcomputer 210 is a parallel data, the parallel/serial conversion of its data is finished by the program among the ROM that is solidificated in single-chip microcomputer 210, SI PO shift register 253 converts the serial data that receives to parallel data, preserves in the unit 251 so that be written to electronics ID.
Electronics ID preserves the electronics ID data that unit 251 is used to preserve controller, its function class is similar to nonvolatile memory EEPROM, but its data save method adopts the structure that is similar to the parallel data latch, does not have the address input bus, and its control is basic identical with data latches.
What code data preservation unit 313 was put is a string fixing M bit data, and this string data is can be externally disclosed; The flowing water data that controller serial number 316 is preserved this controller label of expression, their function class is similar to ROM, but its data output method adopts the parallel output intent that is similar to data register, there is not special address bus, the data that they are preserved directly are solidificated in inside by chip production producer when controller chip is produced.
The function of SI PO shift register 252 is similar with SI PO shift register 253: the code data that single-chip microcomputer 210 is received, realize parallel/serial conversion by single-chip microcomputer 210, and be transferred to SI PO shift register 252, realize serial/parallel conversion by SI PO shift register 252, export to cryptologic array 314 and carry out the decryption oprerations of data.
Referring to Fig. 2, it has expressed the formation of the used electronics ID of electric detonator of the present invention, and its structure changes on the basis of rule slightly with reference to the primitive rule of Chinese industrial detonator coding.Electronics ID coding used in the present invention is made of 13 16 system numerals, and the 1st, 2 is manufacturing enterprise's code, and 2 manufacturing enterprise's codes can be represented 256 manufacturing enterprises; The 3rd is the productive year code, and 1 productive year code can make to be coded in 16 years and can not repeat; The 4th is to produce the month code, and 1 production can be expressed for 1～December in month; 5th, 6 is the date of manufacture code, 2 dates of manufacture that can express (0～31) sky; The 7th is this detonator tag number code, and the detonator tag number can be expressed 16 kinds of characteristic informations of electric detonator; The 8th is production teams and groups codes, and 1 teams and groups' coding can be expressed 16 and be produced marshalling; 9th, 10,11 is to produce the box code, produces serial number for 3 and represents to have produced how many box detonators under these teams and groups, can express maximum box several 4095; 12nd, 13 is serial number code in the box, and serial number is expressed in 2 boxes has what to send out detonator in this box, and the maximum quantity of every box detonator is 255.The present invention recommends to use above-mentioned coding form, uses above-mentioned coding form but be not limited in, and can increase and decrease content encoded according to actual needs.
Fig. 3 has expressed the formation of the used communication data packet of the present invention, and the data of set form are adopted in communication: it is expressed the beginning of communication by n1 bit data synchronous head; N2 bit instruction command code (because the consideration of price factor, the detonator controller requires to simplify as far as possible, and generally its instruction operation code selects 1, expresses 16 kinds of modes of operation, can meet the demands); 13 electronics ID express the basic production information of this detonator, and the address when being used for the detonator networking is simultaneously distinguished; Operand under this operational order sign indicating number of n3 position, it can be a string insignificant random number, also can be the defer time data of expressing detonator " release " password or setting, require its figure place to be not less than 4, so that the defer time data of expressing 2
16Individual chronomere; N4 bit data check information when taking place in order to the prevention error code, produces the possibility of maloperation.Therefore the fixedly figure place (n) of communication data packet of the present invention is: n=n1+n2+n3+n4+13.
Fig. 4 is the electrical schematic diagram with the chip microcontroller one embodiment of the invention.Compared to Figure 1, it has kept anti-jamming circuit 201, storage capacitor 202, communication interface 207, clock circuit 216 and igniter 206.Electronic switch 205 and voltage adjustment 203 increased enable to control EN3 and EN4, single-chip microcomputer adopts and is similar to simple single-chip microcomputer such as AT89C2051 or PIC series, to reduce the ultimate cost of controller.Because single-chip microcomputer can be finished most control work, so the function of decoding circuit 320 is relatively simple, can select programming device (as PAL, GAL, PLA, CPLD etc.) realization decoding security control function on a small scale for use, and accept the control of single-chip microcomputer 210.
The course of work: decoding circuit 320 is under the reset signal effect of voltage-regulating circuit output, it is all invalid that it enables to export EN3, EN4, EN5, forbid respectively to electronic switch 205 closure, forbid that voltage-regulating circuit 203 is charged to the voltage that detonates to storage capacitor 202, forbids the write operation to electronics ID251.En2 is in disarmed state and forbids importing into and go out shift register 253 output data and shifting functions, makes electronics ID be in the data output state.After system resets, single-chip microcomputer 210 is at first exported the LOAD signal and is latched into to incorporate into and goes here and there out in the shift register 255 being solidificated in ID in the electronics ID circuit 251, secondly, output shift clock signal SCLK, make electronics ID on serial data line SI, be input in the single-chip microcomputer 210 by turn, and be kept among the internal RAM of single-chip microcomputer, distinguish in order to carry out ID.
After single-chip microcomputer receives the operational order of decoding, single-chip microcomputer output shift enable signal EN1, permission is to the operation of SI PO shift register 252, and output shift clock SCLK control n4 position code data is exported on serial data line SD, after finishing, data output makes the EN1 invalidating signal, code data (plain code) is latched in the shift register 252, and the parallel cryptologic array 314 of exporting to, cryptologic array 314 is according to the decipherment algorithm of the electronics ID251 decision of solidifying to code data, convert N position encrypt data to behind the cryptographic algorithm of n4 position code data through selection and export to data comparator 311, data comparator compares cryptologic array 314 output data and the clear data that is solidificated in the password preservation unit, if coincide, output OK signal notice single-chip microcomputer 210 loopback detonating control systems are decoded into function signal, can carry out the operation of other instruction.Cryptographic algorithm can be expressed as follows:
N＝f
ID(n4)
N---expression clear data
f
ID---expression is subjected to the decipherment algorithm of electronics ID control
N4---expression code data
Plain code and electronics ID are directly fixed in chip internal by manufacturer when detonator is produced, be can be externally disclosed, need to be keep secret be cryptographic algorithm f
IDCryptographic algorithm is controlled by the third party, multiple for fear of long-term use electronics ID code weight, influence the security of cryptographic algorithm, reduce the possibility that the cryptologic algorithm is cracked, and make things convenient for the third party to control, in decoding circuit 320 inside, can increase by chip serial number data and solidify setup unit 316, connect with cryptologic array 314 by the data dedicated bus, the output data that make the controller serial number preserve unit 316 are directly connected to a data input port of cryptologic array, make cryptographic algorithm controlled by electronics ID and m position chip serial number, the cryptographic algorithm of this moment is the matrix of capable 13 row of m, has greatly increased the security performance of algorithm.
Password relatively accurately after, the detonator safety governor just is allowed to carry out other instruction operation code, in the operational order of electric detonator, influence the decoding circuit state except that decoding instruction, what influence the decoding circuit state is the state of electronics ID.The prerequisite that electronics ID allows to write is that the password input is accurate, and from the reliability consideration of management, preferably one-time write storage organization of unit is preserved in electronics ID unit.When writing electronics ID, the electronics ID that reads in during at first according to electrification reset, judge that electronics ID preserves whether non-NULL of unit, non-NULL returns detonating control system 100 relevant error informations, if check to empty, then begin writing of electronics ID: output EN2 signal makes electronics ID be in data receiving state, allow SI PO shift register 253 to receive serial data, under the control of shift pulse SCLK, by serial data line SD, single-chip microcomputer 210 moves into electronics ID in the shift register 253 by turn, after data output is finished, outputting data signals LOAD, data in the shift register are latched into to incorporate into go here and there out in the shift register 255, make EN2 be in disarmed state, the data output and the shifting function of disable shift register 253, and under the control of SCLK, SI reads back into by serial data input line, in the single-chip microcomputer 210, with ID to be written relatively, re-execute aforesaid operations as mistake, after the repeated several times, return the detonating control system error message, as the more identical EN1 signal of then exporting, forbid the operation of SI PO shift register 252, output En2 signal makes SI PO shift register output data, electronics ID is in the data input state, sends programming signal PROG electronics ID is preserved unit 251 execution programming operations.
Second kind of basic technical scheme of the present invention do not use single-chip microcomputer, referring to Fig. 5, Fig. 6, a kind of digital electric detonator controller, comprise the conductor terminal 10.1 and 10.2 that is connected with detonating control system, anti-jamming circuit 201, the COM1 of the input of voltage-regulating circuit 203 and communication interface 207 is connected with 10.2 with terminal 10.1 respectively, the voltage output end of voltage-regulating circuit 203 is respectively with storage capacitor 202 and by electronic switch 205, the series loop that igniter 206 is formed connects, the power port VCC of voltage-regulating circuit 203 is connected with charge power supply with VSS, and clock circuit 216 provides clock signal.It is characterized in that a detonator safety control circuit 300 that is made of PLD is arranged, the structure of this circuit is as follows:
This detonator safety control circuit 300 is made of command decoder 310, decoder module 320, electronics ID identification module 330, (regularly) circuit 340 of delaying, data latches 350, frequency dividing circuit 360, data reception module 370 and data transmission blocks 380.
The input of frequency dividing circuit 360 is connected with the output of clock circuit 216, it has two output CLK1 and CLK2, CLK1 is connected with the input end of clock of extension (regularly) circuit 340, and CLK2 is connected with the input end of clock of data reception module 370 with data transmission blocks 380 respectively.
Data latches 350 has data, electronics ID and orders three latch units, difference latch data DATA1, electronics ID value DATA3 and order CI, data latch unit output port DATA1 is connected with the corresponding port of decoder module 320 with (regularly) circuit 340 of delaying respectively, electronics ID latch units output port DATA3 is connected with the respective input mouth of electronics ID identification module 330, and the respective input mouth of the output port CI and instruction decoder 310 of order latch units connects.
Electronics ID identification module 330 has an electronics ID data-out port DATA2, it is connected with the respective input mouth of decoder module 320, data transmit circuit 380, the electronics ID that electronics ID identification module 330 has an expression to receive is the ID-OK output port S1 of this controller ID, the respective input mouth of its and instruction decoder 310 connects, command decoder 310 has one to write electronics ID instruction output end mouth PROG, and it is connected with the respective input mouth of electronics ID identification module 330; Decoder module 320 has expression input password password OK output port S2 accurately, it is connected with the respective input mouth of delay (regularly) circuit 340, command decoder 310, electronic switch 205 and voltage regulator module 203 respectively, the order that command decoder 310 has an expression to receive is the decoding control output end mouth LE3 of decoding instruction, and it is connected with the respective input mouth of decoder module 320.
Extension (regularly) circuit 340 has a time break FIRE output, its difference and instruction decoder 310 is connected with electronic switch 205 corresponding inputs, and the defer time of command decoder 310 latchs output port LE4, defer time data loading output port LE7, the operation enable signal output port EN3 that delays is connected with (regularly) circuit 340 corresponding input ports of delaying respectively.
Data transmit circuit 380 and data receiver circuit 370 adopt the ASIC design, finish reception and the Data Format Transform of the work of transmission and the verification of data of data, and it realizes circuit at present by multiple mode, can be with reference to the principle of relevant USART interface.
The electronics ID data of 330 pairs of inputs of electronics ID identification module are carried out the data comparison, whether to differentiate input command is operation to this controller, simultaneously electronics ID data DATA2 is offered decoder module 320 and data transmission blocks 380 respectively, control decoder module 320 is selected decoding algorithm, and the electronics id information of 380 controllers of data transmission blocks is provided.
Data latches 350 is parallel multibit latches, after data receiver circuit carries out verification and finishes the data of receiving, as the errorless output data latch signal of data verification LE2, data latches 370 is received the LE2 signal, data on the data input fracture DATA are latched, and offer decoder module 320/ extension (regularly) circuit 340, electronics ID identification module 330 and command decoder 310 from data fracture DATA1, DATA3, CI respectively from data-out port.
Referring to Fig. 7 a, said extension (regularly) circuit 340 is made up of data initialization/down counter 341 and data latches 342 among Fig. 6, data latches 342 has a defer time data-out port D1 to be connected with data initialization/down counter 341 corresponding input ports, the output port CLK1 of frequency dividing circuit 360 is connected with data initialization/down counter 341 corresponding input ports, data initialization/down counter 341 has a time break FIRE output, its difference and instruction decoder 310 is connected with electronic switch 205 corresponding inputs, the defer time data of command decoder 310 are loaded output port LE7, delay to operate enable signal output port EN3 and be connected with data initialization/down counter 341 corresponding input ports respectively, the controller password OK output port S2 of decoder module 320 is connected with data initialization/down counter 341 corresponding input ports; Data latch unit output port DATA1 is connected with the respective input mouth of data latches 342, and the defer time output port LE4 of command decoder 310 is connected with the respective input mouth of data latches 342.
Data latches 342 is used to latch the defer time data of input, what it adopted is the common version that latchs of incorporating into and going out, when command decoder 310 produces defer time data latch signal LE4 according to input data CI, data latches latchs data input DATA1, and, offer data initialization/down counter 341 in data-out port D1 output.
Data initialization/down counter 341 is the subtract counters that possess the data initialization function, realizes the extension operation of detonator.When command decoder 310 detonates preparation data initialization signal LE7 according to CI input generation, data initialization/down counter 341 the data D1 of data latches 342 output as the counting initial value, when command decoder 310 produces the permission signal EN3 that delays according to fuze after, data initialization/down counter 341 subtracts counting operation according to input clock CLK1, each pulse counter value subtracts 1, output signal FIRE detonating primer when Counter Value reduces to 0.The data initialization of counter and tally function function control by the output S2 of decoder module 320, and only aforesaid operations is only permission under the effective situation of S2.
Referring to Fig. 7 b, said electronics ID identification module 330 is made up of data comparator 331 and electronics ID data preservation unit 332 among Fig. 6, electronics ID data are preserved unit 332 an electronics ID data-out port DATA2, it respectively with data comparator 331, the respective input mouth of decoder module 320 and data transmit circuit 380 is connected, electronics ID latch units output port DATA3 on the data latches 350 is connected with the respective input mouth that data comparator 331 and electronics ID data are preserved unit 332 respectively, data comparator 331 has an electronics ID-OK output port S1, the respective input mouth of its and instruction decoder 310 connects, command decoder 310 has one to write electronics ID instruction output end mouth PROG, and it is connected with the respective input mouth that electronics ID data are preserved unit 332.
The structure of electronics ID data preservation unit 332 is similar to the relevant portion of the electronics ID251 among Fig. 5.
Referring to Fig. 7 c, said decoder module 320 is by data comparator 321 among Fig. 6, code data is preserved unit 322, cryptologic array 323, data latches 324 and controller serial number 325 are formed, the clear data output port D6 that code data is preserved unit 322 is connected with a data input port of data comparator 321, the data decryption output port D5 of cryptologic array 323 is connected with another data-in port of data comparator 321, the flowing water data-out port D3 of controller serial number 325 is connected with the respective input mouth of cryptologic array 323, the electronics ID data-out port DATA2 of electronics ID identification module 330 is connected with the respective input mouth of cryptologic array 323, data comparator 321 has an accurate output port S2 of password, it respectively with delay (regularly) circuit 340, command decoder 310 and electronic switch [205], the respective input mouth of power supply adjusting module [203] connects, command decoder 310 has a code data latch instruction output port LE3 who latchs decoded data, it is connected with the respective input mouth of data latches 324, defer time data-out port DATA1 on the data latches 350 is connected with the respective input mouth of data latches 324, and the defer time data-out port D4 of data latches 324 is connected with the respective input mouth of cryptologic array 323.
The 26S Proteasome Structure and Function of cryptologic array 323, code data preservation unit 322, controller serial number 325 and data comparator 321 sees the description of the interlock circuit of Fig. 5 for details.Because the data output unit DATA1 of data latches 350 may be defer time data, code data or other data, and this controller has only password OK output S2 effective, just allow operation, therefore must latch to keep the state output S2 of decoded result code data to other circuit.When command decoder foundation data input CI produced decoding instruction LE3, the code data DATA1 of 324 pairs of inputs of data latches latched, thereby kept the state output of S2.
The course of work of Fig. 5,6 illustrated embodiments is as follows: clock circuit 216 provides the global clock of The whole control circuit 300 work, and entire circuit is worked under the unification of clock signal clk.The clock CLK1 that clock signal obtains via frequency dividing circuit 360 offers the extension operation that holdover timing circuit 340 carries out detonator.The shifting function of data transmit-receive when CLK2 is used to communicate by letter, when receiving data, data are accepted circuit 370 under the coordination of CLK2, signal on the image data line, according to the check results output data latch signal LE2 of data sync head that receives and data, if synchronous head is accurate, data are effective, then output signal LE2 makes latch 350 latch the data that receive.
Data latches 350 latched data are divided into 3 part: operation part CI and give command decoder 310; Electronics ID part DATA3 give electronics ID identification module 330, carries out the differentiation of electronics ID, and data DATA1 delay respectively (regularly) circuit 340 and decoder module 320 write data into units corresponding by command decoder 310 according to decode results.
Electronics ID identification module is preserved the data of unit 332 and compared with being kept at electronics ID data the electronics ID data DATA3 that receives: comparator 313 is the electronics Id data DATA3 that receive and be kept at the ID data DATA2 that electronics ID data preserve in the unit in 332 and compare, if ID number is coincide, then send S1 signal notification instruction decoder 310 and carry out decoded operation, instruction is latched into data in the code data latch 324 if decoding instruction then sends LE3, carry out decode operation: cryptologic array 323 is preserved the ID data DATA2 that unit 332 provides and the algorithm (seeing the relevant portion of Fig. 5 for details) of controller serial number 325 decisions according to electronics ID data, the n4 bit data of preserving in the code data latch 324, be converted to the M encrypt data, the data D6 that the M position encrypt data D5 that data comparator 321 provides cryptologic array 323 preserves in the unit 322 with code data compares, according to comparative result output signal S2 control electronic switch 205, voltage regulator module 203, the operation of extension (regularly) circuit 340, notification instruction is deciphered its 310 decode results simultaneously.
After decoding successfully, command decoder 310 can be carried out the decoded operation of other instruction, if extension data setting output signal LE4 latch data DATA1 is in extension data latches 342; Then export the Prog signal if write electronics Id instruction, control electronics ID data are preserved unit 332 and are write data; Give data transmit circuit 380 if read electronics ID instruction output LE6 signal, after data transmit circuit interpolation synchronous head and data check information, under the coordination of clock signal clk 2, return initiation control device 100 by communication interface 207.Data transmit circuit 380 is sent data and is transmitted completion signal EN9 after sending the data of regular length, allows command decoder 310 to carry out other operation.
Make storage capacitor 202 be charged to the voltage of detonating capsule requirement if the preparation fuze is then exported the PU signal, and export defer time data Load Signal LE7 the data D1 that is kept in the extension data latches 342 is inserted in data initialization/down counter 341; If reset signal RESET is then exported in system's reset instruction, whole system resets; If fuze, output EN3 signal allows data initialization/down counter 341 to delay to operate, after defer time arrives, 341 outputs of data initialization/down counter count down to signal FIRE and give electronic switch 205 detonating primers, while notification instruction decoder detonator has been ignited operation and has been finished, do not ignite as detonator in a period of time of FIRE signal output, command decoder produces discharge instruction PD automatically, discharges the electric energy in the storage capacitor 202 fast.If accurately, all produce the instruction of instruction OK instruction notification initiation system automatically and accurately carry out, if instruction decoding error or non-control of input electronics ID ID then do not return any information for all instruction decodings.
Claims (8)
1, a kind of digital electric detonator controller, comprise the conductor terminal R[10.1 that is connected with detonating control system] and S[10.2], anti-jamming circuit [201], the COM1 of the input of voltage-regulating circuit [203] and communication interface [207] respectively with terminal R[10.1] with S[10.2] be connected, the voltage output end of voltage-regulating circuit [203] is respectively with storage capacitor [202] and by electronic switch [205], the series loop that igniter [206] is formed connects, by a control module of forming by single-chip microcomputer [210] and the clock circuit [216] that is attached thereto, the charging signals PU of control module [210] is connected with the respective input of voltage-regulating circuit [203] respectively with the output of discharge signal PD, the output of the reset signal RST of voltage-regulating circuit [203] is connected with the respective input of control module [210], the time break FIRE output of control module [210] is connected with the corresponding input of electronic switch [205], the communication output TXD of control module [210] is connected with the corresponding port of communication interface [207] respectively with communication input RXD, the output port of power source VCC of voltage-regulating circuit [203] is connected with the power input of control circuit [320] with VSS, it is characterized in that
(1) decoding circuit [320] of a job under the control of control module [210] is arranged, it is by data comparator [311], cryptologic array [314], SI PO shift register A[252], electronics ID[251], incorporate into and go here and there out shift register [255], SI PO shift register B[253] and the code data preservation unit [313] of preserving M position clear data form; SI PO shift register A[252], the FPDP of cryptologic array [314], data comparator [311] connects by bus, the N position code data of input through cryptologic array conversion back output M bit data, is outputed to a data input port of data comparator [311]; Cryptologic array [314], electronics ID[251], incorporate into and go here and there out shift register [255], SI PO shift register B[253] FPDP connect by bus, the FPDP that code data is preserved unit [313] and data comparator [311] is connected by bus, M position clear data fixing in this controller is outputed to another FPDP of data comparator; Data comparator [311] has three enable signal output EN3, EN4, EN5 and an OK signal output part, EN3 is connected with the respective input of electronic switch [205], EN4 is connected with the respective input of voltage-regulating circuit [203], EN5 respectively with SI PO shift register B[253] with electronics ID[251] respective input be connected, the OK signal port is connected with the respective input of control module [210];
(2) control module [210] has two enable signal output EN1, EN2, EN1 and SI PO shift register A[252] respective input be connected, EN2 respectively with SI PO shift register B[253] with electronics ID[251] respective input be connected; Control module [210] has a shift clock signal SCLK output, it respectively with SI PO shift register A[252], incorporate into and go here and there out shift register [255], SI PO shift register B[253] respective input be connected; Control module [210] has a data Load Signal LOAD output, and it is gone here and there out the respective input of shift register [255] and be connected with incorporating into; Control module [210] by serial data line respectively with SI PO shift register A[252] with SI PO shift register B[253] serial data port be connected, control module [210] is gone here and there out the parallel data port of shift register [255] and is connected with incorporating into by parallel data line; Control module [210] has a programming signal PROG output, it and electronics ID[251] respective input be connected;
(3) at electronics ID[251] in be solidified with the electronics ID coding of this detonator.
2, a kind of digital electric detonator controller, comprise the conductor terminal R[10.1 that is connected with detonating control system] and S[10.2], anti-jamming circuit [201], the COM1 of the input of voltage-regulating circuit [203] and communication interface [207] respectively with terminal R[10.1] with S[10.2] be connected, the voltage output end of voltage-regulating circuit [203] is respectively with storage capacitor [202] and by electronic switch [205], the series loop that igniter [206] is formed connects, the output port of power source VCC of voltage-regulating circuit [203] is connected with the power input mouth of programmable logic device (CPLD) [300] with VSS, for it provides working power, clock circuit [216] provides clock signal, it is characterized in that, a detonator safety control circuit [300] that is made of described programmable logic device (CPLD) is arranged, and the structure of this circuit is as follows:
This detonator safety control circuit [300] is made of command decoder [310], decoder module [320], electronics ID identification module [330], holdover timing circuit [340], data latches [350], frequency dividing circuit [360], data reception module [370] and data transmission blocks [380];
The input of frequency dividing circuit [360] is connected with the output of clock circuit [216], it has two output CLK1 and CLK2, CLK1 is connected with the input end of clock of holdover timing circuit [340], and CLK2 is connected with the input end of clock of data reception module [370] with data transmission blocks [380] respectively;
Command decoder [310] has instruction OK to enable output port EN, read electronics ID instruction output end mouth LE6, two-way enable port EN9, instruction OK enable output port EN and read electronics ID instruction output end mouth LE6 respectively with data transmission blocks [380] accordingly input port be connected, enabling input port EN9 is connected with the corresponding output port of data transmission blocks [380], data transmission blocks [380] has a data input port DATA2, be connected with a data output DATA2 who preserves the electronics ID identification module of electronics ID, data transmission blocks [380] has a data output port TXD, is connected with the corresponding port of communication interface [207];
Data reception module [370] has a data output port DATA, be connected with the corresponding port of data latches [350], data reception module [370] has data to receive data latch signal output port LE2 accurate, latch data, be connected with the corresponding port of data latches [350], data reception module [370] has a data input port RXD, is connected with the corresponding port of communication interface [207];
Data latches [350] has data, electronics ID and orders three latch units, difference latch data DATA1, electronics ID value DATA3 and order CI, data latch unit output port DATA1 is connected with the corresponding port of decoder module [320] with holdover timing circuit [340] respectively, electronics ID latch units output port DATA3 is connected with the respective input mouth of electronics ID identification module [330], and the respective input mouth of the output port CI and instruction decoder [310] of order latch units connects;
Electronics ID identification module [330] has a data output port DATA2, it is connected with the respective input mouth of decoder module [320] with data transmission blocks [380], electronics ID identification module [330] has one to show whether input electronics ID is the ID-OK output port S1 of this controller ID, the respective input mouth of its and instruction decoder [310] connects, command decoder [310] has one to write electronics ID instruction output end mouth PROG, and it is connected with the respective input mouth of electronics ID identification module [330]; It is this controller password that decoder module [320] has an expression input password, allow the accurate output port S2 of password to this controller function, it is connected with the respective input mouth of holdover timing circuit [340], command decoder [310] and electronic switch [205], voltage-regulating circuit [203] respectively, command decoder [310] has a decoding instruction output port LE3, and it is connected with the respective input mouth of decoder module [320];
Holdover timing circuit [340] has a time break FIRE output, its respectively and instruction decoder [310] and the corresponding input of electronic switch [205] is connected, the defer time data of command decoder [310] latch output port LE4, defer time data load output port LE7, delay to operate enable control signal output port EN3 respectively with holdover timing circuit [340] accordingly input port be connected;
Command decoder [310] has a reset signal output RESET, it is connected with each interlock circuit of detonator safety control circuit [300] inside or the reseting port of module respectively, the charging signals PU of command decoder [310] is connected with the respective input of voltage-regulating circuit [203] respectively with the output of discharge signal PD, the respective input of the output and instruction decoder [310] of the reset signal RST of voltage-regulating circuit [203] connects, the output port of power source VCC of voltage-regulating circuit [203] is connected with the power input mouth of the detonator safety control circuit [300] that is made of programmable logic device (CPLD) with VSS, for it provides working power.
3, digital electric detonator controller according to claim 1, it is characterized in that, said electronics ID coding is made of 13 16 system numerals, and the 1st, 2 is manufacturing enterprise's code, and the 3rd is the productive year code, the 4th is to produce the month code, 5th, 6 is the date of manufacture code, and the 7th is this detonator tag number code, and the 8th is production teams and groups codes, 9th, 10,11 is to produce the box code, and the 12nd, 13 is serial number code in the box.
4, according to claim 1 or 3 described digital electric detonator controllers, it is characterized in that, a controller running series of number is arranged according to solidifying setup unit [316] in said decoding circuit [320], its serial number data-out port D3 is connected with the cryptologic array.
5, digital electric detonator controller according to claim 2, it is characterized in that: said holdover timing circuit [340] is made up of data initialization/down counter [341] and data latches [342], data latches [342] has the corresponding input port of a defer time data-out port D1 and data initialization/down counter [341] to be connected, the output port CLK1 of frequency dividing circuit [360] is connected with the corresponding input port of data initialization/down counter [341], data initialization/down counter [341] has a time break FIRE output, its difference and instruction decoder [310] is connected with the corresponding input of electronic switch [205], command decoder [310] defer time data are loaded output port LE7, delay to operate enable signal output port EN3 and be connected with the corresponding input port of data initialization/down counter [341] respectively, the accurate output port S2 of the password that detonates of decoder module [320] is connected with the corresponding input port of data initialization/down counter [341]; Data latch unit output port DATA1 is connected with the respective input mouth of data latches [342], and the defer time output port LE4 of command decoder [310] is connected with the respective input mouth of data latches [342].
6, digital electric detonator controller according to claim 2, it is characterized in that, said electronics ID identification module [330] is preserved unit [332] by data comparator [331] and electronics ID data and is formed, electronics ID data are preserved unit [332] an electronics ID data-out port DATA2, it respectively with data comparator [331], decoder module [320] is connected with the respective input mouth of data transmission blocks [380], electronics ID latch units output port DATA3 on the data latches [350] is connected with the respective input mouth that data comparator [331] and electronics ID data are preserved unit [332] respectively, data comparator [331] has an electronics ID-OK output port S1, the respective input mouth of its and instruction decoder [310] connects, command decoder [310] has a control output end mouth PROG who writes electronics ID instruction, and it is connected with the respective input mouth that electronics ID data are preserved unit [332].
7, digital electric detonator controller according to claim 2, it is characterized in that, said decoder module [320] is by data comparator [321], code data is preserved unit [322], cryptologic array [323], data latches [324] and controller serial number [325] are formed, the clear data output port D6 that code data is preserved unit [322] is connected with a data input port of data comparator [321], the data decryption output port D5 of cryptologic array [323] is connected with another data-in port of data comparator [321], the flowing water data-out port D3 of controller serial number [325] is connected with the respective input mouth of cryptologic array [323], the electronics ID data-out port DATA2 of electronics ID identification module [330] is connected with the respective input mouth of cryptologic array [323], data comparator [321] has an accurate output port S2 of password, it respectively with holdover timing circuit [340], command decoder [310] and electronic switch [205], the respective input mouth of power supply adjusting module [203] connects, command decoder [310] has a code data latch instruction output port LE3 who latchs decoded data, it is connected with the respective input mouth of data latches [324], defer time data-out port DATA1 on the data latches [350] is connected with the respective input mouth of data latches [324], and the defer time data-out port D4 of data latches [324] is connected with the respective input mouth of cryptologic array [323].
8, according to claim 2,5,6,7 one of them described digital electric detonator controller, it is characterized in that, said electronics ID coding is made of 13 16 system numerals, and the 1st, 2 is manufacturing enterprise's code, and the 3rd is the productive year code, the 4th is to produce the month code, 5th, 6 is the date of manufacture code, and the 7th is this detonator tag number code, and the 8th is production teams and groups codes, 9th, 10,11 is to produce the box code, and the 12nd, 13 is serial number code in the box.
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| US4674047A (en) * | 1984-01-31 | 1987-06-16 | The Curators Of The University Of Missouri | Integrated detonator delay circuits and firing console |
| US5520114A (en) * | 1992-09-17 | 1996-05-28 | Davey Bickford | Method of controlling detonators fitted with integrated delay electronic ignition modules, encoded firing control and encoded ignition module assembly for implementation purposes |
| CN1267364A (en) * | 1997-06-19 | 2000-09-20 | 恩赛-比克福德公司 | Electronic circuitry for timing and delay circuit |
| CN2350720Y (en) * | 1998-01-15 | 1999-11-24 | 国营云南燃料一厂 | Time delay priming device for electric detonator |
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| CN101338995B (en) * | 2008-06-04 | 2013-05-29 | 北京铱钵隆芯科技有限责任公司 | Electronic detonator control chip and its connection reliability checking method |
| WO2010051776A1 (en) * | 2008-11-10 | 2010-05-14 | 北京铱钵隆芯科技有限责任公司 | Setting flow for delay time of a blasting device and controlling flow for an electronic detonator in an electronic detonator blasting system |
| CN101408397B (en) * | 2008-11-26 | 2013-03-27 | 北京维深数码科技有限公司 | Intrinsic safety type electric detonator detonation system |
| CN101706989B (en) * | 2009-08-05 | 2012-06-06 | 廖英杰 | Control system of wireless remote field programmable digital electronic detonators |
| CN103411484A (en) * | 2013-08-21 | 2013-11-27 | 南通迅翔自动化设备有限公司 | Safe ignition control circuit of electronic detonator |
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