CA952627A - Fault detection and handling arrangements for use in data processing systems - Google Patents

Fault detection and handling arrangements for use in data processing systems

Info

Publication number
CA952627A
CA952627A CA135,854A CA135854A CA952627A CA 952627 A CA952627 A CA 952627A CA 135854 A CA135854 A CA 135854A CA 952627 A CA952627 A CA 952627A
Authority
CA
Canada
Prior art keywords
data processing
processing systems
fault detection
handling arrangements
arrangements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA135,854A
Other languages
English (en)
Other versions
CA135854S (en
Inventor
Kenneth J. H. Hodges
Peter C. Venton
Charles S. Repton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Handel und Investments AG
Original Assignee
Plessey Handel und Investments AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Handel und Investments AG filed Critical Plessey Handel und Investments AG
Application granted granted Critical
Publication of CA952627A publication Critical patent/CA952627A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079—Root cause analysis, i.e. error or fault diagnosis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
CA135,854A 1971-03-04 1972-02-29 Fault detection and handling arrangements for use in data processing systems Expired CA952627A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB599471 1971-03-04

Publications (1)

Publication Number Publication Date
CA952627A true CA952627A (en) 1974-08-06

Family

ID=9806471

Family Applications (1)

Application Number Title Priority Date Filing Date
CA135,854A Expired CA952627A (en) 1971-03-04 1972-02-29 Fault detection and handling arrangements for use in data processing systems

Country Status (9)

Country Link
US (1) US3814919A (nl)
JP (1) JPS5348060B1 (nl)
AU (1) AU464228B2 (nl)
CA (1) CA952627A (nl)
DE (1) DE2210325C3 (nl)
GB (1) GB1344474A (nl)
NL (1) NL181149C (nl)
SE (1) SE449669B (nl)
ZA (1) ZA721305B (nl)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1422952A (en) * 1972-06-03 1976-01-28 Plessey Co Ltd Data processing system fault diagnostic arrangements
USRE31318E (en) * 1973-09-10 1983-07-19 Computer Automation, Inc. Automatic modular memory address allocation system
GB1509193A (en) * 1974-04-17 1978-05-04 Nat Res Dev Computer systems
US3911402A (en) * 1974-06-03 1975-10-07 Digital Equipment Corp Diagnostic circuit for data processing system
JPS596415B2 (ja) * 1977-10-28 1984-02-10 株式会社日立製作所 多重情報処理システム
US4181940A (en) * 1978-02-28 1980-01-01 Westinghouse Electric Corp. Multiprocessor for providing fault isolation test upon itself
GB2059652B (en) * 1979-09-29 1983-08-24 Plessey Co Ltd Memory protection system using capability registers
US4446514A (en) * 1980-12-17 1984-05-01 Texas Instruments Incorporated Multiple register digital processor system with shared and independent input and output interface
DE3278051D1 (en) * 1981-04-16 1988-03-03 Ncr Co Data processing system having error checking capability
US4458312A (en) * 1981-11-10 1984-07-03 International Business Machines Corporation Rapid instruction redirection
US4485472A (en) * 1982-04-30 1984-11-27 Carnegie-Mellon University Testable interface circuit
GB2158622A (en) * 1983-12-21 1985-11-13 Goran Anders Henrik Hemdal Computer controlled systems
US4683532A (en) * 1984-12-03 1987-07-28 Honeywell Inc. Real-time software monitor and write protect controller
US4797853A (en) * 1985-11-15 1989-01-10 Unisys Corporation Direct memory access controller for improved system security, memory to memory transfers, and interrupt processing
ATE71788T1 (de) * 1986-03-12 1992-02-15 Siemens Ag Verfahren zum betrieb einer fehlergesicherten hochverfuegbaren multiprozessorzentralsteuereinheit eines vermittlungssystemes.
US5564030A (en) * 1994-02-08 1996-10-08 Meridian Semiconductor, Inc. Circuit and method for detecting segment limit errors for code fetches
US5577219A (en) * 1994-05-02 1996-11-19 Intel Corporation Method and apparatus for preforming memory segment limit violation checks
US5822786A (en) * 1994-11-14 1998-10-13 Advanced Micro Devices, Inc. Apparatus and method for determining if an operand lies within an expand up or expand down segment
US6021261A (en) * 1996-12-05 2000-02-01 International Business Machines Corporation Method and system for testing a multiprocessor data processing system utilizing a plurality of event tracers
JP3545252B2 (ja) * 1999-03-30 2004-07-21 富士通株式会社 情報処理装置
US6654909B1 (en) * 2000-06-30 2003-11-25 Intel Corporation Apparatus and method for protecting critical resources against soft errors in high performance microprocessors
JP4941954B2 (ja) * 2005-07-25 2012-05-30 ルネサスエレクトロニクス株式会社 データエラー検出装置およびデータエラー検出方法
JP4458119B2 (ja) * 2007-06-11 2010-04-28 トヨタ自動車株式会社 マルチプロセッサシステム及びその制御方法
JP4571996B2 (ja) * 2008-07-29 2010-10-27 富士通株式会社 情報処理装置及び処理方法
JP5574230B2 (ja) * 2010-04-28 2014-08-20 株式会社日立製作所 障害処理方法および計算機
US9542254B2 (en) * 2014-07-30 2017-01-10 International Business Machines Corporation Application-level signal handling and application-level memory protection
US9740551B2 (en) * 2014-12-02 2017-08-22 International Business Machines Corporation Enhanced restart of a core dumping application

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3201760A (en) * 1960-02-17 1965-08-17 Honeywell Inc Information handling apparatus
US3286239A (en) * 1962-11-30 1966-11-15 Burroughs Corp Automatic interrupt system for a data processor
US3387276A (en) * 1965-08-13 1968-06-04 Sperry Rand Corp Off-line memory test
US3517171A (en) * 1967-10-30 1970-06-23 Nasa Self-testing and repairing computer
US3599179A (en) * 1969-05-28 1971-08-10 Westinghouse Electric Corp Fault detection and isolation in computer input-output devices
US3692989A (en) * 1970-10-14 1972-09-19 Atomic Energy Commission Computer diagnostic with inherent fail-safety

Also Published As

Publication number Publication date
NL181149C (nl) 1987-06-16
JPS5348060B1 (nl) 1978-12-26
AU464228B2 (en) 1975-08-01
ZA721305B (en) 1972-11-29
AU3947972A (en) 1973-08-30
GB1344474A (en) 1974-01-23
DE2210325A1 (de) 1972-09-14
DE2210325B2 (de) 1979-11-08
NL181149B (nl) 1987-01-16
US3814919A (en) 1974-06-04
SE449669B (sv) 1987-05-11
NL7202889A (nl) 1972-09-06
DE2210325C3 (de) 1980-07-31

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