CA2335450A1 - Method and system for controlling a digital subscriber line - Google Patents

Abstract

A system and network interface for an ADSL modem. The modem assembly is formed from a PCI interface chip and a processor and an ASIC on a board, associated with a modem chip. The interface chip and processor can be controlled via downloaded code. A user interface is also defined that allows the controlling PC to issue commands to the modem assembly.

Description

METHOD AND SYSTEM FOR CONTROLLING
A DIGITAL SUBSCRIBER LINE
Cross Reference To Related A~plication_s This application claims the benefit of U.S. Provisional Application No. 60/090,551, filed June 24, 1998.
Field The present system describes a network interface for ATM
and/or ADSL communication.
Backaround Asynchronous transfer mode or ATM is a telecommunications protocol that allows packet based transfer of information. Cells of information are sent across an information network defined by a number of nodes. The information is sent from node-to-node.
An ATM transport network (i.e., a communication network which transmits information using ATM cell packets) is known to include an ATM layer and a physical layer. The ATM layer is based on the virtual path/virtual channel (VP/VC) concept. The VC
identifies a unidirectional communication capability through which ATM cells are transported. One or more virtual channels (VCs) can be used in a particular virtual path (VP), which also identifies another level of the communication capability through., which the ATM cells are transported.
An ATM cell is the smallest information unit. It includes a header field of 5 bytes or octets, and a payload field of 48 bytes or octets. The header field includes VP and VC identifiers.
These identifiers are used for routing the information to an intended destination).
Communication in known ATM networks is initiated during a connection setup, after which cells belonging to one connection follow a predetermined path defined by the VPI and VCI on a particular link. The connection control information transferred during setup utilizes a unique Signaling VC (SVC) which is included in the VP. The SVC is identified by the virtual path ID
(VPI) and virtual channel ID (VCI).
Cells destined for many different end points are sent over a single physical communications circuit. The header of each cell includes a channel identifier which is used to control the 2o routing of the cell through the ATM system. The channel identifier determines routing of the cell.

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In a typical ATM system there are 256 possible VPIs and 65,536 possible VCIs; thus, there are 16,777,216 possible channel identifiers (VPI/VCIs). One of the many challenges in designing, an ATM network is how to handle this huge number of corrections.
Specified traffic control protocols are used to determine the routing of the information. The routing is controlled using conventional addressing techniques.
Further details of ATM are well known in the art. In addition, different flavors and sub-types of ATM are known, including digital subscriber line ("DSL"), asymmetric digital subscriber line("ADSL"), and other flavors of digital subscriber line ("XDSL").
Digital subscriber line techniques or DSL techniques are used to allow communication at extremely high speed over existing copper wire. "ADSL" provides high speed from the central office to the user, and lower speed in the reverse direction. This recognizes that a user wants to download most of the information, -4_ PATENT
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and upload relatively less information. ADSL makes the best possible use of bandwidths for certain applications and hence has become extremely popular.
All of these formats, however, are relatively complicated.
The "modem" that handles the communication must itself be a fairly sophisticated processing unit. When this modem is used in a personal computer, this processing unit needs to use the PC's user interface.
Summary to The present system uses a special combination of structure to enable controlling and interfacing with an ADSL modem in a personal computer. The present system uses a modem, a processor, a PCI interface and a special purpose chip. This combination allows the software running on the personal computer to be moved through the computer, to the PCI bus, to the modem.

PATENT
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Brief Description of the Drawinas These and other aspects will now be described in detail with respect to the accompanying drawings, wherein:
FIG. 1 shows a general network architecture of an ATM
network;
FIG. 2 shows a programming interface;
FIG. 3 shows the application flow between the PC and modem;
FIG. 4 shows a block diagram of the network interface card preferably used according to the present system;
FIG. 5 shows a block diagram showing the clocking of the present system;
FIG. 6 shows a flowchart of the different power-up modes;
FIG. 7 shows different user selectable operations;
FIG. 8 shows the reset flowchart;
FIG. 9 shows dying gas used during reset;
FIG. 10 shows a power supply layout;
FIG. 11 shows a block diagram of the application specific integrated circuit ASIC which can be used;
FIG. 12 shows a network interface diagram with components;
FIG. 13 shows a flowchart showing some aspects of installation;
FIG. 14 shows a network interface diagram;
FIG. 15 shows a screen shot of windows autodetection;

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FIG. 16 shows a windows NP installation;
FIG. 17 shows a flowchart of different operations of installation; ' FIG. 18 shows a screen shot of application parameters;
FIG. 19 shows a service monitor screen shot;
FIG. 20 shows a service connection screen shot;
FIG. 21 shows a network connection screen shot;
FIG. 22 shows the modified network configuration dialog;
FIG. 23 shows connecting using asynchronous transfer mode over ATM connection dialog;
FIG. 24 shows the setup of global ATM;
FIG. 25 shows the setup of network performance for global ATM;
FIG. 26 shows the optionally configuration parameters tab for ATM;
FIG. 27 shows a download flowchart;
FIG. 28 shows a preferred data structure used for the download flowchart;
FIG. 29 shows a basic block diagram of the ADSL NIC
firmware;
FIG. 30 shows a first diagram of mailboxes used to communicate the PCI bus and the controller;
FIG. 31 shows a second block diagram using only part of the mailboxes;

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FIG. 32 shows a flowchart of operation of the mailboxes;
FIGS. 33-46 show ADSL open command flows;
FIG. 47 shows a basic installation process;
FIG. 48 shows the flow diagram for installing new services;
FIG. 49 shows a flow of power-up;
FIG. 50 shows the loading operations occurring on power-up;
FIG. 51 shows a memory map of the hydrogen chip sets;
FIG. 52 shows another flowchart of power-up;
FIG. 53 shows mailbox operations with a hydrogen chip set;
FIG. 54A shows connecting to the hydrogen; and FIG. 54B shows direct memory access to the hydrogen.
Description of the Preferred Embodiments A computer system is connected to the information network through an interface card also called a network interface card or NIC. The ADSL network can be any of a number of different networks, including but not limited to an asynchronous transfer mode or ATM network. One challenge is providing an orderly and useful control of the ADSL connection interface from the host computer system. Since the ADSL NIC is often installed in a 2o personal computer, one desirable way of controlling this is via software routines on the computer. The present description _8_ PATENT
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assumes that the computer is a "PC", but other computers and computer type could alternately be used.
The present application describes programmable interfaces which provide maximum flexibility to control configuration and maintenance of the complex ADSL connections to be configured and maintained.
The overall block diagram of the general network architecture is shown in FIG. 1. The embodiments described herein can operate as part of an ATM system. An ADSL interface to card for communicating with an ADSL network is described. More generally, however, this system can operate within any system that carries out data communication by dividing a total message into separate addressed packets, or more specifically in an asynchronous transfer mode system.
A PC 125 is, for example, an Internet service provider that provides Internet service to a number of users 98, 99, and others that are not shown. PC 125 includes an ADSL network interface yard or "NIC" 110. NIC 110 connects to the telephone line 112 via a plain old telephone system (POTS) splitter 114. Other POTS
equipment 117 can include conventional telephone equipment.
A conventional ATM subscriber access multiplexer or "ASAM"
120 connects from telephone line 112 to ATM network 115. The _9_ PATENT
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ASAM 120 multiplexes a number of communications via the ATM
network 115. In this system, the NIC 110 becomes a node connecting to the ATM network 115 which allows routing to other nodes, such as second node 150. While only one second node 150 is shown, the ATM network is typically connected to literally thousands of other nodes shown generally in FIG. 1. Any of the multiple nodes can send or receive a message. The connection among these nodes are based on their VCI/VPI identifiers.
Node 1 receives a number of cells that will form ATM
to messages.
The ADSL NIC must communicate both with the PC and with the desired network. This can be done using a combination of hardware, software, and firmware running on different platforms, as described herein and shown in FIG. 2.
The programming interface is shown as modem control interface 200 lying between the PC application shown as 202 and the firmware assembly shown as 204. The firmware assembly 204 can include the management application 206 on the computer and modem software 208 running in the modem.
A modem software ATI 210 communicates between the management application and the modem software.

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One issue with ADSL is caused by the PC software controlling the ADSL modem. This often requires a communication pad between the very top layer of the PC user and the ADSL modem. The communication pad communicates control information and/or retrieves statistics from the modem.
The PC itself is often physically separate from the modem.
For example, the modem can be on the PCI bus of the PC. This may require that the modem be polled remotely.
One function of the system described herein is to allow PC
software to communicate with the software modem.
This interface operates by agreeing on how the data will arrive and how the data will be retained. The software ADI
controls and receives ADSL status. In general this data package travels from the very top of the PC application, typically running in Windows, all the way down through the Windows software stack. It arrives at the PCI bus 220, goes across the PCI bus, into the modem processor. The modem processor passes the data across the processor/modem mailbox, which can be a software mailbox implemented in the modem. Data can also flow in the opposite direction by taking the opposite control route.

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By using this system, the end user sitting in front of a computer can use the graphical interface of the computer to control the complex ADSL configuration.
A unique data package is described herein which includes a destination address and source address. The package allows multiple communications even with multiple entities in the ADSL
hardware via the single channel across the PCI. This can be used when the processor is running multiple applications that use the modem. The destination address defines addresses including an ATM processor or an ADSL processor. The proper destination address assures that the correct entity will receive this package, process it, and send it back.
The source address is the PCI application running the modem.
Alternately, there could be multiple applications running in the PC. For example, multiple windows could be open in the PC, each of which has an application that requires information from the ADSL modem. Each running application can have a different source address, and can send the same information down to the ATM or ADSL modem in order to retrieve information. In return, the source address becomes the correct recipient back up in the PC.
The destination address and source address effectively allows PATENT
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multiple applications to communicate with multiple hardware in the ADSL using a single socket channel.
FIG. 3 shows the flow of the data transfer in this way, and' FIG. 4 shows a more detailed diagram of the PC-NIC.
FIG. 3 shows the PC 300 running two separate applications 302 and 304. Each of the applications in this example is using the ADSL modem to obtain data. The PC sends two different messages shown as 306 and 308, respectively. The first message indicates that it is from application one, by indicating a source l0 address 320 of application one. The messages are sent from the PC 300 to its PCI bus 320, and to the modem. The PCI bus interface in the modem 325 receives the data therefrom. The data is in the specified format that it can be received. This received data is passed to the processor of the modem 330, and then to the ADSL modem 390 and to the ADSL network 350. This data may be requests for status, etc.
The disclosed embodiment uses an internal PC printed circuit yard in the PCI form factor. A block diagram of the board is shown in Figure 4. The board includes, inter alia, an On Board Controller 400 ("OBC") that can include a processor, an FPGA/ASIC
assembly 910, an SAR "Hydrogen" chip set 420, power supply 430, PATENT
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and PCI bus connector 440. The assembly runs Modem initialization, Power on Self Test (POST), performance monitoring, and control interface routines among others.
The Hydrogen 920 includes firmware that runs download software, control information passing, and POST initiation.
The ADSL NIC-ATM conforms to all physical requirements for a full size PCI bus card. Throughout this document, all references to the PCI bus are as defined in the PCI Local Bus Specification, Revision 2.1.
The ADSL NIC-ATM has the following dimensions:
Length 12.283" +/- 0.005"
Height 9.2" +/0 0.05"
Assy. thickness < 0.745"
PCB thickness 0.062" +/- 0.008"
Comp. height (comp. side) <0.57"
Comp. height (back side) <0.105"
The ADSL NIC-ATM PCB edge connector is configured as a 32 bit, 5 volt PCI bus interface card. An external interface is through an RJ-24 PCB mount connector using pins 2 and 5. This 2o connector is accessed through a card edge mounting plate mounted on the PCB. An optional RJ-45 connector can be provided as a PATENT
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"stuffing" option, i.e. an option that can be added on to the basic structure.
At least one red/green bi-color LED 399 is mounted on the PCB in a location to be visible through the card edge mounting plate.
Clock distribution on the board requires multiple domains.
The different clocks and their formation are illustrated in FIG.5. This includes Clock domains that exist on the Hydrogen IC, the PCI clock domain and the ARM 400 clock also have their own domains.
The Hydrogen chip takes the PCI 33 MHZ clock 502 from the PCI bus edge connector 440 to the Hydrogen IC 420. The Hydrogen IC is placed to minimize the distance of this clock routing.
The Hydrogen 420 operates at 32 MHZ internally. This 32 MHZ
clock 505 is derived from a 8 MHZ oscillator 504 connected to an external 8 MHZ crystal 502. The 8 MHZ crystal is placed to minimize the oscillator input and output trace lengths. Each side of the crystal is coupled to ground through 12 pF caps 510, 512.
A 1 M ohm shunt resistor 514 across the crystal is also provided.
The 32 MHZ clock 505 is also output from the Hydrogen IC to the ASIC 410. This output is active whenever the 8 MHZ oscillator is operating.

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A 16 MHZ "expansion bus" clock 515 is output from the Hydrogen IC to the ASIC. The ASIC is positioned to minimize the trace length of this clock signal. The bus clock is active whenever the system clock is operating.
The ASIC generates Utopia TXCLK 516 and RXCLK 517 signals and derived from the Expansion Bus Clock. These clock signals operate at 16 MHZ and are present whenever the Expansion Bus Clock is operating. The 16 MHZ operating frequency is within specified operating parameters of both the SACHEM (25 MHZ) and Hydrogen (33 MHZ) Utopia interfaces.
The TXCLK is routed from the ASIC through a level shift buffer 520 to minimize skew between TXCLK and TXD[0:7] when the Txdata is received at the SACHEM Utopia interface.

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The level shift buffer can be part of the ASIC 410.
The OBC clock 526 is generated using an on board 25 MHZ
oscillator 525. The oscillator is positioned near the OBC to minimize the length of this clock routing. The oscillator operates whenever power is applied to the board. This clock is also routed to the ASIC 410 for distribution/level shift to the SACHEM OBC interface.
The ADSL-C clock 530 is derived using an on board crystal driver/receiver 535. A 35.328 MHZ/crystal 534 is placed on the l0 board to minimize the length of these signal traces. The external circuit to provide VXCO control is implemented as specified by Alcatel.
The Master Clock output from the ADSL-C 450 is routed to the SACHEM IC 460.
The Master Sachem Clock is received from the ADSL-C. Routing distance for this signal is also minimized.
The PCLK input is routed from the ASIC at the processor clock frequency.
The DUART clock is generated using an on board oscillator and an external 1.8432 MHZ Crystal 540. The crystal is placed to minimize the oscillator input and output trace lengths. Each side WO 99/67911 PCT/US99/14372 ' _1~_ PATENT
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of the crystal is coupled to ground through a 12 pF cap. A 1 M
ohm shunt resistor across the crystal is provided.
Initialization of the modem can be carried out on power up or on reset.
The power up routine is shown in Figure 6. Normal and standalone modes of power up are supported. The mode is controlled by jumper selection of the~state of the standalone pin 411 of the ASIC.
The operation of power up proceeds as shown in the flowchart l0 of FIG.6. Step 600 first determines the state of the jumper 411.
If the jumper is off, normal power up is started at 602. When power is applied to the board, the Hydrogen IC, ASIC, OBC, and modem components are held in a reset state at 602. PCI bus configuration is performed at 604 by loading PCI configuration parameters from the serial boot PROM 412.
After PCI bus configuration is complete, the Hydrogen run time software is downloaded via the PCI bus 440, to the onboard PCI bus boot ROM 422 at 606. A number of user-defined configuration options are allowed, and are set via the user interface. One such option is the-Hydrogen self test. Some of these options are shown in Figure 7. Upon completion of this download at 600, the Hydrogen IC is released from reset, and _1$_ PATENT
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executes a series of self test functions at 608 if Hydrogen self test is selected at 702. Upon completion of these tests, the Hydrogen 420 downloads the run time software image to the OBC
DRAM 402, at 610, from the Host. After completion of this download, the Hydrogen 420 sends a command to the ASIC 410 to the OBC 900 to release from reset at 612. The OBC then executes optional self test functions if selected. The OBC performs modem initialization and setup at 614.
After completion of all self test and setup functions, both the Hydrogen and OBC are operational.
If the jumper 411 is detected as being on at 600, standalone power up mode is selected. This mode is used, for example, for testing and development. In this mode, power is applied to the board, causing the hydrogen 420 to operate. The standalone routine executes PCI configuration at 622, followed by download of code at 624. Optional self test functions and hydrogen initialization are carried out at 626. After completion, normal execution is carried out.
The OBC starts in standalone mode by bootstrapping from flash 404 at 628. Optional self test functions are carried out at 630, and OBC initialization and modem setup at 632, followed by normal execution.

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Two modes of reset are also supported and controlled by jumper selection of the state of the standalone jumper 411 of the ASIC 410. If a failure is detected by the host software during reset, the host software informs the user of the suspected failure via the user interface.
The reset flowchart is shown in FIG. 8. If the jumper is off at 800, normal reset is declared.
A reset can be initiated from the PCI bus by assertion of ~he RESET# line detected at 800. The reset from PCI can only be l0 alone after the assembly has been configured and is operational, with operating power still available to the assembly. If the dying gasp interrupt has been enabled for the assembly (at 706), a dying gasp message is transmitted at 804 before implementing the reset function. The dying gasp signal is a signal that is sent from the modem to applications and/or services that are communicating with the modem. The signal tells these services that the modem is about to be reset. Then, a power up (starting step 602) is called executing the power up instructions 602-614.
A "soft" reset can be initiated via a command from the Host detected at 810. Soft reset first carries out hydrogen bootstrap at 812. This is optional depending on soft reset definition. An optional hydrogen self test functions is carried out at 814.

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Hydrogen initialization is then done at 816. OBC download is optional (shown as 708) depending on soft reset definition, and is carried out at 818. OBC self test functions again optional, are done at 820. OBC initialization and modem setup are done at 822. Then, the normal OBC and hydrogen operation continues.
If the jumper 411 is on at 800, standalone reset is declared. A reset can then be initiated from the PCI bus by assertion of the RESET# line at 829. Note that the use of #
after a signal name indicates an active low signal. This signal holds the OBC in reset at 830 (by the ASIC) for 16,384 clock cycles to ensure stable clock and VCC conditions. After this a complete power up cycle is called at 806. The ASIC then releases the OBC from reset for normal initialization functions to proceed.
When a "soft" reset is initiated via a command from the host at 832, the following sequence is executed by the Hydrogen IC:
~ Hydrogen bootstrap (optional depending on soft reset definition) at 839 ~ Hydrogen self test functions (optional) at 836 ~ Hydrogen initialization at 838 ~ Normal Hydrogen operation PATENT
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The OBC then executes the following sequence:
~ Bootstrap from Flash 404 (optional depending on soft reset definition) at 840 self test functions (optional) at 842 ~ OBC initialization and modem setup at 844 ~ normal execution When the standalone mode is selected, the PC-NIC provides a push button reset capability.
"Dying gasp" is implemented whenever commanded by the Host l0 processor software selected at 706. This function is implemented as part of a controlled power down/shutdown sequence for the Host or a Host application occurring under the control of the Host operating system.
The PCI-NIC can generate a Dying Gasp message 804 responsive to a hard reset initiated by assertion of the PCI bus RESET# line while power is still applied to the PC-NIC. An alternative is shown in Figure 9. This support is provided by allowing the OBC
400, under software control, to enable a SAR-RESET# signal, to generate an interrupt at 902 rather than an OBC reset signal.
The OBC then produces the Dying Gasp at 904. The OBC 400 then PATENT
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initiates a self reset at 908 by first disabling the RESET
interrupt at 906 and then enabling the RESET signal to the OBC.
This implementation of Dying Gasp requires that the time to generate the dying gasp is less than the time required to start downloading the OBC code. Since a hard reset will initiate a complete restart of the computer and the operating system (on the order of several seconds minimum), the dying gasp message will be complete long before the download of code can begin.
No Dying Gasp message will be generated by unexpected power loss to the PC-NIC.
Switched +12 Volts can also be output to provide remote power for an active caps splitter. This output is current limited to 50 ma. and is intended for application in European markets.
Hydrogen IC
The Hydrogen IC is completely described in the CL-PS7900 data book from ATML and Cirrus Logic. Functions implemented in this IC include:
~ DRAM controller ~ PCI bus interface ~ Expansion Bus PATENT
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~ Utopial Bus IF
~ ATM AFE
~ Watchdog Timer ~ UART
~ GPIO
~ Timer Hydrogen Memory Map Memory Region Start Address Length Config. Regs 10000000 C

Control/status 10000100 10 List Mgr. regs 10000200 50 Timer 10000400 10 Watchdog 10000700 8 Network config 10000900 18 ASIC Registers 20000000 18 OBC memory 20100000 100000 Modem registers 20200000 10000 * all addresses are in hex notation -24- ' PATENT
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PCI bus interface The NIC uses the PCI bus interface of the Hydrogen chip to implement the PCI rev. 2.1 interface. The PCI bus pins on the Hydrogen chip 420 is connected to the PCI bus connector 440.
Boundary scan on the PCI bus jumpers TDI to TDO.
The Hydrogen IC 420 requires the two Clock inputs described above. Clock 502 is for the PCI bus interface, and clock 501 is for internal processing. The Hydrogen 920 also generates output clocks for expansion bus operation, system clock, and reference clock.
The PCI Bus Clock input 502 is provided from the PCI bus. It operates at 33.33 MHZ (30 nsec period) maximum. This clock is used for all PCI bus functions and the PCI bus controller.
The ARM system clock input is a 64 MHZ internal system clock that is derived from the 8 MHZ crystal 506. A clock input ClkIn and crystal driver output (ClkOut) are provided on the Hydrogen chip to drive this crystal. The 8 MHZ clock drives an internal phase locked loop that generates the on board system clock. This is used to generate all on board clock signals for the Hydrogen IC.

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Clock outputs The following clocks are provided by the Hydrogen IC.
~ Expansion Bus Clock 515 16 MHZ
~ CLK32 505 32 MHZ system clock Each clock output is filtered appropriately for electromagnetic coupling considerations.
The Hydrogen IC can include up to 16 Mbits of DRAM.
~ 256K X 32 bits ~ 512K X 32 bits l0 The DRAM multiplexed address and CAS/RAS signals are provided by the Hydrogen IC. DRAM resides in address space starting at 10000(h). Each DRAM device is provided with a 0.1 uF
decoupling capacitor, and DRAM chips share a single 10 uF
decoupling capacitor.
Up to 8Kbits of serial EEPROM 422 is interfaced via the IZC
bus of the Hydrogen chip.
A serial PROM 412 is used to store the PCI configuration parameters and is provided and connected to the GPIO pins.

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Utopia Interface The UTOPIA level 1 interface of the Hydrogen IC is connected to the ADSL Modem chip 450, the ASIC 410, which includes a level shifter therein. Connections are as follows:
RXD[0:7] Connected directly to ADSL Modem chip RXCeIIAv Connected directly to ADSL Modem chip RXClk Connected to ASIC to provide data xfer clock RXSOC Connected directly to ADSL Modem chip TXCeIIAv Connected directly to ADSL Modem chip TXClk Connected to ASIC to provide data xfer clock TXD[0:7] Connected to ADSL Modem through level shifter nRXEN Connected to ADSL Modem through level shifter NTXEN Connected to ADSL Modem through level shifter TXSOC Connected to ADSL Modem through level shifter [drawing) Utopia outputs from the Hydrogen IC are TTL outputs. These signals are level shifted by ASIC 410 and routed to the SACHEM IC
460. No tristate of these signals is used.
Inputs to the Hydrogen IC from the SACHEM IC are equipped with 10 Kohm pull up resistors to prevent floating on these lines when the SACHEM outputs are tristated.

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Complete I/0 specifications for the Hydrogen IC are included in the Hydrogen CLPS7900 data book. Some specific I/0 characteristics are:
Parameter Min Max Input Low Voltage -0.5V 0,$V

Input High Voltage 2.OV VCC

Output Low Voltage 0.4V

Output High Voltage 2.4V VCC

I/0 capacitance lOpF

Output signals from the Hydrogen IC 420 are 5 Volt TTL
outputs. Corresponding inputs to the Sachem IC 460 are 3.3 Volt inputs that are not 5 Volt tolerant. A level shift is performed to interface them. Level shifting is performed using a 74LPT244 non inverting buffer or equivalent with propagation delay of less than 5.0 nsec worst case.
Data is transmitted on one edge of the clock and latched on the opposite edge of the clock by the receiver. Skew introduced between the clock and data is a critical parameter to be controlled. The Txclk signal is also routed through the level shifter to minimize skew between the data and clock signals. This PATENT
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results in worst case skew of-3.2 nsec which is negligible at the 16 MHZ (62.5 nsec period).
An 8 KHz clock supplied by the SACHEM modem 460 is routed to GP103. This pin is an 5 volt I/0 pin, and has required protection against over voltage conditions being applied to this pin by inadvertent programming of the Hydrogen I/O pin on the PC-NIC.
An optional, debugging, ATM25 interface 423 is used to facilitate firmware and software development. The Utopia l0 interface to the ADSL modem chip is disconnected so that only one of the UTOPIA or ATM25 interface can be used at a time on the Hydrogen chip.
One pin of the Hydrogen GPIO is used to drive the bi-color LED 399. The LED is given to indicate more information about the modem. Red is used to indicate power on, but no ADSL line sync having been established, or that line sync has been lost. Green is used to indicate power on and ADSL line sync established.
The Hydrogen IC DUART I/0 pins are connected to a three pin header 424 to assist in software debug and development for run time software.
The power supply layout is shown in Figure 10. The Hydrogen Chip draws its operating power from the PCI bus supplied 5VDC

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using less than 400 ma of current. Decoupling associated with this device includes a 10 uF cap, and 8 0.1 uF cap.
+5 Volt Power is isolated from the PCB +5 Volt distribution using an inductive element 1002. This creates a +5 Volt Node specific to this IC to which the decoupling is referenced. The clock oscillator use this same unique +5V node.
Boundary Scan pins are connected to test points to allow a boundary scan test of the Hydrogen IC.
The FIG. 9 block diagram shows an ASIC 410. The ASIC
l0 provides a control interface between Hydrogen, and the SACHEM
modem chip 460, a control interface between the Hydrogen 420 and the OBC processor 400, a level shifter for control signals between Hydrogen 420 and SACHEM 460, a level shifter interface between OBC 900 and SACHEM 460, a DRAM refresh circuit for OBC
DRAM 402, and an address Decode and control signal generation for the DUART 470.
The ASIC is implemented in 3.3 Volt logic with a combination of 5 Volt and 3.3 Volt I/0. An FPGA, or logic gates defined using hardware definition language can alternately be used for 2o development or final product. These are implemented using a 3.3 Volt device with 5 Volt tolerant I/O.

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Aydrogen Interface The ASIC to Hydrogen interface is implemented to allow 5 Volt TTL compatible signals. The ASIC appears to the Hydrogen IC
as memory mapped I/0 registers, two blocks of expansion memory (OBC memory and Modem registers) on the Hydrogen Expansion bus and as a set of control/interrupt signals. These signals are defined as:
~ DQ[3 1:0] Bi-directional address/data bus connected to Hydrogen IC

IOWait Output to Hydrogen IC to insert wait states ALE Input from Hydrogen IC to indicate valid address present BusClk Input from Hydrogen providing l6Mhz bus clock WRS# Input from Hydrogen indicating write of data to ASIC

RDS# Input from Hydrogen indicating read of data from ASIC

RST# Input from Hydrogen indicating Bus reset IRQ# Output to for signaling interrupt events Hydrogen from 80960 interfac e or from the SACHEM interface PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
Register definition Registers reside in the Hydrogen expansion memory space starting at base address 20000000(h). The registers and their offset addresses are:
00 Control/Status 04 IRQ Enable 08 IRQ Source OC IRQ Status OBC mailbox to Control Statua Bit definitions for this register are:
Bit Name Commanta Reaet ~

00 R/W OBC reset Indicates state of OBC reset line.Set When set, OBC is reset and SAR has control of OBC bus. When clear OBC has control of OBC bus.

O1 R/W Modem resetIndicates state of Modem reset Set line.

When set Modem is reset. When clear Modem released from reset.

PATENT
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02 R/W Modem Bus Indicates state of Modem bus control.Set En When set the SAR has control of MODEM

I/O bus.~When clear OBC has control of Modem I/0 bus.

3.1.1.2 IRQ Enable Bit definitions for this register are:
Bit Name Cammenta Reset ~

00 R/W Modem IRQENWhen set enables IRQ generation Clear from the Modem chipset. When clear IRQ generation is disabled. This function is only operational when the Modem Bus enable line (Bit 2 of Control register) is set.

O1 R/W Mbox WIRQENWhen set enables IRQ generation Clear when the OBC writes to the mailbox register.
When cleared IRQ generation is disabled.

02 R/W Mbox RIRQENWhen set enables IRQ generation Clear when the OBC reads from the mailbox register.

When cleared IRQ generation is disabled.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
IRQ Source Bits in this register are. read only. Only IRQ sources that have been enabled are indicated in this register. Any bits set in this register are cleared upon completion of reading this register. Bit definitions for this register are:
Bit Name Commeats Reset #

00 R Modem When set indicates IRQ generationClear IRQ from the Modem chipset. This function is only operational when the Modem Bus enable line (Bit 2 of Control register) is set.

O1 R Mbox WIRQWhen set indicates IRQ generationClear from an OBC write to the mailbox register.

02 R Mbox RIRQWhen set indicates IRQ generationClear from an OBC read from the mailbox register.

IRQ Status Bits in this register are read only. These bits reflect the status of IRQ sources regardless of enabled/disabled status. This PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402fUSP)WO HMPI
register can be used for polled operation. Bit definitions for this register are:
Bit Name Commeata Reset ~

00 R Modem STATWhen set indicates IRQ request Clear from the Modem chipset. This function is only operational when the Modem Bus enable line (Bit 2 of Control register) is set.

O1 R MboxWSTAT When set indicates that the OBC Clear has executed a write to the mailbox register.

02 R MboxRSTAT When set indicates that the OBC Clear has read the mailbox register.

OBC mailbox This register is a 16 bit read/write register that transmits data to/from the OBC. Writes to this register generate an to interrupt to the OBC 400 (when enabled by the OBC). When this register is read, data sent by the OBC 400 is provided to the SAR

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
420. Read actions also generate an interrupt to the OBC (when enabled by the OBC).
Commands and responses to service requests are handled through this mailbox.
The resets control access to certain registers. The OBC
reset bit is bit 0 of the control/status register. When set, the SAR 420 has direct read/write access to the 256K X 32 OBC memory block for code/data download or upload. This memory block resides at address 20100000(h) of the Hydrogen expansion bus. When the l0 Modem reset bit 1 of the control/status register is clear, and the Modem Bus En bit 2 of the control/status register is set, the SAR has direct read/write access to the modem registers. This register block resides at address 20900000(h} of the Hydrogen expansion bus.
The ASIC 410 also provides an interface to the OBC 400 to allow communication with the Hydrogen IC 420 as well as to perform level shifting between the OBC bus and the SACHEM 460 bus interface. In addition, the ASIC provides DRAM support fox the OBC DRAM bank.
An input pin 411 to select either normal or 960/modem standalone operation is provided. The ASIC interface signals for the OBC are:

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
AD(31:0] Time multiplexed Address and Bi-directional Data bus CLK2 32Mhz Clock output to OBC

PCLK Bus Clock input from OBC

ALE Address Latch Enable input from OBC

RDY# Output to OBC to insert wait states for accesses DEN# Input from OBC indicating data enable W/R# Input from OBC indicating read or write BE3,2,1,0# Inputs from OBC for byte addressing RST# Output to OBC to reset processor BLAST# Burst last byte indication from OBC

INTO# Output to OBC to indicate ADSL modem or Hydrogen IC interrupt HOLD Output to OBC to force AD bus to tristate HOLDA Input from OBC to acknowledge Hold request Registers reside in the OBC memory space starting at base address 01000000(h). The-registers and their offset addresses are:
~0 Control/Status 04 IRQ Enable WO 99/67911 PCT/US99/1437~, PATENT
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08 IRQ Source OC IRQ Status SAR mailbox 19 Timer prescaler 5 18 Timer #1 divider 1C Timer #2 divider Refresh Counter Bit definitions for the control status register are:
Bit Name Comments Reset #

00 R Modem resetIndicates state of Modem reset Set line.

When set Modem is reset. When clear Modem released from reset.

O1 R Modem Bus Indicates state of Modem bus control.Set En When set the SAR has control of MODEM

I/0 bus. When clear OBC has control of Modem I/0 bus.

PATENT
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02-03 R/W WS non burstThese two bits indicate the number3 of wait states to be inserted for RAM

accesses ~in non burst transactions (These wait states are in addition to any that may be inserted prior to an access due to refresh) 04-05 R/W WS burst These two bits indicate the number3 of wait states to be inserted for RAM

accesses in burst transactions (These wait states are in addition to any that may be inserted prior to an access due to refresh) Memory speeds supported by each wait state for both burst and non burst accesses are shown below for a bus clock speed of 25 MHZ.
Wait States Non Burst AccessBurst Access (2cnd and subsequent accesses) 0 80 ns 40 ns 1 120 ns 80 ns 2 160 ns 120 ns 3 200 ns ~ 160 ns WO 99/67911 PCT/US99/1437~

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
Bit definitions for the IRQ enable register are:
Bit Name Comments Reaet #

00 R/W Modem IRQENWhen set enables IRQ generation Clear from the chipset. When clear IRQ generation is disabled. This function is only operational when the Modem Bus enable line (Bit 1 of Control register) is clear.

O1 R/W Mbox WIRQENWhen set enables IRQ generation Clear when the SAR writes to the mailbox register. When cleared IRQ generation is disabled.

02 R/W MboxRIRQEN When set enables IRQ generation Clear when the SAR reads from the mailbox register. When cleared IRQ generation is disabled.

03 R/W T1IRQEN When set enables IRQ generation Clear when Timer #1 expires. When cleared IRQ

generation is disabled.

04 R/W T2IRQEN When set enables IRQ generation Clear when Timer #2 expires. When cleared IRQ

generation is disabled.

05 R/W GASPIRQEN When set enables IRQ generation Clear on PATENT
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Bits in the IRQ source register are set to be read only.
Only IRQ sources that have been enabled are indicated in this register. Any bits set in this register are cleared upon completion of a register read.
If an interrupt event occurs during read of this register, the IRQ indication is not registered until the current read access is completed. The IRQO# output is raised on the completion of each read access of this register. IRQO# is held high for a minimum of one clock cycle before another interrupt is generated.
l0 Bit definitions for this register are:
Bit Name Commoats Reset #

00 R Modem IRQ When set indicates IRQ generationClear from the Modem chipset. This function is only operational when the Modem Bus enable line (Bit 1 of Control register) is clear.

O1 R MboxWIRQ When set indicates IRQ generationClear from the completion of a SAR write to the mailbox register.

WO 99/67911 PCT/US99/143'7~

PATENT
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02 R MboxRIRQ When set indicates IRQ generationClear from the completion of SAR read from the mailbox register.

03 R T1IRQ When set indicates IRQ generationClear from Timer #1 expiration.

09 R T2IRQ When set indicates IRQ generationClear from Timer #2 expiration.

05 R ~ASPIRQ When set indicates IRQ generationClear form an assertion of the SAR RESET
pin low.

Bits in the IRQ status register are also read only. These bits reflect the status of IRQ sources regardless of enabled/disabled status. This register is used for polled operation. If a change of state occurs during a read of this register, the change of state is not registered until the current to read access has been completed. Bit definitions for this register are:

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
Bit Name Comments Reset #

00 R Modem STATWhen set indicates IRQ request Clear from the Modem chipset. This function is only operational when the Modem Bus enable line (Bit 1 of Control register) is clear.

O1 R MboxWSTAT When set indicates that the SAR Clear has executed a write to the mailbox register.

02 R MboxRSTAT When set indicates that the SAR Clear has read the mailbox register.

03 R T1IRQ When set indicates Timex #1 Clear expiration.

09 R T2IRQ When set indicates Timer #2 Clear expiration.

OS R GASPIRQ When set indicates dying gasp Clear request.

The SAR mailbox register 1110 is a 16 bit read/write register that acts as a mailbox. When written to, data 1112 is transmitted to/from the SAR 920. Writes to this register generate an interrupt 1119 to the SAR 920 (when enabled by SAR). When this register is read, data sent by the SAR is provided to the OBC.

-43- ' PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
Read actions also generate an interrupt to the SAR (when enabled by SAR) .
Responses to commands and service requests are handled through this mailbox.
The timer prescaler register is an 8 bit R/W register that controls prescaling of the OBC clock. The output of this prescaler feeds both timer counters that can be used to generate interrupts. The expiration of the prescale counter causes generation of a clock to both timer counters. It also restarts 1~ counting down from the programmed value 1132 in this register.
The timer #1 divider register is a 16 bit R/W register that controls the division of the prescaler output. When the counter controlled by this register expires, it generates an interrupt and restarts counting from the programmed value.
The timer #2 divider register is a 16 bit R/W register that controls the division of the prescaler output. When the counter controlled by this register expires, it generates an interrupt and restarts counting from the programmed value.
The refresh counter register 1160 is a 10 bit R/W register 2o that controls the refresh rate of the DRAM refresh circuit.
Refresh cycles are performed at a rate determined by 1/PCLK
Count. Its default value is set to 300, which results in a PATENT
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refresh period of 40 nsec * 300 = 12 psec at a clock rate of 25 MAZ (40 nsec period).
Modem register access is controlled by the Modem reset bit.
r-bit 0 of the control/status register and the Modem Bus En bit 1 of the control/status register. When both are clear, the Modem Registers reside in the OBC memory space starting at base address 02000000(h).
The ASIC also provides support signals for two blocks of 256K X 32 DRAM 1170. The signals include:
~ MA[9:0] Multiplexed Address bus ~ RAS[1:0] DRAM row address strobe ~ CAS[3:0] DRAM column address strobe ~ OE# Output enable ~ WR# Write strobe Refresh of the DRAM 1170 is controlled by the DRAM refresh 116 in the ASIC, in cycles occurring at a rate controlled by the refresh rate register in the OBC memory map. It has a default value of approx. 83 Khz; or a 12 usec period. This provides refresh at a rate for the entire DRAM bank = 512 cycles 12 usec.
- 6.144 msec.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98209402(USP}WO HMPI
A refresh cycle has 8 clock cycles organized as follows:
~ All CAS pulled low ~ After one clock, All RAS pulled low ~ After one more clock, All CAS pulled high ~ After three more clocks, All RAS pulled high ~ Two cycles are used for recovery If a refresh cycle is requested during a memory access, the refresh cycles are implemented after completion of the memory access. If an access is requested during a refresh cycle, the RDY
l0 line is used to force wait states to allow refresh completion.
DRAM accesses are supported by generation of RASx and CASx signals in conjunction with the top and bottom halves of the address bus. OE# and WR# are generated to perform read or write access. Programmable wait states (0-3) for non burst and burst accesses are supported to allow use of the most cost effective DRAM that meets performance requirements. All multiplexing of the DRAM address bus is performed by the ASIC. Byte accesses and burst accesses are supported.
The ASIC supports operations in standalone, and normal operation depending on the signal received at 401.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
When the standalone input pin 401 is pulled high, the ASIC
allows the processor 400 to operate in a standalone mode. In this mode, the IBR is read from addresses 1FFF30 through 1FFF60 of the Flash memory 409, by decoding the external bus address and enabling read from the Flash memory.
When the standalone pin is pulled low, the ASIC forces the processor 400 to operate in normal mode with RESET and RAM load being performed under control of the Hydrogen IC 420. In this mode, the IBR is read from the mailbox 1110 by decoding the l0 Pxternal bus address and enabling reads from the 426.
Modem Interface Connections between the ASIC and the Sachem Modem 460 include:
~ AD[ 15:0] Bi-directional address/data bus.
~ PCLK Bus clock ~ ALE Input to modem address latch enable ~ BE1 Address bit l ~ W/R# Input to modem write/read indicator ~ CS# Input to modem chip select PATENT
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~ RDY# Output from modem to indicate transfer ready (i.e. wait state insertion) ~ INT# Output from modem indicating interrupt req.
All signals between the Modem and ASIC are routed to either the OBC or the SAR based on the state of the Modem Bus Control bit in the SAR status/control register.
DUART Interface The DUART 470 is supported by connection of the following signals:
~ CS# is connected to the ASIC to provide address decode functions ~ MR is connected to the ASIC to provide reset to the DUART
~ RD# is connected to the ASIC
~ WR# is connected to the ASIC
ASIC Power supply The ASIC draws its operating power from the 3.3 Volt on-board supply. 5 Volt I/O is drawn from the PCI-bus-supplied 5VDC.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
+3.3 Volt Power is isolated from the PCB 3.3 Volt distribution using an inductive element 1004. This creates a +3.3 Volt Node specific to this IC to which the decoupling is referenced.
Boundary Scan pins are connected to test points to allow boundary scan test of the ASIC.
The OBC controller 400 is implemented by a 80960JA-25 processor. This processor requires a 5 Volt supply, and a 25 MHZ
clock input provided by an external oscillator 525 to provide the operating frequency for the OBC. The clock input may alternately be supplied by an ASIC clock output pin.
ALE is connected to the ASIC to provide address latching for memory and I/O accesses.
AD31 through AD 1 and DO are connected to the ASIC, and the DRAM bank. AD7 through AD1 and DO are connected to the DUART.
BEO, BE1, BE2, and BE3 are connected to the ASIC and the DRAM bank to allow byte access to memory and I/0. BEO is connected to the DUART.
RESET# is connected to the ASIC. It is driven low by the 2o ASIC on RESET from the PCI bus. It is driven high or low by the Hydrogen IC via an I/0 write to the ASIC. When the RESET# line is driven low by the ASIC, the Hydrogen becomes the bus master PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
for the controller DRAM block. This allows the Hydrogen IC to check the DRAM block during POST and download code for/from the DRAM block.
HOLD is connected to the ASIC. It is driven high by the ASIC
to force the OBC AD bus into tristate during reset, and to allow the Hydrogen IC to access OBC memory during operation.
HOLDA is connected to the ASIC. It provides a hold-acknowledge signal to inform the ASIC that the ADBUS is in tristate.
INTO# is connected to the ASIC. INT1# and INT2# are connected to the DUART via pullup resistors.
~ INTO# is used to indicate a interrupt request from the ADSL
Modem.
~ INT 1# is used to signal IRQ1 DUART interrupt ~ INT2# is used to signal IRQ2 DUART interrupt W/R#, DT/R# and DEN# are connected to the ASIC to control memory and I/O reads and writes in conjunction with other address and control signals.
CLKIN is connected to the ASIC for I/0 timing.
BLAST# is connected to the ASIC for Burst access support.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
READY# is connected to the ASIC and is driven by an ASIC

provided wait state generator.
This signal is used to insert wait states for memory and I/0 accesses.

Signals connected to the DUART include:

AO is connected to BEO of the OBC

A1 and A2 are connected to A1 and A2 of the OBC

CHSL is connected to A3 of the OBC

Signals pulled up through lOKohm resistors:

LOCK# (normal operation) INT3-7#

NMI#

STEST (option to enable on board self test) Signals pulled down through 10 Kohm. resistors:

LOCK# (for use with emulator) STEST (option to disable on board self test) Signals not connected:

Width/HLTD1:0 D/C#

BSTAT

AS#

FAIL#

ALE#

PATENT
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OBC Memory Map Memory Region Start Address Length Internal RAM & vectors 0 400 ASIC Registers 01000000 24 Modem registers 02000000 10000 FhASH memory FEF00000 100000 IBR (read from Flash or RAM FEFFFF30 30 depending on state of ASIC
stadalone pin) 960 reserved FEFFFF60 AO

960 registered space FF000000 1000000 * all addresses are in hex notation PATENT
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OBC interrupts The following interrupt sources are supported for the OBC:
XINTO# Interrupt from ASIC used for SACHEM or SAR

generated interrupts XINT1# Interrupt from DUART for channel 1 Async port XINT2# Interrupt from DUART for Channel 2 Async port XINT3#-XINT7#,NMI# not used DRAM
Up to 8 Mbits of DRAM 402 for the OBC are supplied. The configuration of DRAM supported includes:
to ~ 256K X 32 bits The DRAM multiplexed address, OE#, WR#, CS#, and CAS/RAS
signals are provided by the ASIC.
Each DRAM device is provided decoupling capacitors.
DUART
A 16552 DUART 470 is provided for debug and development. The DUART resides at base address 03000000(h) on the controller bus.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
Register addresses and programming information are included in the data sheet for the DUART. The following connections are made to the DUART:
~ AO and A1 are connected to BEO and BE1 of the OBC
~ A2 is connected to A2 of the OBC
~ CHSZ, is connected to A3 of the OBC
~ CS# is connected to the ASIC
~ D7 through DO are connected to AD7 through ADl and DO of the OBC
l0 ~ INTR1 and INTR2 are connected to the OBC
~ MR is connected to the ASIC
~ RD# is connected to the ASIC
~ WR# is connected to the ASIC
~ SINl, SIN2, SOUT1, and SOUT2 are connected to an RS-232 transmitter receiver IC
~ XIN and XOUT are connected to a 18.432 MHZ crystal XOUT is connected through a l.5Kohm resister 1 Mohm resistor is connected across the crystal 97 pF cap is connected to the junction of the 1.5K and 1M
res. 22pf cap is connected to XIN
Signals pulled up through lOKohm resistors:
~ RI#1,2 PATENT
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~ DCD# 1,2 ~ DSR#1, 2 ~ CTS#1, 2 Signals not connected.
~ TXRDY#1,2 ~ DTR#1, 2 ~ RTS#1, 2 The DUART is provided with decoupling capacitors as follows.
An RS-232 driver/receiver 475 such as the MAX203 is used to provide RS-232 compatible levels/thresholds for the two DUART
ports. Connections will be as follows:
~ T1IN, T2IN connected to SOUT1 and SOUT2 of the DUART
~ R10UT, R20UT connected to SIN1 and SIN2 of the DUART
~ T10UT, T20UT connected to pin 1 of separate 3 pin headers for RS-232 connection ~ R1IN, R21N connected to pin 3 of separate 3 pin headers for RS-232 connection ~ Ground connected to pin 2 of separate 3 pin headers for RS-232 connection PATENT
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The RS-232 driver/rec. is provided with decoupling capacitors as follows:
~ 1 ea 0. 1 u1F cap.
A block of Flash programmable Memory 404 is provided.
OBC Power supply The OBC draws its operating power from the PCI bus-supplied 5VDC. The current drain should be less than 400 ma. Decoupling associated with this device includes a 10 uF cap and 8 of, 0.1 uF
caps.
+5 Volt Power is isolated from the PCB +5 Volt distribution using an inductive elements) to create a +5 Volt Node specific to this IC to which the decoupling will be referenced.
ADSL Modem The ADSL Modern is implemented using the ADSL-C AFE 450 and the Sachem ADSL modem IC 460. The layout and design of the ADSL
modem duplicates the design used by Alcatel in their product utilizing the ADSL-C and Sachem chipset.
The ADSL-C connects to the line interface 452 and the Sachem I.C 460. Connection to the line interface and Sachem is as PATENT
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defined by Alcatel in their current product. Other connections to the ADSL-C include:
PDOWN is connected to the Sachem PDOWN output to implement programmable power down.
Signals pulled down through 10 Kohm resistors:
~ LTNT (stuffing option to pull up for LT emulation) Signals not connected:
~ GPO, 1, 2 ADSL Power supply The ADSL-C draws its operating power from the 3.3 Volt on-board supply. 3.3 Volt current used is less than 190 ma.
Decoupling associated with this device includes 2 - 0.1 uF cap.
+3.3 Volt Power is isolated from the PCB 3.3 Volt distribution using an inductive element 1008 to create a +3.3 Volt Node specific to this IC which the decoupling is referenced.
The ADSL-C also uses the 3.3 Volt analog on-board supply.
Connection to the ADSL-C is as defined by Alcatel in their design using the Sachem and ADSL-C. This is intended to be a "glueless" interface.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
Connection to the OBC will be through the on board ASIC to perform level shifting between the 5 Volt OBC and 3.3 Volt Sachem.
~ AD [15:0] connected to ASiC for level shift and distribution to/from OBC and SAR PCLK Output from ASIC for 1/0 timing ~ ALE connected to ASIC for level shift and distribution to/from OBC and SAR
~ BE1 connected to ASIC for level shift and distribution to/from OBC and SAR
~ W/R# connected to ASIC for level shift and distribution to/from OBC and SAR
~ CSB connected to ASIC for level shift and address decode ~ RESETB connected to ASIC for distribution from OBC and SAR
RDYB connected to ASIC for distribution to OBC and SAR
~ INTB connected to ASIC for distribution to OBC and SAR
Connection to the Hydrogen SAR includes the following:
~ RXD[0:7] Connected directly to SAR
~ RXCeIIAv Connected directly to SAR
~ RXClk Connected to ASIC to provide xfer clock ~ RXSOC Connected directly to SAR
~ TXCelIAv Connected directly to SAR

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
~ TXClk Connected to ASIC through level shifter to provide xfer clock (level shifter included to minimize skew between TXD[0:7] and clock) ~ TXD[0:7] Connected to SAR through level shifter ~ nRXEN Connected to SAR through level shifter ~ NTXEN Connected to SAR through level shifter TXSOC Connected to SAR through level shifter Other connections to the Sachem IC include:
PDOWN output is connected to the PDOWN input pin of the to ADSL-C to implement a programmable power down of the AFE in addition to the RESET power down function implemented by reset of the board.
Signals pulled up through lOKohm resistors:
~ SLT DATA S0,1 ~ SLT DATA F0, 1 ~ GP INO, 1 Signals pulled down through 10 Kohm resistors:
~ U RXADDRO-4 ~ U TXADDRO-4 ~ TESTS

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
Signals not connected:

SLR VAL S

SLR VAL F

SLR DATA 50,1 SLR DATA F0,1 SLR REQ S

SLR REQ F

SLAP CLOCK

SLR FRAME I

SLT FRAME I

SLR FRAME F

SLT FRAME F

The Sachem draws its operating power from the 3.3 Volt on-board supply. 3.3 Volt current used is less than 370 ma.
Decoupling associated with this device includes 1 ea 10 uF cap and 8 ea 0. 1 uF cap.
+3.3 Volt Power is isolated from the PCB 3.3 Volt distribution using an inductive element(s). This creates a +3.3 Volt Node specific to this IC which the decoupling is referenced.
Boundary Scan pins are connected to test points to allow boundary scan test of the Sachem IC.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(U5P)WO HMPI
The layout and design of the line interface duplicates the line interface used by Alcatel in their design using the ADSL-C
and Sachem chipset. The line interface 452 has a differential driver, a differential receiver, a hybrid coupling circuit, a line coupling transformer, and a High Pass filter. The line interface is transformer-coupled to an RJ- 14 connector 454.
The power supply accepts +SVDC +/- 5~ input from either the PCI bus or from an external input connector. 3.3 VDC is derived from this 5 Volt input. Total 5 Volt current will be less than 2 l0 Amps. External connection is supported, e.g., for development purposes.
The power supply 430 generates +3.3 VDC +/- 1~ from the 5 Volt input using a linear regulator. Connection to the ON/OFF
and FLAG pins when a 5 pin regulator is used are provided to the Hydrogen IC GPIO.
A 0.51 ohm pass resistor is provided to share power dissipation with the 3.3 Volt regulator.
An output capacitor of 22 uF is provided to ensure 1.25 Amp operation with output noise of < 200uV. A 0.22uF capacitor is placed at the input of the regulator.
Analog 3.3 Volts for use by the AFE is derived by an LC
filter between the regulated 3.3 Volts and the analog 3.3 Volts.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
The power supply accepts +12VDC +/- 5% input from either the PCI bus or from an external input connector. +12VDC current is less than 100 ma. An LC filter is provided for the + 12 VDC used on the NIC.
The power supply accepts -12VDC +/- 10% input from either the PCI bus or from an external input connector. -12VDC current is less than 100 ma. An LC filter is provided for the - 12 VDC
used on the NIC.
External connection is supported as a stuffing option for l0 development purposes only.
As a stuffing option, a DC/DC converter to generate on board +/- 12 Volts DC in place of the PCI bus provided voltages is included. The converter is powered by the PCI,Bus 5 VDC and will generate 100 ma output for both + and - 12 VDC.
ASIC Pin Assignments The ASIC is in a 160 PQFP. It supports both 5 Volt and 3.3 Volt I/0.
Pin Assignments Description Type Pin No +3.3V Power 1,41,61,81,121,141 +5V Power 10,46,94,157 PATENT
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GND Power 20,31,40,51,70,80,99,100,110,120, 127, 137, 160 SAR DA[31:0] 5VI/0 2:9,11:19,21:30,32,34,36:38 SAR RD# 5VI 39 SAR WR# 5VI 43 SAR IRQ#/BCLK 5VI 35 SAR RESET# 5VI 159 OBC DA[0:31] 5VI/O 47:50,52:60,62:69,72,74,76:79,82:

OBC BE#[3:0] 5VI 88:91 OBC W/R# 5VI 92 OBC DT/R# 5VI 93 OBC DEN# 5VI 95 OBC RDY# 5V0 96 OBC RESET# 5V0 101 OBC INT# 5V0 102 OBC BLAST# 5VI 103 OBC DRAMMA[0:8] 5V0 104:109,111:113 PATENT
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OBC CASO# 5V0 114 OBC CAS1# 5V0 115 OBC CAS2# 5V0 116 OBC CAS3# 5V0 117 OBC RAS# 5V0 118 OBC WE# 5V0 119 OBC OE# 5V0 122 MODEM DA[15:0] 3VI/O 126,128:135,138:140,142:145 MODEM CS# 3V0 149 MODEM W/R# 3V0 150 MODEM RDY# 3VT 151 MODEM INT# 3VI 152 MODEM RESET# 3V0 153 DUART CS# 5V0 123 FLASH CS# 5V0 125 PATENT
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The ADSL Network Interface Card (NIC) described above operates using at least one of firmware and/or software for operation.
The ATM portion of the NIC is based on chips, firmware, and software developed by ATM Ltd. for their own ATM network components.
The Network Interface is diagrammed in Figure 12.
The installation routines are made up of four main to components (oemsetup.inf, netvlink.inf, vlink.def, and atmncdet.dll). The combination of these four components operates as shown in Figure 13.
Automatical detection of the existence of which ATML NIC
card is installed at 1300.
The routine installs the proper utility applications, drivers, ini files, and firmware to support the NIC card chosen by the user at 1302. It then prompts the user for the connection type (Local LAN or ADSL) for the NIC card and configures some PATENT
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initial values for proper operation at 1306. User configurative valves are set,(for example, those shown in Figure 7) at 1308.
Since the installation script format is different for Windows 95 and NT, two "inf" installation scripts are required.
The atmncdet.dll library is used to provide user dialogs for gathering information that the scripts could not acquire automatically. This library was written for the MSVC 1.5 development environment.
Vstatus and vcons are performance and status monitoring applications used for troubleshooting problems with the NIC card or with the network itself. The main use for vstatus is for status monitoring of uptime, throughput, and system connections as needed. For example, the ARP server, LECS server is used as the Windows environment.
Vcons is a DOS console type application that is used as a terminal type connection to the NIC card. This application allows a user to send commands manually to the firmware and see the response.
Asock32 or the ATM Sock API is a proprietary API developed by ATML. This interface was designed to conform to Microsoft's guide to extending the Windows Socket API version 1.1. See WinSock documentation by Microsoft for further details.

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Unfortunately, ATML does not conform to Microsoft's guidelines completely. This library is coded for the MSVC 2.2 development environment using an updated Win32 API.
Vsock is the ATM Sock Interface protocol. This is a proprietary protocol with a .dxd or Virtual Device Driver used by ATML which Hayes has purchased the rights to redistribute. This allows any application developed by third parties that use the ATML atmsock API to operate correctly with the Hayes NIC card.
This module was coded to comply with MSVC 2Ø
The final component to the ATMPC SDK/DDK is the vlink module. This module is the network VXD that vsock and all other protocols communicate to pass data into a network. This module has been developed to work with Windows 95 and NT using NDIS 3Ø
The driver's function is limited to only act as a communication interface between the protocol layer and the hardware (NIC) layer. ATML designed all of the encapsulation components for passing other protocols over ATM in the firmware. This driver supports NDIS 3.0 only and was coded to be compiled with MSVC
9Ø
Software Requirements PATENT
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Figure 14 shows the Network Interface Diagram with the present hardware components described with reference to Figures 4 to 11.
Installation Routines include the oemsetup.inf, hnetinst.inf & atmncdet.dll. User Control and Monitoring Applications include the ServiceMonitor, AdslNicP, and NicCons. Protocol Device Driver is the hAtmSock. Network Device Drivers includes hNetLink and hOdiLink. Their corresponding ATML modules are Installation Routines (oemsetup.inf netvlink.inf, vlink.def l0 atmncdet.dll), Status Applications (vstatus and vcons), Native ATM Protocol (vsock), and Network Device Driver (vlink) respectively.
In Windows 95/98 and other plug-and-play operating systems, the OS identifies the NIC at boot-up as new hardware through the PCI plug-and-play capability at 1300. This brings up the screen of Figure 15. For Windows NT 3.51/4.0 the user may have to manually select to install a new network adapter and select "Have Disk" to identify the NIC as shown in Figure 4. Once the card is identified, the user is prompted to install drivers for this new hardware. The present installation routines use oemsetup.inf (Used for NT) and hnetinst.inf that is required according to Microsoft's guidelines for hardware and a support library.

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ATML's routines including oemsetup.inf, netvlink.inf, and vlink.def are used.
ATML's setup files are stripped of unnecessary product support. Together with the support library these routines perform the following shown in Figure l7:
1. Identify the Hayes ATM/ADSL NIC card at 1700.
2. Decompress and copy the supported applications, drivers and firmware files to the local system drive upon user request at 1702.
l0 3. Create all registry entries needed for these applications to start up correctly at 1704.

4. Detect if networking is installed on the Windows OS and prompt the user if these components need to be installed at 1706.

5. Insure that the hAtmSock (Native ATM Protocol) device driver is setup correctly as a network protocol and also insure that the Microsoft TCP/IP protocol is installed at 1708.
A number of additional User Control and Monitoring Applications are used.

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The AdslNicP Network Control Panel Extension Library provides the NIC global properties from the Network Control Panel Applet when a user selects properties for the NIC adapter/ Figure 18 shows a screen shot of AdslNicP.exe.
Changing any of these parameters changes the network. Since these settings are set at startup, they cannot be dynamically changed after the NIC card is in an operational state. This requires the PC System to be rebooted for the changes to take effect. Hence, these changes cause a "BIND" action.
l0 As shown in Figure 18, this application provides a simple graphical interface for users to change global ATM parameters.
This interface enables and disables the ILMI. If ILMI is disabled, then the dialog prompts for a proper ATM address.
The interface allows setting global signaling for SVC
(Switched Virtual Circuits) connections.
The interface sets the connection mode for permanent connections (PVC or PVP).
It also provides selection for alternate protocol support such as IP over ATM or PPP over ATM.
The box also allows LLC-SNAP to be disabled for VC
Multiplexing.

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Finally, the system determines when the user has made changes to the global settings so a bindery action can be called for the network components. This action prompts the user to e, reboot before changes will take affect.
The routine also provides a means of saving and restoring a single working configuration in case the user makes a change that disables the network.
The ServiceMonitor Application has a function to allow the user of a Hayes ATM/ADSL NIC Modem PCI card to manage the network l0 interface and obtain performance information about the network connections. This application must be executed before any network service connections can be established. Software interface provides the functions and applications.
The interface uses a Simple Connection Status and Problem Indication. An LED style of status indication similar to the front panel of an analog modem is used. This is accomplished by providing a System Tray Icon in Windows 95 and NT 4.0 system tray <-~s shown in Figure 19). For Windows 3.Sx this is accomplished by centering the Tray Icon on the left side of the main dialog (See 2o Figure 6).
The Tray Icon is formed of three artificially simulated LED's. The left represents transmissions of data. The right '71_ PATENT
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represents data received. These two LED's alternate between dark red and bright green colors for data movement. Bright red indicate some sort of error in the data flow. The center LED is used to indicate line sync with the ADSL Modem. For this LED, red indicates loss of sync and bright green is the normal condition.
This functionality is provided by 9 separate icons which are selected based on the states of variables discussed above.
The System Tray Icon 1910 responds to various mouse actions.
It allows the user to easily acquire global status information l0 about the network interface. A Right Mouse Click brings up a System Menu 1920 displaying optional actions to provide the user with some information about the connection status of some selected services. As Figure 19 above shows, the two services installed (BlockBuster 1920 and MindSpring 1921) as inactive due to the dark red LEDs 1922, 1924 to their left. If either of them were active, their associated LED turn bright green.
Left Mouse Click on the System Tray Icon brings up the main dialog 1900. The main dialog has global performance information 1905 that can be used to track data flow, connection time, and number of installed services. The connection time and flow rates can also be obtained through a ToolTip feature. When the mouse _72_ PATENT
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is positioned on the Tray Icon for approximately one second, connection time and flow rate are displayed.
The Service Connection Performance and Network Configuration is shown in Figure 20.
Under normal operating conditions, when the user selects "Properties" from the main dialog, the Properties dialog is displayed (as shown in Figure 20) only three main tabs --Services, ATM Interface, and Options. The two modem tabs are meant to be used for troubleshooting modem problems. These are defaulted to not display from the "Options" tab. The default tab to be displayed is the "Services" tab. This control style is a Property Sheet with Property Page Dialogs for tabs. All of the installed service connections are be displayed from a tab control to allow ease of service selection. The installed service tab names are user-configurative to allow customization. This installed service are placed on the Tray Icon system menu at the users request from the "Options" tab.
The user interface also provides performance data on all individual connections. To accomplish this, all service connections have the same performance data displayed upon selection of the service tab. This minimizes control creation and provides a consistent user interface to all performance data.

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Performance data is acquired on 0.5-second intervals. The performance graph is an owner-drawn control created at run time with a ten-second history. User configurative parameters include changing the line colors for data representation.
~5 When the user wants to verify connection parameters for any service, they can select the tab of the service to verify and then select "Properties". This brings up a static view of the connection settings for that service as shown in Figure 21.
Figure 21 shows the network Configuration Properties Dialog (Service Properties). The Service Connection Modification of Network Configuration allows the user to~manually adjust the connection parameters. "Modify" (See Figure 21 above) is selected from the "Service Properties" dialog. This brings up the "Modify Service" dialog and the previous dialog "Service Properties" disappears. If the service being elected to modify were being actively connected, then a warning dialog appears notifying the user that any changes to an active service could cause loss of data. This warning dialog allows the user to cancel the modify action or continue to bring up the Modify dialog.
2o While the user is in the modification dialog, changes can be made to any of the connection parameters including alteration of the tab name.

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Figure 22 shows the User Interface Screen to Modify Network Configuration Dialog. This interface allows the user to configure the ATM parameters on a per connection basis as needed.
This interface also has enough intelligence to prevent incorrect parameters from being configured (ie. Invalid VPI or VCI values, Policing of Specified Cell Rates to prevent exceeding Max Upstream bandwidth, etc.).
For any service that is using any IP protocol over ATM, the "Settings" button is enabled and brings up a configuration dialog to shown in Figure 23 for that protocol if selected.
This configuration dialog provides a great amount of flexibility to the user. For a PVC connection using Routed IPoA, the user can elect to use the gateway IP address already configured in the TCP/IP protocol stack as the destination machine to connect to the Ethernet LAN. If the connection is a machine other than the gateway, then the user needs to provide the IP address of that machine to complete the connection. This configuration is simplified by the use of SVC's or Bridged IPoA.
This interface satisfies the need for allowing multiple service configurations.
If a service is Active, then the "Stop" button 2100 in Figure 21 is enabled to allow the user to disable the service WO 99/67911 PCT/US99/14372 ' _75_ PATENT
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that could potentially be using required bandwidth that another service may need. This allows a user to properly manage connections without having to install and reinstall them when it~
is necessary to temporarily disable the service. This control disconnects all active connections to that particular service and does not allow any new connections for a 2-minute interval. After 2 minutes, then any new applications started can use the service.
Time delay is used instead of a set/reset type of function to avoid the user forgetting that the service has been disabled, and thinking that another problem exists. With an auto reset functionality the state of the service connection can be returned to normal without any other user interaction.
Figure 26 shows the Service Installation Wizard Dialogs Status of Global ATM Connection Performance and Configuration.
15 The ATM Interface dialog displays global performance data and configuration setting to the user. This dialog is intended to be used for providing ISP's with configuration information in the event that a service installation fails or is working improperly.
The connection status information is static and cannot be altered by the user in this application.
Figure 25 shows Global ATM Network Performance and Configuration. The connection configuration should not be -76- , PATENT
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configured at an application level since a Network Bindery action is needed to complete and properly reconfigure. This action is required since this data is initialized for the ATM/ADSL NIC
Adapter only at boot-up of the OS.
The ADSL Modem Performance and Operational Status is shown by the status monitoring application which displays ADSL modem performance. The two dialogs shown in Figure 25 accomplish this task by statistically displaying modem performance. These dialogs were not designed for the novice user since the intent of these to dialogs is to be used for troubleshooting problems with the ADSL
modem. The dialogs were designed with the assumption that the user viewing them has some advance degree of knowledge with ADSL
technology. These dialogs are normally turned off for viewing through the "Options" tab dialog as shown in Figure 26 below.
As with almost all applications, flexibility to meet different consumer needs and preferences is usually considered and configured as optional features or selections. These components do not impact the ability of this application to perform the required task of managing the Modem adapter and its varying flavors of interfaces. They provide the user with some ability to tailor that interface to meet varying preferences.
This also allows to meet certain needs of the hardware that PATENT
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require configuration options (ie. POST selection, Restoration of default settings, etc.).
The Figure 26 dialog includes optional configuration parameters tab dialog. This dialog also provides a means of saving or restoring profile settings. This will be a method of networking for many users. It is expected that the user would need some method of restoration to a known working configuration.
These optional functions allow saving and restoring of profiles on a global basis.
The NicCons application's main function is to act as a troubleshooting tool for problems that could potentially occur outside the scope of ServiceMonitor's control or status monitoring. This application allows the user to work from a command line and send single commands to the NIC and obtain the NIC's response to those commands This application carries out the following features:
1. Allows command line communication through a DOS Console to running processes residing on the NIC.
2. Switches between three main control processes:
a) Hydrogen - This process is the main entry into the ATMos kernel.

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b) SNMP - This process allows a user to send out SNMP
calls to the NIC cards MIR
c) Modem - This process is the interface between the Hydrogen and the processor which controls the ADSL modem backbone.
The vsock protocol device driver from ATML is used as a Protocol Device Driver. This allows supporting any application developed using ATML's API without supporting the API itself.
The file name will change to hAtmSock.vxd to simplify recovery of the driver if a user installs an ATML product on the same PC
system.
Since ATML implemented the native ATM protocol in firmware, the protocol socket is actually a simple connection for passing data off to the driver and then to the firmware. This allows a user application to communicate to the protocol directly implemented in the firmware OS where all PDU's (Protocol Data Units) are actually assembled and disassembled. This model allows ATML to port the protocol socket easily to any platform and implement all <Protocol stack's> over ATM directly on the Hydrogen chip.
The existing driver that ATML provided is simply a plain communication module for sending and receiving data between the PATENT
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protocol stacks and the NIC (Firmware on Hydrogen chipset) as shown in Figure 4 above. It only supports NDIS 3.x under Windows 95 and NT. Our requirements for this driver is the same with minor enhancement for asynchronous throughput and support of the processor chip.
This driver operates as follows and as shown in Figure 2?:
1 . Initiate POST (Power on Self Test) sequence for both NIC and Modem in full or reduced mode as set by ServiceMonitor.
The duration of the POST sequence shall be less than 5 seconds at l0 2700.
2. Ensure the following sequence of events occurs in less than 1 second:
a) Download Hydrogen image at 2702.
b) Download 1960 image at 2704.
3. Provide communication interface between all supported protocols and the NIC at 2706.
4. Provide I/0 status and error conditions to ServiceMonitor NIC management application.
The hNetLink NDIS 3.x Network Virtual Device Driver supports Windows 95 (ver A and OSR2), Windows NT 3.51 (all Service Packs) and Windows NT 4.0 (all Service Packs). The supported protocol stacks for this driver are Microsoft TCP/IP, NeBEUI, and ATML's _80_ , PATENT
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Native ATM. This driver also supports the Windows 98 OS as well with Microsoft's Native ATM Protocols.
hOdiZink Netware ODI Virtual Device Driver driver supports the Novell ODI Network Interface under the following versions, Novell Netware 3.12, 9.x, and Novell IntranetWare. The protocol stacks supported are Novell TCP/IP and IPX/SPX.
The API for hAtmSock protocol device driver is used for all Native ATM communications and for all management applications (ServiceMonitor, NicCons, etc.). This is a required driver for this product. The method of communication for applications to this driver is through obtaining a handle to the driver using "CreateFile" as shown:
For Windows 95:
hDriver = CreateFile ("\\\1.\\vhadslid" GENERIC-READ I
GENERIC-WRITE, FILE SHARE_READ I FILE SA\HARE_WRITE NULL, OPEN
EXISTING, FILE FLAG WRITE THROUGH I FILE FLAG OVERLAPPED I
FILE ATTRIBUTE NORMAL, NULL);
For Windows NT:
hDriver = CreateFile ( "11\\.\\khadslid" GENERIC-READ I
GENERIC-WRITE,FILE_SHARE READ I FILE - SHARE WRITE, NULL,OPEN

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EXISTING, FILE FLAG WRITE THROUGH I FILE - FLAG - OVERLAPPED I
FILE ATTRIBUTE_NORMAL, NULL);
Once the handle is acquired then all communication is done using the Win32 function "DeviceloControl". The dwIoControlCode member is what applications will use to communicate with all devices from this protocol and below. The following control codes are created by using the CTL CODE macro defined in WINIOCTL.H
(macro: CTL CODE( DeviceType, Function, Method, Access ) ). For our applications the DeviceType, Method, and Access will always l0 be FILE DEVICE NETWORK, METHOD OUT DIRECT, and FILE ANY ACCESS
respectively. The code of interest to the applications is the "Function" member. This member falls within the range of 0x800 to Oxfff. The 0x800 to Oxbff range is used for legacy code from ATML and the Oxc00 to Oxfff range is used for any new codes defined by Hayes for this project. To ensure that this range is maintained, all control codes begin with 0x00 and use the macros below to get the base address.
#define SM FCMIN OX800 #define SM FC ATMADSL Oxc00 Table 1 below defines the codes used by this protocol.

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Table 1 - Control Codes for Establishinc and Communicating with ATM Socket Connections Function Old Naw ControlDaacription ATMs. Macro Coda Macro AtmVsSocket VS IOCTLSOCKET SM IOCTLSOCKET 0x001 Open Socket AtmVs Close VS IOCTLCLOSE SM IOCTLCLOSE 0x002 Close Socket AtmVsConnect VS IOCTLCONNECTSM IOCTLCONNECTION 0x003 Connet to Socket AtmVsSend VS IOCTLSEND SM IOCTLSEND Ox00a Send Data to Socket AtmVsQueueRecvBufVS-IOCTL QUEUE SM_IOCTLQUEUElRECVBUFOXOOc Set Received HUF RECV Buffer AtmVsRecv VS IOCTL SM IOCTL Ox00e Not Used Now RECV REVC For AtmVsDebug VS IOCTLDEBUG N/A 0x000 Not Used Now For AtmVsListen VS IOCTLLISTEN N/A 0x009 Not Used Now For AtmVsAccept VS IOCTLACCEPT N/A 0x005 Not Used Now For AtmVsReject VS IOCTLREJECT N/A 0x006 Not Used Now For (Not Imp~emented)VS IOCTLBIND N/A 0x007 Not Used Now For AtmVsGetSockNameVS IOCTLGETSOCKNAMN/A 0x008 Not Used Now E For AtmVsGetPeerNameVS IOCTLGETPEERNAMN/A 0x009 Not Used Now E For AtmVsCancelSendVS IOCTLCANCELSENDN/A Ox00b Not Used Now For AtmVsCancelRecvVS IOCTLCANCEL N/A Ox00d Not Used Now V REC For (Not Implemented)VS_IOCTL GET N/A Ox00f Not Used Now FLEN RECVBU For WO 99!67911 PCT/US99J14372 PATENT
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(Not Implemented)VS_IOCTL SET_RECVHUN/A 0x010 NotUsedForNow FLEN

(Not Implemented)VS_IOCTL _FLUSH N/A 0x011 NotUsedForNow DATA RECV

(Not Implemented)VS_IOCTL CIRCULARBUN/A 0x012 NotUsedForNow FFER

(Not Implemented)VS-IOCTL_GET CIRCBUN/A 0x013 NotUsedForNow FF

AtmVsSelPCt VSIOCTLASYNCSELECN/A 0x019 NotUsedForNow T

AtmVSSetQos VSIOCTLSETQOS N/A 0x015 NotUsedForNow AtmVsGetQos VSIOCTLSETQOS N/A 0x016 NotUsedForNow AtmVsSetLOwMarkVSIOCTLSETLOWBUFN/A 0x017 NotUsedForNow AtmVsSockIoctlVSIOCTLSOCKIOCTLN/A 0x018 NotUsedForNow AtmVsGetVersionVSIOCTLGETVERSIONN/A Ox019 NotUsedForNow AtmVsAddParty VSIOCTLADDPARTYN/A OxOla NotUsedForNow AtmVSDropPartyVSIOCTLDROPPARTYN/A OxOlb NotUsedForNow Presently, there are no new control codes needed for this protocol. As shown in Table 1 above, only 6 existing codes are to be used by the management applications. These codes are used to establish a connection to the Hydrogen for SNMP calls.
API for hNetLink was created by ATML to be a MiniPort network driver with minimal functionality for passing data, downloading firmware images and INI files, etc. At present, there are no control codes to be used by this driver. This driver is PATENT
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accessed by the Sock Protocol driver through NDIS and has no direct interaction with this driver.
Communication to the ATM module (Hydrogen Chip) uses the following control mechanism.
#define NIC CTLCM D(Destination, Source, OpCode, DataSz) I
((Destination « 24) 1 (Source « 16) 1 (OpCode « 8) 1 (DataSz) #define STRIP CTLCODE 255L
#define CTLCMD DEST(NICCtICmd) ( NicCtICmd » 24 #define CTLCMD_SOURCE(NicCtICmd) ((NicCtICmd » 16) & STRIP
CTLCODE) #define CTLCMD OPCODE(NicCtICmd) ((NicCtICmd » 8) & STRIP -CTLCODE) #define CTLCMD_DATASZ(NicCtICmd) (NicCtICmd &
STRIP CTLCODE) using the format shown in Figure 28.

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one byte one byte one byte one byte n bytes destinatiosource opcode length of data field with opcode-n address address data(n=lenxspecific format 9) MSB ZSB
This is based on Management & Control Entity Addresses shown in Table 2.
Entity Address Host Management 0x01 Application Host Data Handler 0x02 Host Debug Port A 0x03 Host Debug Port B 0x04 Host Debug Port C 0x05 Host Debug Port D 0x06 Host Service & Test 0x07 Application OBC Management 0x10 Application OBC Selftest Agent 0x11 PATENT
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OBC Debug Process 1 0x12 OBC Debug Process 2 0x13 OBC Debug Process 3 0x14 OBC Debug Process 4 0x15 Hydrogen Debug Process 1 0x20 Hydrogen Debug Process 2 0x21 Hydrogen Debug Process 3 0x23 Hydrogen Debug Process 4 0x24 Hydrogen Management 0x25 Interface Reserved for SYNC 0x55 Reserved for SYNC ACK OxAA

Reserved for SYNC 0x33 Reserved for SYNC ACK OxCC

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Table 3 shows Management Commands Command Opcode Data Data Field Contents Field Length NIC_INIT CONN TABLE 0x01 (n) Installed Services (VC' s) NIC REINIT CONN TABLE 0x02 (n) New Connection Table NIC CREATE CONN ENTRY 0x03 (?) New VC Entry NIC REMOVE CONN ENTRY 0x04 9 VC Entry Value NIC UPDATE CONN ENTRY 0x05 (?) VC Entry Data NIC REMOVE CONNECTION 0x05 4 VC Connection Value NIC SUSPEND CONNECTION 0x06 4 VC Connection Value NIC VC PERF DATA 0x07 4 VC Connection Value NIC ALL VC PERF DATA 0x08 0 N/A

NIC_PROCESSVINI_SETTIN OxAO 0 N/A
GS

NIC MULTIPLE COMMANDS OxDO 8or> Mult. Commands Detailed Component Design Common code headers and guidelines for code development for all software components simplify moving across multiple projects with greater efficiency.
Development Language (Compilers, Linkers, etc.) PATENT
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All components of this product are preferably compiled with Microsoft Visual C++ Version 5Ø The only exception is the Device Drivers that may need MASM as well. Since this card is targeted for a PCI bus, assumptions are made that the target systems will be Intel Pentium based. The following compiler options are used for release builds except where noted:
1 . General a) Warning level set to "3".
b) Optimizations set to "Minimize Size".
l0 c) Preprocessor definitions:
NDEBUG,WIN32, WINDOWS, CPLUSPLUS
2. C++ Language a) Pointer-tomember representation method set to "Best-Case Always"
b) Enable exception handling.
3. Code Generation a) Processor set to "Pentium"..
b) _cdecl Calling convention.
c) Run-time Libraries linked statically using 2o Multithreads.
d) Struct member alignment should be set to 8 Bytes.
4. Do not use precompiled headers.

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5. All defined preprocessor definitions should be in Upper Case and they should begin and end with ' ' characters.
The linker options for release builds should not be set for incremental linking. If a project has settings other than these listed, it is noted inside the project Readme.txt file.
2roject Source File Names and Required Files Guidelines include the following:
1. Do not restrict file names to an 8.3 format unless there is cause to do so.
l0 2. Files containing C++ code should have a cpp extension and files that contain ONLY C code should have a.c extension.
3. All headers will have a.h extension.
4. Class objects that will be used in multiple source files should be contained in separate source files. For these types of objects the filename should be the name of the Class excluding the "C" header if used (ie.
CmyClass - filenames are MyClass.cpp and MyClass.h).
5. For source files that contain only "C" code, the file should contain related functions that correspond to a package of features. The feature should some how be related to the filename (ie. NicComm.c - Source file PATENT
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contains functions for sending and receiving data to a NIC card).
All projects should contain the following folders for source code organization:
1. Source Files - Files that have extensions "cpp;c;cxx;rc;def-,r;odl;idl;hpj;bat".
2. Header Files - Files that have extensions "h;hpp;hxx;hm;inl".
3. Resource Files - Files that have extensions l0 "ico;cur;bmp;dlg;rc2;rct;bin;cnt;rtf;gifjpgjpegjpe"
4. Help Files - Files that have extensions "cnt;rtf'.
5. Documents - Files that have extensions "doc;txt;pdf".
On the main project branch there are three files included with every project. These files are described as follows:
1. Readme.txt - This file contains a detailed description of the module developed (this can be taken from this document). It also contains any exceptions to this specification and why they are needed.
2. ScodeS.txt - This file contains the standards used for 2o all source code within that module, if different than these PATENT
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guidelines. The creators standards must at least meet or exceed Lhose mentioned in this document.
3. <Pname>.reg - This file contains all registry entries needed for this module. This file is used by the installation routines to properly install this module.
Example. reg file for ServiceMonitor:
REGEDIT
;This REG file may be used by your SETUP program.
;If a SETUP program is not available, the entries below will be ; registered in your Initlnstance automatically with a call to CWinApp::RegisterSheIIFileTypes and OIeObjectFactory::UpdateRegistryAll.
HKEY CLASSES ROOTIServiceMonitor.Application - ServiceMonitor Application HKEY CLASSES ROOTIServiceMonitor.Applical~onlCLSID={497AOBC5-2561-11 D1 -SAFB-1138) HKEY CLASSES ROOTIServiceMonitor.ApplicationlCurVer -ServiceMonitor.Applica6on. 1.0 HKEY CLASSES ROOT1CLSID1{497AOBC5-2561-1 1D1-8AF8-00805FCDE1B8}=ServiceMonitor Application Guidelines for "C" Source Code Development This project contains a large amount of 3rd party developed source code that is exempt from this standard. Also, if your PATENT
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module contains an ScodeS.txt file that does describe an alternate code standard, then these standards do not apply. If any work is to be done to enhance the third party application in terms of new 'code then this guideline is followed. If the work ~o enhance third party code is' simple bug fixing or minor alteration then attempt to conform to the standard present inside the existing code.
1. All macros and enum types are in Upper Case unless noted.
Example: #define MY MACRO Oxffffffff l0 typedef enum MY-FIRST - VALUE, MY SECOND VALUE
yMyEnumType;
2. All functions used inside multiple source files (.c) start with a lower case letter.
Example : void myExportedFunction (int myData);
3. All user defined data types and structures are configured as shown below:
Example : typedef struct-myStructData{
........
MyStructData, "MyStructDataLP;

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typedef long MyDataType;
4. All function definitions have a comment header as shown below (Note: The Argument section is only needed if the function has arguments):
II Function name :myExportedFunction /I Description :This function does nothing.
// Return type :void //Argument :int myData - This is used for data input.
Guidelines for "C++" Source Code Development l0 Same as "C" source code in section 4.1.3 with addition of Class creation as follows:
1. All class declarations begin with "C" (ie. class CMyClass -.).
2. All data is encapsulated (private) unless otherwise noted. If the information is not in its encapsulated state, the reason is in the ReadMe.txt file for your project or within the source code with comments.
3. All member functions begin with a capital letter (ie.
void CmyClass::MyFunction The Oemsetup Setup Information File is the Installation Setup script for the ATM/ADSL NIC product.

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The Atmncdet Setup Extension Library is used with the setup script for executing routines that the script could not support.
The AdslNicP Network Control Panel Application is an extension DLL is the "Properties" screen for the NIC Adapter Card launched from the Network Control Panel Applet. This DLL
provides the interface for modifying the global ATM and ADSL
parameters. This interface is dialog-based and signals the OS
when a network bindery action takes place. It also allows the user to save the present settings as the default and restores to default settings upon request.
Main Dialog Class (AdslNicP.h) object is designed to interface with the user through a dialog based user interface.
It is responsible for displaying to the user the current global ATM interface settings and allow him/her to make changes easily.
Upon any changes being made and the dialog closing, this object updates the bindery information for all network components through the Network Control Panel Applet. It a change is made that is out of scope with the capability of this NIC then this object notifies this information to the user and provides possible alternative parameters.
The AdslNicP.h header contains the class member functions and data needed to implement the "Properties" dialog referenced PATENT
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in Figure 5 above. This file requires data referenced in other header files to implement this class object properly (ServiceMonitorData.h, resource. h).
The following controls are defined in resource. h:
IDCBM CORPLOGO Hayes Microcomputer Products, Inc. Company bitmap logo IDCS_FIRM VENDVER Firmware Vender and Version static label IDCG ATMCONFIG ATM Configuration group IDCCKB ILMIENABLED ILMI Enabled Check Box IDCS ATMADDRESS ATM Address Static Label IDCE ATMADDRESS ATM Address Edit Control IDCS LINERATE Purchased Line Rate Static Label IDCE LINERATE Purchased Line Rate Edit Control IDCS LINERATE UNITS Purchased Line Rate Units Static Label IDCCKB_DISLLCSNAP Disable LLC-SNAP for IP over ATM
Check Box IDCG SIGNALING Signaling Group Control IDCRB UNI31-SIG UNI 3.1 Signaling Radio Button Control PATENT
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IDCRB UNI40-SIG UNI 4.0 Signaling Radio Button Control IDCG CONNMODE Permanent Connection Mode for ATM
card IDCRB PVCMODE Permanent Virtual Circuit Radio Button Control IDCRB PVPMODE Permanent Virtual Path Radio Button Control IDCS SUPPORTECPROTS Additional Protocol Support Static Label IDCCB_SUPPORTEDPROTS Additional Protocol Support Combo Box IDCB OK OK Button Control IDCB CANCEL Cancel Button Control IDCB SAVESDEFAULT Save As Default Button Control IDCB RESTOREDEFAULT Restore Default Button Control The class header is shown below:
class CAdsINicP: public Cdialog {DECLARE DYNAMIC(CAdsINicP);
llConstruction public:
CadsINicP(CWnd* pParent = NULL);
II standard constructor virtual -CAds1 NicPO;

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II Dialog Data private:
SMDGIobaIATMSettings m - GIobaISettings;
boot mb_SettingsModified;
//{{AFX - DATA(CAdsINicP) enum { IDD = IDD ADSLNICPROP_DIALOG};
// NOTE: the CIassWizard will add data members here I/}}AFX_DATA
II CIassWizard generated virtual function overrides /I{{AFX_VIRTUAL(CAdsINicP) virtual BOOL OnInitDialogQ;
II} }AFX_VIRTUAL
//Implementation private:
II These functions are used to modify the registry boot GetRegGIobaIProfile();
boot SetRegGIobaIProfile();
BOOL Setl3indaryActionQ;
protected:
2 0 II Generated message map functions //{{AFX_MSG(CAdsIN icP) afx - msg void OnOk ();
afx msg void OnCancelUpdatep;
afx msg void Onllmienabled ();

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afx_msg void OnUpdateAtmAddressQ;
afx msg void OnUpdateLinerateQ;
aix - msg void OnDisIIcsnapQ;
afx_msg void OnUni3 I SigQ;
a~ msg void OnUni40SigQ;
afx_msg void OnPvcModep;
afx_msg void OnPvpMode();
afx_msg void OnSeIchangeSupportedProts();
//}}AFX MSG
DECLARE MESSAGE MAP()};
Class Constructor - CadsINicP{) This is used to construct the standard class for making global setting changes to the ATM/ADSL NIC card. The m GlobalSettings and mb SettingsModified member data is initialized in this function. The m GlobalSettings data are initialized with GetRegGlobalProfile() and mbSettingsModified is initialized to false.
Return Type: None.
Function Params: None.
Class Destructor - -CAdslNicP() _99_ PATENT
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Description: Standard destructor. No significant change other than standard return is needed for this class. However, if memory is allocated within other class functions and stored within the class member data then that memory needs to be destroyed here!
Return Type: None.
Function Params: None.
Function Override - BOOL OnInitDialog() Description: Initialization of member data is done here for the UT controls prior to display of the dialog itself. This data resides in the m GlobalSettings member that was initialized in the creation of this class.
Return Type: BOOL. "TRUE" for function success and "FALSE" for failure.
Function Params: None.
Private Function - bool GetRegGlobalProfile() Description: Used to scan the registry for all of the global ATM interface parameters to establish valid connections (Key value -HKEY LOCAL MACHINE\SOFTWARE\Hayes\ServiceMonitor\Interface).
These parameters are to be stored in m GlobalSettings member.

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Return Type: bool. "True" for function success and "false" for failure.
Function Params: None.
Private Function - bool SetRegGlobalProfile() Description: Used to update the registry for all of the global ATM interface parameters changed by the user in the UI (Key value - HKEY LOCAL MACHINE\
SOFTWARE\Hayes\ServiceMonitor\lnterface). When changes have been made the member variable "mb - SettingsModified" will be set to true and the changes made by the user will be stored in the m GlobalSettings member.
Return Type. bool. "True" for function success and "false" for failure.
Function Params: None.
Private Function - BOOL SetBindaryAction() Description: When changes are made to the global settings, this function is called to initiate a bindery action for the Network Control Panel Applet. This in turn notifies the user that he/she should reboot the system before these new settings can take effect.
Return Type. BOOL. "TRUE" for function success and "FALSE" for failure.

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Function Params: None.
Message Mapped Functions - afx - msg void OnOk() and afx msg void OnCancel() These functions are used to know when to call SetRegGlobalProfile() and SetBindaryAction(). Tf the user has made changes to the global settings and he selects OK, then a bindery action takes place before exiting the Network Control Panel Applet. If the user selects Cancel, then all changes are trashed and the applet will exit normally. Both of these functions call their corresponding CDialog::OnOK() and rDialog::OnCancel() functions prior to returning. If either SetRegGlobalProfile() or SetBindaryAction() functions fail, then the user is notified with a standard dialog warning message box.
Some attempt is made to ascertain the nature of the failure. If the OS is NT, the user might not be the Administrator, etc.
All remaining functions are message mapped functions. These functions are used to make changes to the m - GlobalSettings member and set the mb-SettingsModified member if a change was made that is different from the existing value. These functions should rarely fail so there is no need to handle errors within them. The guidelines for the control interaction is described above.

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The ServiceMonitor NIC Status and Management Application is the main management and Status application for the NIC Adapter Card.
The Main Application Class (ServiceMonitor.h)is the main application class to start the ServiceMonitor Management and control application. Its purpose is to establish all registered messages, create the main dialog for ServiceMonitor, and establish a mechanism for only allowing a single instance of this application to function.
I/CSenriceMonitorApp:
//See ServiceMonitor.cpp for the implementation of this class class CServiceMonitorApp : public CWinApp public: CServiceMonitorApp(); CDialog *mp MainDialog;
Overrides // CIassWizard generated virtual function overrides //{{AFX - VIRTUAL(CServiceMonitorApp) public:
virtual BOOL InitlnstanceQ;
virtual void WinHelp(DWORD dwData, UINT nCmd HELP CONTEXT);
/>} I AFX_VIRTUAL
Data static const UINT mcui ExitWindowsRM;
private:
boot mb_CIassRegistered;

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Implementation public: BOOL AFXAPI IsHeIpKey(LPMSG IpMsg), private: boot Firstlnstance();
protected: afx_msg void OnCIoseServiceMonitorApp(WPARAM wParam, LPARAM
IParam);
!/{{AFX - MSG(CServiceMonitorApp) afx msg void OnContextHelp();
afx - msg void OnSmHelp();
//}}AFX MSG
UECLARE_MESSAGE_MAPQ
Class Constructor - CServiceMonitorQ
Description: Constructs a WinApp application class to manage the ATM/ADSL NIC Adapter.
This also starts the message pump for this application.
Return Type: None.
Function Params: None.
Class Destructor - -CserviceMonitoro Description: Shuts down any and all processes started by this application and frees any resources being used.
Return Type. None.
Function Params: None.
Function Override - BOOL InitInstance() Description: Creates the main class for this application to allow only a single instance of itself.

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Also creates the main window class and the main ServiceMonitor dialog.
Return Type: BOOL.
Function Params: None.
Function Override - void WinHelp(DWORD dwData, UINT nCmd) Description: Directs all help calls to the proper language help files. See WinHelp Windows function description for details on arguments.
Return Type. void.
Function Params: DWORD dwData - Depends on nCmd member.
UINT nCmd - Specifies the type of help requested.
Public Function - BOOL AFXAPI IsHelpKey(LPMSG IpMsg) Description: Traps <Shift> F I keyboard commands to call context sensitive help.
Return Type: BOOL AFXAPI.
Function Params: LPMSG IpMsg - Message parameter passed into PreTranslateMessage functions.
Private Function - bool FirstInstance() Description: Check for a previous instance of this application by searching for a window with our specific pre-registered class name. If one is found, then activate it and return false.
Return Type: bool.

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Function Params: None.
Message Mapped Function - afx msg void OnCloseServiceMonitorApp(WPARAM wParam, LPARAM lParam) Description: Called by a registered massaged "SMWRM -SERVICEMONITOR EXIT MSG".
This function allows another control application to force ServiceMonitor to shut down and exit.
Return Type: void.
l0 Function Params: WPARAM wParam - Used to pass information for the requested shutdown.
LPARAM lParam - Normally set to 0.
Message Mapped Function - afx msg void OnContextHelp() Description: Traps all context sensitive help calls to determine when help should be called instead of context help for dialogs.
Return Type. void.
Function Params: None.
Message Mapped Function - afx msg void OnSmHelp() Description: Used for external calls to ServiceMonitor help.
Return Type: void.
Function Params: None.

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Main Dialog Class - CServiceMonitorDlg (ServiceMonitorDlg.h) The main ServiceMonitor dialog is created with this class.
All threads and application data are initialized in this class to control and manage the ATM/ADSL NIC Adapter. This class or members of this class initiate global performance data and control functions.
// ServiceMonitorDlg.h : header file Copyright (c)1997 Hayes Microcomputer Products, Inc.
class CServiceMonitorDIgAutoProxy;
II CServiceMonitorDig dialog class CServiceMonitorDlg: public CDialog DECLARE -DYNAMIC(CServiceMonitorDlg);
friend class CServiceMonitorDIgAutoProxy;
Construction public: CServiceMonitorDlg(CWnd* pParent - NULL); standard constructor virtual -CServiceMonitorDlgo;
Data public:
enum SMD STATUS INIT - 0, SMD STATUS IDLE, SMD STATUS TR, SMD STATUS ENDTR, SMD STATUS ERRTR, SMD STATUS RX, PATENT
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SMD STATUS ENDRX, SMD_STATUS ERRRX, SMD STATUS MODDISCONNECT, SMD STATUS ERROR
enum SMWM SHELLNOTIFYICON -(WM APP+100), SMWM GETGLOBALPROTOCOL, SMWM
CHANGEGLOBALPRGTOCOL, SMWM SCM DISPLAYDLG, SMWM SCM MONITORPROPS. SMWM
SCM INSTNEWSERV, SMWM SCM CONNDISCONN // Used for internal updates CServiceMonitorProfile mp_SMSessionProfile; CBitmap mbc - ServConnStatActive; CBitmap mbc ServConnStatlnactive;
CBitmap mbc ServConnStatError;
Private:
NOTIFYICONDATA m SMD_Notifylconld; II This is the System Tray Icon Information CString msc SMD - NotifylconStatus;// Tip string data for STI.
CWinApp *mp_ServiceMonitorApp;
HACCEL mhac Global;
HICON mhi - Main;
double and ConnectionTime;
II Total modem connection time.
double and - TransmittedAmount;
2 0 Total modem transmitted quantity.
double and ReceivedAmount;
Total modem received quantity.
boot mb ADSLModemIsConnected;
boot mb SheIIRMDbIClick;
boot mb IsAcceIHelp;

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boot mb_DialogShel I Icon;
dialog Data //{ {AFX I DATA(CServiceMonitorDlg) enum IDD - IDD_SERVICEMONITOR_DIALOG
NOTE: the CIassWizard will add data members here //})AFX_DATA
II CIassWizard generated virtual function overrides //{{AFX_VIRTUAL(CServiceMonitorDlg) public: virtual BOOL PreTransIateMessage(MSG* pMsg); protected: virtual void DoDataExchange(CDataExchange*
pDX);// DDX/DDV support virtual void PostNcDestroy(); //}}AFX VIRTUAL
Implementation public: boo] ShowServiceProperties(UINT startPage); void OnDispIayServiceMonitorDlg();
// ADSL Modem Functions void ModemConnDisconnQ; boot ModemConnect(}; boot ModemDisconnect();
// System Tray Related Functions void ModifyTraylcon(UINT SMD - Status, UINT connectTime, UINT
TXAmount, UINT RXAmount);
II Service Related Functions bool IsATMConnActive(DWORD atmVC);
private:
// This class knows when to create and destoy the shell icon!
void DeleteTraylcon();
void CreateTraylcon();
protected:
CserviceMonitorDIgAutoProxy* m_pAutoProxy;
BOOL CanExit();
/! Generated message map functions //{{AFX - MSG(CServiceMonitorDlg) virtual BOOL OnInitDialog();

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afx_msg void OnSysCommand(UINT nID, LPARAM IParam);
afx msg void OnDestroy();
afx_msg void OnPaint();
afx msg HCURSOR OnQueryDraglconp;
afx msg void OnCIoseQ;
virtual void OnOKQ;
virtual void OnCanceIQ;
afx_msg void OnDisconnectModem();
afx_msg void OnServiceProperties();
afx_msg BOOL OnHelplnfo(HELPINFO* pHelplnfo);
/I}}AFX - MSG
// User Defined Message Functions - These have to be manually updated!
afx msg LRESULT OnTrayCommNotification(WPARAM wParam,LPARAM
IParam);
afx msg LRESULT OnTraySheIINotification(WPARAM wParam,LPARAM
IParam);
DECLARE MESSAGE MAP() };
ServiceMonitor Properties Class - CServiceMonitorPS (ServiceMonitorPS.h) <Insert Description here!!!!>
111111111IIIIlIIIIIIIIIIIIIIIIIIIIIIIIllll111IIIIllllllllIIIIIIIIIIIIIIIIIII
//
ServiceMonitorPS.h : header file //

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Copyright (c)1997 Hayes Microcomputer Products, Inc.
//
IIIIIIIIIIIIIIIIIIIIIINIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII <.
IIIIIIIIIIIIIIIIIIIIIIIllll111lllllllllllllllIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//CserviceMonitorPS
class CServiceMonitorPS : public CpropertySheet DECLARE DYNAMIC(CServiceMonitorPS) //Construction 2 0 public:
CserviceMonitorPS(UINT nIDCaption, CWnd* pParentWnd NULL, DINT iSelectPage 0);
CserviceMonitorPS(LPCTSTR pszCaption, CWnd* pParentWnd = NULL, UINT
iSelectPae = 0);
virtual -CScrviceMonitorPSO;
// Attributes public:
// These are the tabs for the property sheet.
CservicesPage m PST/ -Services;
CATMIntertacePage m PST2ATMInterface;
CoptionsPage m PST3 Options;
CmodemParamPage m PSTS ModemParam;
CmodemCountersPage m PST6 ModemCounters;

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private:
// Our parent window and some data on it.
Cwnd *mwcp_Parent;
long ml XCoordinate;
long ml YCoordinate;
I/ Our main App class and any accelerator tables needed.
HACCEL mhac Global;
CwinApp *mp_ServiceMonitorApp;
boot mb_IsAcceIHelp;
//Operations private:
void InitializePSTabsQ;
//Overrides // CIassWizard generated virtual function overrides //{{AFX_VIRTUAL(CServiceMonitorPS) public:
virtual BOOL OntnitDialogQ;
virtual BOOL PreTransIateMessage(MSG* pMsg);
I/}}AFX_VIRTUAL
!/Implementation 2 0 protected:
I/ Generated message map functions I/{ {AFX I MSG(CServiceMonitorPS) afx_msg BOOL OnHelplnfo(HELPINFO* pHelplnfo);
//}}AFX - MSG
2 5 !/ User Defined Message Functions - These have to be manually updated!

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afx_ msg LRESULT OnGetGIobaIProtocol(WPARAM m wParam,LPARAM m IParam);
afx_msg LRESULT OnChangeGiobaIProtocol(WPARAM m wParam,LPARAM
m IParam);
DECLARE MESSAGE MAP() };
Data Profile Class - CServiceMonitorProfile (ServiceMonitorProfile.h) <Insert Description herelll>
IIIIIIIIIIIIIIIIIIIIIIIIllll111111IIIIlIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//
//ServiceMonitorProfile.h : header file II
//Copyright (c)1997 Hayes Microcomputer Products, inc.
//
IINIIIIIIIIIllll111IIIlIIlllllllllllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
ReNew(c,p,t): c = New size you want; p = pointer to memory loc.; t = type of storage you want; #define ReNew(p,c,t) (t *)SMPReNew( (p), ((c)*sizeof(t)) ) II Registry String values for Global settings (Main & Interface keys) #define SMGS MK POST *Post"

#define SMGS MK USEGBLPROF "UseGIobaIProfile"

2 0 #define SMGS MK DISPADSLSTATS "DispIayADSLStats"

#define SMGS IK ILMIATMADD "ILMIATMAddress"

#define SMGS IK ILMIENABLED "ILMIEnabled"

#define SMGS IK OAMF4ENABLED "OAMF4"

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#define SMGS IK OAMFSENABLED "OAMFS"

#define SMGS IK PROTSSUPPORTED "ProtSupporY' #define SMGS IK SIGNALING "Signaling"

#define SMGS IK USERATMADD "UserATMAddress"

#define SMGS IK PVPMODE "PVPMode"

#define SMGS IK_GUARLINERATE "GuarLineRate"

#define SMGS IK LLCSNAPENABLED "LLCSNAPEnable"

Il Registry g values for Service Strin Profile data #define SMPS ISK SERVCOUNT "Count' #define SMPS "Connection"
VCIVPI

#define SMPS CLASS PROT "ConnectionC
& I"

#define SMPS REGNAME "RegServiceName"

#define SMPS "SCRPeak"
CLS SCRPEAK

#define SMPS CLS SCRMINIMUM "SCRMinimum"

#define SMPSCLS SCRBURSTTOL "SCRBurstTol"

#define SMPS CLS SCRSUSTAINABLE "SCKSustainable"

#define SMPS IPOA SVCPVCCONN "ConnectionType"

#define SMPS IPOA ARPSRVADD "ARPSrvAddress"

#define SMPS IPOA ARPSRVIPADD "ARPSrvIPAddress*

#define SMPSIPOA IPSUBNET "Subnet"

#define SMPS IPOA IPSUBNETMASK "SubnetMask"

#define SMPS IPOA IPREMOTE "Remote"

#define SMPS IPOA IPLOCAL "Local"

#define SMPS_ IPOA USEDEFGATEWAY "UseDefGateway"

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#define SMPS FLANE_USEWKLECSADD "UWKLECSAddEnabled"
#define SMPS FLANE_LECSADD "LECSAddress"
#define SMPS FLANE_LESADD "LESAddress"
II Function Return ERROR codes #define INVALID SERVLIST NUMBER Oxffifffff #define INVALID ATMVC NUMBER Oxffffffff #define INVALID POINTER Oxfffffffe #define FUNC_SUCCESS 0x00000001 #define CLASS UNINITIALIZED Oxffffffff II Update Global Settings Mask Values #define SMGS MKMSK UDATMINTERFACE 0x0001 #define SMGS MKMSK UDOPT10NS 0x0002 #define SMGS MKMSK UDALL (SMGS_MKMSK UDATMINTERFACE
SMGS MKMSK UDOPTIONS) // Max and Min values for various ATM/ADSL data #define MAX VCI VALUE 4096 #define MIN VCI VALUE 32 #define MAX VPI VALUE 255 #define MIN VPI VALUE 0 II ATM Class Stings #define STR ATMCLASS CBR "CBR"

WO 99/67911 PCT/US99/14372 ' PATENT
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#define STR_ATMCLASS UBR "UBR"

#define STR ATMCLASS UBRP "UBR+"

#define STR ATMCLASS VBR "VBR"

// Protocol Strings #define STR_PROT_NATM "Native ATM"

#define STR_PROT_IPOA "IP over ATM"

#define STR_PROT_FLANE "Forum LANE"

#define STR_PROT_PPPOA "PPP over ATM"

#define STR_PROT_IPXOA "IPX over ATM"

#define STR_PROT_NETBOA "NetBEUI over ATM"

// Signaling Types and Strings #define SMGS IK SIGVALUN131 0x00000000 #define SMGS IK SIGVALLN140 0x00000001 #define STR_UN131 "UNI 3.1"
#define STR_UN140 "UNI 4.0"
// Misc. Strings #define STR_NOATMADDR "(*Not Used with ILMI Enabled*)"
#define STR_ENABLED "Enabled"
#define STR_DISABLED "Disabled"
2 0 #define STR_PVPMODE "pV
#define STR_PVCMODE "PVC"

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II Exported Misc. Funcfions extern unsigned long convertStringToULong(LPSTR pString);
extern void removeTLV'JSpace(LPSTR pString), extern DWORD GetWinOSVersion(UINT *majorVer, UINT *minorVer);
// Exported Inline Functions extern inline void removeAlIWSpace(LPSTR pString);
IIIIIIIIIIIIIIIIIIIIIIIIIIlIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
CServiceMonitorProfile object class CServiceMonitorProfile : public CObject {
DECLARE DYNCREATE(CServiceMonitorProfile) (/Construction public:
CserviceMonitorProfile();
virtual -CServiceMonitorProfile();
(/Attributes public:
enum{
SMP_ATMCLS CBR - 0, SMP_ATMCLS UBRP, SMP ATMCLS UBR, SMP ATMCLS VBR
}SMP_ATMCIassTypes;

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enum {
SNMP_STRING = 0, (/Standard SNMP style Response SNMP_INTEGER, //The rest is my custome ones SNMP_UNI STATUS, SNMP_GET MACADDRESS, SNMP~GET UPTIME, SNMP_GET IPADDRESS, SNMP_GET ATMADDRESS, SNMP GET LECSTATUS
l0 }SNMP_NIC_Calls;
protected:
SMDChannelStatusLstLP mp_ChnIStatusList;
SMDVirtuaIConnStatLstLP mp_VCStatusList;
SMDServiccDataListLP nip InstServList;
SMDGIobaIATMSettingsLP mp_GbIATMSettings;
LPVOID mvp NicManager;
private:
char mcs HRegKey[50];
char mcs HISRegKey[20];
2 o char mcs HGbISetRegKey[IO];
char mcs HGIbATMRegKey[I5];
boo] mb_UseGlobal Profile;
bool mb_IsUserProfileAdmin;
DWORD mdw TotaINoInstServs;

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//Operations public:
II Global ATM/ADSL Functions that interact with m GbIATMSettingsPtr data member!
boot IsADSLStatRequested();
boot GetGbIRegProfile(SMDGIobaIATMSettingsLP pGbIProfile -NULL);
boot UpdateGbIRegProfile(SMDGIobaIATMSettingsLP pGbIProfile -NULL, UINT
udMask = SMGS MKMSK UDALL);
UINT GetGbIProtSettingQ;
UINT GetSignalingType();
DWORD GetMaxUpStrearnBWQ;
UINT GetAtmAddress(char "bufAtmAddr, int szBuffer);
boot IsILMIEnabled();
boot IsLLC - SNAPEnabled();
boot IsModePVP();
// VC Functions that interact with m VCStatusListPtr data member!
BOOL IsATMVCActive(DWORD atmVC);
BOOL IsATMVCActive(int IstNo);
Service Functions that interact with m InstServListPtr data member!
DWORD GetAtmVCFromList(int list = 0); II One based List 2 0 boot GetServUserName(DWORD atmVC = 0, LPSTR pStrBuffer = NULL, DWORD
bufSz= 0);
boot GetServUserName(int IistNo = 1, LPSTR pStrBuffer = NULL, DWORD bufSz =
0);
bool GetServRegName(DWORD atmVC = 0, LPSTR pStrBuffer = NULL, DWORD bufSz =0);
bool GetServRegName(int IistNo = 1, LPSTR pStrBuffer = NULL, DWORD bufSz = 0);
DWORD GetInstSrvCount();
DWORD GetSrvDataProfile(DWORD atmVC=- 0, SMDServiceDataLP pSrvProfile = NULL);

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
boot AddNewRegService(SMDServiceDataLP pSrvProfile =NULL);
boot RemoveRegService(LPSTR pUserSrvName = NULL);
boot UpdateRegService(LPSTR pCurSrvName = NULL, SMDServiceDataLP pSrvProfile=
NULL);
bool UpdateRegService(int IstNo = 0, SMDServiceDataLP pSrvProfile = NULL);
boot UpdateRegService(DWORD atmVC = 0. SMDServiceDataLP pSrvProfiie= NULL);
void DestroySrvRegList(SMDServiceDataListLP *pSrvRegLst);
// Protocol Related Functions boot GetNewProtDataStruct(void **dpProtData, UINT protType);
//Misc. Functions private:
boot fnitializeNew(); // Standard true succeds and false fails // General Functions II Memory Related functions void *SMPReNew(void *memHandle, DWORD newSize);
void SMPFreeReNew(void *memHandle);
/l Global ATM/ADSL functions boot InitGbIRegProfileQ;
// Service related functions boot InitSrvRegValues(char *serviceKeyName, SMDServiceDataLP pService);
int InitSrvRegListQ;
boot UpdateSrvRegList();

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
void DestroylntSrvRegListQ;
SMDServiceDataLP GetServDataFromLstNo(int IstNo};
II Service functions for connection performance & status boot CreateConnLstFromSrvLstQ;
//Overrides II CIassWizard generated virtual function overrides //{{AFX_VIRTUAL(CServiceMonitorProfile) //}}AFX VIRTUAL
// Implementation protected:
?;
Install Services Class - CServicesPage (ServicesPage.h) <Insert Description here!!!!>
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//
ServicesPage.h : header file //
Copyright (c)1997 Hayes Microcomputer Products, Inc.
//
2 0 Illllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//CservicesPage dialog class CServicesPage : public CPropertyPage {
DECLARE DYNCREATE(CServicesPage) //Construction public:
CservicesPage();
virtual -CServicesPageQ;
//Dialog Data // {{ AFX DATA(CServicesPage) enum { IDD = IDD SERVICESPAGE};
//NOTE - CIassWizard will add data members here.
IIDO NOT EDIT what you see in these blocks of generated code!
//}}AFX DATA
private:
/! CBitmap m ServConnStatActive;
/I CBitmap m ServConnStatlnactive;
/I CBitmap m ServConnStatError;
CimageList m ServConnStatlmage;

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
CgraphBar m PertGraph;
TC_ITEM m TabData;
boot mb_TabControllnitialized;
boot mb_SettingsModified;
void *mvp_ServList;
void *mvp_ProtList;
void *mvp_ModServList;
// Overrides //CIassWizard generate virtual function overrides //{ {AFX - VIRTUAL(CServicesPage) public:
virtual BOOL OnSetActive();
virtual BOOL OnApply();
protected:
virtual void DoDataExchange(CDataExchange* pDX); //DDXIDDV support II}}AFX VIRTUAL
//Implementation private:
void AddServToModList(int IistNo, DWORD pvServData);
2 0 protected:
//Generated message map functions II{ {AFX MSG(CServicesPage) afx_msg BOOL OnHelplnfo(HELPINFO* pHelplnfo);
afx_msg void OnServlnstallnew();

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
afx_msg void OnServPropertiesQ;
afx_msg void OnServStopstart();
afx_msg void OnServUninstaIIQ;
virtual BOOL OnInitDialogp;
afx_msg void OnSeIChangelnstalledServ(NMHDR* pNMHDR, LRESULT* pResult);
//}}AFX MSG
DECLARE MESSAGE MAP() Service Properties C!ass - CServiceProperties (ServiceProperties.h) <Insert Description here!!!>
IlIllllll111llllllllllllllllllllllllllIIIlllllllllllllllllllllIIIllllllllll I/
IIServiceProperties.h : header rile /I
//Copyright (c)1997 Hayes Microcomputer Products, Inc.
II
lllllllllllllllllllIIIllllllllllllllllllllllllllllllllllllllllllllIIIlllll lllllllllllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//CserviceProperties dialog class CServiceProperties: public Cdialog {
II Construction public:
CserviceProperties(CWnd* pParent = NULL); // standard constructor //Dialog Data WO 99/67911 PC'T/US99/14372 PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902{USP)WO HMPI
//{{ AFX_DATA(CServiceProperties) enum {IDD = IDD SERVICEPROPERTIES};
//NOTE: the CIassWizard "I add data members here //}}AFX_DATA
private:
// Our main App class and any accelerator tables needed.
HACCEL mhac Global;
CwinApp *mp_ServiceMonitorApp;
boot mb - IsAcceIHelp;
l0 void *mvp_ServiceData;
char mcs - DIgTitle[256];
UINT mui GbIProtUsed;
//Overrides II CIassWizard generated virtual function overrides //{ {AFX - VIRTUAL(CSenriceProperties) public:
virtual BOOL PreTransIateMessage(MSG* pMsg);
protected:
virtual void DoDataExchange(CDataExchange* pDX); DDX/DDV support 2 0 I/}}AFX_VI RTUAL
II Implementation public:
void SetServiceDataPtr(void *pSrvData = NULL);
void SetGbIProtType(UINT gblProtUsed);
2 5 protected:

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
//Generated message map functions II{ {AFX MSG(CServiceProperties) afx_msg void OnModifyQ;
afx - msg BOOL OnHelplnfo(HELP!NFO* pHelplnfo);
virtual BOOL OnInitDialog();
afx msg void OnNoModify();
//}}AFX MSG
DECLARE MESSAGE MAP() Modify Service Class - CModifyService (ModifyService.h) <Insert Description here!!!!>
IIIIIIIIIIIIIIIIIIIIIlIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
II
IIModifyService.h : header file //
//Copyright (c)1997 Hayes Microcomputer Products, Inc.
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
II CModifyService dialog class CModifyService: public Cdialog {
//Construction public:

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
CmodifyService(CWnd* pParent = NULL); II standard constructor -CmodifyServiceo;
// Dialog Data //{{AFX DATA(CModifyService) enum { IDD = IDD_MODIFY_SERVICE);
// NOTE: the CIassWizard will add data members here //}}AFX DATA
void *mvp_ServiceProtData;
UINT mui GbIProtUsed;
private:
// Our main App class and any accelerator tables needed.
HACCEL mhac Global;
CwinApp *mp_ServiceMonitorApp;
boot mb_IsAcceIHelp;
bool mb_Dlglnitialized;
void *mvp ServiceData;
char mcs DIgTitle[256];
bool mb_DataModifled;
bool mb_ProtModified;
2 0 /I Overrides I/ CIassWizard generated virtual function overrides //{{AFX VIRTUAL(CModifyService) PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
public:
virtual 800L PreTransIateMessage(MSG* pMsg);
protected:
virtual void DoDataExchange(CDataExchange* pDX); ll DDX/DDV support //}}AFX VIRTUAL
Implementation public:
void SetServiceDataPtr( void *pSrvData = NULL);
void SetGbIProtType(UINT gblProtUsed);
private:
void SetSCRWndsForClass(int atmClass), protected:
ll Generated message map functions /l{{AFX_MSG(CModifyService) afx_msg BOOL OnHelplnfo(HELPINFO* pHelplnfo);
afx_msg void OnCiSettingsQ;
afx_msg void OnModCancel();
afx_msg void OnModOk();
virtual BOOL OnInitDialog{);
2 0 afx_msg void OnSeIchangeServiceAtmclass();
afx_msg void OnKiIIfocusServiceVci();
afx_msg void OnKiIIfocusServiceVpiQ;
afx msg void OnUpdateServiceVpiQ;
afx_msg void OnUpdateServiceVci();
afx_msg void OnUpdateEditControlsQ;

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
afx_msg void OnSeIchangeServProtocolQ;
afx_rnsg void OnServconnPvc();
afx msg void OnServconnSvc();
//}}AFX MSG
DECLARE MESSAGE MAP() IP over ATM Protocol Settings Class - CATMIIPSettings (ATMIIPSettings.h) <Insert Description herellll>
lllll111lllllll1111lllllllllllllllllllllllllllllllllllllIIIIIII
//
// ATMIIPSettings.h : header file //
// Copyright (c)1997 Hayes Microcomputer Products, Inc.
//
/lllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
lllllllllllllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//CATMIIPSettings dialog class CATMIIPSettings: public Cdialog 2 0 // Construction public:
CATMIIPSettings(CWnd* pParent -NULL); // standard constructor //Dialog Data PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
//{{AFX_DATA(CATMIIPSet6ngs) enum { IDD = IDD_ATM/ IPSET };
// NOTE: the CIassWizard will add data members here //}}AFXTDATA
private:
// Our main App class and any accelerator tables needed.
HACCEL mhac_Global;
CwinApp, *mp ServiceMonitorApp;
bool mb_IsAcceIHelp;
20 boot mb ProtDataModified;
boot mb Dlglnitialized;
boot mb_ConnIsSvc;
void *mvp_ProtData;
//Overrides Il CIassWizard generated virtual function overrides //{{AFX_VIRTUAL(CATMIIPSettings) public:
virtual BOOL PreTransIateMessage(MSG* pMsg);
protected:
virtual void DoDataExchange(CDataExchange* pDX); DDX/DDV support //}}AFX_VI RTUAL
//Implementation WO 99/67911 PCT/US99/14372 ' PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
public:
void SetProtDataPtr(void *pServData);
inline void SetSrvConnType(bool bConnIsSvc = false) {mb_ConnIsSvc bConnIsSvc;};
protected:
// Generated message map functions I/{{AFX MSG(CATMIIPSettings) afx msg BOOL OnHelplnfo(HELPINFO* pHelplnfo);
afx_msg void OnIPOACancel();
afx msg void OnIPOAOkp;
virtual BOOL OnInitDialog();
afx msg void OnPvclpcon();
afx msg void OnSvclpcon();
afx msg void OnUsedefgateway{);
' 15 afx_msg void OnUpdateArpsrvAtmadd(), afx_msg void OnUpdateArpsrvlpaddQ;
afx msg void OnUpdateLipslpadd();
afx_msg void OnUpdateRipslpadd();
//} }AFX MSG
DECLARE MESSAGE_MAP() ATM Interface Settings Class - CATMInterfacePage (ATMIntertacePage.h) <Insert Description here!!I>
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
//
//ATMInterfacePage.h : headerflle II
//Copyright (c)1997 Hayes Microcomputer Products, Inc.
//
/////////////////////////////////////////////////////////////
//CATMInterfacePage class CATMIntertacePage : public CpropertyPage {
DECLARE DYNCREATE(CATMIntertacePage) //Construction public:
CATMIntertacePage();
virtual -CATMintertacePage();
//Dialog Data private:
CgraphBar m PerfGraph;
II{{ AFX DATA(CATMIntertacePage) enum IDD =IDD ATMINTERFACEPAGE};
2 0 //NOTE - CIassWizard will add data members hem.
II DO NOT EDIT what you see in these blocks of generated code!
//}}AFX DATA
//Overrides WO 99/67911 PCT/I1S99/14372 ' PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
// CiassWizard generated virtual function overrides //{{AFX - VIRTUAL(CATMInterfacePage) protected: °' virtual void DoDataExchange(CDataExchange* pDX); DDX/DDV support //}}AFX_VI RTUAL
//Implementation public:
UINT GetGIobaIProtSetting();
// Generated message map functions protected:
//{{AFX I MSG(CATMInterfacePage) afx~msg BOOL OnHelplnfo(HELPINFO* pHelplnfo);
virtual BOOL OnInitDialog();
//}}AFX - MSG
DECLARE MESSAGE MAP() User Options Class - COptionsPage (OptionsPage.h) <Insert Description herellll>
IlllllllllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
II
2 0 //OptionsPage. h : header file I/
//Copyright (c)1997 Hayes Microcomputer Products, Inc.
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
llllllllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
//CoptionsPage dialog class COptionsPage : public CpropertyPage DECLARE_DYNCREATE(COptionsPage) //Construction public:
CoptionsPageQ;
virtual -COptionsPage();
//Dialog Data //{{AFX DATA(COptionsPage) enum {IDD =IDD_OPTIONSPAGE};
//NOTE - CIassWizard will add data members here.
//DO NOT EDIT what you see in these blocks of generated code!
//}AFX DATA
private:
void *mvp_GIobaISettings;
boos mb_Dlglnitialized, boot mb_SettingsModified;
2 0 //Overrides II CiassWizard generate virtual function overrides //{{AFX VIRTUAL(COptionsPage) public:
virtual BOOL OnApply();

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
protected:
virtual void DoDataExchange(CDataExchange* pDX); // DDX/DDV support /I{{AFX VIRTUAL
// Implementation protected:
// Generated message map functions //{{AFX_MSG(COptionsPage) virtual BOOL OnInitDialog();
afx_msg void OnDispadslmodtab();
1 o afx msg void OnPowerOnselftestQ;
//} )AFX_MSG
DECLARE MESSAGE MAP() ADSL Modem Parameters Class - CModemParamPage (ModemParamPage.h) 35 <Insert Description here!!!>
llllllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//
//ModemParamPage.h : header ale //
20 // Copyright (c)1997 Hayes Microcomputer Products, Inc.
//
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIlIIIIIIIIIIIIIIIIIIIIIII
lllllllll111llllIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(LJSP)WO HMPI
//CmodemParamPage dialog class CModemParamPage: public CpropertyPage {
DECLARE DYNCREATE(CModemParamPage) //Construction public:
CmodemParamPageQ;
virtual -CModemParamPage();
// Dialog Data //{{AFX_DATA(CModernParamPage) enum 1DD = IDD ADSL_MODEMPARAMPAGE};
//NOTE - CIassWizard will add data members here.
IIDO NOT EDIT what you see in these blocks of generated code!
I/}}AFX DATA
//Overrides II CIassWizard generate virtual function overrides //{{AFX VIRTUAL(CModemParamPage) protected:
virtual void DoDataExchange(CDataExchange* pDX); II DDX/DDV support //}}AFX VIRTUAL
II Implementation protected:

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
// Generated message map functions //{{AFX MSG(CModemParamPage) virtual BOOL OnInitDialogQ;
//}}AFX MSG
DECLARE MESSAGE MAP() };
ADSL Modem Counters Class - CModemCountersPage (ModemCountersPage.h) <Insert Description herelll>
llllllllIIIIIIIIIIIIIIIIIlllllllllIIIIIIIIIIIIIIIIIIIIIII

//ModemCountersPage.h : header file //
//Copyright (c)1997 Hayes Microcomputer Products, Inc.
IIIIIIIIIIIIIIIIIIIIIllll111llllllllllllllllllllllIIIllllll /lllllllllllllllllllllllllllllllllllllllllllllllllllllllll //CmodemCountersPage dialog class CModemCountersPage : public CpropertyPage { -DECLARE DYNCREATE(CModemCountersPage) 2 0 //Construction public:
CmodemCountersPageQ;
virtual -CModeniCountei-sPage();
//Dialog Data 2 5 I/ { {AFX DATA(CModemCountersPage) PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
enum { IDD = IDD ADSL MODEMCOUNTERSPAGE };
II NOTE - CIassWizard will add data members hem.
II DO NOT EDIT what you see in these blocks of generated code!
//}}AFX_DATA
//Overrides // ClassWizard generate virtual function overrides I/{ {AFX VIRTUAL(CModemCountersPage) protected:
virtual void DoDataExchange(CDataExchange* pDX); //DDX/DOV support //} }AFX VIRTUAL
I/ Implementation protected:
// Generated message map functions //{{AFX MSG(CModemCountersPage) virtual B700L OnInitDialog();
//} } AFX MSG
DECLARE MESSAGE MAP() Performance Graph Class - CGraphBar (GraphBar.h) This class object is an owner drawn graph control that subclasses a static window passed in. This control object creates a bitmap graph and displays a ten second history of performance data for three ATM parameters (Transmit, Received, and Discarded cells). A

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
single object instance can maintain data for multiple connections and display a graph for any single connection upon request.
IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//
//GraphBar.h : header file //
II Copyright (c)1997 Hayes Microcomputer Products, Inc.
//
lIllIIlllllllllllllllllllllllllllllllllllllllllllllllllllllll #define MAX_IN LIST 14 #define MAX_VERTICAL 26 #define MAX_HORIZONTAL MAX IN LIST
IIIIIIIIIIIIIIIIIIIIIllll111lllIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
//CgraphBar window class CGraphBar: public CWnd // Construction public:
CgraphBarQ;
2 0 //Attributes public:

PATENT
ATTORNEY DOCKET NO. 10226/003W01/9B109402(USP)WO HMPI
private:
unsigned long mui TotaISoFar;
Cwnd *mp~WindowHandle;
int mi List[MAX_IN_LIST];
int mi BarYPos[MAX_VERTICAL];
int mi BarXPos[MAX_HOR120NTAL];
int mi StartMarker;
RECT m FiIIRect;
l0 Cbitmap mbc Graph;
Cbitmap *mbcp_OIdGraph;
CDC *mdccp_Rastering;
//Operations public:
15 boot SetGraphParentWnd(CWnd *pParentWnd);
boot SetGraphParentWnd(HWND hParentWnd);
bool SetGraphParentWndToDlgltem(UINT nID, CWnd* pParentWnd);
void AddNewValue(int value);
//Overrides 20 II CIassWizard generated virtual function overrides //{{AFX_VIRTUAL(CGraphBar) //} }AFX VIRTUAL
// Implementation PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
public:
virtual -CGmphBaro;
private:
void DoBarDrawing();
// Generated message map functions protected:
//{{AFX I MSG(CGraphBar) afx msg BOOL OnEraseBkgnd(CDC* pDC);
afx msg void OnPaint();
//I } AFX MSG
DECLARE MESSAGE MAP() Common Data for all Class Objects (ServiceMonitorData.h) <Insert Description herelll>
1 5 /***************************************************
**
'*ServiceMonitorData.h: Data header isle for retrieving status ** information from the ATM/ADSL Modern card. This header is ** designed for a C intertace and not C++, 2 0 ~~
**Copyright (c)1997 Hayes Microcomputer Products, Inc.
**
****************************************************

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
#if!defined(SERVICEMONITORDATA H) #define SERVICEMONITORDATA H 11 r **Protocols supported by this ATM/ADSL NIC/Modem card /*

#define HAYES ATMADSLPROT _NATM 0x00001 #define HAYES ATMADSLPROT_ IPOA 0x00002 #define HAYES_ATMADSLPROT_ FLANE 0x00004 #define HAYES ATMADSLPROT_ PPPOA 0x00008 #define HAYES_ATMADSLPROT_ IPXOA 0x00016 #define HAYES ATMADSLPROT_ NETBOA 0x00032 /*
**Max values for data types.
/*

#define HAYES MAX_SERVUSERNAME 16 #define HAYES_ MAX_SERVREGNAME 51 #define HAYES MAX_IPADDRESS 16 #define HAYES MAX_ATMADDRESS 60 #define HAYES MAX_CARRIERLOAD 128 #deflne HAYES MAX_NUMBERSERVS 4096 /*

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
**Event handle names for processing 10 request */
#define READIO THREAD EVENT NAME"SM_READIO EVENT"
#define READ THREAD EVENT NAME"SM,-READ EVENT' #define WRITE_THREAD_EVENT NAME,"SM_WRITE EVENT"
#if defined( CPLUSPLUS) 11 defined(C PLUSPLUS) extern "C"{
#endif /*
**Signaling types supported by this ATM/ADSL NIC/Modem card */
typedef enum {
DUSUN131 = 0, }DialupSignaling;
typedef enum {
VCSTATUS ACTIVE =0, VCSTATUS INACTIVE, VCSTATUS DISABLED
2 0 } VirtuaIConnStatus;
typedef struct dualEndUDS{
long upstream long downstream;
}DualEndUDS;

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
typedef struct dualEndMR{
long adslModem;
long remoteEnd;
} DualEndMR;
/*
*' ATM/ADSL Modem Current Operational Line Parameters */
typedef struct smdOpParams{
DualEndMR attenuation;
DualEndMR noiseMargin;
DualEndMR outputPower, DualEndMR reICapOcc;
DualEndMR maxAttBW;
DualEndMR actuaIBitRate;
char carrierLoad[HAYES MAX CARRIERLOAD+2]; /' Carrier Load String*/
}SMDOpParams, *SMDOpParamsLP;
I*
** ATM/ADSL Modem Defect Counters 2 0 */
typedef struct smdLossOfDefects{
DualEndMR IoCeIIDeliniation; /* Loss Of Cell Deliniation*/

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
DualEndMR IoSignal; /* Loss Of Signal*/
DualEndMR IoPower; /* Loss Of Power*l DualEndMR IoFrame; /* Loss Of Frame*/
}SMDLossOfDefects, *SMDLossOfDefectsLP;
/*
** ATM/ADSL Modem Channel Pertormance Counters *I
typedef struct smdChannelPerf {
long HECViolation;
long FECsCorrected;
long ErroredSeconds;
long CodeViolations;
}SMDChannelPerf, *SMDChannelPerfLP;
/*
**ATM/ADSL Modem Channel Status Data (This combines all of the above!) */
typedef struct smdChannelStatus unsigned int modemChannet;
SMDOpParams opParameters;
2 0 SMDLossOfDefects IossOfCounters;
SMDChannelPerf performance;
long pollingOps;
unsigned int opMode; /* 0 for Interleaved and I for Fast PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
unsigned int opStatus; /* Check enum values above for status values. */
}SM DChannel Status, *SMDChannelStatusLP;
typedef struct smdChannelStatusLst{
struct -smdChannelStatusLst *previous;
struct smdChannelStatusLst *next;
SMDChannel Status chnlStatus;
}SMDChannelStatusLst, *SMDChannelStatusLstLP;
J"
'* ATM Channel Performance Data.
*/
typedef struct -smdVirtuaIConnStatus{

DWORD atmChannel;

UINT vpiValue;

DINT vciValue;

long ceIIsTrans;

long ceIIsRec;

long ceIIsDisc;

long aatSMsgs; /* Error detection Info *l 2 0 tong aatSFaults;

long elapsedTime; I* Time since last polled for info*/

BOOL oamF4Enabled; /* Op. & Maint. Flow Control (F4) enabled*/

BOOL oamF5 Enabled; /* Op. & Maint. Flow Control (F4) enabled */

BOOL isActive;

}SMDVirtuaIConnStatus, *SMDVirtuaIConnStatusLP;

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
typedef struct smdVirtuaIConnStatLst{
struct smd~rtualConnStatLst *previous;
struct smdVirtualConnStatLst *next; "
SMDVirtuaIConnStatus vcStatus;
}SMDVirtuaIConnStatLst, *SMDVirtuaIConnStatLstLP;
/*
**Service Data list structure for service information.
*/
typedef struct smdServiceData{
l0 DWORD atmChannel; /* High word (VPI); Low word (VCI)*/
char userName(HAYES MAX_SERVUSERNAME'2]; /*User defined tab name */
char regName[HAYES MAX_SERVREGNAME+90]; /* Registered service */name BOOL svcConnType; /* TRUE for SVC and FALSE for PVC*/
UINT vpiValue;
UINT vciValue;
UINT atmClass;
UINT protocolUsed; /* ATM, IPOA, FLANE, etc.*/
void *protocolSet; /* Pointer to protocol data structure */
DWORD peakValue; /* High Word - Up Stream; Low Word Down Stream*/
DWORD minValue;
DWORD sustainValue;
DWORD burstToIValue;

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
}SMDServiceData, *SMDServiceDataLP;
typedef struct smdServiceDataList {
struct smdServiceDataList *previous;
struct smdServiceDstaList *next;
SMDServiceData servData;
)SMDServiceDataList, *SMDServiceDataListLP;
/*
** Protocol Data Structure for TCP/IP over ATM or (IPOA) */
typedef struct - smdIPOASettings{
char ipSubnet[HAYES MAX_IPADDRESS+2];
char ipSubnetMask[HAYES MAX_IPADDRESS+2];
char arpServATMAddr[HAYES MAX ATMADDRESS+10];
char arpServIPAddr[HAYES MAX_IPADDRESS+2];
char remoteIPAddr[HAYES MAX_IPADDRESS+2];
char IocaIIPAddr[HAYES MAX_IPADDRESS+2];
BOOL useDefGateway;
]SMDIPOASettings, *SMDIPOASettingsLP;
/*
** Protocol Data Structure for Forum LAN Emulation */
typedef struct - smdFLANESettings{
BOOL useLECSAddress; /* TRUE for Using well know LECS Address*!
char IecsATMAddress[HAYES MAX_ATMADDRESS+10];
char IesATMAddress[HAYES MAX_ATMADDRESS+10];

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}SMDFLANESetings, *SMDFLANESettingsLP;
/*
** Global ATM Information */
typedefstruct smdGlobaIATMSettings{

/* Intertace Information */

char atmAddress[HAYES_MAX_ATMADDRESS+10];

BOOL ilmiEnabled;

UINT signalingType;

UINT protSupport;

BOOL oamF4Enabled;

BOOL oamFSEnabled;

BOOL IIcSnapEnabled;

DWOR D GuaranteedLn Rate;

BOOL PVPMode;

char userAtmAddress[HAYES MAX_ATMADDRESS+10j;

I* Optio ns Information *I

BOOL postEnabled; /* Power On Self Test Enabled (extended test) 0/

BOOL useGlobal Profile;

2 0 BOOL modemStatus Enabled.

} SMDGIobaIATMSettings, *SMDGIobaIATMSettingsLP;

#if defined(~CPLUSPLUS) 11 defined(C_PLUSPLUS) }
#endif PATENT
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#endif Communication Interface for ServiceMonitor (ServiceMonitorComm.h) e, Future releases of ServiceMonitor allows other applications to communicate with it for simple management functions. Such as browser notifying that new service connections need to be established from configuration files located on various Telco Web Sites. This header is used to simply place various registered messages for internal communication of classes to the main application dialog.
/lllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll //
//ServiceMonitorComm.h : Main header file for all applications to interface with ServiceMonitor.
//
//Copyright (c) 1997 Hayes Microcomputer Products, Inc.
II
lllllllll111llllllllllllllllllllllllllllllllllllllllllllllllllIIIII
#ifldefined(SERVICEMONITORCOMM H) #define SERVICEMONITORCOMM H 1 //Main Data types for all source code used to interface with Service Monitor PATENT
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//This is the registered msg for ServiceMonitor to be able to update the //system tray icon.
#define SMWRM_NOTIFYTRAYICON MSG
"SMWRM_SYSTEMNOTIFYICON"
s #define SMWRM_SERVICEMONITOR EXIT MSG
"SMWRM_SERVICEMONITOR EXIT"
#define SMWRM_SERVICEMONITOR_SHOW MSG
"SMWRM_SERVICEMONITOR SHOW"
#endif The ADSL PC NIC on-board controller also includes a Management Application resident thereon. The ADSL includes an interface to interact with the application running on the host PC. The Management Application controls various scenarios of operation of the ADSL NIC.
The term "Host" refers to the controlling application or driver running on the PC in which the ADSL NIC is installed.
For the PC NIC, the term "near-end" is associated with the signal received locally by the NIC (the ATU-R), and the term "far-end"

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is associated with the signal received at the central office by the ATUC.
The Management Application performs a number of tasks:
It accepts commands from the Host, and provides the necessary responses, as per the Modem Control Interface described below;
It controls the Modem Software as required to accomplish the Iiost's commands, and queries the Modem Software to obtain necessary information, as per the Modem software API; and it monitors performance statistics and provides alarms for fault l0 events.
Software can be downloaded from the host depending on the selected mode. A first mode, for e.g. normal operation, downloads the software. A second, e.g. for standalone, uses software that is resident in an on board non volatile RAM.
If software is downloaded, the on-board controller is kept in reset until the software download is completed. Direct memory accesses from the PC or Hydrogen chip into the on-board controller memory space is used to download the software.
The architecture of the ADSL NIC control firmware is shown in Figure 29. User data is not handled by the on-board controller. User data passes directly from the Hydrogen chip to the SACHEM over the UTOPIA interface as shown in the bottom portion.

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Figure 29 also shows how the Management Application interacts with the Host 2902 through the Modem Control Interface 2904. The Management Application interacts with the ADSL Modem Software 2906 through the Modem SW API 2908.
The Modem Control Interface is the set of commands, responses and unsolicited responses that pass between the ADSL
NIC Management Application and the controlling entity on the Host. The ADSL NIC has this interface between the on-board controller and the Hydrogen chip. Control information is l0 typically exchanged between the Host and the Management Application, with the Hydrogen chip serving as an intermediary.
The interface between the on-board controller and the Hydrogen chip includes two 16-bit mailboxes 3000, 3002, shown in Figure 30, one for each direction. The mailboxes are implemented in hardware within ASIC 410 as described above. One mode provides compatibility with future hardware designs which may provide only an 8-bit path as shown in Figure 31. In this case, only the lower half of the data bus is used (bits 7-0). The upper eight bits are filled with zeros on write operations, and ignored on read operations.
Each mailbox has associated control bits e.g. 3010, indicating the fill state of the mailbox, e.g., full or empty.
The mailbox drivers 3012 use these bits to control their accesses PATENT
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to the mailbox. The rules for accessing the mailbox are as follows and shown in Figure 32:
In the outgoing direction, the mailbox driver does not write~~
to the mailbox unless the mailbox is empty. The mailbox is empty when the MboxRSTA T.bit in the IRQ Status register is set.
~ In the incoming direction, the mailbox driver reads the mailbox when it is full. The mailbox is full when the Mbox WSTA T bit in the IRQ Status register is set.
l0 ~ The MboxRSTAT and MboxWSTAT bits is used in either a polled or an interrupt-driven fashion by each driver independently.
As part of the normal hardware initialization process, the ASIC IRQ Enable registers on each side must be configured properly to either enable or disable interrupts as desired.
If the above rules are followed, no data will be lost or overwritten in the mailbox.
The most likely failure that may occur is when a mailbox driver becomes unstable and ceases to service the mailbox. In this case, the other driver may find that it is unable to write to the mailbox. To handle this situation, a time-out of 1 ~ 0.1 seconds is observed on write attempts to the mailbox shown in Step 3202. The expiration of this time-out represents a fatal error condition which calls for a reset. The Management Application responds to this time out by waiting until the PATENT
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Host-side driver responds or until the on-board controller is reset.
Since many commands and responses require more than 8 bits "
of information to be sent, a protocol is used to allow multiple-byte messages to be passed between the Management Application and the Host. A mailbox message has a consecutive string of bytes with the format shown in Figure 28.
This message includes address fields to identify the sending entity 2800 and receiving entity 2802. Typically, these entities to will be the Management Application on the NIC and the Host Application running on the PC. However, other possible entities include debug ports on the Host debug processes on the NIC, or processes running on the Hydrogen chip. For messages that are responses to commands, the destination address is filled with the address of the entity that originated the command.
The driver on each side of the mailbox routes messages to the appropriate entity. In the interest of simplicity, addresses for all entities are fixed at compile time. Exemplary addresses are given in Table 1.
The SYNC and SYNC ACK opcodes are used prior to the establishment of the protocol. Opcodes for these commands are not available to serve as entity addresses. Therefore these four addresses are reserved. Further details of the synchronization are described herein.

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Table 1. Mailbox Entity Addresses Entity Address Host Control Application _ Host Data Handler 0x02 Host Debug Port A 0x03 Host Debug Port B 0x04 Host Debug Port C 0x05 Host Debug Port D 0x06 On Board Controller 0x10 Management Application On Board Controller 0x11 Management Selftest Agent On Board Controller 0x12 Management Debug Process 1 On Board Controller Oxl3 Management Debug Process 2 On Board Controller 0x14 Management Debug Process 3 On Board Controller 0x15 Management Debug Process 4 Hydrogen Debug Process 1 0x20 Hydrogen Debug Process 2 0x21 Hydrogen Debug Process 3 0x23 Hydrogen Debug Process 4 0x24 Reserved for SYNC 0x55 Reserved for SYNC ACK 0 Reserved for SYNC 0x33 Reserved for SYNC ACK OxCC

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The opcode field identifies the command or response being sent. It also indicates to the recipient how the data field should be interpreted.
The Length of Data Field value 2810 gives the length (in bytes) of the message data field. Tf there is no data field, this number is zero. In general, the correct length of the data field could be deduced from the opcode. However, providing a length field allows a mailbox driver (or an intermediate entity) to correctly handle a message even if the opcode is not l0 recognized. This allows new opcodes to be added without requiring updates to all of the firmware on the NIC. Different versions of firmware on different CPUs may interwork more easily.
The content of the data field depends on the opcode. For some opcodes, this field might not exist. For data fields with multiple bytes, the field format is given in the command or response definition.
The Synchronization Procedure is used to protect against spurious transmissions through the mailbox after power-up. The synchronization procedure is used by the Management Application and the Host-side mailbox driver on both the Host and the Hydrogen.
Essentially, the procedure requires transmission and acknowledgment of special SYNC opcodes three times in a row, to attain synchronization in each direction. Acknowledgment is PATENT
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through the SYNC ACK opcode. Note that the SYNC and SYNC ACK are messages but do not necessarily follow mailbox protocol described herein. These are formed by a one-byte message having only an opcode.
Synchronization is assumed to have been attained in the outgoing direction when three consecutively-sent SYNC opcodes have resulted in three consecutively-received SYNC ACK opcodes.
The SYNC process is then terminated, and the mailbox driver may begin using the mailbox protocol described above to transmit to messages.
In the incoming direction, synchronization is assumed when three consecutive SYNC opcodes have been received. Any bytes received after this (other than SYNC) are interpreted as messages complying with the mailbox protocol. Any SYNC opcodes received after this point are simply acknowledged and then discarded, without causing a loss of synchronization.
Received SYNC opcodes are always acknowledged with SYNC ACK
opcodes.
The Host-side driver and the Management Application follow 2o the same sequence. This procedure is typically necessary only after power-up or after reset.
During synchronization, the time-out period for writing to the mailbox and for polling for responses is 250 ~ 50 msec.

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After synchronization is achieved, the time-out for mailbox write attempts changes to 1 ~ 0.1 seconds.
There are three different kinds of NIC control messages. A
first command can be issued to the Management Application.
Responses can originate from the Management Application.
Finally, general purpose messages may be sent from any entity to any other.
Table 2 lists commands that the Host may issue to the I~tanagement Application.

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Table 2. Host Commands Data Field Data Field Command Opcode Length Contents MBOX Sync 0x55 /A N/A
N

MBOX Sync Ack OxAA /A N/A
N

ADSL Selftest Long 0x01 p _ ADSL Selftest Short 0x02 p _ ADSL Open 0x03 p _ ADSL Close 0x04 p _ ADSL Report Version 0x05 p _ ADSL Report Vendor 0x06 p _ ADSL Report Oper Data 0x07 p ADSL Report Carrier Load 0x08 p _ ADSL Report Channel Data 0x09 0 _ ADSL Report Performance OxOA p _ ADSL Report Performance Raw OxOB p _ ADSL Report Fault Data OxOC p _ ADSL Send Dying Gasp OxOD p _ ADSL Report Performance Data OxOE p _ MBOX Sync, MBOX Sync Ack are responses that are sent by the 2p Host-side mailbox driver after power-up or reset to establish synchronization with the Management Application mailbox driver.
These responses do not have address fields or data fields.
ADSL Selftest Long, ADSL Selftest Short commands cause the on-board controller to initiate long or short self tests. The PATENT
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self test results are sent back to the Host using the ADSL_Selftest Results response.
ADSL Open and ADSL Close control the ADSL connection. The ~~
ADSL Open command causes the modem to attempt to connect with the ATU-C. The ADSL Close command causes the ADSL modem to send a Dying Gasp message to the ATU-C, close the connection, and return to an idle state.
The ADSL Open can result in a number of different operations. Figure 33 shows the process flow when the ADSL Open l0 succeeds. Figure 34 shows the ADSL Open failing due to rejection. Figure 35 shows ADSL Open failing due to timeout.
Figure 36 shows ADSL Open failing due to initialization failure.
One related scenario is shown in Figure 37, which diagram the existing ADSL connection being lost.
is Figure 38 diagrams the ADSL Close request succeeding.
Figure 39 shows the ADSL Close being rejected.
The ADSL Report... commands are used to request information from the Management Application.
The ADSL Send Dying Gasp command instructs the modem to send 20 a Dying Gasp message to the ATU-C. The modem remains connected after sending the message.
Figure 40 illustrates the operation of the host requesting version or vendor IDs. Figure 41 shows the host requesting the near or far end operational data, and Figure 42 shows the host PATENT
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requesting the channel operational data. The host can also request performance counters, as shown in Figure 43.
Table 3 lists the Management Application responses. Some responses are sent only as answers to Host commands. Other responses are sent spontaneously as certain events occur. When the unsolicited responses occur, they are addressed to the host "owner" application--that is, the application which issued the most recent successful ADSL Open command. On power-up, the owner address defaults to 0x01.
Table 3. Management Application Responses Data Response Opcode Field Data Field Contents Length MBOX Sync * 0x33 N/A N/A

MBOX Sync Ack OxCC N/A N/A

ADSL Open Rejected 0x21 3 reason and duration ADSL Open Failed 0x22 1 error code ADSL Open Failed on Timeou0x23 0 -ADSL Connection Opened 0x24 0 -ADSL Connection Lost* 0x41 0 -ADSL Connection Closed 0x25 0 -ADSL Close Rejected 0x26 1 reason ADSL Selftest Resultes 0x27 1 result code ADSL Version 0x28 2 near-and far-end versions ADSL Vendor 0x29 2 near-and far-end versions PATENT
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Data Response Opcode Field Data Field Contents Length ADSL Oper Data Ox2A 8 near-end operational data ADSL Carrier Load Ox2B 128 carrier laed data ADSL Oper Data Unavail Ox2C 0 -ADSL Channel Data Ox2D 8 channel bit rates ADSL-Performance Ox2E 20 per-sec. performance data ADSL_Performance_Raw Ox3F 32 performance data (raw) ADSL Perf Unavail 0x30 0 -ADSL-Fault Data 0x31 42 fault counters and defects ADSL Fault Data Unavail 0x32 0 -ADSL_Dying Gasp-Sent 0x34 0 -ADSL Dying Gasp,Rej 0x35 0 -ADSL-Performance Delta 0x36 32 delta performance counters FAULT Declared* 0x42 1 type of fault FAULT Ended* 0x43 1 type of fault FAULT_Deactivate* 0x44 2 shutdown time (sec) d. ..... ~ ~-i-- -~ __~--_ -_ a ........~.. .... uaauv~.w.ia.cu r.corvuac MBOX Sync and MBOX Sync Ack responses are sent by the Management Application mailbox driver after power-up or reset to establish synchronization with the Host-side mailbox driver.
These responses do not have address fields or data fields.

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The ADSL Open Rejected response is returned if the modem is already connected or attempting to connect, or if an operator-initiated line test is in progress. The data field has ~~
3 bytes. Byte 0 gives the reason for the rejection--0x00 indicates that the line is not down; 0x01 indicates that a test is in progress. If the reason is that a test is in progress, bytes 1 and 2 give the time remaining in the test (in seconds), with the LSB in byte 1 and the MSB in byte 2. Otherwise, the data field will not have meaningful data.
l0 The ADSL Open Failed response indicates a failure has occurred during the initialization process. An error code is returned in the data field, as shown in Table 4.
Table 4. Error for ADSL Open Failed Error Code Mnemonic Explanation 0x05 REQ BITRATE TOO HIGHBit rate requested by ATU-C cannot b e supported OxOA NO LOCK-POSSIBLE Unable to lock with ATU-C

OxOF PROTOCOL ERROR A failure occurred during the i nitialization process 0x14 MESSAGE ERROR A message received from the ATU-C

was invalid (incorrect CRC or wrong f ormat ) 2o If the modem is unable to connect with the ATU-C, and yet does not report a failure, the Management Application stops the PATENT
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attempt after a time-out period. This scenario could arise, for example, as a result of the ATU-C not functioning or the telephone wire being cut. The time-out period is Z minute after ~~
the ADSL Open request The ADSL Connection-Opened indicates that the ADSL Open request has succeeded and that a connection has been established with the ATU-C. The ADSL Connection Lost is sent if the line capacity deteriorates to the point where the requested bit rates can no longer be supported. This is an unsolicited response. The ADSL Connection Closed is sent to 1o indicate that an ADSL Close request has been successful.
An ADSL Close request will be rejected if the modem is currently down, or if the issuer of the ADSL Close is not the "owner" application which issued the ADSL Open;. The ADSL Close Rejected response indicates this rejection with a one-byte data field which gives the reason for the rejection:
0x00 indicates that the modem is not down; 0x01 indicates that the issuer is not the owner.
The ADSL Selftest Results response gives selftest results.
The data field has one byte, which contains the self test result 2o code, as given in Table 5.

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Table 5. Selftest Result Codes Result Code Mnemonic Meaning 0x0000 Selftest Short OK The short s elftest detected no problems 0x0001 Selftest-Short Warning The short selftest detected a n -f on atal problem 0x0002 Selftest Short Error The short selftest detected a f ailure 0x0003 Selftest Long OK The long selftest detected no problems 0x0004- Selftest Long_... Long selftest error codes Ox??? ?

The ADSL Version response returns the versions of the near-end and far-end ADSL modems. The data field contains two bytes. The near-end version is given first in time; the far-end version is given second. The near-end version is always available. The availability of the far-end version is given in Table 6.

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Table 6. Availability of Far-End Version and Far-End Vendor Availability of Far-End Version and Modem State Vendor Down, after power-up available as OxFF

Initializing a connection available as either OxFF or as actual value Connected actual value available Down, after connection is value from previous connection is closed or fails available The ADSL Vendor response reports the vendors of the near-end and far-end ADSL modems. The data field is two bytes long with the near-end vendor being reported first; the far-end vendor is reported second. The vendor number for Alcatel is 0x0022. The near-end vendor is always available. The availability of the far-end vendor is given in Table 6.
The ADSL Oper Data response returns the operational data for the near and far ends of the line. Eight bytes are reported, as shown in Table 7. The availability of this data is given in Table 8. Note: For the PC NIC, the relCapacity0ccupationDnstr value will be limited to a maximum of 100.

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Table 7. Data Field for ADSL Oper Data Near Byte Mnemonic Meaning.l, 0 relCapacity0ccupationDnstrdownstream bit rate as a (first percentage of the maximum in attainable (Bmax) time) 1 noiseMarginDnstr amount of increased noise (dB

loss in SNR) that can be tolerated while maintaining a downstream BER of 10-7 2 outputPowerUpstr ATU-R transmit power level (dBm) 3 attenuationDnstr difference in dB between the power received by the ATU-R and a reference ATU-C transmit power level 4 relCapacity0ccupationUpstrupstream bit rate as a percentage of the maximum attainable (Bmax) 5 noiseMarginUpstr amount of increased noise (dB

loss in SNR) that can be tolerated while maintaining an upstream BER of 10-7 6 outputPowerDnstr ATU-C transmit power level (dBm) 7 attenuationUpstr difference in dB between the power received by ATU-C and a reference ATU-R transmit power level PATENT
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Table 8. Availability of Operational Data and Raw Performance Data Modem State Availability of Operational Data Down, after power-up available as OxFF

Initializing a connection not available Connected valid data available Down, after connection is data from previous connection is closed or fails available The ADSL Carrier Load response returns the bit-per-symbol loading for each carrier bin across the ADSL frequency band. The to values for the 256 bins are packed two per byte with a total data length of 128 bytes. The values are given in order of increasing frequency. For each byte, the lower- frequency value is in the upper nibble as shown in Table 10.
Table 10. Data field for ADSL Carrier Load Nibble Data byte 0, upper nibble load for carrier 0 byte 0, lower nibble load for carrier 1 byte 127, upper nibble load for carrier 254 byte 127, lower nibble load for carrier 255 ADSL-Oper Data Unavail means that operational data is not available. This happens while the modem is initializing a connection.

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The ADSL Channel Data response returns the 16-bit quantities indicating bit rates for the fast and interleaved channels for the near and far ends. Table 11 shows the data field. The availability of this data is given in Table 8.
Table 11. Data Field for ADSL Channel Data Response Byte Mnemonic Bits Meaning 0 (first ChanDataIntNear 7-0 near-end interleaved channel in time) bit rate (kbits/sec) 2 ChanDataFastNear 7-0 near-end fast channel bit rate (kbits/sec) 4 ChanDataIntFar 7-0 far-end interleaved channel bit rate (kbits/sec) 6 ChanDataFastFar 7-0 far-end fast channel bit rate (kbits/sec) The ADSL Performance reports 8-bits representing- ADSL modem performance counters maintained by the Management Application.
These counters are polled from the Modem SW once per second, and hence can be interpreted as per-second quantities. These counters are frozen while defects are being experienced on their respective end. The ADSL Performance response also reports the two 32-bit Quality of Service parameters maintained by the Management Elpplication, Near-End Errored Seconds and Far-End Errored Seconds.

PATENT
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The data field format for the ADSL Performance response is given in Table 12. Note that byte 0 is first in time.
The ADSL_Performance counters are always available.
Table 12. Data Field for ADSL Performance Byte Mnemonic Description 0 near-end Number of near-end received superframes with one fec-ni or more Reed-Solomon corrections in a dat frame (non-interleaved) 1 near-end Number of near-end received superframes with one fec-I or more Reed-Solomon corrections in a data frame (interleaved) 2 near-end Number of near-end received superframes with an crc-ni incorrect CRC in the non-interleaved path 3 near-end Number of near-end received superframes with an crc-I incorrect CRC in the interleaved path 4 near-end Number of near-end received superframes with at hec-ni least one cell with an errored HEC (non-interleaved) 5 near-end Number of near-end received superframes with at hec-I least one cell with an errored HEC (interleaved) 6 far-end Number of far-end received superframes with one fec-ni or more Reed-Solomon corrections in a data frame (non-interleaved) 7 far-end Number of far-end received superframes with one fec-I or more Reed-Solomon corrections in a data frame (interleaved) 8 far-end Number of far-end received superframes with an crc-ni incorrect CRC in the non-interleaved path 9 far-end Number of far-end received superframes with an crc-I incorrect CRC in the interleaved path 10 far-end Number of far-end received superframes with at hec-ni least one cell with an errored HEC (non-interleayed) 11 far-end Number of far-end received superframes with at hec-I least one cell with an errored HEC (interleaved) PATENT
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Byte Mnemonic Description ,..

near-end Near-end Errored Seconds: number of seconds ES: which contain near-end .

12 bits 7-0 CRC anomalies (ni or I, or LOS or LOF defects 13 bits 15-8 14 bits 23-16 bits 31-24 far-end Far-end Errored Seconds: number of seconds which ES: contain far-end CRC anomalies (ni or I), or LOS
or LOF defects 5 16 bits 7-0 17 bits 15-8 18 bits 23-16 19 bits 31-24 The ADSL Performance Raw response reports the raw 16-bit ADSL
l0 modem performance counter values as polled at the time of the Host request. Two 32-bit Quality of Service parameters maintained by the Management Application, Near-End Errored Seconds and Far-End Errored Seconds are also reported.
The data field format is given in Table 13. Byte 0 is first 15 in time. The availability of the raw performance counters is given in Table 8.

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Table 13. Data Field for ADSL_Performance_Raw and ADSL Performance Delta Byte Mnemonic Bits Description 0 near-end 7-0 Number of near-end received superframes fec-ni with one or more Reed-Solomon corrections in a,data frame (non-interleaved) 2 near-end 7-0 Number of near-end received superframes fec-I with one or more Reed-Solomon corrections in a data frame (interleaved) 4 near-end 7-0 Number of near-end received superframes crc-ni with an incorrect CRC in the non-interleaved path 5 15-8 _ 5 near-end 7-0 Number of near-end received superframes crc-I with an incorrect CRC in the interleaved path 8 near-end 7-0 Number of near-end received superframes hec-ni with at least one cell with an errored HEC (non-interleaved) 10 near-end 7-0 Number of near-end received superframes hec-I with at least one cell with an errored HEC (interleaved) 12 far-end 7-0 Number of far-end received superframes fec-ni with one or more Reed-Solomon corrections in a data frame (non-interleaved) 14 far-end 7-0 Number of far-end received superframes fec-I with one or more Reed-Solomon corrections in a data frame (interleaved) 15 15-8 _ PATENT
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Byte Mnemonic Bits Description 16 far-end 7-0 Number of far-end received superframes crc-ni with an incorrect CRC in the non-interleaved path 18 far-end 7-0 Number of far-end received superframes crc-I with.an incorrect CRC in the interleaved path 20 far-end 7-0 Number of far-end received superframes hec-I with at least one cell with an errored HEC (non-interleaved) 22 far-end 7-0 Number of far-end received superframes hec-I with at least one cell with an errored HEC (interleaved) 24 near-end 7-0 Near-end Errord Seconds: number of ES seconds which contain near-end CRC

anomalies (ni or I), or LOS or LOF

defects 28 far-end 7-0 Far-end Errored Seconds: number of ES seconds which contain far-end CRC

anomalies (ni or I), or LOS or LOF

defects PATENT
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The ADSL Perf Unavail response indicates that performance data is not available. Raw performance data is not available, for example, while a connection is being initialized.
The ADSL Fault Data response reports the various fault counters maintained by the Management Application, as well as the current state of the defects bitmap. The counters are all 32 bits in length. Table 14 gives the data field format for this response. Fault data availability is given in Table 15.
Table 14. Data Field for ADSL Fault Data Response Byte Fault ' Bits Counter 0 Near-EndLoss of Signal 4 Near-EndLoss of Signal 8 Near-EndLosa of Cell Delineation, ni 7-0 12 Near-EndLoss of Cell Delineation,i PATENT
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Byte Fault Counter Bits ...

16 Far-End Loss of Cell Delineation, ni 7-0 Far-End Loss of Cell Delineation, I 7-0 10 24 Near-End Loss of Frame 28 Far-End Loss of Frame 7-0 32 Near-End Loss of Frame 36 Far-End Loss of Margin 7_0 Near-End Defects recent status 41 Far-End Defects recent status PATENT
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Table 15. Availability of Fault Data Modem State Fault Data Availability Down, after power-up available as 0x0000 Initializing a connection not available Connected valid data available Down, after connection is data from previous connection closed of fails available The ADSL Fault Data Unavail response indicates that the requested fault data is not available. Fault data -iR nnr l0 available while the modem is initializing a connection. The ADSL Dying Gasp Sent indicates that a Dying Gasp has been sent as a result of an ADSL Send Dying Gasp command. This response is not generated as a result of an ADSL Close command. The ADSL Dying Gasp Rej indicates that the Dying Gasp request has been rejected. This occurs if the modem is not connected.
The ADSL Performance Delta response is similar to the ADSL-Performance response. This response reports changes or "deltas" from the previous host read, rather than per-second quantities. With the exception of the Errored Second counters, these counters represent totals accumulated since the last read from the host. As such, there is a possibility that these counters may overflow or "wrap" if the host does not read them frequently enough. The counters are 16 bits each--and the maximum -177- .
PATENT
ATTORNEY DOCKET NO. 10226/003WO1/98109902(USP)WO HMPI
rate of increase of any count is 58 per second. Therefore, in the worst case, the counters will wrap after about 18 minutes. It is preferable, therefore, to read them more often than this. [CLAIM]~
The Errored Second counters do not reset upon being read.
These counters give totals of errored seconds accumulated since one second after the beginning of Showtime.
The data field format (which is the same as the ADSL Performance Raw format) is given in Table 13.
The FAULT Declared response is used to indicate the to occurrence of a fault. It is spontaneously sent to the Host whenever a fault condition is declared. This one-byte data field has a code indicating the type of fault that has occurred. Table 16 shows the different kinds of faults.
The System Error fault indicates that a serious error has occurred which calls for a hard reset and software reload. One example is the time out of the mailbox, as described above.

PATENT
ATTORNEY POCKET NO. 10226/003W01/98109402(USP)WO HMPI
Table 16. Fault Codes for FAULT Declared and FAULT Bnded Fault Code Fault Meaning Meaning 0x01 LossofSignal Near-End of Signal Near Losa 0x02 LossofSignal Far-End of Signal Far Loss 0x03 LoasofCD Near Near-End of Cell Delineation, non-ni Loss I nterleaved 0x04 LossofCD Near_i Hear-End of Cell Delineation, I Loss nterleaved 0x05 LossofCD_Far Far-End of Cell Delineation, non-ni Loss I nterleaved 0x06 LossofCD Far Far-End of Cell Delineation, Interleaved i Loss 0x07 LoseofFrame NearNear-End of Frame Loss 0x08 LossofFrame Far Far-End of Frame Loss 0x09 System Fatal SystemError which calls for Error a reset OxOA LossofMargin Near-End of Margin Near Loss 0x08 LoasofMargin Far-End of Margin Far Loss FAULT Ended is a response that indicates the termination of a fault condition. It is spontaneously sent to the Host whenever a fault condition is terminated. The one-byte data field contains a code indicating the type of fault that has ended (see Table 16).
(FLOWCHART]
2o The ADSL Deactivate response indicates that the ADSL modem has been shut down. This allows, for example, the operator to perform line tests.
when this request is received by the on board controller Management Application, the modem is automatically shut down, and WO 99/67911 PC1'/US99/14372 -179- , PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
the host receives an ADSL Deactivate response. The on-board controller Management Application then enforces a lock-out period for the duration of the test. During this time, any ADSL Open requests received from the host are rejected using, e.g., the ADSLlOpen Rejected.
The two-byte data field gives the duration of the test in seconds (up to 300). The first data byte has bits 7-0 of the test duration with the second data byte having bits 15-8.
In addition to the above, general purpose messages may be to sent from any entity to any other. These are listed in Table 17.
Table 17. General Purpose Messages Command Opcode Data Data Field Contents Field Length GENERIC-Character 0x81 1 ASCII character GENERIC Integer 0x82 1 8 bit number GENERIC Byte 0x83 1 unspecified The GENERIC Character message can be used to send ASCII
characters from one entity to another. The data field has the ASCII character code. The GENERIC Integer may similarly be used to send integers from one entity to another. The data field has an 8-bit unsigned integer. The GENERIC Byte message may be used to carry any 8 bit data value. The meaning of the value is left up to the sending and receiving entities.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
The Management Application and the Modem Software can interact in ways which do not involve the Host. These are given in the Interface Specification "SWB-Modem SW Architecture"
(Alcatel Document 3EC 15576 AAAA PBZZA). Other Combined Scenarios describe the interaction between the Host, the Management Application, and the Modem Software.
The Management Application monitors the modem performance counters and the defects bitmap to maintain performance data and to detect fault conditions. Definitions of the modem defects and performance primitives are found in [TRANSPORT].
Performance data is provided to the host in three forms.
The ADSI. Performance response provides performance data in the form of per-second quantities. These values can be taken as error-per-second data. As such, these counters will never have values greater than 58 (the number of superframes per second).
These values are correlated with defects by the on-board controller Management Application as recommended in [TRS]. The polling period for these counters is one second.
The ADSL Performance Delta response provides performance data in the form of reset-on-read counters. These counters are correlated with line defects. In order to prevent overflow, these PATENT
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counters should be read at least once every 18 minutes. These counters are updated once per second.
The ADSL Performance Rara response provides the values of the raw 16-bit free-running counters given by the modem software.
These counters are not correlated with line defects. In addition, the values reported are accurate only at the time of polling;
therefore, latency issues may make it difficult for the host to interpret this data correctly.
In addition, all three of the above mentioned responses l0 provide Errored Second counters that represent the accumulated total of errored seconds since the beginning of Showtime. They are 32 bits in length and do not reset when read.
When near-end defects are being experienced, the near-end and far-end performance counters are frozen. Near-End Errored Seconds, however, are not frozen. When far-end defects are being experienced, far-end counters (except Far-End Errored Seconds) will be frozen. This correlation applies to the ADSL Performance and ADSI. Performance Delta responses only.
The Near-End Errored Seconds parameter is a 32-bit count of one-second intervals which contain one or more near-end cyclic redundancy code (CRC) (interleaved or non-interleaved) anomalies, or one or more near-end LOS or near-end LOF defects. The count PATENT
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begins 1 second after the modem enters Showtime, enabling any initial errors from reset or SYNC problems to be ignored.
The Far-End Errored Seconds parameter is a 32-bit count of one-second intervals which contain one or more far-end CRC
(interleaved or non-interleaved) anomalies, or one or more far-end LOS or far-end LOF defects. The count begins 1 second after the modem enters Showtime.
The Management Application polls the defects bitmap every 0.5 seconds in order to detect the fault conditions listed below.
Each fault type is associated with a 32-bit counter, which contains the number of faults that have occurred since 1 second after the beginning of Showtime.
Far-end (ATU-C) defects are ignored while the ATU-R is experiencing near-end defects.
Near-and Far-End Loss of Signal (LOS) A Near-End Loss of Signal fault is declared when either:
~ the near-end LOS defect has been observed to be continuously active for 2.5 ~ 0.5 seconds; or ~ the near-end LOS defect is present and the criteria for a Near-End Loss of Frame fault have been met.
Analogously, a Far-End Loss of Signal fault is declared when either:

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
~ the far-end LOS defect has been observed to be continuously active for 2.5 t 0.5 seconds; or ~ the far-end LOS defect is present and the criteria for a Far-End Loss of Frame fault has been met.
The Host is notified of these faults through the FAULT Declared(Loss of Signal Near) and FAULT Declared(Loss of Signal Far) responses, respectively.
A Near-End Loss of Signal fault condition is terminated when the near-end LOS detect has been absent for 10 ~ 0.5 seconds. The Host shall be notified through the FAULT Ended(Loss of Signal Near) response.
A Far-End Loss of Signal fault condition is terminated when the far-end LOS defect has been absent for 10 ~ 0.5 seconds. The Host is notified through the FAULT Ended(Loss of Signal Far) response.
Starting 1 second after the beginning of Showtime, the number of Near-End and Far-End Loss of Signal faults are maintained in 32-bit counters, which can be, for example, values from software counters. The Host may obtain these counters using the ADSL Report Fault Data command. The values are reported in the ADSL Fault Data response.
Near-and Far-End Loss of Cell Delineation (LCD) [DICTATE]

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
A Near-End Loss of Cell Delineation fault is declared when either of the near-end LCD defects (interleaved or non-interleaved) is continuously active for 2.5 ~ 0.5 seconds, except if one of the following conditions exist:
~ the near-end LOS defect is present;
~ the near-end LOF defect is present;
~ a Near-End Loss of Signal fault is declared; or ~ a Near-End Loss of frame fault is declared.
If any of these conditions holds, a fault is not declared.
A Far-End Loss of Cell Delineation fault is declared when either of the far-end LCD defects (interleaved or non-interleaved) has been observed to be continuously active for 2.5 ~ 0.5 seconds, except if one of the following conditions exist:
~ the far-end LOS defect is present;
~ the far-end LOF defect is present;
~ a Far-End Loss of Signal fault is declared; or ~ a Far-End Loss of Frame fault is declared.
If any of these conditions holds, a fault is not declared.
The four types of LCD errors and the corresponding Host notifications are shown in Table 18.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
Table 18. Loss of Cell Delineation Faults Defect Explanation Response sent to Host near-end LCD-ni Loss of Cell Delineation, FAULT
Declared Near-End, Non-Interleaved _ (Loss of CD Near ni) near-end LCD-I Loss of Cell Delineation, FAULT
Declared Near-End, Interleaved _ (Loss of CD Near i) S far-end LCD-ni Loss of Cell Delineation, FAULT
Declared Far-end, Non-Interleaved _ (Loss of CD Far ni) far-end LCD-I Loss of Cell Delineation, FAULT
Declared Far-end, Interleaved _ (Loss of CD Far i) A Near-End Loss of Cell Delineation fault condition is terminated when any of the following conditions becomes true:
~ a Near-End Loss of Frame failure is declared;
~ a Near-End Loss of Signal failure is declared; or ~ the near-end LCD defect is absent for 10 ~ 0.5 seconds.
The Host shall be notified through the FAULT Ended(Loss of CD Near ni) or the FAULT Ended(Loss of CD Near i) response, as appropriate.
A Far-End Loss of Cell Delineation fault condition is terminated when any of the following conditions becomes true:
~ a Far-End Loss of Frame failure is declared;
~ a Far-End Loss of Signal failure is declared; or ~ the far-end LCD defect has been absent for 10 ~ 0.5 seconds.

-1$6-PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
The Host is notified through the FAULT Ended(Loss of Cd Far ni) or the FAULT Ended(Loss of CD Far i) response, as appropriate.
Starting 1 second after the beginning of Showtime, the number of Near-End Loss of Cell Delineation faults and the number of Far-End Loss of Cell Delineation faults are maintained in 32-bit counters. The Host may obtain these counters using the ADSL Report Fault Data command, reported in the ADSL Fault Data response.
A Near-End Loss of Frame fault is declared when the near-end LOF defect has been observed to be continuously active for 2.5 ~
0.5 seconds, except when either of the following conditions are true:
~ the near-end LOS defect is active; or ~ a Near-End Loss of Signal fault has been declared.
If either of these conditions is true, no fault is declared.
If a fault is declared, the Host is notified through the FAULT Declared(Loss of Frame Nearj response.
A Far-End Loss of Frame fault is declared when the far-end LOF defect has been observed to be continuously active for 2.5 ~
0.5 seconds, except when either of the following conditions are true:

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
~ the far-end LOS defect is active; or ~ a Far-End Loss of Signal fault has been declared.
If either of these conditions is true, no fault is declared.
If a fault is declared, the Host is notified through the FAULT Declared(Loss of Frame) response.
A Near-End Loss of Frame fault is terminated if either of the following conditions becomes true:
a Near-End Loss of Signal fault is declared; or ~ the near-end LOF defect is absent for 10 ~ 0.5 seconds.
l0 The Host is notified of the termination of the fault through the FAULT Ended(Loss of Frame Near) response.
A Far-End Loss of Frame fault is terminated if either of the following conditions becomes true:
~ a Far-End Loss of Signal fault is declared; or ~ the far-end LOF defect has been absent for 10 t 0.5 seconds.
The Host is notified of the termination of the fault through the FAULT Ended(Loss of Frame Far) response.
Starting 1 second after the beginning of Showtime, the number of Near-End Loss of Frame faults and Far-End Loss of Frame faults are maintained in 32-bit counters. The Host may request these counters using the ADSL Report Fault Data command. The values are reported in the ADSL Fault Data response.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
A Near-End Loss of Margin fault is declared when the near-end LOM defect is observed to be continuously active for 2.5 ~ 0.5 seconds. The host shall be notified through the FAULT Declared(Loss of Margin Near) response.
A Far-End Loss of Margin fault is declared when the far-end LOM defect has been observed to be continuously active for 2.5 ~
0.5 seconds. The host is notified through the FAULT Declared(Loss- of Margin Far) response.
The Near-End Loss of Margin fault is conversely terminated 1o when the near-end LOM defect has been observed to be continuously absent for 10 ~ 0.5 seconds. The host is notified through the FAULT Ended(Loss of Margin Near) response.
A Far-End Loss of Margin fault is terminated when the far-end LOM defect has been observed to be continuously absent for 10 ~
0.5 seconds. The host shall be notified through the FAULT Ended(Loss of Margin Far) response.
Starting 1 second after the beginning of Showtime, the number of Near-end and Far-End Loss of Margin faults are maintained in 32-bit counters. The host may request these counters using the ADSL'Report-Fault_Data command.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
The basic installation process is shown in Figure 47.
When ServiceMonitor is first started the user needs to configure services for the first time. The user is prompted through a message box that no services have been installed and asked if he/she wants to install a new service now. If the user elects to install services later, then that could be done by going to the "ServiceMonitor Properties" dialog off the main dialog and selecting "Install New" (See Figure 20) or by selecting "Install New Service" off the System Tray Icon (See Figure 19).
The installation wizard dialogs follow the basic philosophy of guiding the user through the type of installation. The flow-chart in Figure 48 demonstrates the pattern of questions for the user to answer for installation of a new service.
The user can choose to remove an installed service via the "ServiceMonitor Properties" dialog as shown in Figure 19. The service tab to be removed is selected, and then select "Uninstall". This prompts the user with a dialog, warning them of their actions, and asking for confirmation of the removal action.
If the user selects "OK", then the service is removed and the tabs are updated to reflect this removal.
The normal operation of ServiceMonitor after boot-up and logon is to start up in the System Tray. Alternately, PATENT
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ServiceMonitor can start as a minimized application. Figure 19 shows some of the standard interaction with ServiceMonitor as it is in the System Tray.
ServiceMonitor was designed to be minimally intrusive and to provide as much feedback to the user as possible, in an easy manner. The Tray Icon has three artificially-simulated LEDs, of which the left represents transmission of data while the right represents data received. These two LEDs alternate between dark red and bright green colors for data movement. Bright red would indicate some sort of error in the data flow. The center LED is used to indicate line sync with the ADSL Modem. For this LED, red would indicate loss of sync and bright green is the normal condition.
Should the user decide that manual adjustment of the connection parameters is needed, then selecting "Modify" brings up the Modify Service dialog and the previous dialog "Service Properties" disappears. If the service being elected to modify is .actively connected, then a warning dialog appears, notifying the user that any changes to an active service could cause loss of data. This warning dialog allows the user to cancel the modify action or continue to bring up the Modify dialog. While the user PATENT
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is in the modification dialog, changes can be made to any of the connection parameters, including alteration of the tab name.
For any service that is using any protocol other than Native ATM, the "Settings" button is enabled and brings up a configuration dialog for that protocol if selected.
For communicating via IP over ATM, the configuration dialog provides flexibility. A PVC connection using Routed IpoA allows using the gateway IP address already configured in the TCP/1P
protocol stack as the destination machine to connect to in the Ethernet LAN. If the connection is a machine other than the gateway, then the user needs to provide the IP address of that machine to complete the connection. This configuration is simplified by the use of SVC's or Bridged IpoA.
The ATM Interface dialog displays global performance data and configuration setting to the user (See Figure 13). This dialog was intended to be used for providing ISP's with configuration information in the event that a service installation failed or was working improperly. The connection status information is static and cannot be altered by the user in this application.
The Tabs that display modem performance are initially set to as blocked--i.e. not being displayed, since they were intended for the advanced user to use for troubleshooting communication PATENT
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problems. The option is checked on the options tab in order to display it. This causes the dialog to appear as shown in Figure 15.
The data contained on these dialogs is that which is specified to be supplied by the Copperhead Specification. The only added feature is the ability to connect and disconnect the modem manually from this dialog.
5. Help All dialog windows have both context sensitive help - "?" in to upper right corner - and F1 help or "Help" button controls.
Context sensitive help allows the user to left mouse click the "?"
and then click on the control that help is needed for to get a popup help window. This help is generally very short and concise.
Tf more detailed help is needed the user can select the F1 key on the keyboard or the "Help" button if present.
This embodiment also operates using firmware running on a ARM7TDMI RISC processor, and using the HYDROGEN chipset from ATML.
The Hydrogen firmware, as described herein, also includes download software, control information passing, and POST initiation.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109902(USP)WO HMPI
The present disclosure uses the ATMos operating system provided by ATML. This operation system runs the functional blocks shown in Fig. 49. Figure 50 shows the download process.
The Boot loader module 4900 is actuated whenever power is applied to the HYDROGEN chipset, or the reset pin is asserted. The HYDROGEN chipset has minimum boot loader code embedded in the internal boot ROM. Part of this embedded code is an ARM block that has two boot ROM codes.
This embodiment selects ROM2 to boot from serial PROM 412 at l0 step 5000. A sub-vendor ID is included in the serial PROM that sets the configuration register. The boot loader waits for a code download complete bit set by the host into the mailbox register.
This 12 byte code is factory preprogrammed into the serial boot ROM.
The PC power on selftest ("POST") code then performs configuration at Step 4902 to allow access into the HYDROGEN chip.
During the PC operating system load, e.g. Win95 or NT, the NIC
driver downloads code at step 5002 to the 8-Kbyte internal SRAM of the HYDROGEN starting at location 0x00004000. The code is downloaded through the I/0 window assigned during PCI
configuration.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
After the NIC driver finishes the code download, a bit in the Mailbox register is set by an I/0 write at 4904 to a location assigned during PCI configuration. The HYDROGEN then begins execution starting at 0x000040000.
The downloaded codes are divided in a two-step process.
The first downloaded code or HYDROGEN POST code shown at 5009 includes:
~ HYDROGEN power-on self test ~ HYDROGEN self-Initialization ~ HYDROGEN DRAM sizing and check ~ ASIC interface check ~ Other interface checks e.g. SACHEM & UTOPIA
The POST result is stored at a location for further retrieval. The code then resets the download complete bit at the mailbox register and waits for the bit set again by the host.
The second downloaded code 5006 includes at least the following components:
ATMos Operating System ~ ATM code ~ Additional codes to the 1960 processor DRAM allowing full access into the i960 memory address while the 1960 PATENT
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is still in reset, This enables DMA while the processor is reset.
Since the HYDROGEN is a PCI device, it is configured by the POST code during the PCI Device Scan. This assigns resources such as memory, I/O, and interrupt. The POST BIOS dynamically configures and assigns memory, I/0 and interrupt resources to the HYDROGEN using Configuration Mechanism One that uses two 32-bit I/O ports located at addresses OCFBh (CONFIG - ADDRESS) and OCFCh(CONFIG - DATA). The OCFBh and OCFCh registers are used to access into the 69 byte header of the PCI Configuration Registers in the HYDROGEN.
After the configuration, the memory is configured as shown in Figure 51.
a the 69 byte header 5100 at offset OlOh has the memory base address of the 16K memory window used by the NIC window virtual driver to access into the HYDROGEN memory space.
b The 64 byte header 5102 at offset 014h has the I/0 base address of the 64 byte window used by the NIC driver to access the HYDROGEN internal registers.
c The 64 byte header at offset 050h has the PC interrupt number(#Oh- #OFh) assigned to this device.

PATENT
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The HYDROGEN chip allows a fixed 16K memory space and 64 byte T/O space access. The values and offsets are defined in the HYDROGEN Data Book.
The sequences of code download on power upon reset are as follow. First, the HYDROGEN and 1960 are held in reset at 5200.
Then, the system downloads HYDROGEN POST binary at 5204 and waits for POST result. At 5206, a timeout error is established after 1-2 seconds. Step 5210 shows downloading the i960 processor Long or Normal POST binary via the mailbox. Step 5212 monitors for the POST result. The system waits up to X seconds at 5219 for the POST
result to be read back from the i960 mailbox. The POST result is 4 bytes = 32 bits long with the LSB read first. This 32 bit POST
result will allow up to 32 different codes if used as a bitmap, or 2~32 different codes if used as a number. The POST code is written to an address in the numbers Registry name, at 5216 so that the Service Monitor can read the POST code later.
The i960 processor Main binary is downloaded via the mailbox at 5218. Step 5220 downloads the HYDROGEN Main binary. A DMA code is downloaded (5006) that allows access into the memory even though the processor remains in reset. After these downloads are complete, the HYDROGEN is released from reset at 5222, followed by releasing i960 from reset at 5224.

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PATENT
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Steps 5216 and 5218 require 4 new registry names to be created by the install script. These include the i960 POST
filename; the i960 POST wait time (X seconds at 5214); the POST
result code; and the i960 Main filename.
The Long or Normal i960 POST is selectable by users [add] and the registry names are updated accordingly. Currently, the wait time for the normal POST is 2 seconds and for the Long POST is 2 minutes.
The return code has a one byte unique prefix (OxSA) follows by a 32 bit mapped hex code as shown from first in time to last in time on the report.
b3 I -b24 b23-b16 b15-b8 b7-b0 OxSA MSB only Unused Sachem i960 1 byte 1 byte 1 byte 1 byte 1 byte In general, a bit value of 0 denotes test pass and a bit value of 1 denotes test fail, except for bit 31.
The normal POST return Code is 0x00000000 meaning there is no errors.
POST return code bit map detail:
b31: always 0 to denote this is a NORMAL POST result b30-b 12: Not Used (value = '0').

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PATENT
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bll: Sachem UTOPIA cell loopback configuration.
b10: Sachem Config registers 0x22 and 0x24 return 0 after reset.
b09: Sachem general registers read and write test.
b08: Sachem version register return expected value.
b07: 1960 timer0 interrupt test.
b06: Unused b05: 1960 DRAM l6bit read and write test.
b04: 1960 DRAM 8bit read and write test.
b03: i960 DRAM 32bit read and write test.
b02: i960 DRAM burst read test.
b01: i960 DRAM burst write test.
b00: i960 DRAM bit read and write test.
All other bits are unused and should be returned as 0.
Long POST return code: 0x80000000 (No error) POST return code bitmap detail:
b31: always 1 to denote that this is a LONG POST result b30: Not used (value = '0').
b29: Not used (value = '0').
b28: Not used (value = '0').
2o b27: Not used (value = '0').
b26: Not used (value = '0').
b25: Not used (value = '0').

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PATENT
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b24: Not used (value = '0').
b23: Not used (value = '0').
b22: Not used (value = '0').
b21: Not used (value = '0').
b20: Sachem Interrupt Test Success.
b19: Not used (value = '0').
b18: Not used (value = '0').
b17: Sachem internal RAM test success.
b16: Sachem internal RAM test completion.
b15: Not used (value = '0').
b14: Sachem all registers OxAA read and write test.
b13: Sachem all registers 0x55 read and write test.
b12: Sachem all registers reset value test.
b11: Not used (value = '0').
b10: Sachem single register OxAA read and write test.
b09: Sachem single register 0x55 read and write test.
b08: Sachem single register reset value test.
b07: i960 timer0 interrupt test.
b06: Not used (value = '0').
b05: i960 DRAM 16-bit read and write test.
b04: i960 DRAM 8-bit read and write test.
b03: i960 DRAM 32-bit read and write test.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
b02: 1960 DRAM burst read test.
b01: i960 DRAM burst write test.
b00: 1960 DRAM bit read and write test.
The HYDROGEN and the NIC driver interface through the PCI
bus.
The accesses into the HYDROGEN internal memory location(AD[b31 -b0]) including internal registers are through an I/0-mapped window. All data transport is via the HYDROGEN DMA
channel. The 16K memory-mapped window is not used by the HYDROGEN.
l0 The PC-NIC virtual driver initialization routine first obtains the I/O base address and interrupt number from port OCFBh and OCFCh. Another way to retrieve this information is by using software interrupt lAh with function code OBlh in the AH register and the appropriate sub function code in the AL register. The PCI
BIOS documentation provides a complete description of each function call.
The physical I/0 base address is then mapped into the window virtual port address. Once the base address is obtained, the PC-NIC driver uses the -inpd() function to read/write to the following three 32-bit registers: I/OARMAddress at offset 00, I/OARMData at offset 09, and I/0 MailBox at offset 08.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
The combination of the I/0 base addresses at offset 00 and 04 allows the PC-NIC driver access into the HYDROGEN space. The interrupt number allows the PC-NIC driver to chain its interrupt <' service routine into the appropriate PC interrupt vector table.
The interrupt routine then services the interrupt generated by the INTA pin from the HYDROGEN chip.
The I/0 base address at offset 08 is used for interrupt handling. The HYDROGEN Data book provides more information.
The transmit and receive DMA transport/communication data are handled through the DMA engine in the HYDROGEN's LIST Manager hardware.
I/O Access is handled via the PCIbus,into the HYDROGEN.
For clarity, an example of a 64 byte header at offset 014h =
OBOAOOOOOh is used. This I/0 access is used for all command/response communication between the PC application to the PCIbus, and to the HYDROGEN. This may be directed to the ARM, 1960, or SACHEM. The I/0 access is also used initially to download HYDROGEN codes into the internal RAM(8K) and the external RAM(1M) .
I/0 base address + offset 00 store the full 32 bit of HYDROGEN address.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
The I/O base address + offset 04 store the data R/W from/to the HYDROGEN address.
Sample code : mov dx, #OBOA00000h ;load I/0 base address w/off00 out dx, #10000200h ;write LMSR addr to I/O addr mov dx, #OBOA00004h ;load I/O base address w/off04 in eax, dx ;read the content of LMSR
mov eax, #OOOOAA55h ;or out dx, eax ;write dword to the LMSR reg An interrupt from the PC-NIC driver to HYDROGEN is used primarily for commands/responses to/from communication: There are four PCI MailBox registers (b5-b2) at the I/0 base address with offset 08h. The PC-NIC driver sends data from the PC to this mailbox at 5300. These mailboxes can be read from/written to by the PC-NIC driver to interrupt the HYDROGEN chipset at 5302.
Currently, one of the PCI MailBox interrupts is used by the PC-NIC
driver to generate a PCILO interrupt to the HYDROGEN.
I/0 base address + offset 08h in b5-b2 is used to access the PCI MailBox register. The MailBox register interrupt is to signals the HYDROGEN to start executing the downloaded code at 5304.
2 0 mov dx, #OBOA00008h in eax, dx ; read the PCI mailbox register or eax, #80h ; set maibox 0 bit out eax, dx ; write to PCI mailbox register PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
Communication data transport and access into the PCI space can also be via the HYDROGEN DMA engine as shown in Figure 54. In addition, The ARM MailBox register at location 0x10000808 is used' to generate/clear interrupts to/from the PCI.
The data transport DMA operation is handled by the hardware List Manager in the HYDROGEN chip once set up. This requires little or no intervention from the ARM processor.
The command/response to/from the PCI is handled by the ARM
processor by setting the appropriate List Manager registers for:
to address, from address, size of data, and the enable DMA bit at 5400.
An interrupt from the HYDROGEN to the PC-NIC driver is used primary for commands/responses to communication. The ArmMailBox register is set at address 010000808h, as seen from the HYDROGEN. There are four mailboxes at this location that can be read from or written to the HYDROGEN to interrupt the NIC driver.
The interrupt is generated by INTA pin. Currently, one of the ARM
Mailbox interrupts is used by the HYDROGEN to generate an interrupt to the NIC driver.
After the DMA operation at 5402, the ARM processor normally sends an interrupt to the PC at 5404 by setting the appropriate bit on the ARMMailBox register. In the same manner, when the ARM

WO 99/67911.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
processor receives the PCI LO interrupt from the PC, the PCI data is read into the ARM data by using DMA, then clearing the interrupt bits in the ARMMailBox. The 'to' and 'from' addresses (slots) of both the ARM& PCI are set during the driver and HYDROGEN firmware initialization routine.
Software API
An Application Program Interface (API) between the HYDROGEN
and the PC application allows the HYDROGEN to communicate with the PC. The ATMSOCK socket services are used to communicate with the PC-NIC driver. The PC-NIC driver code then passes the request to the HYDROGEN through the PCI bus, using DMA and the mailbox interrupt. Most of the communication to/from the HYDROGEN has been implemented by ATML using ATMSOCK. Any additional communication (specific to ADSL or other) to/from HYDROGEN/ASIC/i960 is implemented with new socket services or modified existing socket services.
The API includes a Modem Control Interface, and a Hydrogen Control Interface. The Current Implementation uses ATMSOCK.
Figure 54 illustrates the command/response flow from the very top level software to the HYDROGEN.

From the very top level, the PC application opens an ATMSOCK
socket service at 5400. The request is passed into the HYDROGEN
code via the PC-NIC driver at 5402. The HYDROGEN responds by opening a corresponding ATM socket service process(AIF SOCKS) at 5404. Here, the PC is the socket client and the HYDROGEN is the socket server. The socket client then requests a sub-service to be connected at 5406 using the socket opened. Current supported subservices include SNMP, used by Vstatus, and VCONS, used by Vcons.
Once the service is established and active, the PC
application makes calls into the HYDROGEN code at 5408. At the PC-NIC driver level, all the socket-called-data-format are written into a specific pre-allocated PC memory and followed by a PCI
mailbox interrupt into the HYDROGEN. The HYDROGEN PCILO ISR then posts a wakeup message to the PC-DDI process in the HYDROGEN. The PC-DDI process then reads the call's data format from PC space into HYDROGEN space by using DMA. The HYDROGEN processes the call's format and makes the appropriate sub-service calls.
Modem Control Interface API uses a new sub-service call CTRL-ADSL. An existing socket(AIF_SOCKS) is used. CTRL-ADSL uses the following definitions and mnemonics:
#define AF HAYES ADSL (1375) The VCONS source code is a base code for implementation.
The PC application sends a command to the HYDROGEN at 5408 with the function call send (socket number, command string, length in bytes, 0). Analogously, the PC application receives the response at 5410 with the function call recv (socket number, return buffer, length in bytes, 0).
The complete HOST Commands as described in the management specification herein are passed to the HYDROGEN as part of the command string. The format for the command passing parameters are as follows:
Destinatio Source Command Length of N data n address address opcode data. N bytes bytes 1 byte 1 byte 1 byte 1 byte N bytes Destination address: An unsigned character 0-255 for this request intended to. For the management application in the 1960, the value for this byte is Ox 10.
Source address: An unsigned character 0-255 showing the originator of this command. For the PC application in the Host, like Service Monitor, the value for this byte is 0x01.

Command opcode: An unsigned character 0-255 command opcode.
Length of data. (N bytes): An unsigned character 0-255 indicating if additional data bytes are present. N data bytes: If the previous byte is non zero, there will be N more data bytes.
The PC-DDI process in the HYDROGEN runs an endless loop to constantly check for any call back or response socket services in the queue to be sent back to the PC. The queue is being added by other active socket service processes that are running. The PC-DDI
process passes the socket response data format into the PC space DMA followed by an ARM mail box interrupt into the PC. The PC-NIC
driver then reads the data and passes the data up the corresponding PC application that owns the socket services.
The return buffer format is very similar to the command string except that the source and destination addresses are swapped.
The "length of data bytes follow" field is usually greater than 1 to hold the response data, which can be 1-255 bytes.
Hydrogen Control Interface (0x20) - Commands Table 1 lists the Host commands that the Host may issue to the Hydrogen.

'able 1. Host Co~mmaads Command Opcode Date Field Data Field Length Contents Open PVC connection 0x01 Variable ASCII
textstring Close PVC connection 0x02 4 Binary vpivci Get PVC performance data 0x03 4 Binary vpivci OAMF9 enable(1)/disable(0)0x04 1 BOOL 1 or 0 OAMFS enable(1)/disable(0)0x05 1 BOOL 1 or 0 Get Global statistic 0x06 0 -counters Get H~~drogen Version 0x07 0 -Get Hydrogen Vendor 0x08 0 -Get MAC Address 0x09 0 -Add NATM Connection OxOA Variable ASCII
textstring Remove NATM Connection OxOB 9 Binary vpivci Report ADSL Line Sync OxOC 1 BOOL 1 or 0 Open PVC Connection The Data fields content have the following ASCII format:
Classical IP example:
"proto:pips/ip:192.120.60.35/vpi:32/vci:110/pcr:3622/class:cbr"

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
RFC1483 example:
"vpi:255/vci:65535/pcr:500/class:ubr/encap:llcs"
The above strings terminate with a NULL character. The ordering of each key field is important.
'."he ranges of the above key values are as follows:
0<= vpi/vpi <= 255 0 < vci/vci <= 65535 xxx < pcr < 3622 aaa < scr < 3622 l0 class: cbr, vbr, abr, ubr, ub+
encap: llcs, vcmx, null Data Field length = strlen(above string) Close PVC Connection The Data field contents has one 32-bit binary value of the is vpi-vci that needs to be closed.
32-bit vpi-vci b31 b15 b0 00 vpi Vci vci Get PVC performance data 20 The Data field contents will have one 32-bit binary value of the vpi-vci.

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109902(USP)WO HMPI
32-bit vpi-vci b31 b15 b0 00 vpi Vci vci OAMF4 Enable/Disable, OAMF5 Enable/Disable The Data field contents have one byte data value of either 1 (enable) or 0(disable).
Get Global Statistic Counters, Get Hydrogen Version, Get Hydrogen Mender, Get MAC Address No parameters required.
Add NATM Connection The Data fields content have the following ASCII format:
"vpi:255/vci:65535/pcr:500/class:ubr"
The above strings terminate with a NULL character. The ordering of each key field is IMPORTANT.
The ranges of the above key values are as follows:
0<= vpi/vpi <= 255 0 < vci/vci <= 65535 xxx < pcr < 3622 class: cbr, vbr Data Field length = strlen(above string) The. above commands cause the HYDROGEN to add the connection parameters to the NATM table. No physical connection is PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
established. The table list will be used to qualify if a subsequent open NATM connection is allowed.
Del NATM Connection The Data field contents have one 32-bit binary value of the vpi-vci that needs to be removed.
32-bit vpi-vci b31 b15 b0 00 Vpi VCi vc-i The above command removes the corresponding entry from the l0 NATM table. No physical connection is closed.
Report ADSL Line Sync The Data field contents have one byte data value of either 1 or 0.
1 is ADSL Line Synchronization has been established.
0 is ADSL Line Syncronization has not been established or failed Hydrogen Control Interface (0x20) - Responds Table 2 lists the response from Hydrogen to the Host commands in Table 1.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
Table 2. Host Response Response Opcode Data Field Data Field Length Contents Open PVC connection 0x01 1 See return code Close PVC connection 0x02 1 See return code Get PVC performance data 0x03 32 or 1 Binary OAMF9 enable(1)/disable(0)0x04 1 See return code OAMF5 enable(1)/disable(0)0x05 1 See return code Get Global statistic counters0x06 16 Binary Get Hydrogen Version 0x07 Variable ASCII text Get Hydrogen Vendor 0x08 Variable ASCII text Get MAC Address 0x09 6 binary Add NATM Connection OxOA 1 See return code Remove NATM Connection 0x08 1 See return code Report ADSL Line Sync Ack OxOC 1 Binary 0 Unsolicited Messages OxFE 1 Binary Open PVC Connection Return codes:
0 Success.
1 Connection already opened and is currently active.
2 Cannot open connection, exceed maximum connections.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
3 (3 & above) Error opening connection.
Close PVC Connection Return codes:
0 Success.
1 No such active connection, cannot close.
2 Connection already closed Get PVC performance data If this fails, the Data field length will be 1 and the Data field contents will have 1 byte return to code:
1 No such active connection, data not available 2 Current connection is not active, data not available Otherwise, the Data field length will be 32 and The Data field contents will have 6 32-bit words as follows:
First in time:
VPIVCI (32-bit) Total number of good data bytes transmitted for this PVC (32 bit) Total number of good data bytes received for this PVC (32 2o bit) WO 99/67911 PCT/US99/14372 .

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
Total number of bad data bytes received for this PVC (32bit) Total number of received cells count discarded for this PVC
(32bit) Total number of received packets good for this PVC (32 bit) Total number of received packets bad for this PVC (32bit) Time stamp of this command being polled, in seconds (32 bit) ~ Good data bytes transmitted is the number of data bytes from the PC sent to the HYDROGEN hardware transmit queue.
~ Good data bytes received is the number of data bytes send to the PC. This normally means the CRC of the data packet is OK.
~ Bad data bytes received is the number of data bytes received from the network and probably due to payload CRC error, LLC/SNAP header not recognized, and others.
~ Received cells counts discarded is detected at the very front end of the HYDROGEN hardware receive queue. The discard is probably due to: PTI field > 4 in the cell header or no more free buffers (data coming in too fast). 1 cell=53 bytes ~ Received packets good due to payload CRC OK.
~ Received packets bad due to payload CRC error, unrecognized llc/snap, or others.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
**Note 1: The data bytes counters do not include ATM cell header, trailer, or padding.
**Note 2: I packet can be 60 bytes to 1.5K bytes of data.
OAMF4 Enable/Disable, OAME'5 Enable/Disable This will always return 0.
Get Global Statistic Counters The Data field length will be 16 and The Data field contents will have 4 32-bit values as follows:
First in time:
l0 Total number of transmitted cells (32 bit) Total number of received cells good (32 bit) Total number of received cells discarded (32bit) Time stamp of this command being polled, in seconds (32 bit) Note: A cell is equals to 53 bytes of data.
is Received cells discarded due to: Cell header checksum bad and VCI
0 cells PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
Get Hydrogen Version, Get Hydrogen Vender The Data field contents is a NULL terminated ASCII text string with a length of less than 255.
The Data field length is the strlen( above text string) Get MAC Address The Data field length is 6 and The Data field contents will have 6 bytes of MAC address.
Add NATM PVC Connection Return codes:
l0 0 Success 1 No more free entry in the table.
Remove NATM PVC Connection Return codes:
0 Success 1 No such connection entry in the table, cannot remove Report ADSL Line Sync Ack The Data field contents has one byte data value of 0. It always return 0 Unsolicited Messages PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
The Hydrogen sends the following unsolicited 1 byte hex code to the Service Monitor if the following 1960 errors have been detected by the HYDROGEN.
Return codes:
1 1960 mailbox not in sync yet. This unsolicited message will be sent to the Service Monitor in the event the HYDROGEN receives a command string destination to 1960 and the i960 mailbox sync is not completed.
2 1960 command buffer overflow. This unsolicited message will be sent to the Service Monitor in the event the 32 bytes i960 command buffer is full, the most recent i960 command string will be discarded. Also indicating the i9f0 is not reading the mailbox, thus the HYDROGEN
cannot send another command byte.
3 1960 response buffer exceed maximum, mailbox will be out of sync. This unsolicited message will be sent to the Service Monitor if the i960 send a response buffer greater than the maximum allocated. The mailbox will be out of sync.
HYDROGEN/ASIC Interface The ASIC registers become an external memory map I/0 device to the HYDROGEN.

PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
The HYDROGEN external I/O addresses access reside on the memory block from 020000000h to 03 FFFFFFFh. Only the A23 -A16 lines(or less) will be decoded by the ASIC to activate the mailbox register locations.
The register definition iri the HWSPEC portion provide further detail. The HYDROGEN uses these registers for command/response communication to the i960.
The disclosed implementation of the communication includes modifying the current AIF-SOCKS process in the HYDROGEN to handle to send/receive data to/from 1960.
OBC (i960) Firmware Operating System for the Modem Processor pSOS will be used initially as the pSOS operating system code image generated and downloaded to the i960 DRAM.
Power-on Self Test and Self-Initialization At power up, the i960 is held in reset by the ASIC. After the ASIC and the HYDROGEN are initialized, the ASIC allows the HYDROGEN to gain control over the i960 bus. The HYDROGEN downloads the 1960 binaries into the i960 DRAM. The ASIC then return the bus control to the 1960 and releases 1960 out of reset. The downloaded i960 binaries may contain the following components:
~ 1960 poiaer-on self test (POST) PATENT
ATTORNEY DOCKET NO. 10226/003W01/98109402(USP)WO HMPI
~ pSOS operating system image which contains the real time kernel, Board Support Package(hardware specific code), X-API, and File system ~ Modem software ~ Management Application code When the 1960 is first released out of reset, The POST code is run first and the POST result is passed back to the PC through the mailbox. When the POST result is read, the i960 is put back into reset and the second download of the i960 main binary is to performed. When the 1960 is released out of reset, the pSOS is run, followed by modem software and management application.
OBC/SACHEM Iat$rface -The SACHEM becomes a memory map I/O device to the 1960 processor. The address above the DRAM( >100000h) is mapped into the SACHEM memory space. The A20-A16 lines are decoded by the ASIC
;:o assert the CSB signal to the SACHEM.
Host Interface Firmware The ASIC implements a mailbox function for exchanging information between the 1960 and the HYDROGEN. The Mailbox has transmit buffer registers(size TBD), receive Buffer registers(size TBD), Status registers. These registers become another memory map WO 99/67911 PCT/US99/14372 .

PATENT
ATTORNEY DOCKET N0. 10226/003W01/98109402(USP)WO HMPI
I/0 device to the i960 processor. The A20-A16 lines are decoded by the ASIC to activate these registers.
The management application uses the mailboxes to send and receive commands/responses to/from the HYDROGEN. The 1960 can receive the message by polling or interrupt.
Interrupt -A write to the transmit Buffer by the HYDROGEN causes the ASIC to generate an interrupt to the 1960 (INT 1 pin). The 1960 INT 1 routine reads the messages into the local buffer, clears the l0 corresponding bit in the Status register, and sets a flag to inform the background routine to process the message.
Polling -The Status register can be checked regularly by the OBC for message full.
Although only a few embodiments have been described in detail above, other embodiments are contemplated by the inventor and are intended to be encompassed within the following claims. In addition, other modifications are contemplated and are also intended to be covered.

Claims (200)

What is claimed is:

1. An ATM modem device, comprising:
an ATM modem part that handles communications that are divided into cells, where multiple cells form a single message;
an interface to a computer running an application obtaining information from hosting said modem part; and a controller, controlling a mode of operation of said ADSL
modern, said controller allowing operation of said modem part in a first mode and a second mode.

2. A device as in claim 1, wherein said modem part includes a jumper pin, and wherein said first mode is selected in one state of said jumper pin, and said second mode is selected in the other state of said jumper pin.

3. A device as in either claims 1 or 2, wherein an initialization occurs in standalone mode in said first mode, and in normal mode in said second mode.

4. A device as in claim 3, wherein said initialization is a reset.

5. A device as in claim 2, wherein said controller comprises a processor, controlling operations of said modem part.

6. A device as in claim 5, wherein said processor operates based on downloaded code during said first mode, and on code stored in memory during said second mode.

7. A device as in claim 6, further comprising a flash memory, storing said code for use in said second mode.

8. A device as in any of claims 1, 2, 5, 6, or 7, further comprising a computer interface chip, coupled to said controller, which interfaces with a bus of said computer, and receives downloaded code from the bus.

9. A device as in claim 8, wherein said bus is a PCI bus, and said computer interface uses a clock from the PCI bus.

10. A device as in claim 8, wherein said bus is a PCI bus, and said computer interface uses an additional clock separate from the PCI bus.

11. A device as in claim 4, wherein said reset carries out a download of instructions in normal mode, and loading of instructions from memory in standalone mode.

12. A device as in claim 11, further comprising a flash memory storing instructions for said standalone mode.

13. A device as in claims 1, 2, or 5, wherein said initialization is a reset.

14. A device as in claim 13, wherein said reset mode is a reset mode from the computer or a soft reset mode that is externally selected.

15. A device as in claim 13, further comprising commanding the modem part to produce an output signal indicating that the modem will be reset.

16. A method of initializing a modem that is associated with a controller, comprising:
detecting a configuration of said modem between a first state and a second state;
initializing said modem in said first state by downloading instructions to said controller; and initializing said modem in said second state by using commands from a non-volatile memory.

17. A method as in claim 16, wherein said initializing comprises a power-up.

18. A method as in claim 16, wherein said initializing comprises a reset.

19. A method as in claim 18, further comprising receiving a command of a reset, and commanding said modem to issue a signal which indicates that said modem will be restarted.

20. A method as in either of claims 18 or 19, wherein said reset includes a hard reset or a soft reset.

21. A method as in either of claims 18 or 19, further comprising, responsive to an indication of reset, holding said controller in reset for a plurality of cycles.

22. A method as in claim 21, wherein said plurality of cycles is more than 16,000 cycles.

23. A method as in claim 16, further comprising using said modem to produce a signal indicating that the modem will be reset.

24. A method as in claim 23, wherein said signal is a dying gasp signal.

25. A method as in claim 23, wherein said signal is produced in a time less than it will take the unit to restart.

26. A method as in claim 25, further comprising detecting that said signal will be produced, producing a reset interrupt signal, indicating that a reset will be produced, producing said signal, and after said signal is produced, initiating a self-reset.

27. A method as in claim 25, wherein said self-reset is produced by disabling the reset interrupt and re-enabling the reset signal.

28. A method as in any of claims 16, 17, 18, 23, 24, 25, 26, or 27, wherein said modem is an ATM modem.

29. A method as in any of claims 16, 17, 18, 23, 24, 25, 26, or 27, wherein said modem is a DSL modem.

30. A method as in any of claims 16, 17, 18, 23, 24, 25, 26, or 27, wherein said modem is an ADSL modem.

31. A method of operating a digital subscriber line ("DSL") modem, comprising:
operating the modem to produce and receive data packets with a remote source;
detecting a request to initialize said modem;
determining if a dying gasp signal is enabled, where said dying gasp signal is a signal that indicates to the remote source that the modem will be reset;
if said dying gasp signal is not enabled, then initializing the modem; and if said dying gasp signal is enabled, then generating an interrupt, sending said dying gasp signal, then disabling the interrupt and initiating a self-reset.

32. A method as in claim 31, wherein said initialization is a reset.

33. A method as in either of claims 31 or 32, wherein said modem is an ADSL modem.

34. A method as in either of claims 31 or 32, wherein said initialization comprises downloading code for a controller.

35. A method as in claim 31, further comprising detecting if the modem is set into normal mode or standalone mode, initializing in a first way in said normal mode, and initializing in a second way in said standalone mode.

36. A method as in claim 35, wherein said first way comprises downloading code, and said second way comprises using onboard code.

37. A method as in claim 36, wherein said downloaded and onboard code are provided to a processor.

38. A method as in claim 36, wherein said downloaded and onboard code are provided to a computer-interfacing chipset.

39. A digital subscriber line (DSL) modem, comprising:
a modem part, having a connection to a DSL data line;
a controller; and a bi-color indicator;
said controller driving said indicator operating in an off state to indicate that the modem is off, producing a first color output to indicate that the modem is on, but that DSL line sync has not been established, and producing a second color output to indicate that power is on and DSL line sync has been established.

40. A device as in claim 39, wherein said first color is green and said second color is red.

41. A device as in either of claims 39 or 40, wherein said indicator is an LED.

42. A device as in claim 41, further comprising an element, as part of said modem, which determines ADSL line sync, and controls said bi-color indicator.

43. A modem assembly, comprising:
a modem portion, including the capability of communicating with an asymmetrical digital subscriber line ("ADSL") connection;
a controller, controlling operation of said modem part;

an interface to an external controlling computer, said interface sending information to and receiving information from said external controlling computer; and a mailbox register, receiving information from said external controlling computer and providing said information to said controller, and receiving information under control of said controller to be sent to said external controlling computer.

44. A device as in claim 43, further comprising a field programmable gate array, forming said mailbox register.

45. A device as in claim 43, wherein said mailbox register is part of an application specific integrated circuit (ASIC).

46. A device as in any of claims 43, 44, or 45, wherein said external controlling computer is a personal computer.

47. A device as in claim 46, wherein said interface is a PCI
interface.

48. A device as in any of claims 43, 44, or 45, wherein on power-up, software is downloaded to run said controller from said external controlling computer, through said interface, to said mailbox register and to said controller.

49. A device as in any of claims 43, 44, or 45, wherein said modem portion produces status information which is sent to said mailbox register, and read from said mailbox register via said interface to said external controlling computer.

50. A device as in claim 49, wherein said status information includes line sync information.

51. A device as in claim 59, wherein said status information includes ADSL condition information.

52. A method of operating a digital subscriber line modem comprising:
detecting a command to operate said modem in a first mode or a second mode;
initializing said modem in said first mode, by receiving a download of information to run said modem from a controlling computer;
holding the modem in reset during said receiving;
receiving said information into a mailbox, and setting a flag in said mailbox indicating that said information is received;
reading said information from said mailbox to a memory on said modem;

releasing said modem from reset, to operate based on commands in said memory; and operating said modem in a second mode by using information contained in a non-volatile memory.

53. A method as in claim 52, wherein said initializing is a reset.

54. A method as in claim 53, further comprising responding to said reset by producing a dying gasp signal, using the modem, indicating that the modem will be shut down.

55. A method as in claim 54, wherein said signal is produced by producing an interrupt, producing said signal, waiting a time effective to allow said signal to be produced; and resetting said modem after said signal is produced.

56. A method as in claim 52, wherein said initialization is a power-up.

57. An ADSL modem device, comprising:
an ADSL modem having a connection to an ADSL information line;
a processor, controlling operations of said ADSL modem;

a connection to a PCI bus of a personal computer;
a PCI interface chip, providing the PCI interface to said PCI
bus;
a memory, storing PCI configuration information, connected to said PCI interface chip; and an application specific chip, including at least a level shifting part and a mailbox, said mailbox connected to receive data from said PCI interface chip from the PCI bus and to provide data to the PCI interface chip from the PCI bus, and said level shift connected to shift a level of signals between said processor and said ADSL modem.

58. A device as in claim 57, further comprising a plurality of interrupt registers on said application specific chip, each interrupt register indicating that said mailbox includes specified data therein.

59. An assembly as in claim 58 wherein each of said processor, said ADSL modem, said application chip and said PCI
interface chip include an inductive element associated therewith, decoupling their power supply from a main power input of said system.

60. A device as in either claims 58 or 59 wherein said mailbox receives program information to be executed by said processor.

61. A device as in claim 58 or 59 wherein said mailbox receives code information from the PCI bus to be used in said ADSL
modem.

62. A device as in claim 58 or 59, wherein said ADSL modem further includes a line synchronization detecting element.

63. A device as in either claim 62, further comprising a bi-color indicator device, said bi-color device displaying in a first color to indicate power on and modem not synchronized, and displaying in a second color to indicate power on and modem synchronized.

64. A device as in claim 58 wherein said application specific chip further includes a memory location operating as a modem register.

65. A device as in claim 58 further comprising a control to indicate a desired initialization state, and wherein said processor controls initialization depending on said control.

66. A device as in claim 65 wherein the processor controls the initialization in a first mode to download code and in a second mode to use stored code.

67. A program operating to run an asynchronous transfer mode connection, comprising:
a processor running a user interface including determining and changing an ATM address, setting global signaling for switched virtual circuit connections, setting a connection mode for permanent connections, and allowing selection of alternate protocol support; and detecting a change to one of said parameters and requiring the computer to be restarted before said change is accepted.

68. A program as in claim 67 wherein said alternate protocol supports include IP over ATM or PPP over ATM.

69. A method of controlling an ATM modem, comprising:
determining operating characteristics of a modem including a speed of data on the modem, errors in line flow and error in line sync;
obtaining a plurality of separate icons, each of which provides a different color indication for each of a plurality of different indicators;
determining if data is moving normally, and displaying two different icons in succession to indicate the data movement; and displaying an additional indication in a specified color to indicate loss of line sync of the modem.

70. A method as in claim 69 wherein said indications include three indications, two outer indications for data flow rate, and the middle indication for line sync.

71. A method as in claim 69 or 70 wherein lack of line sync is indicated by a bright red color.

72. A method as in claim 70 further comprising defining three separate colors for each of said three separate indications, and storing 9 separate icons including each combination of each color.

73. A method as in either of claim 70 or 72 further comprising serially displaying two different icons, one having color on, the other having color off, to indicate data flow.

74. A method as in claim 73 wherein said two colors are dark red and green, and a third color is bright red to indicate an error.

75. A method as in claim 70, wherein one other indication indicates transmitted data and the other outer indication indicates received data.

76. A method as in claim 69 further comprising displaying an additional screen which shows each of a plurality of possible services, along with a supplemental indicator indicating said services.

77. A method as in claim 76 wherein said indicator is a color indication with a first color indicating connected and a second color meaning unconnected.

78. A method as in claim 77 wherein said first color is red and said second color is green.

79. A method of displaying information about a DSL modem, comprising:
displaying an icon indicating said DSL modem;
accepting a first action on said icon to display global status information about said modem, accepting a second action on the icon to obtain connection status about said modem, and accepting a third action on the icon to obtain a summary status about said modem.

80. A method as in claim 79 wherein said first and second actions include a left click and a right click respectively, and said third action includes resting the cursor over the icon for a predetermined period.

81. A method as in either claims 79 or 80 wherein said summary information includes connection time and flow rate.

82. A method as in claim 79 or 80 wherein said summary information includes connection time.

83. A method as in claims 79 or 80 wherein said icon includes a plurality of different icons, any one of which is displayed to correspond to modem status.

84. A method as in claim 83 wherein data transfer on said modem is indicated by sequentially displaying first and second different icons.

85. A method as in claim 83 wherein error is displayed by a predetermined color in said icon.

86. A method of managing an ATM service with a plurality of services, comprising:
displaying information on each of the plurality of services;
for each active service, displaying an indication that when operated, enables stopping the service; and preventing any new connections from being initiated, after said stopping, for a predetermined interval.

87. A method as in claim 86 wherein said predetermined interval is a two minute interval.

88. A method of controlling a digital subscriber line (DSL) modem in a computer, comprising:
defining a format which includes a destination address for information, a source address for the information, an operation code, a length of data indication and a data field in a format that is specific to said operation code, wherein at least one of the destination address or source address includes the modem or an application running on the modem; and sending the data from the destination address to the source address.

89. A method as in claim 88 further comprising acting on the data, by taking some action, determining the destination, and sending a response back to the destination.

90. A method as in either of claims 88 or 89 wherein said source is a process running in the computer, and the destination is the modem.

91. A method as in claim 90 wherein two applications are running in the computer that are accessing said modem, and wherein said modem source address indicates one of said two different applications, said modem sending back a response to said one of said two applications.

92. A method as in either of claims 88 or 89, wherein said source address is one of at least two services in said modem, said destination address is in said personal computer, and said destination address sends back information to said modem.

93. A method of communicating between an ADSL modem and a computer, comprising:
establishing a mailbox associated with a controller of the ADSL modem, said mailbox having associated control information indicating its fill state, and said mailbox including an incoming mailbox and an outgoing mailbox;

determining if data exists in either said incoming mailbox or said outgoing mailbox;
if data exists in the incoming mailbox, then sending said data to said controller of the ADSL modem; and if data exists in said outgoing mailbox, then sending the data to said personal computer.

94. A method as in claim 93 wherein each of said mailboxes are 16 bit mailboxes.

95. A method as in claim 93 or 94 further comprising using only some of an available bit width of said mailbox, and leaving the other bit width unused.

96. A method as in claim 94 further comprising using only 8 bits of the mailbox, and leaving the other 8 bit unused.

97. A method as in claim 93 further comprising establishing an IRQ status register for each of said mailboxes determining if the IRQ status register is set, to determine if the mailbox contents should be processed.

98. A method as in claim 97 wherein said IRQ registers are polled.

99. A method as in claim 97 wherein the IRQ status registers are interrupt driven.

100. A method as in any of claim 93, 97, 98 or 99 further comprising attempting to write to the mailbox, determining that a predetermined interval has elapsed since writing to the mailbox, and establishing an error when said predetermined interval has elapsed.

101. A method as in claim 100 wherein said predetermined interval is approximately 1 second.

102. A method as in claim 92 further comprising using a message of the form having a destination address, a source address, an operation code, a data length and a field.

103. A method as in claim 102 further comprising using a mailbox driver which does not recognize the operation code and instead determines a length of the message from said data length.

104. A method as in any of claims 93, 100 or 102 further comprising synchronizing said mailbox after initial power up.

105. A method as in claim 104 wherein said synchronizing comprises transmitting and acknowledging special synchronization op codes.

106. A method as in claim 105 further comprising establishing synchronization when three consecutively-sent codes result in three consecutively-received acknowledges.

107. A method as in claim 106 wherein said synchronization is in the outgoing direction.

108. A method as in claim 106 wherein said synchronization is in the incoming direction.

109. A method as in claim 104 wherein synchronizations are acknowledged using a special synchronization acknowledgment op code.

110. A method of communicating between an ADSL modem and a personal computer running an application which uses the ADSL
modem, comprising:
establishing a mailbox buffer associated with the ADSL modem;
after start up of the ADSL modem, synchronizing the mailbox buffer using a special synchronization code by sending said code and receiving an acknowledgment of said code; and establishing synchronization when a plurality of consecutive codes are received and acknowledged.

111. A method as in claim 110 wherein said mailbox is configured to use fewer than all of the available bits in the mailbox.

112. A method as in claim 111 wherein said mailbox used only a plurality of the least significant bits of the mailboxes.

113. A method as in any of claims 110, 111 or 112 wherein said synchronization uses an operational code which uniquely identifies a synchronization op code, and which is acknowledged by a synchronization acknowledgment op code which uniquely identifies synchronization acknowledgment.

114. A method as in any of claims 110, 111 or 112 further comprising sending a message between said ADSL modem and said computer having a form including a destination address, a source address, an op code and a field length.

115. A method as in claim 114 wherein said form also includes a data length.

116. A method as in claim 115 further comprising recognizing the op code, and determining the data length from the op code.

117. A method as in claim 115 further comprising using the data length to determine the field length when the op code is not recognized.

118. A method as in claim 110 further comprising control bits for determining a fill state of said mailbox.

119. A method as in claim 118 wherein said control bits are polled.

120. A method as in claim 118 wherein said control bits are interrupt-driven.

121. A method as in claim 110 further comprising a timeout associated with synchronization.

121. An ADSL modem assembly, comprising:
an ADSL modem part, having a line interface adapted for attachment to an ADSL modem source;
a controller, operating to control at least one function of said ADSL modem;
a connection to an external personal computer running at least one application; and a mailbox including at least a receive mailbox and a transmit mailbox, the receive mailbox receiving messages from said personal computer to be acted on by said controller, and a transmit mailbox receiving messages from said controller to be sent to said personal computer, said messages including at least modem status requests from said personal computer and modem status information from said modem.

122. An assembly as in claim 121 wherein said mailboxes are part of an application specific integrated circuit which also includes a plurality of status registers therein, indicating status of the modem.

123. An assembly device as in either claims 121 or 122 wherein said controller is operative to act on a specified synchronization message to respond with a synchronization acknowledgment message, to thereby synchronize said mailbox.

124. An modem as in claim 39 wherein the indicator on one side indicates receive data and the indicator on the other side indicates transmitted data.

125. An assembly as in claim 101, wherein the mailbox uses less than its total available bit width.

126. An assembly as in claim 121, wherein said application includes a status indicator, showing status of said modem.

127. An assembly as in claim 121, further comprising an interface to a bus of said personal computer.

128. An assembly as in claim 127, wherein said interface includes a mailbox register, receiving information from said bus, and sending said information to said mailbox.

129. An assembly as in claim 128, wherein said mailbox is formed from an ASIC.

130. An ADSL modem, comprising:
a printed circuit board having an edge connector sized for insertion into a PCI bus connector;
a PCI-bus-interfacing chip set, physically connected to PCI
bus, and including a mailbox therein that receives messages from said PCI bus and sends messages to said PCI bus;
a host application, running in the personal computer that includes said PCI bus, said host application sending messages to said PCI bus and said mailbox in said chip set, and receiving messages from said PCI bus and said mailbox in said chip set; and an ADSL modem part, physically located on PC board, and operating to communicate ADSL data based on said host application.

131. A device as in claim 130, further comprising a driver for the PC bus interfacing chip set, running in the personal computer.

132. A device as in claim 130, further comprising a processor, on the PC board, running a control program to control said ADSL modem and to communicate with said host application.

133. A device as in any of claims 130, 131, or 132, further comprising a second mailbox, receiving data from said PCI
interfacing chip set and having associated control bit storage element, a first control bit indicating that data has arrived and a second control bit indicating that data is to be sent.

134. A device as in claim 132, further comprising a second mailbox, associated with said processor, and receiving data from said first mailbox and providing said data to said processor.

135. A device as in claim 134, wherein said data includes, on initialization, codes for operation of said processor.

136. A device as in claim 134, wherein said data includes a request for status from ADSL modem.

137. A device as in claim 130, further comprising a second application running on said personal computer.

138. A device as in claim 137, wherein messages from said host application to said modem are in a specified form that includes a source address and a destination address.

139. A device as in claim 138, further comprising a processor on said PC board, said processor responding to messages that request status by switching the source address and destination address, obtaining status from said ADSL modem, and sending back the status information.

140. A device as in claim 132, further comprising a level shifter which shifts a level of signals between said processor and said ADSL modem.

141. A device as in claim 140, further comprising a second mailbox, associated with said processor, said second mailbox communicating with said first mailbox.

142. A device as in claim 141, wherein said second mailbox and said level shifter are physically within the same chip.

143. A device as in claim 142, wherein said chip is an ASIC.

144. A device as in claim 142, wherein said chip is a field programmable gate array FPGA.

145. An ATM modem, comprising:
an ATM modem part having a connection to an ATM network, and adapted to send packets of information to said ATM network and receive packets of information from said ATM network;

a controller associated with said ATM modem, and controlling at least one function of said ATM modem;
a computer-interface chip, having an operation to interface with a computer that is running a host program to access said modem, said computer interface chip receiving information from the computer and sending information to the computer;
said computer interface chip including a buffer therein for receiving downloaded information from the computer, said buffer including an associated control tag which, when active, signals said chip to execute code contained in said buffer.

146. A device as in claim 145, further comprising another buffer, associated with said controller, said another buffer including a first buffer portion for receiving incoming messages, a second buffer portion for sending outgoing messages, and control bits associated with each of said buffer portion indicating that messages are contained therein.

147. A device as in claim 146, wherein said buffer has a first size to accommodate a first bit width, and wherein said buffer uses less than said first bit width.

148. A device as in claim 147, wherein said buffer uses only least significant bits thereof.

149. A device as in claim 147, wherein said buffer is a 16 bit buffer and uses only 8 bits thereof.

150. A device as in claim 145, wherein said messages take a specified form including a source address and a destination address.

151. A device as in claim 150, wherein said messages also include an op code field and a message size field.

152. A device as in either of claims 150 or 151, wherein said controller responds to said messages by determining if said messages request ADSL modem status, querying said ADSL modem for status if so, obtaining status from said ADSL modem, reversing said source and destination addresses, forming another message with said status and said reversed source and destination messages, and sending said another message to said buffer in said computer interface chip.

153. A device as in claim 145, wherein said controller detects a first op code in said message representing a request for status, and responds to the request for status with a second op code in said message that indicates status information is attached.

154. A device as in claim 145, further comprising a host application running on the computer and a modem driver application running on the computer.

155. A device as in claim.154, wherein said host application also drives an indication that is displayed on the computer screen, said indication including a first indication of data transmission using two different indicators for said data transmission, and a second indication of ADSL line sync.

156. A device as in claim 155, wherein one of said two indicators represents transmitted data and another of said two indicators represents received data.

157. A device as in claim as in claim 155 or 15 ?, wherein the indication is repetitively turned on and off to indicate data flow.

158. A device as in claim 157, wherein said indication is displayed by defining a plurality of separate icons and repetitively displaying said separate icons one after another.

159. An ATM modem, comprising:
a connection to a data line;

an ATM modem part, adapted for connection to said data line and carrying out an ATM protocol over said data line;
a processor, associated with said ATM modem, and controlling at least one aspect of said ATM modem;
an interface to a computer, adapted to communicate with a computer that is running at least one application associated with said ATM modem, said interface having at least one buffer for receiving messages from said computer and at least one other buffer for receiving messages to be sent to said computer; and an integrated circuit, having therein at least one transmit mailbox buffer, receiving messages from said processor to be sent to said computer, at least one receive mailbox buffer receiving messages from said computer to be sent to said processor, a control tag for said receive buffer, another control tag for said transmit buffer and an input for at least one configuration setting.

160. A device as in claim 159, in said at least one configuration setting is a configuration setting for determining an initialization mode of said modem between a first initialization mode and a second initialization mode.

161. A device as in claim 160, further comprising a non-volatile memory, storing program code for said processor, and wherein said first initialization mode initializes by downloading code for said processor from said computer, and said second initialization mode initializes by using code in said non-volatile memory.

162. A device as in claim 159, wherein said mailbox buffers include the capability of obtaining a specified number of bits of information, and said processor controlling said mailboxes to operate with less than said specified width.

163. A device as in claim 159, wherein said ATM modem is an ADSL modem.

164. A device as in claim 159, wherein said chip is an ASIC.

165. A device as in claim 159, wherein said chip is a field programmable gate array FPGA.

166. A method of communicating with and controlling an ADSL
modem, comprising:
requesting access to said ADSL modem from a host application running in a host computer, said requesting access comprising sending a command to a bus within the host computer, and through the bus of the computer to a bus interface device on the ADSL

modem, said command comprising a format which includes a source address indication, a destination address indication, and a code indicating an operation to be carried out;
coupling said command to a mailbox register associated with the ADSL modem;
operating a processor associated with the ADSL modem according to said command, to obtain some information from said ADSL modem, based on said command;
using the processor to assemble a response which includes a source address, a destination address, and at least one item in response to said command, said source address of said response corresponding to said destination address of said command, and said destination address of said response corresponding to said source address of said command; and sending said response to said mailbox register associated with said modem, to said bus of said host computer, and to said host application on said personal computer

167. A method as in claim 166, wherein said command is a request for status of the ADSL modem.

168. A method as in claim 16605 167, further comprising a modem port, wherein said processor operates according to a first specified voltage level for its signals, and said modem port operates using a second specified voltage for its signals different than said first specified voltage, and further comprising shifting a level of said signals between said processor and said modem port.

169. A method as in claim 166 or 167, further comprising initializing said processor by downloading code from said host application to said processor.

170. A method as in claim 166 or 167, further comprising determining a mode of operation of said processor, initializing in a first mode by operation based on a stored program and initializing in a second mode of operation by downloading a program from said host application to said processor.

171. A method as in claim 170, wherein said second mode initialization is carried out by:
first downloading code to the interface device;
downloading an indication to the interface device that indicates that said interface device should execute the code now downloaded;
carrying out an initial self-test of the interface device;
using the interface device to download code for the processor; and operating the processor based on the downloaded code.

172. A method as in claim 166, wherein said command includes control codes for establishing and communicating with a synchronous transfer mode socket connection.

173. A method as in claim 172, wherein said socket connection uses a form that has a destination address and a source address, and one of said addresses is an entity address of an application, a data handler, or a port.

174. A method as in claim 166, wherein said command is a management command.

175. A method as in claim 166, wherein said command is a command to change global modem settings.

176. A method as in claim 166, wherein said command is a command to change ATM interface settings.

177. A method as in claim 166, wherein said command is a mailbox synchronization command.

178. A method as in claim 166, wherein said command is a command to change a status of an ADSL connection.

179. A method as in claim 166, wherein said command is a command to report an ADSL carrier load.

180. A method as in claim 166, wherein said command is a command to report an ADSL channel data.

181. A method as in claim 166, wherein said command is a command to report ADSL performance.

182. A method as in claim 166, wherein said command is a command to report ADSL fault data.

183. A method as in claim 166, wherein said command is a command to send a ADSL dying gasp command.

184. A method as in claim 166, wherein said command is a command for ADSL to report status.

185. A method as in claim 166, wherein said command is a command for ADSL to take some action related to the connection.

186. An ADSL modem, device comprising:
a computer interface part, sized and shaped for interfacing to a data-containing bus of a host computer that is running a host application that accesses the ADSL modem;
a bus interface device, connected to said bus, and including a mailbox register operating to receive information from said bus, said mailbox register capable of receiving information, and having an associated data part which is changed in state when said information is received and capable of receiving information to be transmitted to the data bus, and having a second data part which is changed in state when information is received to be sent to the data bus of the personal computer;
a multiple-function integrated circuit chip, having first and second mailbox registers, interrupt registers, said first and second mailbox register respectively connected to said mailbox registers of said bus interface device;
a controller element, operating according to a stored program, said controller element also receiving information contained in said first mailbox register in said multiple function integrated circuit and transmitting information to said second register in said multiple function integrated circuit; and a ADSL communication integrated circuit, having a connection to an ADSL information line, said processor also connected to provide commands to said ADSL modem based on information received in said first mailbox from said receive mailbox and to obtain information from said ADSL modem, and transmit said information to said second mailbox, to said transmit mailbox.

187. A device as in claim 186, further comprising a first power supply isolation device associated with said bus interface device, a second power supply isolation device associated with said ADSL circuit; a third power supply isolation device associated with said controller, and a fourth power supply isolation device associated with said multiple function integrated circuit, whereby each of said devices has its power supply which is isolated from each other of said devices.

188. A device as in either of claims 186 or 187, further comprising a transparent end plate portion, and a multiple color light emitting diode, which is controlled to display in a first color to indicate proper operation, and a second color to indicate lack of line synchronization, and which is viewable through said transparent end plate.

189. A device as in claims 186 or 187, wherein said multiple purpose chip is an ASIC.

190. A device as in claims 186 or 187, wherein said multiple purpose chip is an FPGA.

191. A device as in claim 186 or 187, further comprising a volatile memory, storing a program to be executed by said controller, and a second memory, storing a program which is downloaded via said receive mailbox to said first mailbox register, and wherein said controller is operative to operate based on one of said stored program in said non-volatile memory or said downloaded program.

192. A method as in claim 166, wherein said command is a command for ADSL to allow a response to a command.

193. A method as in claim 166, wherein said command is a command for ADSL to allow a response to a near-end responses that includes a correction factor in a data frame.

194. A device as in claim 191, further comprising a configuration element, kept in a first position to command said processor to initialize based on said non-volatile memory, and kept in a second position to command said processor to initialize based on downloaded program commands.

195. A device as in claim 186, wherein said processor is a RISC processor.

196. A device as in claim 186, wherein said stored program is operative to detect a special operation code indicative of synchronization request, and respond with a special response call code indicative of synchronization acknowledge, wherein synchronization is established by properly receiving said operation code a specified number of times, and operations with said mailbox register are prohibited until receiving said synchronization code said specified number of times.

197. A device as in claim 185, wherein said level shifting element which changes a voltage level of a signal received thereby, and said processor common codes with said ADSL
communication circuit via said level shifting element.

198. A device as in claim 186, wherein said first and second mailboxes have a specified bit width representing their message handling capability, and wherein said processor forms messages having less than said specified bit width.

199. A device as in claim 186, wherein said multiple application integrated circuit also include a DRAM refresh circuit.

200. A device as in claim 186, wherein said mailbox includes addresses that allow addressing different elements within the mailbox.