CA2318502A1 - N-tuple or ram based neural network classification system and method - Google Patents
N-tuple or ram based neural network classification system and method Download PDFInfo
- Publication number
- CA2318502A1 CA2318502A1 CA002318502A CA2318502A CA2318502A1 CA 2318502 A1 CA2318502 A1 CA 2318502A1 CA 002318502 A CA002318502 A CA 002318502A CA 2318502 A CA2318502 A CA 2318502A CA 2318502 A1 CA2318502 A1 CA 2318502A1
- Authority
- CA
- Canada
- Prior art keywords
- training
- examples
- column vector
- cells
- cell values
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title abstract 6
- 238000013528 artificial neural network Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F18/00—Pattern recognition
- G06F18/20—Analysing
- G06F18/21—Design or setup of recognition systems or techniques; Extraction of features in feature space; Blind source separation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Life Sciences & Earth Sciences (AREA)
- Artificial Intelligence (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Software Systems (AREA)
- Molecular Biology (AREA)
- Computational Linguistics (AREA)
- Biophysics (AREA)
- Biomedical Technology (AREA)
- Mathematical Physics (AREA)
- General Health & Medical Sciences (AREA)
- Health & Medical Sciences (AREA)
- Bioinformatics & Cheminformatics (AREA)
- Bioinformatics & Computational Biology (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Evolutionary Biology (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Facsimile Image Signal Circuits (AREA)
Abstract
The invention relates to a system and a method of training a computer classification system which can be defined by a network comprising a number of n-tuples or Look Up Tables (LUTs), with each n-tuple or LUT comprising a number of rows corresponding to at least a subset of possible classes and comprising columns being addressed by signals or elements of sampled training input data examples, each column being defined by a vector having cells with values, the method comprising determining the column vector cell values based on one or more training sets of training input data examples for different classes so that at least part of the cells comprise or point to information based on the number of times the corresponding cell address is sampled from one or more sets of training input examples, and determining weight cell values corresponding to one or more column vector cells being addressed or sampled by the training examples to thereby allow weighting of one or more column vector cells of positive value during a classification process, said weight cell values being determined based on the information of at least part of the determined column vector cell values and by use of at least part of the training set(s) of input examples. A second aspect of the invention is a system and a method for determining - in a computer classification system -- weight cell values corresponding to one or more column vector cells being addressed by the training examples, wherein the determination is based on the information of at least part of the determined vector cell values, said determination allowing weighting of column vector cells having a positive value or a non-positive value. Finally the invention provides a method and a system for classifying input data examples into a plurality of classes using the computer classification systems.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DK0162/98 | 1998-02-05 | ||
DK16298 | 1998-02-05 | ||
EP98201910.1 | 1998-06-09 | ||
EP98201910A EP0935212B9 (en) | 1998-02-05 | 1998-06-09 | N-Tuple or ram based neural network classification system and method |
PCT/DK1999/000052 WO1999040521A1 (en) | 1998-02-05 | 1999-02-02 | N-tuple or ram based neural network classification system and method |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2318502A1 true CA2318502A1 (en) | 1999-08-12 |
CA2318502C CA2318502C (en) | 2008-10-07 |
Family
ID=26063433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002318502A Expired - Lifetime CA2318502C (en) | 1998-02-05 | 1999-02-02 | N-tuple or ram based neural network classification system and method |
Country Status (8)
Country | Link |
---|---|
JP (1) | JP2002503002A (en) |
CN (1) | CN1227608C (en) |
AU (1) | AU756987B2 (en) |
CA (1) | CA2318502C (en) |
IL (1) | IL137337A0 (en) |
NZ (1) | NZ506053A (en) |
PL (1) | PL343114A1 (en) |
WO (1) | WO1999040521A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6995629B2 (en) * | 2018-01-05 | 2022-01-14 | 日本電信電話株式会社 | Arithmetic circuit |
CN110163334B (en) * | 2018-02-11 | 2020-10-09 | 上海寒武纪信息科技有限公司 | Integrated circuit chip device and related product |
CN110197264B (en) * | 2018-02-27 | 2020-08-04 | 上海寒武纪信息科技有限公司 | Neural network processor board card and related product |
CN110197275B (en) * | 2018-02-27 | 2020-08-04 | 上海寒武纪信息科技有限公司 | Integrated circuit chip device and related product |
CN110197267B (en) * | 2018-02-27 | 2020-08-04 | 上海寒武纪信息科技有限公司 | Neural network processor board card and related product |
CN110197274B (en) * | 2018-02-27 | 2020-08-25 | 上海寒武纪信息科技有限公司 | Integrated circuit chip device and related product |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9014569D0 (en) * | 1990-06-29 | 1990-08-22 | Univ London | Devices for use in neural processing |
-
1999
- 1999-02-02 PL PL99343114A patent/PL343114A1/en unknown
- 1999-02-02 CA CA002318502A patent/CA2318502C/en not_active Expired - Lifetime
- 1999-02-02 WO PCT/DK1999/000052 patent/WO1999040521A1/en active IP Right Grant
- 1999-02-02 AU AU22656/99A patent/AU756987B2/en not_active Ceased
- 1999-02-02 IL IL13733799A patent/IL137337A0/en unknown
- 1999-02-02 JP JP2000530867A patent/JP2002503002A/en active Pending
- 1999-02-02 NZ NZ506053A patent/NZ506053A/en unknown
- 1999-02-02 CN CNB998027618A patent/CN1227608C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA2318502C (en) | 2008-10-07 |
CN1290367A (en) | 2001-04-04 |
PL343114A1 (en) | 2001-07-30 |
AU756987B2 (en) | 2003-01-30 |
WO1999040521A1 (en) | 1999-08-12 |
CN1227608C (en) | 2005-11-16 |
AU2265699A (en) | 1999-08-23 |
IL137337A0 (en) | 2001-07-24 |
NZ506053A (en) | 2003-02-28 |
JP2002503002A (en) | 2002-01-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKEX | Expiry |
Effective date: 20190204 |