CA2316532A1 - Bare ic chip for multichip module, multichip module, electronic equipment and method for producing multichip module - Google Patents

Bare ic chip for multichip module, multichip module, electronic equipment and method for producing multichip module Download PDF

Info

Publication number
CA2316532A1
CA2316532A1 CA002316532A CA2316532A CA2316532A1 CA 2316532 A1 CA2316532 A1 CA 2316532A1 CA 002316532 A CA002316532 A CA 002316532A CA 2316532 A CA2316532 A CA 2316532A CA 2316532 A1 CA2316532 A1 CA 2316532A1
Authority
CA
Canada
Prior art keywords
bare
chips
chip
circuit board
main circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002316532A
Other languages
French (fr)
Inventor
Kazuhiko Sasahara
Takeshi Mikura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of CA2316532A1 publication Critical patent/CA2316532A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Facsimile Heads (AREA)

Abstract

A bare IC chip for a multichip module which can suppress a drop in yield due to a defect in the bare IC chip when the multichip module is produced, a multichip module, an electronic equipment and a method for producing the multichip module are provided.
A CCD bare IC chip (bare IC chip) which configures a reading module (multichip module) is provided with a first main circuit section including a plurality of first electrodes, and a second main circuit section including a plurality of second electrodes.
The reading module (multichip module) is provided with the CCD bare IC
chips (bare IC chips) having the first main circuit section including the plurality of first electrodes and the second main circuit section including the plurality of second electrodes.
An image reading device (electronic equipment) has the CCD bare IC chips (bare IC chips) of the mounted reading module (multichip module) provided with the first main circuit section including the plurality of first electrodes and the second main circuit section including the plurality of second electrodes.
The method of producing the reading module (multichip module) comprises a step of removing bonding wires from the first electrodes of the first main circuit section of a defective CCD bare IC chip (bare IC chip) and a step of connecting the second electrodes of the second main circuit section of the defective CCD bare IC chip (bare IC chip) to the printed circuit board by the bonding wires.

Description

BARE IC CHIP FOR MULTICHIP MODULE, MULTICHIP MODULE, ELECTRONIC EQUIPMENT AND
METHOD FOR PRODUCING MULTICHIP MODULE
BACKGROUND OF THE INVENTION
1. Field of the Invention The present invention relates to a bare IC chip for a multichip module which is mounted in multiple numbers on a single printed circuit board and electrically connected to the printed circuit board through bonding wires.
The present invention also relates to a multichip module in which a plurality of bare IC chips mounted on a single printed circuit board are electrically connected to the printed circuit board through bonding wires, and also to an electronic equipment which has the multichip module mounted thereon, and a method for producing the multichip module.
2. Description of the Related Art Fig. 9 shows a contact type reading sensor A which configures an image reading device such as a facsimile apparatus.
This reading sensor A is configured by having LED substrates E on which light sources (LEDs) D are mounted and a rod lens array F within a housing C
which supports a stage glass B and disposing a reading module H on a base plate G.
And, writing and image information to be read is read by the reading module H
through the stage glass B and the rod lens array F.
The reading module H is a multichip module which comprises a plurality of bare IC chips mounted on a single printed circuit board, and as shown in Fig.
10, a plurality of CCD bare IC chips J are mounted in line on the mounting surface of single printed circuit board I.
As shown in Fig. 11, the CCD bare IC chip J has multiple reading cells Jb arranged in line on the surface of a chip board Ja, and these reading cells Jb configure a reading section Js.
A control circuit Jc and multiple electrodes Jd are formed on the surface of the chip board Ja to configure a main circuit section Jm.
Multiple circuit board electrodes Ia which correspond to the respective electrodes Jd of each CCD bare IC chip J are formed on the surface of the printed circuit board I. Bonding wires K are ultrasonically connected to the respective electrodes Jd of the CCD bare IC chip J and the respective circuit board electrodes IAa of the printed circuit board I so to electrically connect the printed circuit board I with the respective CCD bare IC chips J.
As shown in Fig. 9, the respective CCD bare IC chips J and the respective bonding wires K are sealed (molded) with translucent resin L' The translucent resin L
is not shown in Fig. 10 and Fig. 11.
The aforesaid reading module (multichip module) H is produced according to the process shown in Fig. 12 (flow chart).
First, a bonding material such as silver paste or a thermosetting adhesive agent is supplied to the mounting surface of the printed circuit board I by a transferring or dispensing method (step a).
Then, the respective CCD bare IC chips J are mounted at predetermined positions on the printed circuit board I, and a thermosetting adhesive agent (bonding material) is thermally cured under pressure to fix the CCD bare IC chips J to the printed circuit board I (step b).
The respective electrodes Jd of the respective CCD bare IC chips J and the respective circuit board electrodes Ia of the printed circuit board I are electrically connected through the bonding wires K (step c).
Then, functions are inspected (step d), and if it is judged NG (defective), the printed circuit board I and the respective CCD bare IC chips J are discarded.
When it is judged OK (good article) by the functional inspection (step d), the translucent resin L is applied and thermally cured to seal the respective CCD
bare IC
chips J and the respective bonding wires K (step e).
Solder paste is applied to predetermined positions on the printed circuit board I (step ~, soldering parts are mounted at the predetermined positions on the printed circuit board I, and the soldering parts are soldered to the printed circuit board I in a reflow oven or the like (step g).
Then, the final functional inspection (step h) is performed, and the reading module H judged OK (good article) is taken out as a finished product. If it is judged NG (defective) by the final functional inspection (step h), it is judged whether or not the cause of the defect is in the CCD bare IC chips J (step i).
Here, when it is judged that the CCD bare IC chips have the cause of the defect, the reading module H is discarded.
When the cause of the defect is in any of the soldering parts or the soldered portions other than the CCD bare IC chips J, the pertinent soldering part is replaced or the pertinent soldered portion is corrected (step j) to complete the non-defective reading module H.
The CCD bare IC chips J configuring the aforesaid reading module H become defective and do not function normally if the inside circuit had a broken wire or a short-circuit to only a small extent.
Not only the aforesaid CCD bare IC chips J, but also various types of bare IC
chips have low single part yield as compared with a package IC due to levels, etc. of the production process and the functional inspection.
For this reason, with a reading module which has 16 CCD bare IC chips mounted on a printed circuit board, for example, when the single part yield of the CCD
bare IC chip is 99%, total yield of the 16 CCD bare IC chips drops to 85%.
Meanwhile, because the respective CCD bare IC chips J of the aforesaid reading module H are fixed to the printed circuit board I with the thermosetting adhesive agent in view of the connection (e.g., ultrasonic bonding) of the bonding wires K, it was hard to repair a defective bare IC chip even if it was found defective by the functional inspection (step d of Fig. 12).
Therefore, when malfunction is found by the functional inspection (step d of Fig. 12), many CCD bare IC chips J are discarded together with the printed circuit board I even if the cause of the malfunction was in a single CCD bare IC chip J. Thus, the yield was considerably lowered in the production of the reading modules H.
In view of the aforesaid circumstances, it is an object of the present invention to provide a bare IC chip for a multichip module which can minimize a drop of the yield in the production of multichip modules due to a defective bare IC chip, a multichip module, an electronic equipment, and a method for producing a multichip module.
SLTMMARY OF THE INVENTION
The bare IC chip for a multichip module according to a first aspect of the invention is a bare IC chip for a multichip module which is mounted in multiple numbers on a single printed circuit board and electrically connected to the printed circuit board through bonding wires, wherein the bare IC chip comprises a plurality of main circuit sections including electrodes connected to the bonding wires.
Because the bare IC chip configured as described above is provided with the plurality of main circuit sections, if one main circuit section had a defect, another main circuit section can be used instead of the defective main circuit section, and thus it is possible to avoid discarding of the multichip module in the production process.
Thus, according to the bare IC chip for a multichip module according to the first aspect of the invention, a drop in manufacturing yield of the multichip module can be minimized.
The multichip module according to a second aspect of the invention is a multichip module which has a plurality of bare IC chips mounted on a single printed circuit board, the respective bare IC chips being electrically connected to the printed _. .. 4....

circuit board through bonding wires, wherein each of the bare IC chips comprises a plurality of main circuit sections including electrodes to which the bonding wires are connected.
In the multichip module configured as described above, the bare IC chips have the plurality of main circuit sections, so that even if one of the main circuit sections were defective, another main circuit section can be used instead of the defective main circuit section, and thus it is possible to avoid discarding of the multichip module in the production process.
Thus, the multichip module according to the second aspect of the invention, a drop in manufacturing yield of the multichip module can be minimized.
An electronic equipment according to a third aspect of the invention is an electronic equipment having thereon a multichip module which has a plurality of bare IC chips mounted on a single printed circuit board, the respective bare IC
chips being electrically connected to the printed circuit board through bonding wires, wherein each of the bare IC chips of the multichip module comprises a plurality of main circuit sections including electrodes to which the bonding wires are connected.
In the electronic equipment configured as described above, the bare IC chips configuring the multichip module are provided with the plurality of main circuit sections, so that if one of the main circuit sections became defective, another main circuit section can be used instead of the defective main circuit section to avoid the multichip module from being discarded during its production process.
Thus, according to the electronic equipment of the third aspect of the invention, a drop in manufacturing yield of the multichip module can be minimized.
The method for producing the multichip module according to a fourth aspect of the invention is a method for producing a multichip module which has a plurality of bare IC chips mounted on a single printed circuit board, the respective bare IC chips being electrically connected to the printed circuit board through bonding wires, each of the bare IC chips comprising a plurality of main circuit sections including electrodes to which the bonding wires are connected, wherein the method comprises:
a step of mounting and fixing the respective bare IC chips at predetermined positions of the printed circuit board;
a step of electrically connecting the electrodes of a single main circuit section of the respective bare IC chips to the printed circuit board through the bonding wires;
a step of inspecting functions in a state that the respective bare IC chips are electrically connected to the printed circuit board;
a step of identifying a defective bare IC chip among the plurality of bare IC
chips when it is judged defective in the step of inspecting the functions;
a step of judging the identified defective bare IC chip whether or not has a cause of the defect is in the single main circuit section;
a step of removing the bonding wires from the electrodes of the single main circuit section when it is judged that the cause of the defect is in the single main circuit section; and a step of electrically connecting the electrodes of the other main circuit sections of the identified defective bare IC chip to the printed circuit board through the bonding wires. ______. ______-__ In the method for producing a multichip module configured as described above, the bare IC chips configuring the multichip module have the plurality of main circuit sections, so that even when one of the main circuit sections becomes defective, another main circuit section can be used instead of the defective main circuit section to avoid the multichip module from being discarded during its production process.
Thus, according to the method for producing the multichip module of the fourth aspect of the invention, a drop in manufacturing yield of the multichip module can be minimized.
BRIEF DESCRIPTION OF THE DRAWING
Fig. 1 is a perspective external view of a multichip module which has bare IC

chips of the present invention mounted thereon;
Fig. 2 is a plan view of the main portion of the multichip module shown in Fig.
1;
Fig. 3 is a flow chart showing a method for producing the multichip module shown in Fig. 1;
Fig. 4 is a plan view of the main portion of the multichip module shown in Fig.
l;
Fig. 5 is a perspective external view of a multichip module indicating another embodiment of the bare IC chip of the present invention;
Fig. 6 is a plan view of the main portion of the multichip module shown in Fig.
S.
Figs. 7 (a) and 7(b) are plan views of the bare IC chgp configuring the multichip module shown in Fig. 5;
Fig. 8 is a plan view of the main portion of the multichip module shown in Fig.
5;
Fig. 9 is a perspective external view in cross section of the main portion of a reading sensor using the multichip module;
Fig. 10 is a perspective external view of a multichip module which has conventional bare IC chips mounted thereon;
Fig. 11 is a plan view of the main portion of the multichip module which has the conventional bare IC chips mounted thereon; and Fig. 12 is a flow chart showing a method for producing the multichip module which has the conventional bare IC chips mounted thereon.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
The present invention will be described in detail with reference to the accompanying drawings showing embodiments.
Fig. 1 and Fig. 2 show a reading module (a multichip module according to the present invention) for a contact type reading sensor, configuring an image reading device (an electronic equipment according to the present invention), such as a facsimile apparatus, which has bare IC chips according to the present invention mounted thereon.
This reading module 1 is a multichip module which has a plurality of CCD
bare IC chips 3 mounted on the surface of single printed circuit board 2, and the respective CCD bare IC chips 3 are mounted in line on the surface of the printed circuit board 2.
The respective CCD bare IC chips 3 are electrically connected to the printed circuit board 2 by bonding wires 4 respectively, and the CCD bare IC chips 3 and the bonding wires 4 are sealed (molded) with an unillustrated translucent resin.
A reading sensor (not shown) which is comprised ogthe reading module 1 has a whole structure.which is basically the same to that of conventional reading sensor A
shown in Fig. 9 excepting the structure of the aforesaid reading module 1.
As shown in Fig. 2, the CCD bare IC chips 3 configuring the reading module 1 have multiple reading cells 3s arranged in line along the center of the surface of a chip board 3a. And a reading section 3S comprises these reading cells 3s.
Afirst main circuit section 3A1 and a second main circuit section 3A2 are disposed on the surface of the chip board 3a with the reading section 3 S
between them.
The first main circuit section 3A1 is comprised of a first control circuit 3b1 and multiple first electrodes 3c1, and the respective first electrodes 3c1 are arranged along one edge (the lower edge in the drawing) of the chip board 3a.
And, the second main circuit section 3A2 is comprised of a second control circuit 3b2 and multiple second electrodes 3c2, and the respective second electrodes 3c2 are arranged along the other edge (the upper edge in the drawing) of the chip board 3 a.
The first main circuit section 3A1 and the second main circuit section 3A2 are connected to the aforesaid reading section 3 S so to independently control the operation of the reading section 3 S.
A plurality of first electrodes Zcl corresponding to the respective first electrodes 3c1 on the respective CCD bare IC chips 3 and a plurality of second electrodes 2c2 corresponding to the respective second electrodes 3c2 on the respective CCD bare IC chips 3 are formed on the surface of the printed circuit board 2 with the chip board 3 a of the respective CCD bare IC chips 3 between them.
The respective first electrodes 3c1 ofthe first main circuit section 3A1 of the CCD bare IC chips 3 and the first circuit board electrodes 2c1 on the printed circuit board 2 have bonding wires 4 ultrasonically connected so to electrically connect the printed circuit board 2 with the respective CCD bare IC chips 3.
The reading module (multichip module) 1 having the aforesaid structure is produced according to the process shown in Fig. 3 (flow chaff).
Specifically, a bonding material such as silver paste or a thermosetting adhesive agent is applied onto the mounting surface of the printed circuit board 2 by a transferring or dispensing method (step 1).
Then, the respective CCD bare IC chips 3 are mounted at predetermined positions on the printed circuit board 2, and the thermosetting adhesive agent (bonding material) is thermally cured under pressure to fix the CCD bare IC chips 3 to the printed circuit board 2 (step 2).
Each CCD bare IC chip 3, which has the respective reading cells 3s of each reading section 3 S fixed in line, is fixed to the printed circuit board 2.
After each CCD bare IC chip 3 is fixed to the printed circuit board 2, the respective first electrodes 3c1 of the first main circuit section 3A1 of the respective CCD bare IC chips 3 and the respective first circuit board electrodes 2c1 on the printed circuit board 2 are electrically connected through the bonding wires 4 (step 3).
Then, a functional inspection (step 4) is performed, and when it is judged OK
(good article), a translucent resin is applied and thermally cured to seal (mold) the respective CCD bare IC chips 3 and the respective bonding wires 4 (step 5).

Meanwhile, when it is judged NG (defective) by the functional inspection (step 4), a defective CCD bare IC chip 3 is identified (step 4-1). And, it is judged whether the cause of the defect is in the first main circuit section 3A1 or not (step 4-2).
When it is judged in step 4-2 that the reading section 3 S has the cause of the defect, the reading module 1 being produced is discarded.
Meanwhile, when it is judged that the first main circuit section 3A1 has the cause of the defect, the bonding wires 4 are removed from the respective first electrodes 3c1 of the first main circuit section 3A1 on the identified CCD
base IC chip 3 and the respective circuit board side first electrodes 2c1 on the printed circuit board 2 (step 4-3).
Then, the respective second electrodes 3c2 of the second main circuit section 3A2 on the identified CCD bare IC chip 3 and the printed circuit side second electrodes 2c2 on the printed circuit board 2 are electrically connected through the bonding wires 4 as shown in Fig. 4 (step 3).
After the CCD bare IC chips 3 are connected again to the printed circuit board 2 in step 3, the translucent resin is applied and thermally cured to seal (mold) the respective CCD bare IC chips 3 and the respective bonding wires 4 (step 5).
As described above, even when it is judged NG (defective) by the functional inspection (step 4), if the first main circuit section 3 A1 of the CCD bare IC
chip 3 had the cause of the defect, the second main circuit section 3A2 of the CCD bare IC chip 3 is connected again to the printed circuit board 2. Thus, the reading module 1 can be produced continuously in the same way as the case that it was judged OK (good article) by the functional inspection (step 4).
Specifically, because the CCD bare IC chip 3 according to the invention has the first main circuit section 3A1 and the second main circuit section 3A2, if the first main circuit section 3A1 became defective, the second main circuit section 3A2 can be used instead of the first main circuit section 3A1. Thus, the judgment of a defect by the functional inspection (step 4) does not mean an immediate discarding of the reading module 1, and a drop in manufacturing yield of the reading module 1 can be minimized.
In an ordinary CCD bare IC chip (see Fig. 11), the main circuit section Jm of the chip board Ja has an area considerably larger than the reading section Js and a high wiring density. Therefore, it has a high defective generation rate.
Meanwhile, the CCD bare IC chip 3 according to the present invention is provided with the two main circuit sections (3A1, 3A2) for the single reading section 3S. Thus, a survival rate of the reading module 1 being produced can be raised, and a drop in manufacturing yield of the reading module 1 can be minimized.
To raise the survival rate of the CCD bare IC chip 3 for the occurrence of a defect, it is considered to provide a plurality of reading sections 3 S
together with the main circuit sections (3A1, 3A2).
But, the reading section 3S of the respective CCD bare IC chips 3, is required to be positioned linearly in order to make the reading module I function. When it is configured to selectively use the plurality of reading sections 3 S, the aforesaid layout of the reading section 3 S cannot be retained. Therefore, the CCD bare IC chip 3 of the embodiment is designed to have only one reading section 3 S.
In steps 4-1 and 4-2 following the functional inspection (step 4), even if the first main circuit section 3A1 of the plurality of CCD bare IC chips 3 had malfunction, it is easy to deal with the occurrence of a defect by using the second main circuit section 3A2 instead of the first main circuit section 3A1 on the CCD bare IC
chip 3 which was identified defective.
In step 5 of Fig. 3, after the respective CCD bare IC chips 3 and the respective bonding wires 4 are sealed (molded) with the translucent resin; solder paste is applied to predetermined portions of the printed circuit board (step 6), soldering parts are mounted at predetermined positions on the printed circuit board 2, and the soldering parts are soldered to the printed circuit board 2 in a reflow oven or the like (step 7).
Then, the final functional inspection (step 8) is performed, and the reading module 1 judged OK (good article) is taken out as a finished product.
Meanwhile, when it is judged NG (defective) by the final functional inspection (step 8), it is judged in step 8-lwhether or not the CCD bare IC
chip 3 has the cause of the defect.
When it is judged that the CCD bare IC chip 3 has the cause of the defect, the reading module 1 is discarded. When the cause of the defect is in a soldering part or a soldered portion other than the CCD bare IC chip 3, the soldering part is replaced or the soldered portion is corrected (step 8-2) to complete the reading module 1 as a conforming product.
As described above, with the reading module 1 employing the CCD bare IC
chip 3 according to the present invention, since the CCD bare IC chip 3 has the plurality of main circuit sections (3A1, 3A2), a drop in manufacturing yield during the production can be controlled as much as possible.
Fig. 5 to Fig. 8 show another embodiment of the reading module, with the bare IC chip of the present invention mounted thereon, in a contact type reading sensor which configures an image reading device such as a facsimile apparatus, etc.
As shown in Fig. 5, a reading module 10 is a multichip module which has a plurality of CCD bare IC chips 30 mounted on the surface of a single printed circuit board 20. The respective CCD bare IC chips 30 are mounted in line on the surface of the printed circuit board 20.
The respective CCD bare IC chips 30 are electrically connected to the printed circuit board 20 by bonding wires 40, and these CCD bare IC chips 30 and the respective bonding wires 40 are sealed (molded) with an unshown translucent resin.
As shown in Fig. 6, the CCD bare IC chips 30 configuring the reading module have a plurality of reading cells 30s arranged in line along an edge (the upper edge in the drawing) on the surface of a chip board 30a, and these reading cells 30s configure a reading section 305.
As shown in Figs. 7*a( and 7(b), a first main circuit section 30A1 and a second main circuit section 30A2 are disposed on the surface of the chip board 30a.
The first main circuit section 30A1 and the second main circuit section 30A2 are connected to the reading section 30S and configured to independently control the operation of the reading section 305.
As shown in Fig. 6 and Figs. 7(a) and 7(b), the first main circuit section is comprised of a first control circuit 30b1 and a plurality of first electrodes 30c1 formed on the surface of the chip board 30a .
The second main circuit section 30A2 is comprised of a second control circuit 30b2 and a plurality of second electrodes 30c2 formed on the surface of the chip board 30a.
The respective first electrodes 30c1 of the first main circuit section 30A1 and the respective second electrodes 30c2 of the second main circuit section 30A2 are arranged alternately along an edge (the lower edge of the drawing) on the surface of the chip board 30a.
On the other hand, as shown in Fig. 6, a plurality of circuit board side electrodes 20c are arranged on the surface of the printed circuit board 20 along the edge (the lower edge of the drawing) of the chip board 30a of the CCD bare IC
chip 30 in correspondence with the respective first electrodes 30c1 and the respective second electrodes 3Oc2 of the respective CCD bare IC chips 30.
These circuit board side electrodes 20c are formed on the printed circuit board 20 in the number (five in the embodiment) corresponding to the respective first electrodes 30c1 and the respective second electrodes 30c2 with respect to the respective CCD bare IC chips 30.
The respective first electrodes 30c1 of the first main circuit section 30A1 of the respective CCD bare IC chips 30 and the respective circuit board side electrodes 20c on the printed circuit board 20 are ultrasonically connected with the bonding wires 40. Thus, the printed circuit board 20 and the respective CCD bare IC chips 30 are electrically connected to one another.

The aforesaid reading module 10 is produced according to the process shown in Fig. 3 (flow chart) in the same way as the reading module 1 shown in Fig.
1.
Specifically, a bonding material is applied to the printed circuit board 20 (step 1), the respective CCD bare IC chips 30 are fixed to the printed circuit board 20 (step 2), and the respective first electrodes 30c1 of the first main circuit section 30A1 of the respective CCD bare IC chips 30 and the respective circuit board electrodes ZOc on the printed circuit board 20 are electrically connected through the bonding wires 40 as shown in Fig. 6 (step 3).
Then, the functional inspection (step 4) is performed, and when it is judged OK (good article), the respective CCD bare IC chips 30 and the respective bonding wires 40 are sealed (step 5).
When it is judged NG (defective) by the functional inspection (step 4), the defective CCD bare IC chip 30 is identified (step 4-1), and it is judged whether the first main circuit section 30A1 has the cause of the defect (step 4-2).
When it is judged in step 4-2 that the reading section 30S has the cause of the defect, the reading module 10 is discarded. And, when it is judged that the first main circuit section 30A1 has the cause of the defect, the bonding wires 40 are removed from the respective first electrodes 30c of the first main circuit section 30A1 of the identified CCD bare IC chip 30 and the respective circuit board side electrodes 20c on the printed circuit board 20 (step 4-3).
Then, the respective second electrodes 30c2 of the second main circuit section 30A2 of the identified CCD bare IC chip 30 and the respective circuit board side electrodes 20c on the printed circuit board 20 are electrically connected to one another through the bonding wires 40 as shown in Fig. 8 (step 3), the CCD bare IC chip 30 is connected again to the printed circuit board 20, and the CCD bare IC chip 30 and the respective bonding wires 40 are sealed (step 5).
Then, solder paste is applied to the printed circuit board 20 (step 6), soldering parts are soldered to the printed circuit board 20 (step ~, and the reading module 10 which is judged OK (good article) by the final functional inspection (step 8) becomes a finished product.
On the other hand, when it is judged NG (defective) by the final functional inspection (step 8) and it is judged in step 8-1 that the CCD bare IC chip 30 has the cause of the defect, the reading module 10 is discarded. And, when it is judged that the cause of the defect is in the soldering parts or the soldered portions, the soldering parts are replaced or the soldered portions are corrected (step 8-2) to complete the reading module 10.
As described above, the reading module 10 which adopts the CCD bare IC
chip 30 according to the present invention has the plurality of main circuit sections (30A1, 30A2) on the CCD bare IC chip 3 in the same way as the aforesaid reading module 1 which adopts the CCD bare IC chip 3 of the presen'1 invention.
Therefore, a drop in manufacturing yield can be minimized.
The CCD bare IC chip 30 according to the present invention has the respective first electrodes 30c1 and the respective second electrodes 30c2 formed along one edge of the chip board 30a. And, the first main circuit section 30A1 or the second main circuit section 30A2 of the CCD bare IC chip 30 is connected to the printed circuit board 20 through the respective circuit board side electrodes 20c formed on the printed circuit board 20.
Specifically, the printed circuit board 20 of the reading module 10 which adopts the CCD bare IC chip 30 according to the present invention shares the respective circuit board side electrodes 20c. Thus, it is possible to realize a compact printed circuit board 20, a simple production process, and a simple wire bonding device.
In the aforesaid embodiments, the CCD bare IC chips for optical reading which configures the reading module were exemplified as the bare IC chip for the multichip module according to the invention, however, the invention is not limited only to the CCD bare IC chips but can also be effectively applied to various types of lb bare IC chips for optical reading, such as CMOS bare IC chips.
And, the bare IC chip for multichip modules according to the present invention can be applied effectively to not only the CCD bare IC chip for optical reading configuring the reading module but also to a bare IC chip configuring a print head of a print module of a printing device.
Besides, the bare IC chip for a multichip module according to the present invention can be effectively applied to not only the bare IC chip configuring a reading module, a printing module or the like but also to various types of bare IC
chips such as FROM (flash ROM) or PROM (programmable ROM) on a printed circuit board which configures a multichip module for a digital portable telephone set, for example.

Claims (8)

1. A bare IC chip for a multichip module which is mounted in multiple numbers on a single printed circuit board and electrically connected to the printed circuit board through bonding wires, wherein the bare IC chip comprises:
a plurality of main circuit sections including electrodes connected to the bonding wires.
2. The bare IC chip for a multichip module according to claim 1, wherein the bare IC
chip comprises the plurality of the main circuit sections and a reading section comprised of a plurality of reading cells.
3. A multichip module which has a plurality of bare IC chips mounted on a single printed circuit board, the respective bare IC chips being electrically connected to the printed circuit board through bonding wires, wherein:
each of the bare IC chips comprises a plurality of main circuit sections including electrodes to which the bonding wires are connected.
4. The multichip module according to claim 3, wherein each of the bare IC
chips comprises the plurality of main circuit sections and a reading section comprised of a plurality of reading cells.
5. An electronic equipment having thereon a multichip module which has a plurality of bare IC chips mounted on a single printed circuit board, the respective bare IC chips being electrically connected to the printed circuit board through bonding wires, wherein:
each of the bare IC chips of the multichip module comprises a plurality of main circuit sections including electrodes to which the bonding wires are connected.
6. The electronic equipment according to claim 5, wherein each of the bare IC
chips of the multichip module comprises the plurality of main circuit sections and a reading section comprised of a plurality of reading cells.
7. The electronic equipment according to claim 6, wherein the electronic equipment is an image reading device.
8. A method for producing a multichip module which has a plurality of bare IC
chips mounted on a single printed circuit board, the respective bare IC chips being electrically connected to the printed circuit board through bonding wires, each of the bare IC chips comprising a plurality of main circuit sections including electrodes to which the bonding wires are connected, wherein the method comprises:
a step of mounting and fixing the respective bare IC chips at predetermined positions of the printed circuit board;
a step of electrically connecting the electrodes of a single main circuit section of the respective bare IC chips to the printed circuit board through the bonding wires;
a step of inspecting functions in a state that the respective bare IC chips are electrically connected to the printed circuit board;
a step of identifying a defective bare IC chip among the plurality of bare IC
chips when it is judged defective in the step of inspecting the functions;
a step of judging the identified defective bare IC chip whether or not has a cause of the defect is in the single main circuit section;
a step of removing the bonding wires from the electrodes of the single main circuit section when it is judged that the cause of the defect is in the single main circuit section; and a step of electrically connecting the electrodes of the other main circuit sections of the identified defective bare IC chip to the printed circuit board through the bonding wires.
CA002316532A 1999-08-24 2000-08-23 Bare ic chip for multichip module, multichip module, electronic equipment and method for producing multichip module Abandoned CA2316532A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP23707899 1999-08-24
JP237078/1999 1999-08-24

Publications (1)

Publication Number Publication Date
CA2316532A1 true CA2316532A1 (en) 2001-02-24

Family

ID=17010098

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002316532A Abandoned CA2316532A1 (en) 1999-08-24 2000-08-23 Bare ic chip for multichip module, multichip module, electronic equipment and method for producing multichip module

Country Status (1)

Country Link
CA (1) CA2316532A1 (en)

Similar Documents

Publication Publication Date Title
US7166907B2 (en) Image sensor module with substrate and frame and method of making the same
CA2571345C (en) System and method for mounting an image capture device on a flexible substrate
US6862190B2 (en) Adapter for plastic-leaded chip carrier (PLCC) and other surface mount technology (SMT) chip carriers
US6287949B1 (en) Multi-chip semiconductor chip module
US6268231B1 (en) Low cost CCD packaging
CN100527392C (en) Wiring substrate, solid-state imaging apparatus using the same, and manufacturing method thereof
US20090001365A1 (en) Memory card fabricated using sip/smt hybrid technology
US20070108561A1 (en) Image sensor chip package
JP2009088510A (en) Glass cap molding package, method for manufacturing thereof, and camera module
JP2007259459A (en) Camera module and manufacturing method thereof, and printed circuit board for camera module
KR100557140B1 (en) Connector and image sensor module using the same
KR100906841B1 (en) Camera module and method for manufacturing the same
JP5455028B2 (en) Circuit board structure
CN114784032A (en) Camera module, image acquisition module and processing method of base of image acquisition module
KR100741832B1 (en) Base plate containing flexible printed circuit board array
JPH09246602A (en) Light emitting diode array light source
JP2004260155A (en) Leadless lead frame electronic package and sensor module incorporating the same
JP3926724B2 (en) Receptacle type optical transmission / reception module and receptacle type optical transmission / reception module
CA2316532A1 (en) Bare ic chip for multichip module, multichip module, electronic equipment and method for producing multichip module
KR100613419B1 (en) Image Sensor Module and the product method thereof
JP2001135774A (en) Bare ic chip for multichip module, the multichip module, electronics and method of manufacturing the multichip module
KR101294428B1 (en) Camera Module Assembly
US6828543B1 (en) Flip chip package structure for an image sensor and an image sense module with the flip chip package structure
US7868334B2 (en) Semiconductor light emitting device
KR100538145B1 (en) Module with different boards and method for assembly the module

Legal Events

Date Code Title Description
EEER Examination request
FZDE Dead