CA2114278A1 - Data monitoring apparatus and method - Google Patents

Abstract

A data signal capturing interface permits a personal computer to be used for displaying data transmitted between other devices at a speed such as 125,000 baud. This interface forms part of a data scope that further comprises: a connector cable for connecting into the data transmission system so that the data signals are also communicated through the connector cable to the data signal capturing interface that is connected to the connector cable, and a personal computer connected to the data signal capturing interface for displaying data signals stored in the data signal capturing interface. A
method of monitoring data signals transmitted between at least two devices over a local area network cable connecting the devices at an oil or gas well site comprises: copying transmitted data signals into a memory at the well site at a speed at least equal to a speed at which the data signals are transmitted on the local area network cable; and displaying at the well site on a monitor of a personal computer representations of the copied data signals.

Description

^ -- 211427~
DATA llO~ OKING APPARATUS AND METHOD
Backqround of the Invention This invention relates generally to data monitoring apparatus and methods. This invention relates more particularly, but not by way of limitation, to a data scope and method for copying and displaying data transmitted at 125 kilobaud over a local area network cable at an oil or gas well site to enable a user to confirm proper data transfer between two or more devices in the network or to detect and troubleshoot improper data transfer.
Typically during the development of an oil or gas well, various conditions are monitored by sensors and transducers which represent the magnitudes of sensed conditions with electrical signals. Examples of monitored conditions include density and flow rate of a fluid, such as a fracturing fluid or a cement slurry, being mixed at the well site preparatory to being pumped into the well. The representative electrical signals can be processed through microprocessor-based devices used at the well site such as to store data about the conditions or to control operations (e.g., a fluid or slurry mixing operation).
For at least some of these applications, Halliburton Services uses a local area network at a well site. This network includes two or more microprocessor-based devices (e.g., UNI-PRO II and COMPUPAC computers) connected by a local area network cable. Communications between devices use a suitable known protocol, such as Halliburton ILAN protocol, to provide for organized transmissions so that data can be 211~278 transferred accurately from one device to another. In the particular Halliburton Services local area network using ILAN
protocol, transmissions of data over the local area network cable occur at 125,000 baud (125 kilobaud).
Although the equipment within the local area network is reliable and the protocol provides for organized and accurate data transmissions, malfunctions can still occur. Whether these occur because of sending, receiving or connecting hardware problems or programming problems can be hard to determine. For example, in one case analytical reasoning led to a conclusion that a certain component of the network was at fault; however, after three weeks of debugging and flying in an engineer from the company providing the component, the problem was not solved. Only after a debug program happened across the actual problem (which it was not looking for), was the actual problem found.
This time consuming study likely could have been avoided if there had been a way to look directly at the data as it was being transferred. Given the known protocol, such a direct look at the data could have more quickly led one to the source of the problem. Thus, there is the need for an apparatus and method for monitoring data transmitted between two or more devices. Although there are RS-232 protocol data scopes that are operable up to 115.2 kilobaud and dedicated token ring and Ethernet units operable for transmission speeds above 4 megabaud, we are not aware of a data monitoring apparatus or method that displays, through the display screen of a personal - 211~27~

computer, data transmitted at 125 kilobaud in a local area network at an oil or gas well.
SummarY of the Invention The present invention overcomes the above-noted and other shortcomings of the prior art by providing a novel and improved data monitoring apparatus and method. In a particular implementation, the invention provides a tool for viewing data that travels on an ILAN data transmission cable at an oil or gas well site. The invention displays the ILAN
data through the display screen of a personal computer so that the user can immediately view the data transfer to determine quickly whether there is a problem, and if so, what the possible source is. Thus, the present invention is useful for debugging problems or finding potential problems occurring during data transfer between devices communicating over a local area network cable using a known protocol.
The present invention more generally provides a data scope, comprising: connector means for connecting into a data transmission system, which system has at least two devices between which data signals are communicated, so that the data signals are also communicated through the connector means;
data signal capturing means, connected to the connector means, for receiving and storing data signals communicated through the connector means; and a personal computer connected to the data signal capturing means for displaying data signals stored in the data signal capturing means.

- 211~278 Pertaining to the data signal capturing means, the present invention provides an apparatus for enabling a personal computer to obtain data from a data transmission cable connecting at least two devices, wherein the personal computer has a personal computer microprocessor with a data bus. This apparatus comprises: input means for receiving data from the transmission cable; an apparatus microprocessor connected to the input means; a data memory connected to the apparatus microprocessor and the input means; a program memory connected to the apparatus microprocessor, the program memory programmed with means for operating the apparatus microprocessor to transfer data received by the input means to the data memory without communicating any signal onto the transmission cable; and means for connecting the data memory directly to the data bus of the personal computer microprocessor so that the personal computer microprocessor can directly access data stored in the data memory.
The present invention also provides a method of enabling a personal computer to display data communicated over a data transmission cable between at least two devices, wherein the personal computer has a personal computer microprocessor with a data bus. This method comprises: connecting a data signal capturing interface to the data transmission cable so that the data signals are also communicated to the data signal capturing interface; receiving and storing data signals in the data signal capturing interface; and transferring stored data signals into the personal computer from the data signal -- 211~278 capturing interface for displaying data signals through a display screen of the personal computer.
The present invention further provides a method of monitoring data signals transmitted between at least two devices over a local area network cable connecting the devices at an oil or gas well site, the method comprising: copying transmitted data signals into a memory at the well site at a speed at least equal to a speed at which the data signals are transmitted on the local area network cable; and displaying at the well site on a monitor of a personal computer representations of the copied data signals.
Therefore, from the foregoing, it is a general object of the present invention to provide a novel and improved data monitoring apparatus and method. Other and further objects, features and advantages of the present invention will be readily apparent to those skilled in the art when the following description of the preferred embodiment is read in conjunction with the accompanying drawings.
Brief DescriPtion of the Drawin~s FIG. 1 is a pictorial block diagram of the apparatus of the present invention connected to a local area network at an oil or gas well site.
FIG. 2 is a schematic drawing of a connector of the present invention by which connection to the local area network is made.
FIGS. 3A-3D are schematic circuit diagrams of a data signal capturing interface of the present invention.

211~278 FIG. 4 is a flow chart of the operation of the present nvent lon .
Detailed DescriPtion of Preferred Rmhodiment Referring to FIG. 1, the present invention is used to monitor data transmissions within a data transmission system 2 having at least two- devices 4, 6 connected by a data transmission link 8. In a specific implementation, the device 4 is a UNI-PRO II computer, the device 6 is a COMPUPAC
computer and the cable 8 is a multiconductor cable to which the devices 4, 6 are connected; all of these devices are provided by Halliburton Services, Duncan, Oklahoma. This particular system is used at oil or gas well sites for receiving, storing and using data generated from sensors or transducers (not shown) connected to one or more of the UNI-PRO II devices. Serial data transmissions between devices 4, 6 over the cable 8 utilize ILAN protocol (which is a non-RS-232 protocol) and are made at 125 kilobaud in this particular implementation.
To monitor such data transmissions, the present invention provides a data scope 10. The data scope 10 comprises connector means 12 for connecting the data scope 10 into the data transmission system 2 so that the data signals transferred over the cable 8 between the devices 4, 6 are also communicated into the data scope 10 through the connector means 12. Connected to the connector means 12 and forming another part of the data scope 10 is data signal capturing means 14 for receiving and storing data signals communicated through the connector means 12. The data signal capturing means 14 provides the interface between the connector means 12 and a personal computer 16 which forms still another part of the data scope 10 and which displays data signals stored in the data signal capturing means 14. In the preferred embodiment depicted in FIG. 1, the interface 14 is connected to the personal computer 16 within a housing of the personal computer 16.
As also depicted in FIG. 1, the connector means 12 of the preferred embodiment is an electrically conductive cable having one end connected to the data signal capturing interface 14 and another end connected as a branch from a coupling 18 in the COMPUPAC device 6. The coupling 18 connects a terminal 19 of the COMPUPAC device 6 receiving the transmission cable 8 to a conventional ILAN module 20 which is referred to further hereinbelow.
A particular implementation of the cable 12 and the coupling 18 are shown in FIG. 2. The coupling 18 is conventional for the particular system 2 described above and thus will not be further described other than to note it provides both an end plug 26 that connects to ILAN module 20 and an end plug 22 that interfaces to the transmission cable 8. The cable 12 as shown in FIG. 2 has six conductors that extend from adjacent the plug 22 to a plug 24 that connects to the data signal capturing interface 14. The type of signals communicated over the cable 12 are designated by the labeling in FIG. 2. The conductors of the cable 12 can be of any 211~278 suitable length so that the personal computer 16 and the data signal capturing interface 14 housed therein can be spaced from the data transmission system 2 to allow for remotely monitoring the data transmissions that occur over the transmission cable 8.
As mentioned above, the plug 24 of the cable 12 connects to the data signal capturing interface 14. More specifically, it connects to a serial input circuit 28 of the interface 14 as shown in FIG. 3D. The circuit 28 receives data transmission system serial data from the connected cable 12.
With the illustrated Z80 SIO chip of the circuit 28 shown in FIG. 3D, "flags" in the transmitted data of the system 2 are filtered out; however, it is contemplated that another type of serial receiver allowing for the flags to be retained can be used (e.g., an 85230 serial input/output device).
The interface 14 also includes a data signal capturing control microprocessor 30 (FIG. 3C) that is connected to the serial input circuit 28. The interface 14 further comprises a data memory 32 (FIGS. 3A and 3B) connected to the data signal capturing control microprocessor 30 and the serial input circuit 28. In the illustrated embodiment this is a dual port random access memory (RAM). Providing storage space for the program that operates the microprocessor 30 is a program memory 34 implemented in the particular embodiment by an erasable programmable read only memory (EPROM) (FIG. 3B) connected to the data signal capturing control microprocessor 30. As will be further described below, the program memory 34 - 211~278 is programmed with means for operating the data signal capturing control microprocessor 30 to transfer data received by the serial input circuit 28 to the data memory 32 without communicating any signal onto the cable 12 and into the data transmission system 2. The foregoing (including one port of the dual port memory 32) are connected by internal address and data buses and control lines as depicted in FIGS. 3B-3D.
FIG. 3A shows means for connecting the other port of the data memory 32 directly to the data bus, the address bus and control lines (identified in FIG. 3A) of a microprocessor 36 (FIG. 1) of the personal computer 16 so that the personal computer microprocessor 36 directly accesses data stored in the data memory 32. Included within this means is a programmable logic device (PLD) 37. The PLD 37 functions as an address decoder by which the personal computer 16 accesses the personal computer or display side of the dual port random access memory 32. The listing of the PLD programming for a particular implementation of the present invention is shown in Appendix A forming a part of this specification.
As shown in FIG. 1, the interface 14 of the preferred embodiment further includes means for mounting inside the personal computer 16. This includes a circuit board 39 on which the components shown in FIG. 3 are mounted, and it also includes a housing 41 in which the circuit board 39 is disposed.
The previously described elements (and the others shown in FIG. 3) of the data signal capturing interface 14 are the - 211427~

same as in the conventional ILAN module 20 in the device 6 of FIG. 1, except that a differently programmed program memory 34 and PLD 37 are used in the present invention. With such new programming, the interface 14 provides an apparatus for enabling the personal computer 16 to obtain data from the data transmission cable 8.
The listing of a specific implementation of the program loaded in the program memory 34 of the data signal capturing interface 14 is set forth in Appendix B forming a part of this specification. One skilled in the art can readily follow the program, but a brief overview of it is given here. The following operations of the program are implemented by the functional relationship between the program in the memory 34 and its application via the microprocessor 30.
The program listed in Appendix B initially sets up various ports of the data signal capturing interface 14.
This portion of the listing continues through page B6.
The "handshake with application" portion on page B7 of the listing is used in establishing communication with the personal computer 16. During this portion of the program, the interface 14 receives instructions from the personal computer 16 as to whether all traffic or data only is to be captured. In the present preferred embodiment, the "data only mode" is the only one implemented; however, it is contemplated that the "all traffic mode" will be useful in multimaster communications subsequently referred to.

- ~2111278 The "monitor mode loop" on pages B8 and B9 of the listing in Appendix B controls the transfer of the received data from the serial input circuit 28 to the dual port random access memory 32.
The "subroutines/interrupt service routines" portion of this program controls how the serial input circuit 28 captures and verifies data received through the cable 12 from the data transmission cable 8. In the particular implementation, the serial input circuit 28 synchronizes on the "flags" sent in the transmissions of the system 2, but these "flags" are filtered out in the present embodiment as explained above.
When the serial input circuit 28 senses that capturable data is coming as indicated by the sensed "flags", the serial input circuit 28 begins collecting the serially transmitted data and verifying, such as by 16-bit CRC checksum, that the data is valid. If it is, the serial input circuit 28 signals the microprocessor 30 to transfer the data to the memory 32 under control of the aforementioned "monitor mode loop".
When data has been stored in the memory 32, the microprocessor 30 sets the busy line of the memory 32 (line "3" in FIG. 3A), which notifies the personal computer 16 that data is ready for display.
In the presently described embodiment, the present invention monitors only one channel of data; however, it is contemplated that the present invention can be readily adapted to accommodate two or more channels of data being transmitted within the system 2.

211~278 The foregoing provides an implementation of the first two steps of the flow chart shown in FIG. 4. That is, under control of the program in the memory 34 of the data signal capturing interface 14, the interface 14 gets binary ASCII
data from communication system 2 without sending data back onto the system 2; and the interface 14 also stores the binary ASCII data in the dual port random access memory 32 through the port thereof on the communication system side of the interface 14 (i.e., the side shown in FIG. 3B).
Referring now to the personal computer 16, it can be any suitable conventional device within the class of computers known in the art as "personal computers" without limitation as to the type of operating system used. In the preferred embodiment it is preferably an XT model or higher. One specific implementation is a DOS-operating system GRiD 1500 series laptop computer with expansion port to which the interface 14 is connected. Regardless of the specific type used, the personal computer 16 comprises, as is well known, one or more microprocessor 36 (FIG. 1), one or more display screen 38 (such as a cathode ray monitor or liquid crystal display), and one or more memory 40 connected to the microprocessor 36. In the preferred embodiment, the memory 40 is programmed for operating the microprocessor 36 to retrieve a data signal in binary format from the data signal capturing interface 14, convert the retrieved binary ASCII data signal to hexadecimal format, and display the converted hexadecimal data signal through the display 38. These components of the personal computer 16 are interconnected by data bus 42 of the personal computer 16 (and an address bus and control lines as known and as identified along the connector strip shown in FIG. 3A). The data bus 42 interconnects the microprocessor 36, the display 38 and the data signal capturing means 14 so that data signals stored in the dual port random access memory 32 of the data signal capturing means 14 are communicated therefrom over the data bus 42 to the display 38. This maximizes the throughput speed from the memory 32 to the display 38 and allows the personal computer 16 to keep up with the speed of the data transmission system 2 (thus, the interface 14, by which high speed data acquisition occurs, and direct connection thereof to the data bus of the personal computer are important features of the present invention).
The personal computer 16 is conventional in all respects except for its programming in accordance with the present invention. Such programming can be from a diskette (e.g., a 3.5-inch diskette) inserted into a suitable drive of the personal computer 16. In the particular implementation of the present invention's program for the personal computer 16, the program, once loaded and initiated to run, generates instructions displayed on the display 38 to guide an operator's use of the overall invention.
As the program is executed, the user at the personal computer 16 will be prompted to enter a monitoring mode (provided no startup errors occur). The "all traffic" mode will display all activity occurring on the ILAN transmission "_ 21t~278 cable 8 of the particular implementation. This includes both data and tokens (when used). Tokens are used during the implementation of the multimaster communications to provide a way for a computer of the communication system 2 to use the transmission cable 8 while preventing data collisions. These tokens are passed continually on the cable 8 until data is transferred. The "data only" mode does just that, transferring only data by filtering all tokens. Only the latter mode is implemented at present.
After selecting the mode, the data scope display screen 38 will show keyboard options at the bottom of the screen.
The options are "ESCAPE" for quitting the program and "C" to clear the screen. The version number of the program memory 34 of the interface 14 will be seen in the lower right corner of the screen.
The monitored data sensed from the cable 8 through the cable 12 will scroll in the middle of the display 38 and overwrite itself in a top to bottom fashion. There may be initial data on the screen which may be discarded by pressing "C". All data is displayed in hexadecimal format in the particular implementation, but other forms can be used.
Because information travels quickly, the "PAUSE" key may be used to halt the display; however, this does not halt ILAN
communications over the cable 8 or into the interface 14, wherein data is stored in the memory 32 and then overwritten by subsequently received data. To display further data, press the "ENTER" key.

Referring specifically to the listing of the program for the memory 40 of the personal computer 16 set forth in Appendix C forming a part of this specification, this personal computer application program performs an initialization routine having such functions as setting up variables and the buffer size, clearing the display screen, setting up a screen format, handshaking with the interface 14, and setting memory maps. In doing this, it sends instructions used by the microprocessor 30 of the interface 14 (e.g., whether in "all traffic" or "all data" mode if both are implemented).
Of particular importance is the "while (1)" portion of the program set forth on page C5 of Appendix C. This portion collects an array of binary data from the dual port random access memory 32. In the particular implementation, an array equals the number of eight-bit bytes stored in the memory 32 of the interface 14. Each byte is split into two four-bit pieces, each of which is converted to its respective hexadecimal form. This hexadecimal representation is then displayed through the display 38. This data retrieval, conversion and display occurs solely over the data bus 42 of the personal computer 16 and within the registers defined by the program software and the microprocessor 36 to minimize the transfer time from the memory 32 to the display 38. In essence, the binary ASCII data stored in the memory 32 is converted to hexadecimal form and displayed on the fly. This enables the personal computer 16 to keep up with the 125 kilobaud rate of the particular implementation of the data transmission system 2.
The binary data that is received from the transmission system 2 is in command and response packets. That is, a command is issued from one of the devices 2,4 and a response is issued from the other of the devices 2,4. In the particular implementation of the present invention, when these commands and responses are displayed through the personal computer 16, they are shown in opposite video formats to be readily distinguishable. For example, a command can be displayed in reverse video and a response in standard video, or vlce versa.
In summary, the program in the memory 40 of the personal computer 16 controls the personal computer 16 to retrieve, in real time at communication system speed, stored data from the display side of the dual port random access memory 32 and convert the retrieved data to a desired format (e.g., from ASCII to hexadecimal) on the way to displaying the data in such format as indicated in the flow chart of FIG. 4.
The previously described components and programs are used in performing the preferred embodiment method of the present invention, namely a method of enabling a personal computer to display data communicated over a data transmission cable between at least two devices, wherein the personal computer has a personal computer microprocessor with a data bus. This method comprises: connecting the data signal capturing interface 14 to the data transmission cable 8 (via the cable ~114278 12 in the FIG. 1 implementation) so that the data signals are also communicated to the data signal capturing interface 14;
receiving and storing data signals in the data signal capturing interface 14; and transferring stored data signals into the personal computer 16 from the data signal capturing interface 14 for displaying data signals through the display screen 38 of the personal computer 16. Preferably, the data signals are communicated to the data signal capturing interface 14 without the data signal capturing interface 14 communicating signals back to the data transmission cable 8.
In the particular implementation, transferring the data includes retrieving onto the data bus 42 of the personal computer 16 a data signal in binary ASCII format from the data signal capturing interface 14, converting the retrieved binary ASCII data signal to hexadecimal format, and communicating the converted hexadecimal data signal over the data bus 42 for display through the display 38.
As to the specific use to which the embodiment described above is intended to be put to use at an oil or gas well site, the present invention provides, again using the previously described components and programs in the preferred embodiment, a method of monitoring data signals transmitted between at least two devices over a local area network cable connecting the devices at an oil or gas well site. This method is defined to include: copying transmitted data signals into the memory 32 at the well site at a speed at least equal to a speed at which the data signals are transmitted on the local 211~278 area network cable 8; and displaying at the well site on the display 38 of the personal computer 16 representations of the copied data signals. In the preferred embodiment, the speed at which the data signals are transmitted on the local area network cable 8 is greater than 115.2 kilobaud rate which RS-232 data monitors can achieve and less than the 4 megabaud (and greater) rate for which token ring and Ethernet data scopes are intended. In the particular implementation described, the speed at which the data signals are transmitted on the local area network cable 8 is 125 kilobaud. The maximum speed of the particular implementation of the present invention is presently about 180 kilobaud, but it is contemplated that an overall operating range can be from above 115.2 kilobaud to below 500 kilobaud. Copying the transmitted data signals preferably includes sensing the transmitted signals on the local area network cable 8 without inputting other signals onto the local area network cable 8. Displaying on the display 38 of the personal computer 16 preferably includes: communicating copied data signals in binary ASCII
format from the memory 32 directly onto the data bus 42 of the microprocessor 36 of the personal computer 16; converting the communicated copied data signals from binary ASCII format to hexadecimal format; and activating the display 38 of the personal computer 16 with the converted data signals transferred directly thereto over the data bus 42.
Thus, the present invention is well adapted to carry out the objects and attain the ends and advantages mentioned above as well as those inherent therein. While a preferred embodiment of the invention has been described for the purpose of this disclosure, changes in the construction and arrangement of parts and the performance of steps can be made by those skilled in the art, which changes are encompassed within the spirit of this invention as defined by the appended claims.

2~
CA21 1 ~2,~a APPENDIX A

~A21 142~

NAME LAN_mon;
PARTNO ane ;
REVISION 01 ;
DATE 03-16-92 ;
DESIGNER Doug Fletcher ;
ASSEM8LY Grld Ilan ;
COMPANY HALLIBURTON SERVICES ;
LOCATION U4 ;
DEVICE P16L8 ; /~ verlfy-22/17, 4elect EL 70.02349~/

/~ Allowable Target Devlce Types: MMI 16L8,TI tlcpall618-55 ~/

/~ Inputs ~/
PIN 2 = a8 PIN 3 = sl4 PIN 4 = a9 PIN 5 = al3 PIN 6 = alO
PIN 7 = al2 PIN 8 = al5 PIN 11 = al6 PIN 13 = al7 PIN 15 = al8 PIN 17 = al9 /~ Outputs ~/
PIN 12 = nc2 ;
PIN 14 = c~bo ;
PIN 16 = BA9 ;
PIN 18 = BA8 ;
PIN 19 = csc6 ;
/~ Loqlc Equatlons ~/
csc6 = lal9 # lal8 # al7 # al6 # al5 # lal4 # lal3 t al2;
nc2 = alO;
B~9 = a9;
BA8 = a8;
c~bo = lal9 # al8 # lal7 # lal6 # al5 # al4 # al3 # al2;

2~
- _ ~A2 11 421~

APPENDIX ~

2~
~A21 1427~

; STANDARD FOR HAL. dURTON SERVICES DATA COMML _CATIONS
, I L A N II

; PURPOSE: IIJ~ OR ILAN TRAFFIC.
; PROGR~MMER: Doug Kehn ; 11-16-91/rd~ INITIAL CREATION
; REFERENCES:
; 1. MARK SLAGLE (ERD) ; 2. "MIu~uPRO~SSOn APPLICATIONS REFERENCE BOOK"
; ~VOL 1) JULY 1981 (ZILOG INC., 1981) ; 3. "Z80 A~SFr'~T-Y LA _ '~F PROGRAMMING" by LANCE A. L~v~hlr~AL;
; (OSBORNE/McGRAW-HILL, 8ERKELEY, CA 1979) ; 4. "MI~OPRO~ESSORS VOL. 1 - 8 eIT MPUs h MCU~" ;
; (TOSHIBA AMERICA, INC. JANUARY 1987) ; 5. "HIGH PERFORMANCE CMOS DATA BOOK SUPPLEMENT 1989"
; (INTEGRATED DEVICE TECHNOLOGY 1989) ; 6. "HALLIBURTON STANDARD FOR DATA COMMUNICATIONS ILAN"
; (PROPOSED), HALLIBURTON STANDARD 000.00000, ; JUNE 3, 1991 , VERSION ID NUMBER
; DENOTES THE CURRENT REVISION NUMBER (ID) OF THE MULTI-; MASTER ILAN CODE.
; FORMAT: MOYR
, e.g. 0191 = JANUARQ 1991 REVISION
IDNUM: EQU 1191H

, SIO PORT IDENTIFIERS AND SYSTEM ADDRESS BUS ADDRESSES
SIODA: EQU 00H ;SIO DATA REGISTER A
SIODB: ErU SIODA+1 ; " " ~ ~
SIOCA: EIU SIODA+2 ;SIO CONTROL REGISTER A
SIOCB: E~U SIODA+3 ; " " " 8 ; SIO COMMAND IDENTIFIERS AND VALUES
,~ SIO REGISTER POINTERS
R0: ECU 00H
R1: ECU 01H
R2: E~U 02H
R3: EQU 03H
R4: EQU 04H
R5: EQU 05H
R6: ECU 06H
R7: EQU 07H

,~ WR0 COIIllA..JS
NC: EQU 00H ;NULL CODE
SA: EOU 08H :SEND ABORT /SDLC~ B /

2Ll (~A21142~tg RESI: EI~U 10H ;RESET EXT/STAT INT
CHRST: E U 18H ;t.~NNRL RESET
EIONRC: E~U 20H ;ENA8LE INT ON NEXT h. CHAR
RTIP: E~U 28H ;RESET TX INT PENDING
ER: EIU 30H ;ERROR RESET
RFI: EIU 38H ;RETURN FROM INT
RRCC: EtU 40H ;RESET RX CRC Ln~kn RTCG: EIU 80H ;RESET TX CRC GENERATOR
RTUEL: EoU OCOH ;RESET TX UNDER/EOM LATCH
,~ WRl CO.~_!~S
WAIT: E~ U 00H ;WAIT FUNCTION
DRCVRI: EIU 00H ;DISABLE RECEIVE INTERRUPTS
EXTIE: E~U 01H ;~A~h AL Ih.~nn~- ENABLE
XMTRIE: E~U 02H ;TRANSMIT Ih.~Rn~ ENABLE
SAVECT: EtU 04H ;STATU5 AFFECTS VECTOR
FIRSTC: EIU 08H ;RX Ih.~n~U~. ON FIRST CHARACTER
PAVECT: E~U 10H ;RX Ih.cnnU~. ON ALL CHARACTERS
; (PARITY AFFECTS VECTOR) PDAVCT: EQU 18H ;RX Ih~1~KU~- ON ALL CHARACTERS
; ~PARITY DOESN T AFFECT VECTOR) WRONRT: EQU 20H ;WAIT/READY ON RECEIVE
RDY: EQU 40H ;READY FUNCTION
WRDYEN: EQU 80H ;WAIT/READY ENABLE
,~ WR2 CU.II~..JS
IV: EQU 50H ;INTERRUPT VECTOR
;~ WR3 COIII.A..JS
B5: ElU 00H ;RECEIVE 5 8ITS/CHARACTER
RENABL: EIU 01H ;RECEIVER ENABLE
ENRCVR: El U 0lH ;REL~ ~ ENABLE
SCLINH: ENU 02H ;SYNC CHARACTER LOAD INHIBIT
ADSRCH: EIU 04H ;A~nRRSs SEARCH MODE
RCRCEN: EIU 08H ;RECEIVE CRC ENABLE
HUNT: EiU 10H ;ENTER HUNT MODE
AUTOEN: EIU 2OH ;AUTOENABLE
e7: EIU 40H ;RECEIVE 7 BITS/CHARACTER
B6: EIU 80H ;RECEIVE 6 BITS/CHARACTER
B8: ElU OCOH ;RECEIVE 8 BITS/CHARACTER
;~ WR4 COMMANDS
SYNC: ECU 00H ;SYNC MODES ENABLE
NOPRTY: ECU 00H ;DISABLE PARITY
ODD: EC~U 00H ;ODD PARITY
MONO: ECU 00H ;8 BIT SYNC CHARACTER
Cl: EC~U 00H ;Xl CLOCX MODE
PARITY: ErU 0lH ;ENABLE PARITY
EVEN: EIU 02H ;EVEN PARITY
Sl: EIU 04H ;l STOP BIT/CHARACTER
SlHALF: E-~U 08H ;l AND A HALF STOP B~TS/CHARACTER
S2: EIU OCH ;2 STOP BITS/CHARACTER
BISYNC: ECU 10H ;16 BIT SYNC CHARACTER
SDLC: E--U 20H ;SDLC MODE
ESYNC: E~U 3011 ;~ AL SYNC MODE
C16: EQU 40H ;X16 CLOCR MODE
C32: EQU 80H ;X32 CLOCX MODE
C64: EQU OCOH ;X64 CLOC~ MODE
~ Wl~S t~C)MMANnS ~ Z

~21 1421 T5: E~U 00H ;TRANSMIT 5 BITS/CHA~ ~TER
XCRCEN: E~U 0lH ;TRANSMIT CRC ENA8LE
RTS: EIU 02H ;REQUEST TO SEND
SELCRC: EIU 04H ;SELECT CRC-16 POLYNOMIAL
XENABL: EoU 08H ;TRAh~ n ENA8LE
BREAK: EIU lOH ;SEND 8REAK
T7: EIU 20H ;TRANSMIT 7 8ITS/CHARACTER
T6: El U 40H ;TRANSMIT 6 BITS/CHARACTER
T8: E~ U 60H ;TRANSMIT 8 8ITS/CHARACTER
DTR: El U 80H ;DATA ~ NAL READY
,~ WR6 COMMANDS

,~ WR7 COMMANDS
FLAG: EQU 7EH ;SDLC FLAG CHARACTER

CONSTANTS
,~ DELAY CONSTANTS
DOMS: E~U 000lH ; 0ms DELAY
D132US: El U 000AH ;132us DELAY
D5MS: EIU 0179H ;4.99525m~ DELAY
DlOMS: EIU 02F2H ;9.9905ms DELAY
D15MS: E~ U 046CH ;14.999m~ DELAY
D250MS: E~U 49e4H ;250.001ms DELAY
IALTO: E~-U 099CAH ;LAN TIME-OUT (1.25000sec - DEFAULT) ;~ GRID co~.~,Yns MRQST: EQU 01H ;REQUEST FOR MA~.~nShlP
MFACK: El!U llH ;ACKNOWL~u~Mrn. FOR FRAME
MSTR: EIU AAH ;MASTER MODE
SLVE: EIU B8H ;SLAVE MODE
MIXM: EIU CCH ;MIX MASTER/SLAVE MODE
RESET: EIU FFH ;RESET 8RICX
;~ GRID INTERRUPT v~RS
DATA: EQU 4lH ;DATA SENT TO DPram SRQST: ECU 42H ;TRANSMIT REQUEST SERVICED
TIMOUT: ECU 43H ;NO RECEIVE FROM TRANSMIT
MADRS: EtU 44H ;MASTERSHIP ADDRESS CHANGE
DRQST: ECU 45H ;MASTER DATA REQUSET
RXCERR: E-U 46H ;RECEIVE ERRORS
XMTERR: E~-U 47H ;TRANSMIT ERRORS
,~ INITIALIZATION STRING
II: EQU 49H ;ASCII "I"
LL: EQU 4CH ;ASCII "L"
AA: EQU 41H ;ASCII "A"
NN: EQU 4EH ;ASCII "N"
NULL: EQU 00H ;NULL TERMINATOR
;~ MULTI-MASTER
NPM: EQU OFH ;NUMBER OF POSSIBLE MASTERS
EM~n: E~11 nDnH PASS MASTERSHIP ~OMMAND

2~

`_ ~A21 ~q27~

CMD2: E~U OD2H ;ACCEPT MA~l~R~HlP CC.
CMDC: ElU ODCH
CMDD: E~U ODDH
CMDE: EIU ODEH
CMDF: EIU ODFH
~ SEARCH CONSTANTS
FOUND: EQU 0lH ;COMMAND FOUND
NOTFND: EQU 00H ;COMMAND NOT FOUND
OFFSET: EQU 00005H ;COMMAND OFFSET

; RAM MEMORY MAP
RAM: E~U 8000H ;BASE ADDRESS OF RAM
VAR8: E--U 8000H ;8-BIT V~TAnT.T' LANCNT: El U 800lH ;LAN TIME-OUT COU.. ~n PTRFST: EIU 8003H ;POINTER TO FIRST RCV DATA FRAME
RCVPTR: EiU 8005H ;POINTER TO ~unR~nl RCV DATA FRAME
CTRSOL: El U 8007H ;OLD APPLICATION TRANSMIT STATUS WORD
MSTAT: El'U 8008H ;STORAGE FOR MASTERSHIP STATUS
MADDR: Ef~U 8009H ;STORAGE FOR MASTER ADDRESS
RCVADR: EiU 800AH ;STORAGE FOR RECEIVED MASTER ADDRESS
RCVACK: E~U 800BH ;STORAGE FOR RECEIVE ACKNOWT.F~r~r~.
TKMSTR: EIU 800CH ;STORAGE FOR TAKE MAb.Ln~nlP FLAG
MMCMD: E~-U 800DH ;STORAGE FOR MULTI-MASTER CMD FLAG
SNDADR: E U 800EH ;STORAGE FOR SEND ADDRESS
CMDXFL: E~U 800FH ;Dx COMMAND FLAG
WROA: EOU 8010H ;SIO WR0 CH-A TRANSMIT PARAMETER
WRlA: Eru 8011H ;SIO WRl CH-A TRANSMIT PARAMETER
WR3A: EIU 8012H ;SIO WR3 CH-A TRANSMIT PARAMETER
WR5A: EIU 8013H ;SIO WR5 CH-A TRANSMIT PARAMETER
MODE: Ecu 8014H ;SYSTEM OPERATING MODE
NFDLA: E~U 8015H ;NEXT FRAME DELAY (16-BITJ
;

; 8017 - 803F OPEN
SBUF: EQU 8040H ;ADDRESS OF LAN TRANSMIT BUFFER
RBUF: EQU 8150H ;ADDRESS OF LAN RECEIVE BUFFER
; 8150 - 8990 RE~nv~
STAK: EQU 9FFFH ;STACX

; DUAL PORT RAM MEMORY MAP
DPRAM: EQU OF800H ;BASE ADDRESS OF DPram DPSBUF: EQU OF800H ;ADDRESS OF DUAL PORT TRANSMIT BUFFER
; F800 - F9OF RESERVED
DPRBUF: EQU OF9lOH ;ADDRESS OF DUAL PORT RECEIVE BUFFER
; F910 - FAl9 RE~nv~

SDFLG: EQU OFBEEH ;SEND DATA FLAG
; SET (0lh) = SEND DATA
; CLEAR (00h) = N0 DATA TO SEND
MRQFLG: EQU OFBEFH ;HOST ~P MASTERSHIP REQUEST FLAG
; SET (0lh) = REQUEST USE OF BUS
; CLEAR (00h) = DO NOT REQUEST USE
; OF BUS
BMSTR: EOU OFBFOH :BUS MASTER FLAG

; SET (01h) = BUS MASTER
; CLEAR (00h) = BUS AVE
ADDRES: E~U OFBFlH ;ADDR OF SECONDARY Uh_. S LAN ADDRESS
CTRLR: EGU OFBF2H ;RECEIVE STATUS WORD FOR LAN
CTRAS: E~lU OFBF3H ;APPLICATION STATUS WORD FOR TRANSMIT
ADRBUF: Er~U OF8F4H ;SEND ADDRESS STORAGE ~AFTER XMIT) MM A S: Ei U OFBF5H ;MULTI-MASTER AnDpFss L STATUS
LANINI: EIU OFBF6H ;LAN INITIALIZATION FLAG
; FFh ~ BRICK INITIALIZED
; 00h - BRICK NOT INITIALIZED
VERSON: EIU OFBF7H ;PROGRAM VERSION ID
STRING: E~U OFBF9H ;INITIALIZATION STRING ILAN
INT: E~U 0FBFEH ;ADDRESS OF Ih~RR~ BYTE
GRID: EIU OFBFFH ;HOST uP TO Z80 COII~JNlCATION BYTE

; POWER-ON
j AT POWER ON THE Z80 WILL LOOK AT ADDRESS 0000H FOR THE
; FIRST INSTRUCTION TO ~ u.~. ;

DI ;DISABLE Ih~RU~S DURING INIT-; IALIZATION AND HANDSHAKING
; OPERATIONS

; RESTART VECTORS

;

;

;

; INTERRUPT VECOTRS

;

DEFW CHBT8E ;CHANNEL B XMIT BUFFER EMPTY
DEFW CHBESC ; kAl~NAL/STATUS CHANGE
DEFW CHBRCA ; RECV CHARACTER AVIALABLE
DEFW CHBSRC ; SPECIAL RECV CONDITION
DEFW CHATRE ~HANNEL ~ ~MT~ ~UFFER ~Mp~y 2~

~A21 1427~

DEFW CHAESC ; EXTERNAL/STATUS CHANGE
DEFW CHARCA ; RECV CHARF 'ER AVAILABLE
DEFW CHASRC ; SPECIAL RE . CONDITION

; INITIALIZATION
; INITIALIZATION INCLUDES rr-F~JNG (LOADING 00h INTO EACH
; MEMORY LOCATION) RAM AND DPram, INITIALIZING THE SIO, ; SETTING THE Z80 I~.~nnu~ AnDrFCs (HIGH BYTE) AND MODE, ; AND CLEARING THE PRIMARY AND ALTERNATE REGISTERS. SETS
, THE ALTERNATE AND INDEX REGISTERS FOR RECEIVE OPERATIONS.
INIT: ORG 0200H
;

LD SP,STAK ;SET STACK POINTER
;

LD A,OOH ;CLEAR RAM (8000H - 9FFFH) LD BC,lFFFH ; 8K - 1 LD DE,RAM+l LD HL,RAM
LD (HL),A
LDIR
;

LD BC,400H ;CLEAR DPram (F800H - FBFFH) LD DE,DPRAM
LD HL,RAM
LDIR
;

LD A,00H ;INITIALIZE MASTER STATUS AND ADDRESS
LD (MSTAT),A ; STATUS = 00H = NOT MASTER
LD A,EOH ; AnDpF~s = EOH = COMPUPAC DEFAULT
LD (MADDR),A ; STORE IN RAM
LD (RCVADR),A ; "
LD (MM_A_S),A ; STORE IN DPram ;

CALL SIOMONINI ;INITIALIZE SIO

;

LD A,00H ;INITIALIZE INTERRUPT VECTOR & MODE
LD I,A ; VECTOR = 0OXXH
IM 2 ; MODE = 2 LD A,OOH ;CLEAR ALL REGISTERS
LD BC,00H
LD HL,00H
LD DE,00H
LD IX,00H
LD IY,OOH
;

EX AF,AF' ;ACCESS ALTERNATE REGISTERS
EXX
;

LD A,00H ;CLEAR ALTERNATE REGISTERS
LD BC,00H
LD HL,00H
LD DE,00H
;

LD HL,RBUF ;INITIALIZE ALTERNATE REGISTERS
LD (RCVPTR),HL ; ~ POINTERS FOR RECEIVE
LD (PTRFST),HL
LD BC,0000H
LD DE,0000H

~q l'A211427~

EXX ;ACCESS MAIN REGISTERS
EX AF,AF' ; HANDSHAKE WITH APPLICATION
; PERFORMS HANDSHAKING OPERATION WITH APPLICATION. TESTS FOR
; PRIMARY/SECONDARY UNITS. PROVIDES GRID WITH VERSION ID.
; GETS MULTI-MASTER ADDRESS FROM GRID AND SETS SIO SDLC ADD-; RESS FOR ADDRESS SEARCH.
, REGISTERS USED: A, BC, HL, IX
HNDSHK: LD IX,STRING ;SET-UP INITIALIZATION STRING
LD A,II ; "ILAN"
LD (IX+0),A
LD A,LL
LD (Ix+l)~A
LD A,AA
LD (IX+2),A
LD A, NN
LD (IX+3),A
LD A,NULL
LD (IX+4),A
;

LD BC,IDNUM ;GET VERSION ID NUMBER
LD (VERSON),BC ;PLACE IN DPr~m ;

;SET UP HANDSHAKE POINTERS
LD HL,DPSBUF ; RX POINTER
LD DE,DPRBUF ; TX POINTER
;

LPl: LD A,(GRID) ;GET RESET CMD OR OPERATING ADDRESS
OR A
JR NZ,JF2 ; VALID VECTOR
LD A,(HL) ;CHECK FOR HANDSHAKE CHARACTER
OR A
JR Z,LPl ; NO HANnsHAK~ CHARACTER
LD (DE),A ; TURN CHARACTER AROUND
INC HL ; NEXT TX POINTER
INC DE ; NEXT RX POINTER
;

LD A,L ;ENSURE NOT MORE THAN THE FIRST TWO
AND FDH ; ADDRESS ARE ~ FOR THE
LD L,A ; HANnSUAKF CHARACTERS.
LD A,E
AND FDH
LD E,A
;

JR LPl ;REPEAT LOOP
;

JF2: LD (MODE),A ;SAVE CMD OR ADDRESS
CP FCH ; CuHII~UnS RANGE FROM FDh - FFh.
JP M,0000H ; ADDRESS RANGE FROM 01h - EFh CP RESET ;WHICH CUM~ .. J
JP M,JF3 ; SET MONITOR MODE
RST OOH ; RESET BRICK
;

JF3: LD A,OOH ;RESET HOST uP TO Z~0 COMMUNICATION
LD (GRID),A ; BYTE
;

EI ;ENABLE INTERRUPTS
~1 ~'A21 1427~

, MONITOR MODE LOOP
; MONITOR MODE RECEIVES ALL ILAN TRAFFIC AND PASSES THE RE- ;
; CEIVED FRAMES TO THE HOST uP. THERE ARE TWO MODES
; ASSOCIATED WITH THE l~ lOR: ;
; MODE 1~ ORS ALL TRAFFIC ILAN
; MODE 2: SAME AS MODE 1 EXCEPT DOES NOT I J'l.OR THE
, MULTI-MASTER TRAFFIC
M ..I~uR MAIN:
;;; CALL SI~l_.. lNl ;INITIALIZE SIO FOR LJ.. l~OR MODE
;

MONITOR:
LD A,(DPSBUF) INC A
LD ~DPSBUF),A
;

LD A,(GRID) ;CHECK FOR Cu.ll ~.. J FROM HOST
OR A
JR NZ,GET Cu.l~
LD A,(RCVACK) ;CHECK RECEIVE ACKNOWLE~M~ FLAG
OR A
JR Z,MONITOR
;

LD A,00H ;RESET Rx ACKNOWLE~n~ FLAG
LD (RCVACK),A
DI
EX AF,AF' ;USE ALTERNATE REGISTERS
EXX
;

LD A,(INT) ;IS HOST READY~
OR A
JR NZ,JF5 ; HOST NOT READY
;

LD A,(MODE) ;CHECK MODE
CP FEH ; FEh = DATA TRAFFIC ONLY
JR NZ,MV_DATA ; FDh = ALL TRAFFIC
;

LD IX,(PTRFST) ;CHECK COMMAND OF FRAME
LD A,(IX+3) ; EXIT IF IT IS A MULTI-MASTER
CP DOH ; COMMAND
JR Z,JF5 JR Z,JF5 MV_DATA:
LD IX,(PTRFST) ;FRAME ADDRESS
LD A,(IX+2) ;GET FRAME LENGTH AND INCREMENT 8Y
ADD A,06H ; 6 TO ACCOUNT FOR HEADER.
LD C,A
LD A,00H
ADC A,A
LD B,A
;

LD HL,(PTRFST) ;SOURCE ADDRESS IN HL
LD DE,DPRBUF ;DESTINATION ADDRESS IN DE
LDIR ;EXCHANGE DATA UNTIL BC = 0 ;

~D A ~AT~ T~F~R~ ~S~ ~F ~ r~ ~ g CA21 1427~

LD (INT),A
JF5: LD HL,R8UF ;REINITIALIZE ALTERNh _ REGISTERS AND
LD (PTRFST),HL ; POINTERS FOR NEXT RECEIVE
LD (RCVPTR),HL
LD BC,0000H
LD DE,0000H
EXX
EX AF,AF' CALL SIOMONINI ;REINITIALIZE SIO
EI
JP 11 l~OR_MAIN
GET_CO '~ : ;CHECK C~ ~'~
CP FFH ; FF = RESET
JP M,ll~ uR ; ELSE CHANGE MODE

SU8ROUTINES/Ih~4nnu~. SERVICE Ruu.IN4S
,_ _______________ ===_______ , SIO INITIALIZATION SU~nuu.lN4 ; INITIALIZES SIO FOR SDLC OPERATIONS
, REGISTERS USED: B, C, HL
SIOJ INl:
LD HL,SIOTA ;~HA ~rr. A
LD C,SIOCA
LD B,SIOEA-SIOTA
OTIR
LD HL,SIOTB ;CHANNEL B
LD C,SIOC8 LD B,SIOEB-SIOTB
OTIR
RET
;

,~ SIO INITIALIZATION TABLES
SIOTA: DEFB R0 ;CHANNEL A TABLE
DEFB CHRST

DEFB IV

DEFB SDLC+Cl+SYNC
DEFB Rl DEFB WRDYEN+PDAVCT+SAVECT

DEFB FLAG

DEFB B8+HUNT+RCRCEN+ENRCVR
SIOEA: EQU S
;

SIOTB: DEFB RO ;CHANNEL B TABLE
DEFB CHRST

DEFB IV
DEFB Rl DEFB SAVECT+EXTIE
SIOEB: EQU S

3~

CA21 1427~

~ =====
, CHANNEL _ TRANSMIT BUFFER EMPTY ISR
; RESETS TRANSMIT BUFFER EMPTY lh.~nnu~
, REGISTERS USED: A' CH8T8E: EX AF,AF' ;USE ALTERNATE REGISTER A
LD A,RTIP ;RESET TRANSMIT Ih,~nhu~. PENDING
OUT (SIOCB),A
LD BC,(LANCNT) ;RESET INACTIVE LAN TIME-OUT COu.. L~n EX AF,AF' ;hE~.ORE REGISTER
EI
RETI

; CHANNEL B ~ h... AL/STATUS CHANGE ISR
; RESETS INACTIVE LAN TIME-OUT Cuu.. ,~n TO SIGNIFY LAN
; ACTIVITY.
, REGISTERS USED: A~
CHBESC: EX AF,AF' ;USE ALTERNATE REGISTER A
LD A,RESI ;RESET ~ hnAL STATUS Ih.~nnu~
OUT (SIOCB),A ;CHANNEL B
LD BC,(LANCNT) ;RESET INACTIVE LAN TIME-OUT CO~ n EX AF,AF' ;RE~ORE REGISTER
EI
RETI
___===__ ____________ __________ =======, , CHANNEL B RECEIVE CHARACTER AVAILABLE ISR
; RESETS RECEIVE CHARACTER AVAILABLE INTERRUPT.
, REGISTERS USED: NONE
CHBRCA: LD BC,(LANCNT) ;RESET INACTIVE LAN TIME-OUT COUNTER
EI
RETI

CHANNEL B SPECIAL RECEIVE CONDITION ISR
; RESET SPECIAL RECEIVE CONDITION Ih,~nhu~
, REGISTERS USED: A~
CHBSRC: EX AF,AF' ;USE ALTERNATE REGISTER A
LD A,ER ;ERROR RESET
OUT (SIOCB),A
LD BC,~LANCNT) ;RESET INACTIVE LAN TIME-OUT COUNTER
EX AF,AF' ;RE~,ORE REGISTER
EI
RETI

,==========_________==========________________== __________, CHANNEL A TRANSMIT BUFFER EMPTY ISR
; RESET TRANSMIT BUFFER EMPTY INTERRUPT.
; REGISTERS USED: A~ ;
B/

~A2 1 1 427~

CHATBE: EX AF,AF' ;USE ALTERNATE REGISTER A
LD A,RTIP ;RESET TRANSMIT INTEr PT PENDING
OUT (SIOCA),A
LD BC,(LANCNT) ;RESET INACTIVE LAN TIME-OUT Cuu.. -~n EX AF,AF' ;RE~.uRE REGISTER
EI
RETI

, CHANNEL A ~A.~h.. AL/STATUS CHANGE ISR
; RESET ~ hnAL/STATUS CHANGE lh~nk ; REGISTERS USED: A' CHAESC: EX AF,AF' ;USE ALTERNATE REGISTER A
LD A,RESI ;RESET ~cKnAL STATUS Ih.,nnu~.
OUT (SIOCA),A
LD BC,(LANCNT) ;RESET INACTIVE LAN TIME-OUT COUNTER
EX AF,AF' ;RE~.uRE REGISTER
EI
RETI

~UA~T~T. A RECEIVE CHARACTER AVAILABLE ISR
, RECEIVES SDLC DATA STREAM FROM LAN AND PLACES IT TO
; RAM.
; REGISTERS USED: A' CHARCA: EX AF,AF' ;USE ALTERNATE REGISTERS FOR RECV
EXX
INI ;INPUT DATA TO RECV BUFFER
INC DE ;I~._nEM~h~ RECV CHARACTER COu.. -,-n EX AF,AF' ;SAVE ALTERNATE REGISTERS
EXX
LD BC,D132US ;SET 2 BYTE + 0.5 8IT DELAY FOR NEXT
; CHARACTER.
EI
RETI

, CHANNEL A SPECIAL RECEIVE CONDITION ISR
; CHECKS SIO READ REGISTER 1 FOR END OF FRAME FLAG AND VALID
; CRC. IF SET, PLACE RECEIVED DATA INTO DPram AND NOTIFY
; GRID. IF NOT SET, DISCARD DATA RFCAUSE AND ERROR HAS
; OC~unh~u THUS DATA I~.~nE-~ IS QUESTIONABLE.
, REGISTERS USED: A, ALTERNATE REGISTERS
CHASRC: PUSH AF ;SAVE REGISTER CU.. -~n-~
LD A,Rl ;POINT TO REGISTER 1 OUT (SIOCA),A
IN A,~SIOCA) ;RETRIEVE REGISTER CC.. -~-.-S
r~IT 7,A ;CHECK EOF BIT FOR VALID RECIEVE
JR Z,ERROR ;DATA NOT VALID, EXIT
BIT 6,A ;CHEC~ CRC BIT FOR VALID CRC
JR NZ,ERROR
LD A,0lH ;SET RECEIVE ACKNOWLEDGEMENT
LD (RCVACK),A

~ /1 CA2 1 1 ~27a -ERROR: LD A,RXCERR
LD (INT),A
EXX
LD HL,R8UF ;RESET ALTERNATE REGISTERS AND
LD ~PTRFST),HL ; POINTERS FOR NEXT RE~l LD (RCVPTR),HL
LD 8C,0000H
LD DE,0000H
EXX
;

SKIP4: LD A,ER ;RESET ERROR CONDTTION (REG. 0) OUT (SIOCA),A
POP AF ;hE~AE REGISTER ~ n~S
LD 8C,(LANCNT) ;RESET INACTIVE LAN TIME-OUT Cuu.. ~n EI
RETI

; END PROGRAM
END PROGRAM END

g/Z

APPENDIX C

3~

CA21 1427~

=
PROJECT: D.. 112-1001, DA-112-1002 DESCRIPTION: ILAN HARDWARE L SOFTWARE DEVELOPMENT :
Data SCOPQ for monltorlng and debugglng c 1catlons for the ILAN protocol.

~ILE NAME: DS.CPP
PROCPWI.. _.. S: J. Douglas Fletcher, DA Group Mar~ Clark, DA Group COMPILER: eorland Turbo C++ 3.0 SYSTEM: IBM PC/XT/AT/PS2 ~ Compatlbles OPERATING SYSTEM: M~-DOS
~====__________ ____~.__,__________________ ~ _._______c_______~
REVISION HISTORY:
D~TE VER PROGRAMMER CO... ~.
________ _____ ____________ __________________________ 08-03-92 1.0 ~dfJmc lnltlal tested code; cannot vlew f 1ag9 ~=,================_________ _____ -- /
// llan Data Scope C1a8B and Program llnclude ~dos.h>
~lnclude <conlo.h>
$1nclude <ctype.h>
~lnclude ~alloc.h>
~lnclude <stdlo.h>
~lnclude <stdllb.h>
~lnclude <strlng.h>
~deflne uchar unslgned char Ideflne uchfar unslgned char far ~deflnQ eo (uchfar ~)0xbO000000 // pc-based lan map ~deflne C0 ~uchfar ~)0xc0000000 // GRID based lan map ~deflne C6 (uchfar ~)0xc6000000 // PS2 based lan map typedef enum (fal~e, true} boolean;
// _ __ ____ __ _________ clas~ llan ( prlvate:
uchfar T~UFFER_SIZE; // DPram send h recelve buffer uchar VER_ID_l; // Global varlables for monltor verslon uchar VER_IT)_0; // ID default typedef struct vnrlable~
lnt lan present; // lndlcates presence of lan card uchfar ~ad = buffer; // address of tlme-out unlt uchfar ~app status; // appllcatlon status bytes uchfar ~lnlt_strlng; // lnltlallzatlon strlng uchfar ~lnt vector; // lnterrupt vector uchfar ~lan lnlt; // lan lnltlallzatlon flag uchfar ~lan_status; // lan status bytes uchfar ~mm address; // multl-master address uchfar ~mstr_rqst; // mastershlp request uchfar ~recv array; // recelved data uchfar ~sec u addr: // secondarv untt~ T.AN A~dr~

CA211~27~

uchfar ~send array; // data for transmlt uchfar ~versIo 'd; // lan conflqur lon ldentlflcatlon uchfar ~lan st~ buf; // lan status b ,es buffer uchfar ~z~O, // GRlD to DPram ~ varlables;
varlnbles ~ptr;
publlc:
llan();
vold screen(vold);
boolean ~et lan base~vold);
boolean fln = dpram(uchfar ~);
vold set mem map(vold);
vold reset(vold);
vold monltor mode(vold);
vold handshake(vold);
vold get_verslon(vold);
vold set_ver~lon(uchar vl, uchar v2) {VER_ID_l = vl; VER_ID_O = v2;~
vold get_data(vold);
llan(vold);

// ----______________________ llan::llan () ptr = new varlables;
~UFFER_SIZE = Ox016;
lf (ptr == NULL) ( cput~ ("D_Scope was unable to allocate raml~r\n");
exlt (O);

// The ublqultous maln()------------------------------------------------------vold maln(vold) llan d_scope;
c~rqcr();
d_~cope.~creen~); // Screen and Memory Setup 1f ~Id scope.set lan base()) ( cprlntf("\r\nIL~N Card does not exlst.\r\nExltlng Program.\r\n");
exlt (O);
) d_scope.set_mem map~);
d scope.reset~); // Reset ILAN Card d scope.monltor mode~); // Set monltor mode d scope.handshake(); // Establlsh communlcatlons llnk wlth ILAN
d scope.set_verslon(Oxll, Ox9l); // Match proper Monltor EPROM Verslon d_scope.get_verslon(); // Get Monltor EPROM Verslon d_scope.get_data(); // Get Data untll Break // llan screen drawlng thlngy--------------------------_______________________ vo Ld llan::screen(vold) wlndow(l,1,79,24); clrscr();
CZ

3~
~A2~ 1427~

gotoxy ~1, 1); cputs ~"\xD5"); // Dlsplay border of top llne for ~lnt x - 2; x <= 78 x++) cputs ~"\xCD");
cputs ~"\xB8");
for ~x = 2; x < 5; x++) // Sldes { gotoxy ~1, x); cputs ~"\xB3");
gotoxy ~79, x); cputs ~"\xe3");
}

gotoxy ~1, 5); cput~ ~"\xD4"); // Bottom llne for ~x - 2; x < 79; x++) cputs ~"\xCD");
cputs ~"\xBE");
gotoxy ~1,24); // Dlsplay dlvlslon llne for ~x = l; x < 79; x++) cputs ("\xCD");
gotoxy (27, 2); // Dlsplay headlng hlghvldeo (); cputs ("I L A N D A T A S C 0 P E"); normvldeo (~;
gotoxy (3, 4); cputs ("Multl-Master Address~
- wlndow(l,6,79,23); // Data 18 wrltten dlrectly screen from llnes 6 - 23 // llan setup of ba~e address of lan card-------------------------------------boolean llan::set lan_base (vold) cputs ("\r\nChecklng for ILAN Card.");
ptr->Ynnd arrav - NULL;
lf (flnd_dpram eO) ptr->~end_arrsy = W ;
lf (flnd_dpram C0) ptr-~end_array = C0;
lf (flnd dpram C6) ptr->send array - C6;
return (booleAn)(p~r->send array l= NULL);
) // llan flnd where dual-ported ram exlsts at----------------------------------boolean llan::flnd dpram (uchfar ~base address) bAse address += Ox3F9; // Polnt to lnlt_strlng lnt compare = strcmp(ba~e address, "ILAN"); // Test for lnlt ~trlng lf (compare == 0) { cput9 (" "); // Dlsplay lnlt strlng for (lnt x = 0; x < 6; x++) cprlntf("tc",base addresslx]);
return (boolean~(compare == 0~;
// llan set memory map of the dual ported ram based on send array(ba~e~-------vold llan::set_mem map () ptr->recv array = ptr->send array + OxllO;
ptr->sec u addr = ptr->send array + Ox3Fl;
ptr->lan status = ptr->send array + Ox3F2;
ptr->app status = ptr->send array + Ox3F3;
ptr->adr buffer = ptr->send_array + Ox3F4;
ptr->mm address = ptr->send array + Ox3F5;
ptr->lan lnlt = ptr->send_array + Ox3F6;
ptr->verslon ld = ptr-~send_array + Ox3F7;
ptr->lnlt strlng = ptr->send array + Ox3F9;
ptr->lnt_vector = ptr->send array ~ Ox3FE;
ptr ~.80 - ptr->~end_array + Ox3FF, G~

(~A21 ~427~

vold llan::reset (vold) cprlntf("\r\nResettlng L. . Card\r\n");
~ptr->z60) = OxFF; // re-et ~rlck flag sleep(l); // allow 8rlck to reset }

// ___________________ vold llan::monltor mode (vold) unslgned char chr;

do ~ cprlntf("\r\n[A]ll Trafflc -or- [D~ata Trafflc only"
"\r\nEnter Monltor Mode: "); // provlde monltor mode chr - getch();
swltch (toupper~chr)) case 'A': ~(ptr->z90) ~ OxFD; break; // All Trafflc Mode ca~e 'D': ~ptr->z60) e OxFE; break; // Data Only Mode default : cprlntf("\r\nINVALID MODEI Try IA -or- Dl.\r\n");
~(ptr->z60) = OxOO;
) whlle~ptr->z80)==OxOO);

// llan handshake wlth the card to get lt started-----------------------------vold llarl::harldshake ~vold) cprlntf ~"\r\nHandshaklng wlth LAN card.");
lf ~(ptr->lan lnlt) I= OxFF) // has handshake been accompllshed { lnt x = wherex ~); // handshake valld == OxFF
lnt y = wherey ~);
wlndow (25, 4, 28, 4); // mm_address wlndow cprlntf ("~02X", ~(ptr->mm_address));
wlndow (1, 6, 79, 23); // data wlndow gotoxy (x, y); // restore cursor posltlon cprlntf (" Complete.\r\n");

~ptr-~lan_lnlt) = OxFF); // Set lan lnlt vector ~ // to complete handshake cprlntf ~"\r\nHandshaklng Complete.\r\n");

// llan get verslon of lan card ln use ~lf any)-----------------~-~~~~~~~~~~~~
volcl llnn::qet_verslon ~vold) lf ~ptr->verslon_ldlll I= VER_ID_I 6h ptr->verslon_ldlO] != VER_ID_O) ( cprlntf ,"\r\nOld Monltor ASM Code. Not Valld Data Scope Code.");
cprlntf ~"\r\nExltlng Program.
sleep (3 ;
wlndow ( ,1,79,24);
clrscr ();
exlt ~O~;
wlndow ~69, 25, 79, 25); // verslon ld wlndow textattr (~LACK + (LIGHTGRAY << 4)); // modlfled text attrlbutes cprlntf (" V - ~02x~02x ", ptr->verslon ldlll, ptr->verslon_ld10]);
normvldeo ~); // restore text attrlbutes ) // llan get data (from the llan card)-------------~--~~~~~~~~~~~~~~~~~~~~~~~~~
vold llan::qet data ~vold) C 4 I~A21 1427~
-struct screen pos ~ch~ -h; // JCreQn_ r (~creen posltlon) cha. at; // handle~ ~ , char/attrlb } ~creen poJ; // Jtructure of the ~ldeo dlsplay char chr;
r-ql~ter char J chrO, _chrl, attr=Ox70; // s_chr rep~e~en~J 2 ~creen chars regl~ter char recv array dec;
wlndow ~1, 25, 44, 25); // Informatlon wlndow cprlntf ("DEPhES8: (ESC) to qult (c) to clear JCreen");
wlndow ~1, 6, 79, 23); // re~et data wlndow clrJcr ();
~(ptr-~adr buffer) = OxOO; // re~et xmlt addresJ buffer screen_pOJ 5 (Jtruct screen pos~)Oxb8000320; // screen po~ltlon polnter ~ ~ // offJet from bBOOOOOO
whlle (1) whlle (Ikbhlt ()) // repeat loop untll key 1~ pressed lf (~(ptr-~lnt vector) =D Ox41~ // Ox41 19 the Z80 data ready ~19nal attr = (attr==OxO7) ? Ox70 : OxO7; // norm/lnverse vldeo ln attr lnt dex z (lnt)~(ptr-~recv array~2)15; // determlnestrlng length for (lnt dec = O; dec ~= dex; dec++) { lf(screen pos >= (struct screen po~)Oxb8000E5E) // boundar les of screen pO8 = (9truct screen pos~)Oxb8000320; // data wlndo w recv array dec = ptr-~recv arrayldecl; // reduces array lookup tlme J_chrO = (recv array_dec & OxFO) ~> 4;
s_chrl = (recv array_dec 6 OxOFl;
(9 chrO > 9) 7 (9 chrO+=('A'-10)~ : (9 chrO+='O');
(9 chrl > 9) ? (s_chrl+=('A'-10)) : (9 chrl+='O');
screen pos->ch = 9 chrO;
screen pos->at - attr;
~screen pos++;
screen pos->ch = 9 chrl;
screen pos->at = attr;
~screen po~+;
screen poJ->ch = Ox20;
screen pos->at = attr;
~screen pos~+;
screen pos->ch = Ox20;
screen pos->at = attr;
~screen pos++;
~(ptr->lnt vector) = OxOO; // Reset data ready } // buffer for Z80 chr = getch (); // Parse keypress swltch ~toupper (chr)) case '\xlB': wlndow (1, 1, 80, 25); // ESC == qult clrscr ();
~ptr->z80) = OxFF; // Reset lan card exlt (O);
case ~C~ : wlndow (1, 6, 80, 23~; // C == clear data ~creen clrscr ~and reset to lnlt. posltlon sc- ~n po~ = (struct screen_r ~)Oxb8000320;
br~ ~:

// __--_ ___________________ llan::~llan ~vold) delete ptr

Claims (20)

1. An apparatus for enabling a personal computer to obtain data from a data transmission cable connecting at least two devices, wherein the personal computer has a personal computer microprocessor with a data bus, said apparatus comprising:
input means for receiving data from the transmission cable;
an apparatus microprocessor connected to said input means;
a data memory connected to said apparatus microprocessor and said input means;
a program memory connected to said apparatus microprocessor, said program memory programmed with means for operating said apparatus microprocessor to transfer data received by said input means to said data memory without communicating any signal onto the transmission cable; and means for connecting said data memory directly to the data bus of the personal computer microprocessor so that the personal computer microprocessor can directly access data stored in said data memory.

2. An apparatus as defined in claim 1, further comprising:
means for mounting said input means, said apparatus microprocessor, said data memory, said program memory and said means for connecting inside said personal computer; and a multiple conductor cable having one end for connecting to said input means and having another end for connecting to one of the devices and the data transmission cable connected to such device so that the personal computer is spaced from the data transmission cable and the devices connected thereto.

3. A data scope, comprising:
connector means for connecting into a data transmission system, which system has at least two devices between which data signals are communicated, so that the data signals are also communicated through said connector means;
data signal capturing means, connected to said connector means, for receiving and storing data signals communicated through said connector means; and a personal computer connected to said data signal capturing means for displaying data signals stored in said data signal capturing means.

4. A data scope as defined in claim 3, wherein said personal computer includes:
a microprocessor;
a display; and a data bus interconnecting said microprocessor, said display and said data signal capturing means so that data signals stored in said data signal capturing means are directly communicated over said data bus to said display.

5. A data scope as defined in claim 4, wherein said personal computer further comprises a memory connected to said microprocessor and programmed for operating said microprocessor to retrieve a data signal in a first format from said data signal capturing means over said data bus, convert the retrieved data signal to a second format, and display the converted data signal through said display.

6. A data scope as defined in claim 5, wherein said data signal capturing means includes:
serial input means for receiving serial data from said connector means;
a data signal capturing control microprocessor connected to said serial input means;
a data memory connected to said data signal capturing control microprocessor and said serial input means;
a program memory connected to said data signal capturing control microprocessor, said program memory programmed with means for operating said data signal capturing control microprocessor to transfer data received by said serial input means to said data memory without communicating any signal onto said connector means and into the data transmission system; and means for connecting said data memory directly to said data bus of said personal computer so that said microprocessor of said personal computer directly accesses data stored in said data memory.

7. A data scope as defined in claim 3, wherein said data signal capturing means includes:
serial input means for receiving serial data from said connector means;
a data signal capturing control microprocessor connected to said serial input means;
a data memory connected to said data signal capturing control microprocessor and said serial input means;
a program memory connected to said data signal capturing control microprocessor, said program memory programmed with means for operating said data signal capturing control microprocessor to transfer data received by said serial input means to said data memory without communicating any signal onto said connector means and into the data transmission system; and means for connecting said data memory directly to said personal computer so that said personal computer directly accesses data stored in said data memory.

8. A data scope as defined in claim 7, wherein said personal computer comprises means for retrieving a data signal in binary ASCII format from said data memory of said data signal capturing means, converting the retrieved binary ASCII
data signal to hexadecimal format, and displaying the converted hexadecimal data signal.

9. A data scope as defined in claim 3, wherein said personal computer comprises means for retrieving a data signal in a first format from said data signal capturing means, converting the retrieved data signal to a second format, and displaying the converted data signal.

10. A method of enabling a personal computer to display data communicated over a data transmission cable between at least two devices, wherein the personal computer has a personal computer microprocessor with a data bus, said method comprising:
connecting a data signal capturing interface to the data transmission cable so that the data signals are also communicated to the data signal capturing interface;
receiving and storing data signals in the data signal capturing interface; and transferring stored data signals into the personal computer from the data signal capturing interface for displaying data signals through a display screen of the personal computer.

11. A method as defined in claim 10, wherein said transferring includes retrieving onto the data bus a data signal in a first format from the data signal capturing interface, converting the retrieved data signal to a second format, and communicating the converted data signal over the data bus for display.

12. A method as defined in claim 10, wherein data signals are communicated to the data signal capturing interface from the data transmission cable without the data signal capturing interface communicating data signals to the data transmission cable.

13. A method of monitoring data signals transmitted between at least two devices over a local area network cable connecting the devices at an oil or gas well site, said method comprising:
copying transmitted data signals into a memory at the well site at a speed at least equal to a speed at which the data signals are transmitted on the local area network cable;
and displaying at the well site on a monitor of a personal computer representations of the copied data signals.

14. A method as defined in claim 13, wherein the speed at which the data signals are transmitted on the local area network cable is greater than 115.2 kilobaud and less than 500 kilobaud.

15. A method as defined in claim 13, wherein the speed at which the data signals are transmitted on the local area network cable is 125 kilobaud.

16. A method as defined in claim 13, wherein copying transmitted data signals includes sensing the transmitted signals on the local area network cable without inputting other signals onto the local area network cable.

17. A method as defined in claim 13, wherein displaying on a monitor of a personal computer includes:
communicating copied data signals in a first format from the memory directly onto a data bus of a microprocessor of the personal computer;
converting the communicated copied data signals from the first format to a second format; and activating the monitor of the personal computer with the converted communicated copied data signals transferred directly thereto over the data bus.

18. A method as defined in claim 17, wherein copying transmitted data signals includes sensing the transmitted signals on the local area network cable without inputting other signals onto the local area network cable.

19. A method as defined in claim 18, wherein the speed at which the data signals are transmitted on the local area network cable is greater than 115.2 kilobaud and less than 500 kilobaud.

20. A method as defined in claim 18, wherein the speed at which the data signals are transmitted on the local area network cable is 125 kilobaud.